JP2016051843A - Three-dimensional laminated wiring board, electronic apparatus, information processing system, and information communication system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a three-dimensional laminated wiring board, an electronic apparatus, an information processing system, and an information communication system that are capable of simply and reliably confirming that the three-dimensional laminated wiring board is adequately manufactured and implemented.SOLUTION: A three-dimensional laminated wiring board includes a board 1, wirings 311-326, and an authentication pattern Q. The wiring 311-326 are provided in the thickness direction of the board 1. The authentication pattern Q is provided on the board 1, and has the quality of material, shape, arrangement, structure or size that can be identified from the wirings 311-326 and the board 1.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a three-dimensional multilayer wiring board, an electronic device, an information processing system, and an information communication system.

  Applying TSV (Through-Silicon-Via) technology that provides a large number of through-electrodes on a circuit board as a technique to realize a three-dimensional circuit arrangement in various scales of integrated circuits, various semiconductor elements or electronic devices such as chips thereof, A three-dimensional multilayer wiring board in which a plurality of circuit boards are laminated has been proposed. For example, Non-Patent Document 1 is known as a prior art document regarding a three-dimensional multilayer wiring board using the TSV technology.

  By the way, with the globalization of technology, a situation has arisen in which the manufacturing process of a three-dimensional multilayer wiring board is not always reliable. There is a risk of incorporating malicious circuits such as so-called “Trojan horses” or “back doors” in the manufacturing process. “Trojan horse” refers to, for example, modifying a hardware in a semiconductor chip to incorporate an illegal circuit for the purpose of causing a malfunction of the system or bringing out information. “Backdoor” refers to, for example, providing a function of communication connection secretly in a computer in order to use the function of the computer without permission.

  In order to eliminate the risk of incorporating malicious circuits such as “Trojan horses” or “back doors”, it is necessary to ensure that each circuit board is properly manufactured and mounted. Must be able to confirm.

  As such a confirmation means, a technique (PUF Physical Unclonable Function) that incorporates ID information that cannot be impersonated into each layer of the devices constituting the three-dimensional stacked structure is utilized.

  However, in order to apply the PUF technology to a three-dimensional laminated structure, it is impossible to avoid difficulties such as an increase in design restrictions such as an external connection of an information reading system.

Research and development trends of TSV technology for 3D LSI packaging (Science and Technology Trends April 2010 issue)

  An object of the present invention is to provide an advanced technology that is extremely useful for constructing an electronic circuit system having a function of preventing malfunction and information leakage in an LSI chip and the like.

  More specifically, an object of the present invention is to provide a three-dimensional multilayer wiring board, an electronic device, an information processing system, and an information communication system that contribute to the realization of an electronic device structure having a function of preventing malfunction and information leakage. Is to provide.

  Another object of the present invention is to provide a three-dimensional multilayer wiring board, an electronic device, an information processing system, and an information communication system capable of easily and reliably confirming a genuine product that has been properly manufactured and mounted. Is to provide.

  Yet another object of the present invention is to provide a three-dimensional multilayer wiring board that can easily and reliably confirm that the product is not properly manufactured and mounted, that is, not a genuine product but a counterfeit product, An electronic device, an information processing system, and an information communication system are provided.

  In order to solve the above-described problem, a three-dimensional multilayer wiring board according to the present invention includes a board, wiring, and an authentication pattern. The wiring is provided on the substrate while being electrically insulated, and the authentication pattern is provided on the substrate and has a material, shape, arrangement, structure, or size that can be identified from the wiring and the substrate.

  As described above, the three-dimensional multilayer wiring board according to the present invention includes a substrate and wiring, and the wiring is electrically insulated from the substrate. Therefore, the TSV technology is applied to form a three-dimensional multilayer structure. It can contribute to realization.

  Furthermore, the three-dimensional multilayer wiring board according to the present invention includes an authentication pattern. This authentication pattern is provided on the substrate and has a material, shape, arrangement, structure, or size that can be identified from the wiring and the substrate. Such an authentication pattern can be confirmed separately from the substrate, the wiring, and the insulating portion by external observation. Therefore, it can be easily and reliably confirmed by external observation that it is a legitimately manufactured and mounted three-dimensional multilayer wiring board, that is, a genuine three-dimensional multilayer wiring board.

  This means that it can be easily and reliably confirmed that the product has not been manufactured or mounted properly, that is, it is not a genuine product but a forged product. The authentication pattern can be confirmed in a state of a three-dimensional laminated wiring board in which a plurality of wiring boards are laminated by using, for example, an X-ray CT apparatus.

  The three-dimensional multilayer wiring board according to the present invention is used as an electronic device as it is depending on the mobile phone, or is incorporated into various electronic devices. These electronic devices are used as component devices such as information processing systems and information communication systems.

  In summary, according to the present invention, it is possible to provide a cutting-edge technology that is extremely useful for the construction of an electronic circuit system having a function of preventing malfunction and information leakage in an LSI chip or the like.

As described above, according to the present invention, the following effects can be obtained.
(A) A three-dimensional multilayer wiring board, an electronic device, an information processing system, and an information communication system that contribute to the realization of a three-dimensional multilayer structure can be provided.
(B) It is possible to provide advanced technology that is extremely useful for the construction of an electronic circuit system having a function of preventing malfunction and information leakage in an LSI chip and the like.
(C) It is possible to provide a three-dimensional multilayer wiring board, an electronic device, an information processing system, and an information communication system that contribute to the realization of an electronic device structure having functions for preventing malfunction and information leakage.
(D) It is possible to provide a three-dimensional multilayer wiring board, an electronic device, an information processing system, and an information communication system that can easily and reliably confirm that the product is genuinely manufactured and mounted. .
(E) a three-dimensional multilayer wiring board, an electronic device, an information processing system, capable of easily and reliably confirming that the product is not properly manufactured and mounted, that is, not a genuine product but a counterfeit product; And an information communication system can be provided.

  Other objects, configurations and advantages of the present invention will be described in more detail with reference to the accompanying drawings. However, the attached drawings are merely examples.

It is a perspective view which shows a part of wiring board used for the three-dimensional laminated wiring board which concerns on this invention. It is a perspective view which expands and shows an example of the authentication pattern used for the three-dimensional laminated wiring board which concerns on this invention. It is a perspective view which expands and shows an example of the wiring used for the three-dimensional laminated wiring board which concerns on this invention. It is sectional drawing which expands and shows an example of the wiring used for the three-dimensional laminated wiring board which concerns on this invention. It is a figure which shows another form of the authentication pattern used for the three-dimensional laminated wiring board which concerns on this invention. It is a perspective view which shows a part of another embodiment of the wiring board used for the three-dimensional laminated wiring board which concerns on this invention. FIG. 7 is a perspective view for explaining authentication pattern confirmation by an X-ray CT apparatus for the wiring board shown in FIGS. 1 is a perspective view showing a three-dimensional multilayer wiring board according to the present invention. FIG. 9 is a front view of the three-dimensional multilayer wiring board or electronic device in FIG. 8. FIG. 10 is a perspective view for explaining authentication pattern confirmation by an X-ray CT apparatus for the three-dimensional multilayer wiring board shown in FIGS. 8 to 9. 1 is a diagram showing an information processing system and an information communication system according to the present invention.

1. Wiring Substrate Referring to FIGS. 1 to 4, a part of a wiring substrate used in the three-dimensional laminated wiring substrate according to the present invention is shown. The illustrated wiring board includes a substrate 1, wiring patterns P <b> 11 to Pnm by wirings 311 to 326, and an authentication pattern Q.

  The substrate 1 is a semiconductor substrate made of, for example, a Si substrate or a SiC substrate having a thickness T1 of 50 μm or less, and includes a substrate layer 101 having a thickness T11 and a semiconductor forming layer 102 having a thickness T12. The semiconductor formation layer 102 has semiconductor circuit portions 371 and 372 therein as shown in FIG. At least a part of the semiconductor circuit portions 371 and 372 is connected to electrodes 381 and 382 provided on the other surface 112 on the opposite side to the one surface 111 of the substrate 1. Bumps 361 and 362 are formed on the electrodes 381 and 382 as necessary.

  Each of the wiring patterns P11 to Pnm has a plurality of n = 16 wirings 311 to 326 arranged at narrow pitches d1 and d2 in the plane of the insulating portion 51 together with the insulating portion 51. The number n is an arbitrary number.

  The insulating part 51 is filled in a minute space 121 formed on the one surface 111 of the substrate 1. The insulating portion 51 is preferably made of an insulating paste containing insulating fine particles, Si fine particles, and a liquid organic Si compound, such as grooves or holes formed in the thickness direction of the substrate 1 (referred to as a fine space). It is formed by filling the inside of 121 and curing it. When the insulating paste is filled in the fine space 121 and heat-treated, Si—O bonds are formed by the reaction between the Si fine particles and the organic Si compound, and the insulating fine particles are used as an aggregate, and the surroundings are formed by Si—O bonds. A buried insulator structure is obtained. The insulating fine particles and the Si fine particles have a particle size of nanometer size (1 μm or less). However, the insulating fine particles and the Si fine particles need not have a uniform particle size, and can include particles having different particle sizes within the above-mentioned nanometer size region.

  The wirings 311 to 326 extend along the direction of the thickness T1 of the substrate 1, one end is exposed on the surface 111 of the substrate 1 on the surface of the insulating layer 51, and bumps 351 and 352 are formed on the exposed end surfaces. It is joined. The other ends of the wirings 311 to 326 may be through conductors exposed on the bottom surface 112 of the substrate 1, or may be non-through conductors remaining inside the substrate 1. Although not shown in the drawing, a horizontal wiring may be provided on the surface or inside of the substrate 1.

  In this embodiment, the wirings 311 to 326 are planar quadrangular shapes, but may be other polygonal shapes or circular shapes. Moreover, although it is arranged in a matrix of 4 rows and 4 columns, the number of matrices may be arbitrary. The wirings 311 to 326 can be formed by applying a known technique such as a plating method, a molten metal filling method, or a conductive paste filling method. As an example, the dimensions of the wirings 311 to 326 are such that the arrangement pitches d1 and d2 are in the range of 4 to 100 μm and the diameter is in the range of 0.5 to 25 μm. However, the arrangement pitch does not have to be a constant dimension, and the diameter is not limited to the above-described value.

  In the illustrated wiring board, the insulating portion 51 is made of an insulator filled in a minute space 121 such as a groove or a hole formed in the thickness direction of the substrate 1, and therefore the insulating portion 51 is a substrate made of a Si substrate or the like. 1.

  The plurality of wirings 311 to 326 are arranged at narrow pitches d1 and d2 in the plane of the insulating portion 51 integrated with a semiconductor substrate made of a Si substrate or the like, and in a minute space such as a groove or a hole extending in the thickness direction. It is filled inside. Accordingly, each of the plurality of wirings 311 to 326 is supported in common by one insulating portion 51 and is electrically insulated from each other and also electrically insulated from the substrate 1. In this electrical insulator structure, the pitches d1 and d2 between the three-dimensional wirings are, for example, 4 μm or less as compared with the case where the plurality of wirings 311 to 326 are individually electrically insulated and arranged on the substrate 1. , Can be significantly reduced. Therefore, a three-dimensional wiring board having a narrow pitch TSV arrangement and structure can be realized.

  The wirings 311 to 326 are selected from at least one selected from the group of Ag, Cu, Au, Pt, Ti, Zn, Al, Fe, B, Si and Ni, and from the group of Sn, In, Bi, and Ga. Or at least one of them. The first group is a high melting point metal material, and the second group is a low melting point metal material.

  The number, shape, arrangement, and the like of the wirings 311 to 326 are design matters selected from various viewpoints such as the definition of a rational signal transmission path and the satisfaction of electrical characteristics required for the signal transmission path. .

  Next, the authentication pattern Q is provided on the substrate 1 and has a material, shape, arrangement, structure, or size that can be identified from the wirings 311 to 326, the insulating portions 51 and 52, and the substrate 1. The authentication pattern Q shown in the embodiment is made of a metal or alloy material and is different from the substrate 1 in terms of material. Specifically, the same material as the wirings 311 to 326 can be used. However, since the authentication pattern Q only needs to be identified from the wirings 311 to 326 and the substrate 1, it is not necessarily required to be a metal or alloy material. It may be a ceramic material, a composite material in which a ceramic material and an organic material are mixed, or a composite material of these materials and a metal or alloy material.

  The authentication pattern Q shown in the embodiment is formed inside the insulating portion 52 filled in the minute space 122 provided on the one surface 111 of the substrate 1. The insulating part 52 can be made of the same material as the insulating part 51 of the wiring patterns P11 to Pnm, or can be made of a different material.

  The authentication pattern Q has a structure in which the first pattern element 331 to the fifth pattern element 335 are formed inside the insulating portion 52. The first pattern element 331 to the fifth pattern element 335 are different from the wirings 311 to 326 in terms of shape, arrangement, structure, and dimensions. All of the wirings 311 to 326 have substantially the same planar quadrangular shape, but the authentication pattern Q is different from this in that the first pattern element 331 has a planar L shape and the second pattern element 332 has a planar quadrangular shape. The third pattern element 333 has a planar crank shape, the fourth pattern element 334 has a planar square shape, and the fifth pattern element 335 has a planar rectangular shape. The arrangement interval (pitch) between the first pattern element 331 to the fifth pattern element 335 is preferably, for example, several μm or less.

  The shape, arrangement, structure, dimensions, and the like of the first pattern element 331 to the fifth pattern element 335 can be arbitrarily set and changed on the assumption that they can be identified from the wirings 311 to 326. For example, various shapes, arrangements, and structures such as a crank shape, a cross shape, a T shape, a polygonal line shape, or a combination thereof can be adopted.

  As just an example, FIG. 5 shows an authentication pattern Q constituted by three first pattern elements 331 to 333 having a long planar shape in comparison with FIG.

  Further, a plurality of authentication patterns Q can be provided on one wiring board. For example, as illustrated in FIG. 6, a plurality of authentication patterns Q may be arranged at appropriate intervals.

  As described above, the authentication pattern Q is provided on the substrate 1 and has a material, shape, arrangement, structure, or size that can be identified from the wirings 311 to 326 and the substrate 1. Such an authentication pattern Q can be confirmed separately from the substrate 1 and the wirings 311 to 326 by external observation.

  As an external observation means, for example, an X-ray CT apparatus can be used. FIG. 7 shows an X-ray CT image assumed when the first pattern element 331 to the fifth pattern element 335 constituting the authentication pattern Q are made of the same metal or alloy material as the wirings 311 to 326. As a result, it is possible to easily and reliably confirm that the authentic wiring board is properly manufactured and mounted by external observation of the authentication pattern Q. This means that it can be easily and reliably confirmed that the product has not been manufactured or mounted, that is, it is not a genuine product but a counterfeit product.

2. Three-dimensional laminated wiring board and electronic apparatus The three-dimensional laminated wiring board according to the present invention is configured by laminating a required number of the above-described wiring boards. This three-dimensional multilayer wiring board can be used as a component of an electronic device. Such electronic devices typically include system LSIs, memory LSIs, memory circuits such as DRAMs, logic circuits such as CPUs, communication circuits, etc. that take the form of three-dimensional system packages (3D-SiP). MEMS etc. can be included. It may be an electronic device including an analog circuit as well as a digital circuit. In addition, electronic devices incorporating the above-described electronic devices, such as MPUs, personal computers, supercomputers, mobile phones, in-vehicle devices, etc., almost all of electronic devices and electronic devices having electronic circuits as functional elements Can be.

  FIG. 8 shows an example of a three-dimensional laminated wiring board in the form of 3D-SiP, which is a package in which a plurality of n wiring boards 131 to 13n shown in any of FIGS.

  As the assembly completion type, as shown in FIG. 9, the wiring substrates 131 to 13n are sequentially arranged on the upper surface of the package substrate 17 having the ball grid array 13 arranged on the lower surface, as shown in FIG. A structure having junctions 91 to 9n can be employed. Even in this package state, for example, by using an X-ray CT apparatus or the like, the presence or absence of the authentication pattern Q can be confirmed as shown in FIG.

3. Information Processing System and Information Communication System FIG. 11 illustrates an information processing system and an information communication system according to the present invention. An information processing system is a collection of electronic computers and programs, and is configured to perform information processing work in an integrated manner. An information communication system refers to a system that includes a communication device and a network together with an information processing system and transmits and receives information. The illustrated information processing system includes a plurality of n terminal devices 171 to 17n, and the information communication system includes a network 19 together with the terminal devices 171 to 17n described above.

  The terminal devices 171 to 17n include personal computers, mobile phones, tablets, and the like, as well as various sensors. In addition to the Internet, the network 19 includes a LAN (Local Area Network) represented by an in-vehicle local area network. In addition, for example, a personal area network to which a printer, a facsimile, a telephone, a scan, and the like are connected may be used.

  Since the information processing system and the information communication system according to the present invention are composed of a three-dimensional wiring board and electronic equipment that have been confirmed to be legitimately manufactured and mounted, a so-called “Trojan horse” or “ The danger of incorporating a malicious circuit such as a “back door” can be avoided, and a high level of safety can be ensured.

  The present invention has been described in detail with reference to the preferred embodiments. However, the present invention is not limited to these embodiments, and various modifications can be made by those skilled in the art based on the basic technical idea and teachings. It is self-evident that

1 Substrate 311 to 316 Wiring Q Certification mark

Claims (4)

A three-dimensional laminated wiring board including a substrate, wiring, and an authentication pattern,
The wiring is provided to be electrically insulated from the substrate,
The authentication pattern is provided on the substrate and has a material, shape, arrangement, structure, or size that can be identified from the wiring and the substrate.
Three-dimensional laminated wiring board.   An electronic apparatus having a three-dimensional multilayer wiring board, wherein the three-dimensional multilayer wiring board is the one described in claim 1.   An information processing system including an electronic device, wherein the electronic device is the information processing system according to claim 2.   An information communication system including an electronic device, wherein the electronic device is the information communication system according to claim 2.

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