JP2016046516A - Wiring board and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board of which the overall wiring length can be changed after the wiring board is manufactured, even if a facing wiring board is changed.SOLUTION: A wiring board has an interface circuit, connection means for connection with other wiring board, and the wiring for transmitting serial data signal by connecting the interface circuit and connection means. The wiring includes a plurality of wirings having wiring length different from each other so as to adjust the wiring length, and a plurality of pads provided in a plurality of wirings at positions closer to the interface circuit than the connection means, and selects any one of the plurality of wirings by connecting a predetermined element with a pair of pads out of the plurality of pads.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a wiring board including an interface having, for example, a SerDes (serializer / deserializer) function, and an electronic apparatus including the wiring board.

  An interface having a SerDes function (parallel / serial conversion and serial / parallel conversion function) is an interface circuit that mutually converts a serial data signal and a parallel data signal in a computer bus or the like. Used to connect an interface to a serial interface.

  Recent high-speed interface standards include Ethernet (registered trademark), IEEE 1394b, PCI Express, and serial ATA. In the parallel transfer method, it is necessary to prepare a clock line separately from the data line. In an interface having a SerDes function, a data signal and a clock signal are superimposed on one line and transmitted using a Manchester code or an 8b / 10b code. On the other hand, the clock signal and the data signal are separated in the clock recovery circuit on the receiving side.

  Conventionally, operation of the wiring for high-speed serial data signals output from an interface having a high-speed SerDes function that needs to control the wiring length is confirmed by simulation before creating the wiring board, and then the wiring board is created. It was.

  However, if the opposing wiring board changes via a cable or connector, the overall wiring length changes depending on the opposing wiring board, etc., and the desired performance cannot be achieved, and the wiring board needs to be modified, etc. It has become a situation.

  In Patent Document 1, a configuration that can be changed after the wiring board is created is also considered, but it is not suitable for a control with a severe wiring length such as high-speed SerDes, and inconvenience such as stub generation occurs.

  An object of the present invention is to solve the above-described problems and to provide a wiring board capable of changing the entire wiring length after the wiring board is created even when the opposing wiring board is changed.

A wiring board according to the present invention includes an interface circuit having functions of parallel / serial conversion and serial / parallel conversion, connection means for connecting to another wiring board, and the interface circuit and the connection means. A wiring board having wiring for transmitting a serial data signal,
The wiring includes a plurality of wirings having different wiring lengths for adjusting the wiring length,
A plurality of first pads provided in a plurality of wirings closer to the interface circuit than the connection means;
One of the plurality of wirings is selected by connecting a predetermined first element to a pair of first pads of the plurality of first pads.

  According to the wiring board according to the present invention, even when the opposing wiring board is changed, the entire wiring length can be changed after the wiring board is created.

It is a top view which shows the structure of 10 A of wiring boards which concern on the 1st Embodiment of this invention. It is a top view which shows the structure of the wiring board 10B which concerns on the 2nd Embodiment of this invention. It is a top view which shows the structure of 10 C of wiring boards which concern on the 3rd Embodiment of this invention. It is a top view which shows the structure of wiring board 10D which concerns on the 4th Embodiment of this invention. 4A is a cross-sectional view taken along line AA ′ of the wiring board 10D of FIG. 4, wherein FIG. 4A is a cross-sectional view in an initial state, and FIG. 4B is a cross-sectional view when the wirings L1a and L1b are used; c) is a sectional view when the wirings L4a and L4b are used. It is a top view which shows the structure of wiring board 10Da which concerns on the modification of the 4th Embodiment of this invention. It is a top view which shows the structure of the wiring board 10E which concerns on the 5th Embodiment of this invention. It is a top view which shows the structure of the wiring board 10F which concerns on the 6th Embodiment of this invention. It is a block diagram which shows the structure of the electronic device provided with wiring board 10A, 10B, 10C, 10D, 10Da, 10E, 10F which concerns on the 7th Embodiment of this invention. It is a top view which shows the structure of the wiring board 10G which concerns on a comparative example.

Comparative example.
FIG. 10 is a plan view showing a configuration of a wiring board 10G according to a comparative example. In FIG. 10, a wiring board 10G includes an integrated circuit (IC) 11 including an interface circuit 13 having a SerDes (serializer / deserializer) function, and a connector 12 for connecting to a connector of another wiring board. The wiring board 10G further includes wirings L1a, L1b, L11a, and L11b, a pair of pads 21 and 22 adjacent to each other, and a pair of pads 31 and 32 adjacent to each other. The first terminal 13a of the interface circuit 13 is connected to the pad 21 through the wiring L11a, and the pad 22 is connected to the first terminal 12a of the connector 12 through the wiring L1a. The second terminal 13b of the interface circuit 13 is connected to the pad 31 via the wiring L11b, and the pad 32 is connected to the second terminal 12b of the connector 12 via the wiring L1b. A capacitor Ca, which is an adjustment AC capacitor for appropriately transmitting a high-speed serial data signal, is connected between the pads 21 and 22, and an AC capacitor for appropriately transmitting a high-speed serial data signal between the pads 31 and 32. A capacitor Cb is connected.

  At the time of creating the wiring board 10G, considering the wiring length to another wiring board connected oppositely, a test such as a simulation such as the wiring length of the wiring board 10G is performed, and the capacitance values of the capacitors Ca and Cb are set to optimum values. Is set. At that time, the wiring length of the wiring is determined in consideration of reflection due to the wavelength of the high-speed serial data signal waveform. However, if the opposing wiring board is changed, the signal quality may be extremely deteriorated due to reflection by the signal wavelength due to the change of the wiring length of the whole wiring. It is necessary to recreate the board that is being used. In the embodiment according to the present invention, even when the opposing wiring board is changed, the overall wiring length can be changed after the wiring board is created, thereby avoiding re-creation of the wiring board. Yes.

  Hereinafter, embodiments according to the present invention will be described with reference to the drawings. In addition, in each following embodiment, the same code | symbol is attached | subjected about the same component.

First embodiment.
FIG. 1 is a plan view showing a configuration of a wiring board 10A according to the first embodiment of the present invention. In FIG. 1, the wiring board 10A differs from the wiring board 10G in FIG. 10 in the following points.
(1) Branch from a midway branch point Pa on the connector 12 side of the wiring L1a, and, for example, another wiring L2a having a long wiring length differs from the wiring length of the wiring L1a (wiring length from the connector 12) on the wiring board 10A. The pad 23 was formed in the vicinity of the pad 21 at the tip of the wiring L2a.
(2) Branching from a midway branch point Pb on the connector 12 side of the wiring L1b, different from the wiring length of the wiring L1b (wiring length from the connector 12), for example, another wiring L2b having a long wiring length is placed on the wiring board 10A. The pad 33 was formed at the tip of the wiring L2b and in the vicinity of the pad 21.

  In a test such as a simulation, the capacitor Ca, which is an adjustment AC capacitor, is selectively switched between being connected between the pads 21 and 22 or between the pads 21 and 23. Or, it is connected to both, and one of them is disconnected (disconnected). In addition, the capacitor Cb, which is an adjustment AC capacitor, is selectively switched between the connection between the pads 31 and 32 and the connection between the pads 31 and 33. Or, it is connected to both, and one of them is disconnected (disconnected). In the CAD device for electronic circuit design, footprints of the capacitors Ca and Cb, the other wirings L2a and L2b, and the other pads 23 and 33 may be prepared. In other words, as the wiring from the first terminal 13a of the interface circuit 13 to the first terminal 12a of the connector 12, it is possible to switch between selection of the wirings L11a and L1a or the selection of the wirings L11a and L2a. In addition, as the wiring from the second terminal 13b of the interface circuit 13 to the second terminal 12b of the connector 12, it is possible to switch between selection of the wirings L11b and L1b or the selection of the wirings L11b and L2b.

  As described above, according to the first embodiment, a wiring having a desired wiring length can be selectively selected, and the entire wiring length can be changed when the opposing wiring board or the like is changed. This eliminates the need to recreate the wiring board.

Second embodiment.
FIG. 2 is a plan view showing a configuration of a wiring board 10B according to the second embodiment of the present invention. In FIG. 2, the wiring board 10B according to the second embodiment is different from the wiring board 10A of FIG. 1 in the following points.
(1) In the vicinity of the connector 12 on the wiring board 10B, the wiring L21a and the pads 41, 42, 43 are formed. Here, pads 42 and 43 are formed in the vicinity of the pad 41.
(2) In the vicinity of the connector 12 on the wiring board 10B, the wiring L21b and the pads 51, 52, 53 are formed. Here, pads 52 and 53 are formed in the vicinity of the pad 51.

  Hereinafter, differences from the first embodiment will be described in detail.

  In FIG. 2, the first terminal 12a of the connector 12 is connected to a pad 41 via a wiring L21a. The pad 42 is connected to the pad 22 via the wiring L1a, and the pad 43 is connected to the pad 23 via the wiring L2a. The pad 52 is connected to the pad 32 via the wiring L1b, and the pad 53 is connected to the pad 33 via the wiring L2b.

  Then, in addition to the selection of the capacitors Ca and Cb of the first embodiment, 0Ω resistance (which is a resistance element, but an element for short circuit) Ra and Rb are selectively switched. That is, in a test such as a simulation, the 0Ω resistor Ra is selectively switched between being connected between the pads 41 and 42 or between the pads 41 and 43. Or, it is connected to both, and one of them is disconnected (disconnected). Further, it selectively switches whether the 0Ω resistor Ra is connected between the pads 51 and 52 or between the pads 51 and 53. Or, it is connected to both, and one of them is disconnected (disconnected). In addition, in the CAD device for electronic circuit design, if footprints of 0Ω resistors Ra and Rb and other wirings L21a and L21b and pads 41 to 43 and 51 to 53 are prepared as compared with the first embodiment of FIG. Good. That is, in the second embodiment, it is possible to selectively switch between selecting the wiring L1a or selecting the wiring L2a. In addition, it is possible to selectively switch between the selection of the wiring L1b and the selection of the wiring L2b.

  As described above, according to the second embodiment, in addition to the selective switching of the capacitors Ca and Cb, the selective switching of the 0Ω resistors Ra and Rb can be performed. As a result, it is possible to selectively select a wiring having a desired wiring length, and it becomes possible to change the entire wiring length when the opposing wiring board or the like is changed, and it becomes unnecessary to re-create the wiring board.

  In the first and second embodiments described above, an example in which one of two wirings having two wiring lengths is selectively switched has been described. However, the present invention is not limited to this, and a plurality of spare wirings are used. And one of the three or more wirings may be selectively switched.

Third embodiment.
FIG. 3 is a plan view showing a configuration of a wiring board 10C according to the third embodiment of the present invention. In FIG. 3, the wiring board 10C according to the third embodiment is different in the following points from the wiring board 10B of FIG.
(1) The wiring board 10C is a multilayer board.
(2) The wiring L2a is formed as a wiring of a layer (for example, a lower layer) different from the wiring L1a, and the via conductors 24 and 44 for connecting the wirings of these two layers are formed directly under the pads 23 and 43, respectively. . Here, the pad 23 is connected to the pad 43 via the via conductor 24, the wiring L 3 a, and the via conductor 44.
(3) The wiring L2b is formed as a wiring of a layer different from the wiring L1b (for example, the lower layer), and the via conductors 34 and 54 connecting the wirings of these two layers are formed directly under the pads 33 and 53, respectively. . Here, the pad 33 is connected to the pad 53 via the via conductor 34, the wiring L 3 b, and the via conductor 54.

  According to 3rd Embodiment comprised as mentioned above, it has the same effect as 2nd Embodiment. As shown in the third embodiment, the wiring connecting the interface circuit 13 and the connector 12 can be formed in a plurality of layers.

Fourth embodiment.
FIG. 4 is a plan view showing a configuration of a wiring board 10D according to the fourth embodiment of the present invention. In FIG. 4, the wiring board 10D according to the fourth embodiment is different in the following points from the wiring board 10G according to the comparative example of FIG.
(1) On the wiring L1a, a pair of via conductors 81 and 82 was formed by filling a metal conductor into a via penetrating the wiring board 10D in the thickness direction at a position near the capacitive element Ca.
(2) A pair of via conductors 83 and 84 is formed on the wiring L1a by filling the vias penetrating the wiring board 10D in the thickness direction at positions near the connector 12 with metal conductors.
(3) The front surface of the wiring board 10D is connected from the pad 22 to the first terminal 12a of the connector 12 via the via conductors 81 and 82 and the via conductors 83 and 84 by the wiring L1a.
(4) It is formed so as to branch from the via conductor 81 and be connected to the via conductor 84 via the wiring L4a formed in a wiring layer different from the front surface of the wiring board 10D. Here, there is a predetermined wiring length difference between the wiring L1a and the wiring L4a.
(5) A pair of via conductors 91 and 92 was formed on the wiring L1b by filling a metal conductor into a via penetrating the wiring board 10D in the thickness direction at a position in the vicinity of the capacitive element Ca.
(6) A pair of via conductors 93 and 94 were formed on the wiring L1b by filling the vias penetrating the wiring board 10D in the thickness direction at positions near the connector 12 with metal conductors.
(7) The front surface of the wiring board 10D is connected from the pad 32 to the second terminal 12b of the connector 12 via the via conductors 91 and 92 and the via conductors 93 and 94 by the wiring L1b.
(8) It is formed so as to be branched from the via conductor 91 and connected to the via conductor 94 via the wiring L4b formed in a wiring layer different from the front surface of the wiring board 10D. Here, there is a predetermined wiring length difference between the wiring L1b and the wiring L4b.

  Thus, the initial state of the wiring board 10D can be formed. In FIG. 4, the wirings L1a and L4a are shown in different positions and the wirings L1b and L4b are shown in different positions. However, as shown in FIG. 5 below, each pair of wirings (L1a, L4a) (L1b, L4b) is formed so as to be located in the same longitudinal section, and the embodiments and modifications after FIG. The same applies to. However, it is necessary to join at the branch points of the via conductors 81, 84, 91, 94, but the other portions may not be located in the same longitudinal section.

  5 is a cross-sectional view taken along the line AA ′ of the wiring board 10D of FIG. 4. FIG. 5 (a) is a cross-sectional view in an initial state, and FIG. 5 (b) is when the wirings L1a and L1b are used. FIG. 5C is a cross-sectional view when the wirings L4a and L4b are used. That is, in FIG. 5, only the wiring L1a of the wirings L1a and L1b is shown for the sake of simplicity. In the initial state of FIG. 5A, the wiring substrate 10D has the wiring L1a formed on the front surface of the dielectric substrate 70 having the ground conductors 71 and 72 formed on both sides via the dielectric layer 73, A wiring L4a is formed on the back surface of the dielectric substrate 70 via a dielectric layer 74. In the initial state, the wiring L1a is connected via four via conductors 81 to 84, and the wiring L1b (not shown in FIG. 5) is connected via four via conductors 91 to 94.

  When the wiring L1a is finally selected in FIG. 5B, the via conductors 81-84 are shown by arrows 101-104 by back drilling from the respective back surfaces (wiring L4a side) of the via conductors 81-84. A portion of the via conductors 81 to 84 connected in the wiring L1a is removed. As a result, the wiring path of the wiring L4a is separated from the wiring L1a. As in the case of finally adopting the wiring L1b, a part of the via conductors 91 to 94 is shown by arrows 201 and 202 from the back side (wiring L4b side) of the via conductors 91 to 94 by back drilling. Is removed so that the via conductors 91 to 94 connected in the wiring L1b remain. As a result, the wiring path is separated from the wiring L4b and the wiring L1b.

  Further, when the wiring L4a is finally selected as shown in FIG. 5C, the via conductors 82 and 83 are back drilled from the front surface side (wiring L1a side) of each of the via conductors 82 and 83. A part is cut so that the via conductors 81 to 84 connected in the wiring L4a remain. As a result, the wiring path of the wiring L1a is separated from the wiring L4a. As in the case of finally adopting the wiring L4b, a part of the via conductors 92, 93 is connected to the wiring L4b by back drilling from the front surface side (wiring L1b side) of each of the via conductors 92, 93. The via conductors 91 to 94 to be connected are shaved so as to remain. Thereby, the wiring path of the wiring L1b is separated from the wiring L4b.

  This makes it possible to change the overall wiring length when the board or the like of the opposing wiring board is changed, and it is not necessary to recreate the board of the wiring board.

  As described above, according to the present embodiment, for example, in a high-speed interface having a SerDes (serializer / deserializer) function, when the board of the opposing wiring board changes in the wiring board that needs to control the wiring length, the whole Change the wiring length. Thereby, even when the signal quality deteriorates, the wiring length can be changed without recreating the board of the wiring board. Further, the wiring length can be easily controlled by cutting a part of the via conductor with a back drill to change the wiring.

  By using the via conductors 81 to 94 having approximately the same size as the wiring width, the degree of freedom of wiring is increased, and deterioration of signal characteristics can be prevented. In addition, since wiring is performed in different wiring layers, it is no longer necessary to consider the influence of adjacent wiring due to wiring that is no longer used. In addition, when using capacitive elements and resistive elements, the size of the element and the pad to be mounted are larger than the wiring, which may cause wiring detours and signal degradation, but the via conductor is almost the same as the wiring width. Because of the size of the route, even when detouring, the route becomes smaller. In addition, there is no need to make a detour because of wiring in different wiring layers.

Modified Example of Fourth Embodiment FIG. 6 is a plan view showing a configuration of a wiring board 10Da according to a modified example of the fourth embodiment of the present invention. The wiring board 10Da in FIG. 6 differs from the wiring board 10D in FIG. 4 in the following points.
(1) A wiring that branches from the via conductor 85 located between the via conductors 81 and 82 on the wiring L1a and reaches the via conductor 86 located between the via conductors 83 and 84, and the wirings L1a and L4a Formed a wiring L8a formed in a different wiring layer.
(2) A wiring branched from the via conductor 95 located between the pad 32 and the via conductor 91 on the wiring L1b and reaching the via conductor 96 located between the via conductor 94 and the second terminal 12b. Thus, the wiring L8b formed in a wiring layer different from the wirings L1b and L4b was formed.

  That is, in this modification, an example in which three different wiring layers are used is shown. The number of via conductors is six via conductors per wiring, but it is possible to select only one wiring layer wiring from three different wiring layers depending on the combination of back drills, and variations in wiring length Can be increased. Similarly, the number of wiring layers can be further increased.

Fifth embodiment.
FIG. 7 is a plan view showing a configuration of a wiring board 10E according to the fifth embodiment of the present invention. The wiring board 10E of FIG. 7 differs from the wiring board 10D of FIG. 4 in the following points.
Although the wiring configurations are the same, the wiring lengths of the different wiring layers are adjusted as follows. That is, the wiring length difference between each pair of wirings (L1a, L4a) (L1b, L4b) is set to a value other than a multiple of 1/4 of the signal wavelength of the serial data signal to be transmitted. In high-speed serial data signals, signal degradation occurs due to the wiring length. When the wiring length becomes long, the amplitude becomes small due to the attenuation effect, but the signal is disturbed due to reflection of the serial data signal as another factor. In this case, the signal quality is deteriorated by amplifying the signal by a multiple of 1/4 of the signal wavelength. By shifting the wiring length difference to be formed from a multiple of 1/4 of the signal wavelength, it is possible to avoid signal degradation due to reflection even when the overall wiring length changes due to changes in the board of the opposing wiring board. It becomes.

Sixth embodiment.
FIG. 8 is a plan view showing a configuration of a wiring board 10F according to the sixth embodiment of the present invention. The wiring board 10F in FIG. 8 differs from the wiring board 10D in FIG. 4 in the following points.
The distance between each pair of via conductors (81, 82) (83, 84) (91, 92) (93, 94) formed close to each other is set at the minimum distance at which each via conductor can be removed simultaneously with a back drill. doing. For example, when the wiring L1a is used in FIG. 5, there is no useless wiring in the wiring L1a because the pair of via conductors (81, 82) (83, 84) is removed by the back drill. However, when the wiring L4a is used, the wiring portion of the wiring L1a between the via conductors 81 and 82 and between the via conductors 83 and 84 is transferred from the wiring L1a to the wiring L4a via the via conductor 81, and from the wiring L4a to the via conductor 84. When connecting to the wiring L1a via At this time, since it becomes useless stub wiring and causes deterioration of signal quality, it is important for the high-speed serial data signal to make the gap between the via conductors 81 and 82 and between the via conductors 83 and 84 as small as possible.

  As described above, according to the present embodiment, the interval between the plurality of via conductors in each set of via conductors is set to the minimum distance at which a part of each via conductor can be removed by the back drill. It is said. Therefore, when the distance between the pair of via conductors is relatively wide, the wiring between them becomes a stub wiring, which causes signal deterioration. However, in the configuration of this embodiment, the factor can be eliminated as much as possible.

Seventh embodiment.
FIG. 9 is a block diagram showing a configuration of an electronic apparatus including wiring boards 10A, 10B, 10C, 10D, 10Da, 10E, and 10F according to the seventh embodiment of the present invention.

  In FIG. 9, for example, an electronic device 60 such as a personal computer or a multifunction machine includes two wiring boards 10A, 10B, 10C, 10D, 10Da, 10E, and 10F, and the connectors 12 and 12 are connected by a connection cord 14. ing. Thereby, high-speed serial communication can be performed between the two wiring boards 10A, 10B, 10C, 10D, 10Da, 10E, and 10F. The adjustment of the wiring length is as described in the first to sixth embodiments.

Modified example.
In the above embodiment, the wiring length is changed using the capacitors Ca and Cb and / or the 0Ω resistors Ra and Rb. However, the present invention is not limited to this, and wiring is performed using other components such as an inductor and a resistor. The length may be switched.

  In the above embodiment, the connector 12 is used for connection to another wiring board. However, the present invention is not limited to this, and connection means such as a connection card may be used.

Summary of embodiments.
The wiring board according to the first aspect connects an interface circuit having functions of parallel / serial conversion and serial / parallel conversion, connection means for connecting to another wiring board, and the interface circuit and the connection means. The wiring board to be used. The wiring board is a wiring board having wiring for transmitting a serial data signal,
The wiring board includes a plurality of wirings having different wiring lengths for adjusting the wiring length,
A plurality of first pads provided in a plurality of wirings closer to the interface circuit than the connection means;
One of the plurality of wirings is selected by connecting a predetermined first element to a pair of first pads of the plurality of first pads.

  A wiring board according to a second aspect is the wiring board according to the first aspect, wherein the first element is a capacitor.

The wiring board according to the third aspect is the wiring board according to the first or second aspect. A plurality of second pads provided in a plurality of wirings closer to the connection means than the interface circuit;
One of the plurality of wirings is selected by connecting a predetermined second element to a pair of second pads of the plurality of second pads.

  The wiring board according to a fourth aspect is the wiring board according to the third aspect, wherein the second element is a 0Ω resistor.

A wiring board according to a fifth aspect includes serial data by connecting an interface circuit having parallel / serial conversion and serial / parallel conversion functions, connecting means for connecting to another wiring board, and the interface circuit and connecting means. A wiring board having wiring for transmitting signals,
The wiring board includes a plurality of wirings having different wiring lengths and being formed in different wiring layers for adjusting the wiring length,
One set of via conductors is formed at each of branch points on both ends of the plurality of wirings, and a part of each set of via conductors at the branch points on both ends is removed. The wiring is selected.

  The wiring board according to a sixth aspect is the wiring board according to the fifth aspect, wherein the wiring length difference between the plurality of wirings is set to a length other than a multiple of 1/4 of the signal wavelength of the serial data signal. It is characterized by that.

  A wiring board according to a seventh aspect is the wiring board according to the fifth or sixth aspect, wherein the interval between the plurality of via conductors in each set of via conductors is such that a part of each via conductor is removed by a back drill. It is characterized by being set to the smallest possible distance.

The wiring board according to an eighth aspect is the wiring board according to any one of the first to seventh aspects, wherein the wiring board is a multilayer board,
The plurality of wirings having different wiring lengths are formed in at least different layers of the wiring board.

  A wiring board according to a ninth aspect is the wiring board according to any one of the first to eighth aspects, wherein the wiring board includes a plurality of wirings for transmitting the serial data signal. It is characterized by that.

  An electronic device according to a tenth aspect includes the at least one wiring board described above.

  According to the embodiment, in a wiring board having a high-speed interface circuit such as SerDes, when the wiring length needs to be adjusted, the opposing wiring board is changed, and even when the signal quality is deteriorated when the whole wiring length is changed, wiring is performed. The wiring length can be changed without recreating the board. Further, the wiring length can be easily adjusted by changing the two wirings by replacing components such as the capacitors Ca and Cb and / or the 0Ω resistors Ra and Rb.

10A-10G ... wiring board,
11 ... Integrated circuit (IC),
12 ... Connector,
13: Interface circuit,
14 ... Connection cord,
21-23, 31-33, 41-43, 51-53 ... pad,
24, 34, 44, 54 ... via conductors,
60 ... electronic equipment,
70: Dielectric substrate,
71, 72 ... grounding conductor,
73, 74 ... dielectric layer,
81-86, 91-96 ... via conductor,
Ca, Cb ... capacitors,
L1a to L31a, L1b to L31b ... wiring,
Pa, Pb ... halfway point,
Ra, Rb: 0Ω resistance.

JP 63-102399 A

Claims (10)

An interface circuit having functions of parallel / serial conversion and serial / parallel conversion, connection means for connecting to another wiring board, and connecting the interface circuit and the connection means for transmitting serial data signals A wiring board having wiring,
The wiring board includes a plurality of wirings having different wiring lengths for adjusting the wiring length,
A plurality of first pads provided in a plurality of wirings closer to the interface circuit than the connection means;
A wiring that selects any one of the plurality of wirings by connecting a predetermined first element to a pair of first pads of the plurality of first pads. substrate.   The wiring board according to claim 1, wherein the first element is a capacitor. A plurality of second pads provided in a plurality of wirings closer to the connection means than the interface circuit;
The wiring of any one of the plurality of wirings is selected by connecting a predetermined second element to a pair of second pads of the plurality of second pads. Item 3. The wiring board according to Item 1 or 2.   The wiring board according to claim 3, wherein the second element is a 0Ω resistor. An interface circuit having functions of parallel / serial conversion and serial / parallel conversion, connection means for connecting to another wiring board, and connecting the interface circuit and the connection means for transmitting serial data signals A wiring board having wiring,
The wiring board includes a plurality of wirings having different wiring lengths and being formed in different wiring layers for adjusting the wiring length,
One set of via conductors is formed at each of branch points on both ends of the plurality of wirings, and a part of each set of via conductors at the branch points on both ends is removed. A wiring board characterized by selecting a wiring.   6. The wiring board according to claim 5, wherein the wiring length difference between the plurality of wirings is set to a length other than a multiple of 1/4 of the signal wavelength of the serial data signal.   7. The wiring board according to claim 5, wherein the interval between the plurality of via conductors in each set of via conductors is set to a minimum distance at which a part of each via conductor can be removed by a back drill. The wiring board is a multilayer board,
The wiring board according to claim 1, wherein the plurality of wirings having different wiring lengths are formed in at least different layers of the wiring board.   The wiring board according to claim 1, wherein the wiring board includes a plurality of wirings for transmitting the serial data signal.   An electronic apparatus comprising at least one wiring board according to any one of claims 1 to 9.

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