JP2016045440A - Fabrication method of optical waveguide - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a fabrication method of an optical waveguide by which an optical waveguide having small propagation loss and good optical characteristics can be fabricated at a temperature low enough to prevent breakage of other devices fused and integrated with the optical waveguide, by using SiN, SiON, or SiOas a core material.SOLUTION: A resist pattern 109 having a smooth side wall is formed through two etching steps including formation of a silicon oxide mask pattern and formation of the resist pattern 109 so as to reduce edge roughness of the mask pattern generated in photolithography. The resist pattern 109 thus formed is used as a mask to form a core 110.SELECTED DRAWING: Figure 1I

Description

The present invention relates to a method for manufacturing an optical waveguide having a core composed of any one of SiN, SiON, and SiO _x .

  Due to the rapid spread of cloud and mobile environments, the volume of information circulation continues to increase, and there is a strong demand for increasing the capacity, speed, and power consumption of optical networks. To achieve this, it is important to reduce the size, cost and power consumption of wavelength-division multiplexing (WDM) devices.

  Against this background, in recent years, optical devices and optical circuits based on optical waveguides based on Si cores, which can be miniaturized, are excellent in economy and energy saving, and are excellent in fusion with electrical devices. Research and development is actively underway. However, since Si has a high refractive index of about 3.48, it has a problem that the device characteristics are sensitive to processing errors, while light confinement is strong and advantageous for miniaturization. In addition, there is a problem rooted in the optical nonlinearity of Si induced by high power transmission that occurs with the increase in wavelength. In communication network applications that require polarization independence and a high dynamic range, optical cores with Si cores are used. It has become clear that it is not easy to meet the required performance with only the waveguide.

On the other hand, research on integrated photonics aiming at application to communication networks, especially Dense Wavelength Division Multiplexing (DWDM), is preceded by silica-based optical waveguides, which are optical waveguides with a low relative refractive index difference between the core and the cladding. . For this reason, research and development are now being conducted in the direction of making the silica-based optical waveguide an optical waveguide having a higher relative refractive index difference between the core and the clad. However, the quartz system has a problem that it is difficult to manufacture a small optical device that can be integrated into an electric chip. Therefore, an optical waveguide system having an intermediate refractive index between Si and quartz and having a refractive index freedom and capable of being integrated with an electric device is desired. As one of such optical waveguides, there is an expectation for an optical waveguide having a core composed of SiN, SiON, and SiO _x .

An optical waveguide having a core composed of SiN, SiON, and SiO _x has long been known as an optical waveguide system having a higher refractive index between the core and the clad than the quartz system, and has been studied for communication network applications. For a single optical waveguide using a core made of these materials, a manufacturing method capable of realizing a low-loss optical waveguide has been established.

In the production of such an optical waveguide having a core composed of SiN, SiON, and SiO _x , the core film and the clad film are processed by heating at a high temperature of 1200 ° C. or higher to stabilize the film characteristics. (See Patent Documents 1 and 2).

Hereinafter, fabrication of an optical waveguide having a core composed of SiN, SiON, and SiO _x will be described with reference to FIGS. 4A to 4F. First, as shown in FIG. 4A, a lower cladding layer 202 made of SiO ₂ and having a thickness of 15 μm is formed on a silicon substrate 201. For example, the SiO ₂ fine particles may be deposited on the silicon substrate 201 using a flame deposition method (FHD) method and then sintered at a high temperature of 1400 ° C. Thereby, the lower cladding layer 202 which is a transparent SiO ₂ film is formed.

  Next, as shown in FIG. 4B, a SiON layer 203 made of SiON and having a predetermined refractive index and thickness is formed on the lower cladding layer 202 by sputtering. Subsequently, the SiON layer 203 is heat-treated at a high temperature of 1200 ° C. to form a core forming layer 204 with stable film characteristics as shown in FIG. 4C. Next, the core forming layer 204 is processed using an LSI processing technique such as photolithography and dry etching to form a core 205 having a rectangular cross section on the lower cladding layer 202 as shown in FIG. 4D.

Next, as shown in FIG. 4E, an upper clad layer 206 is formed on the lower clad layer 202 so as to cover the core 205. For example, the upper clad layer 206 may be formed by depositing SiO ₂ by a well-known thermal CVD (Chemical Vapor Deposition) method. Thereafter, the upper clad layer 206 is subjected to a high-temperature heat treatment at 1000 ° C. to form the upper clad layer 206a having the same refractive index as that of the lower clad layer 202 as shown in FIG. 4F.

  In the above-described manufacturing method, the deposited layer is heat-treated at a high temperature of 1000 ° C. or higher to stabilize the film properties such as the refractive index of the cladding layer and the core forming layer (core), and the roughness of the core and cladding interface This reduces the scattering and realizes an optical waveguide exhibiting low-loss propagation characteristics.

JP 2011-043576 A JP 2011-203459 A

  However, in today's communication network devices, which require high functionality, energy savings, and economy at the same time, it is indispensable to integrate optical devices and electrical devices with different functions and optical waveguides on a single chip. ing. In the above-described waveguide fabrication method that requires heat treatment at high temperature, there is a problem in that the dissimilar material optical device and electrical device made in the previous process are destroyed during high-temperature heat treatment and cannot be integrated. For this reason, development of a method for producing an optical waveguide having good characteristics with low loss even at a low temperature without destroying other devices is demanded.

The present invention has been made to solve the above-described problems, and uses SiN, SiON, SiO _x as a core material, and integrates and integrates optical waveguides having good optical characteristics with low propagation loss. It is an object of the present invention to be able to manufacture at a low temperature without destroying other devices.

An optical waveguide manufacturing method according to the present invention includes a first step of forming a lower cladding layer made of SiO ₂ on a silicon substrate under a temperature condition of 200 ° C. or lower, and an ECR plasma CVD method on the lower cladding layer, A second step of forming a core forming layer made of SiN, SiON, or SiO _x , a third step of forming a resist layer made of an organic resin on the core forming layer, and a resist under a temperature condition of 200 ° C. or lower. A mask pattern is formed by a fourth step of forming a silicon oxide layer on the layer, a fifth step of forming a mask pattern on the silicon oxide layer, and reactive ion etching using an etching gas made of a compound containing fluorine. A silicon oxide mask pattern by etching the silicon oxide layer using as a mask, and a reactive ion etch using oxygen gas A seventh step of etching the resist layer using the silicon oxide mask pattern as a mask to form a resist pattern, an eighth step of etching the core forming layer using the resist pattern as a mask to form a core, and 200 ° C. or lower. And a ninth step of forming an upper clad layer made of SiO ₂ on the core under the above temperature conditions.

In the optical waveguide manufacturing method, in the second step, a mixed gas of one gas of SiH ₄ , SiD ₄ , SiF ₄ , and SiCl ₄ and at least one gas of N ₂ and O ₂ was used. A core forming layer may be formed by depositing any one of SiN, SiON, and SiO _x by ECR plasma CVD.

As described above, according to the present invention, SiN, SiON, SiO _x is used as a core material, and an optical waveguide having a good optical characteristic with a small propagation loss is used to destroy other integrated devices. The excellent effect that it can be produced at a low temperature without any problem is obtained.

FIG. 1A is a cross-sectional view showing a state of an intermediate step of a method for manufacturing an optical waveguide in an embodiment of the present invention. FIG. 1B is a cross-sectional view showing a state of an intermediate step in the method of manufacturing an optical waveguide in the embodiment of the present invention. FIG. 1C is a cross-sectional view showing a state of an intermediate step of the method for manufacturing an optical waveguide in the embodiment of the present invention. FIG. 1D is a cross-sectional view showing a state of an intermediate step in the method for manufacturing an optical waveguide in the embodiment of the present invention. FIG. 1E is a cross-sectional view showing the state of an intermediate step of the method for manufacturing an optical waveguide in the embodiment of the present invention. FIG. 1F is a cross-sectional view showing a state of an intermediate step in the method for manufacturing an optical waveguide in the embodiment of the present invention. FIG. 1G is a cross-sectional view showing a state of an intermediate step of the method for manufacturing an optical waveguide in the embodiment of the present invention. FIG. 1H is a cross-sectional view showing the state of an intermediate step in the method of manufacturing an optical waveguide in the embodiment of the present invention. FIG. 1I is a cross-sectional view showing a state of an intermediate step of the method for manufacturing an optical waveguide in the embodiment of the present invention. FIG. 1J is a cross-sectional view showing the state of an intermediate step of the method for manufacturing an optical waveguide in the embodiment of the present invention. FIG. 2 is a characteristic diagram showing the results of measuring the propagation loss of the optical waveguide that constitutes the core 110 from SiON in the embodiment. FIG. 3 is a characteristic diagram showing changes in the refractive index of a SiO _x N _y film deposited by ECR plasma CVD using SiH ₄ gas, O ₂ gas, and N ₂ gas. FIG. 4A is a cross-sectional view showing a state in the middle of a method for manufacturing an optical waveguide having a core made of SiN, SiON, and SiO _x . FIG. 4B is a cross-sectional view showing the state of an intermediate step of a method for producing an optical waveguide having a core made of SiN, SiON, and SiO _x . FIG. 4C is a cross-sectional view showing a state of an intermediate step of a method for producing an optical waveguide having a core composed of SiN, SiON, and SiO _x . FIG. 4D is a cross-sectional view showing the state of an intermediate step of a method for producing an optical waveguide having a core composed of SiN, SiON, and SiO _x . FIG. 4E is a cross-sectional view showing a state in the middle of a method for producing an optical waveguide having a core made of SiN, SiON, and SiO _x . FIG. 4F is a cross-sectional view showing a state of an intermediate step in the method of manufacturing an optical waveguide having a core composed of SiN, SiON, and SiO _x .

  Embodiments of the present invention will be described below with reference to FIGS. 1A to 1J. 1A to 1J are cross-sectional views showing the state of an intermediate step of a method for manufacturing an optical waveguide in an embodiment of the present invention.

First, as shown in FIG. 1A, a lower clad layer 102 made of SiO ₂ is formed on a silicon substrate 101 (first step). The lower cladding layer 102 may be formed with a layer thickness of 3 μm or more. For example, silicon oxide (SiO ₂ ) may be deposited by an electron cyclotron resonance (ECR) plasma CVD method. Although not limited to the ECR plasma CVD method, it is important to form the lower cladding layer 102 at a low temperature of about 200 ° C. For example, the lower cladding layer 102 may be formed by sputtering. If an SOI (Silicon on Insulator) substrate is used, the substrate portion can be the silicon substrate 101 and the buried oxide layer can be the lower cladding layer 102, and the above-described deposition process can be omitted.

Next, as shown in FIG. 1B, a core forming layer made of silicon nitride (SiN), silicon oxynitride (SiON), or silicon oxide (SiO _x ) is formed on the lower cladding layer 102 by ECR plasma CVD. 103 is formed (second step). According to the ECR plasma CVD method, any of the above core materials can be deposited at a low temperature of 200 ° C. or lower. The core forming layer 103 may be formed with a layer thickness of 1 to 3 μm. Here, it is important that the refractive index of the core forming layer 103 can be changed in SiON and SiO _x in order to form a core having a desired refractive index. For this reason, the core formation layer 103 is formed by using an ECR plasma CVD method in which the refractive index can be controlled in a wide range and a film can be formed at a low temperature.

  Next, as shown in FIG. 1C, a resist layer 104 made of an organic resin is formed on the core forming layer 103 (third step). For example, a resist material may be applied on the core formation layer 103 to form the resist layer 104 with a layer thickness of 2 to 4 μm. In addition, after coating, the resist layer 104 is heat-treated under a temperature condition of about 200 ° C., and the resist layer 104 is thermally cured.

  Next, as shown in FIG. 1D, a silicon oxide layer 105 is formed on the resist layer 104 (fourth step). For example, the silicon oxide layer 105 may be formed with a layer thickness of 0.1 to 0.2 μm. Here, it is important to form the silicon oxide layer 105 under a temperature condition in which the resist layer 104 is not altered. In this formation process, when the processing temperature is equal to or higher than the temperature (200 ° C.) at the time of forming the resist layer 104, the resist layer 104 is altered. Therefore, in forming the silicon oxide layer 105, it is necessary to deposit silicon oxide at a low temperature of 200 ° C. or lower. For this reason, the silicon oxide layer 105 may be formed by a film formation method capable of depositing silicon oxide at a temperature of 200 ° C. or lower, such as ECR plasma CVD or sputtering.

  Next, as illustrated in FIG. 1E, a photoresist layer 106 is formed on the silicon oxide layer 105. Next, the photoresist layer 106 is patterned by a known road photolithography technique to form a mask pattern 107 on the silicon oxide layer 105 as shown in FIG. 1F (fifth step).

Next, the silicon oxide layer 105 is etched by reactive ion etching using an etching gas made of a compound containing fluorine, using the mask pattern 107 as a mask to form a silicon oxide mask pattern 108 as shown in FIG. 1G ( (6th process). For example, the silicon oxide layer 105 is etched by a reactive ion etching method using a fluorine-based gas such as carbon tetrafluoride (CF ₄ ) or sulfur hexafluoride (SF ₆ ).

  By using an etching gas made of such a fluorine-containing compound, the effect of the fluorine gas can be strengthened and conditions for lowering the etching selectivity of the silicon oxide layer 105 to the mask pattern 107 can be selected. Under such conditions, the edge roughness of the mask pattern 107 can be suppressed from being transferred to the silicon oxide mask pattern 108. As a result, the occurrence of rough sidewalls in the silicon oxide mask pattern 108 can be reduced.

  Next, after removing the mask pattern 107, a resist pattern 109 is formed as shown in FIG. 1H (seventh step). Here, the resist layer 104 is etched by reactive ion etching using oxygen gas to form a resist pattern 109. By this etching process, as a result, the resist pattern 109 can be formed with a small edge roughness.

  Next, the core forming layer 103 is etched using the resist pattern 109 as a mask to form the core 110 as shown in FIG. 1I (eighth step). In this way, it is not processed by a single layer mask pattern, but is generated by photolithography through two etching steps of forming the silicon oxide mask pattern 108 and forming the resist pattern 109 before forming the core 110. As a result, the edge roughness of the mask pattern to be relaxed can be reduced, and a resist pattern 109 having a smooth sidewall can be formed. If the core forming layer 103 is etched using such a resist pattern 109 having a smooth side wall, the core 110 having a smooth side wall can be formed without performing a high-temperature treatment at 1000 ° C. or higher. In the etching process of the core formation layer 103 described above, the silicon oxide mask pattern 108 is removed because the silicon oxide is etched.

Next, after the resist pattern 109 is removed by dissolving the resist pattern 109 in a solvent or the like, an upper clad layer 111 made of SiO ₂ is formed on the core 110 as shown in FIG. ). An upper cladding layer 111 is formed on the lower cladding layer 102 so as to cover the core 110. The upper clad layer 111 is also formed at a low temperature of about 200 ° C., similar to the formation of the lower clad layer 102. For example, the upper cladding layer 111 may be formed by depositing SiO ₂ by ECR plasma CVD or sputtering.

  FIG. 2 shows the result of measuring the propagation loss of the optical waveguide made of SiON and having the core 110 made by the above method. As shown in FIG. 2, a low loss value of 0.8 dB / cm has been obtained, and a low-loss optical waveguide is realized even in fabrication within a temperature of about 200 ° C. or lower without processing at a high temperature of 1000 ° C. or higher. did it.

By the way, SiON can change a refractive index by changing the composition ratio of oxygen and nitrogen. FIG. 3 is a characteristic diagram showing changes in the refractive index of a SiO _x N _y film deposited by ECR plasma CVD using SiH ₄ gas, O ₂ gas, and N ₂ gas. According to the ECR plasma CVD method, by changing the supply ratio of O ₂ gas and N ₂ gas, x and y of SiO _x N _y change, and the refractive index can be controlled in the range of 1.47 to 2.0. . Note that the silicon source gas is not limited to SiH ₄ , and even if SiD ₄ or SiCl ₄ is used, the SiO _x N _y film can be formed by controlling the refractive index in the ECR plasma CVD method. In the case of a SiO _x film, the film is deposited using a silicon source gas and an oxygen gas. By changing the composition ratio of silicon and oxygen by controlling the gas supply ratio, the refractive index is 1.47 to It can be controlled in the range of 1.70.

  As described above, according to the present invention, the core is formed by etching using the resist pattern after two etching steps of forming the silicon oxide mask pattern and forming the resist pattern. According to this method, an optical waveguide structure in which the side wall of the core is smooth can be formed at a low temperature of about 200 ° C. or lower, and an optical waveguide with a small propagation loss can be manufactured even at a low temperature. Also, even if optical devices of different materials such as Si and Ge or Si electronic devices are built in the substrate, the optical waveguide structure can be fabricated under a temperature condition of about 200 ° C. or less, so it is integrated on the substrate. It does not destroy the integrated device. As described above, according to the present invention, it is possible to integrate and integrate an optical waveguide with a small loss and a device, and a more functional device can be manufactured.

  The present invention is not limited to the embodiment described above, and many modifications and combinations can be implemented by those having ordinary knowledge in the art within the technical idea of the present invention. It is obvious.

  DESCRIPTION OF SYMBOLS 101 ... Silicon substrate, 102 ... Lower clad layer, 103 ... Core formation layer, 104 ... Resist layer, 105 ... Silicon oxide layer, 106 ... Photoresist layer, 107 ... Mask pattern, 108 ... Silicon oxide mask pattern, 109 ... Resist pattern , 110 ... core, 111 ... upper clad layer.

Claims (2)

A first step of forming a lower cladding layer made of SiO ₂ on a silicon substrate under a temperature condition of 200 ° C. or lower;
A second step of forming a core forming layer made of any one of SiN, SiON, and SiO _x on the lower cladding layer by ECR plasma CVD;
A third step of forming a resist layer made of an organic resin on the core forming layer;
A fourth step of forming a silicon oxide layer on the resist layer under a temperature condition of 200 ° C. or lower;
A fifth step of forming a mask pattern on the silicon oxide layer;
A sixth step of forming the silicon oxide mask pattern by etching the silicon oxide layer using the mask pattern as a mask by reactive ion etching using an etching gas made of a fluorine-containing compound;
A seventh step of forming a resist pattern by etching the resist layer using the silicon oxide mask pattern as a mask by reactive ion etching with oxygen gas;
An eighth step of forming the core by etching the core forming layer using the resist pattern as a mask;
And a ninth step of forming an upper clad layer made of SiO ₂ on the core under a temperature condition of 200 ° C. or lower. In the manufacturing method of the optical waveguide of Claim 1,
In the second step, SiN ₄ , SiD ₄ , SiF ₄ , and SiCl ₄ are mixed with one gas and at least one gas of N ₂ and O ₂ by an ECR plasma CVD method. The core forming layer is formed by depositing any one of SiO, SiON, and SiO _x .

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