JP2015509249A5 - - Google Patents

Download PDF

Info

Publication number
JP2015509249A5
JP2015509249A5 JP2014553295A JP2014553295A JP2015509249A5 JP 2015509249 A5 JP2015509249 A5 JP 2015509249A5 JP 2014553295 A JP2014553295 A JP 2014553295A JP 2014553295 A JP2014553295 A JP 2014553295A JP 2015509249 A5 JP2015509249 A5 JP 2015509249A5
Authority
JP
Japan
Prior art keywords
instructions
instruction
texture
symmetric
condition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2014553295A
Other languages
English (en)
Japanese (ja)
Other versions
JP6017586B2 (ja
JP2015509249A (ja
Filing date
Publication date
Priority claimed from US13/414,402 external-priority patent/US9256408B2/en
Application filed filed Critical
Publication of JP2015509249A publication Critical patent/JP2015509249A/ja
Publication of JP2015509249A5 publication Critical patent/JP2015509249A5/ja
Application granted granted Critical
Publication of JP6017586B2 publication Critical patent/JP6017586B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2014553295A 2012-01-20 2012-12-06 グラフィックス処理ユニットのための関連するテクスチャロード命令を有する制御フロー命令のプレディケーション Expired - Fee Related JP6017586B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201261589072P 2012-01-20 2012-01-20
US61/589,072 2012-01-20
US13/414,402 2012-03-07
US13/414,402 US9256408B2 (en) 2012-01-20 2012-03-07 Optimizing texture commands for graphics processing unit
PCT/US2012/068203 WO2013109353A1 (en) 2012-01-20 2012-12-06 Predication of control flow instructions having associated texture load instructions for a graphics processing unit

Publications (3)

Publication Number Publication Date
JP2015509249A JP2015509249A (ja) 2015-03-26
JP2015509249A5 true JP2015509249A5 (enExample) 2016-05-26
JP6017586B2 JP6017586B2 (ja) 2016-11-02

Family

ID=48798315

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014553295A Expired - Fee Related JP6017586B2 (ja) 2012-01-20 2012-12-06 グラフィックス処理ユニットのための関連するテクスチャロード命令を有する制御フロー命令のプレディケーション

Country Status (5)

Country Link
US (1) US9256408B2 (enExample)
EP (1) EP2805232B1 (enExample)
JP (1) JP6017586B2 (enExample)
CN (1) CN104067225B (enExample)
WO (1) WO2013109353A1 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8762972B2 (en) * 2011-02-08 2014-06-24 Nokia Corporation Methods and apparatuses for facilitating execution of applications requiring runtime compilation
US9665393B1 (en) * 2012-04-17 2017-05-30 Facebook, Inc. Storage and privacy service
US9250879B2 (en) 2012-07-02 2016-02-02 International Business Machines Corporation Strength reduction compiler optimizations
CN104915180B (zh) * 2014-03-10 2017-12-22 华为技术有限公司 一种数据操作的方法和设备
US9911175B2 (en) 2015-09-03 2018-03-06 Qualcomm Incorporated Modification of graphical command tokens
KR20180038793A (ko) * 2016-10-07 2018-04-17 삼성전자주식회사 영상 데이터 처리 방법 및 장치
DE102016223484B4 (de) * 2016-11-25 2021-04-15 Fujitsu Limited Bestimmen von Ähnlichkeiten in Computersoftwarecodes zur Leistungsanalyse
US10235272B2 (en) * 2017-03-06 2019-03-19 Xilinx, Inc. Debugging system and method
US10635439B2 (en) * 2018-06-13 2020-04-28 Samsung Electronics Co., Ltd. Efficient interface and transport mechanism for binding bindless shader programs to run-time specified graphics pipeline configurations and objects
WO2020181670A1 (en) * 2019-03-11 2020-09-17 Huawei Technologies Co., Ltd. Control flow optimization in graphics processing unit
JP7711767B2 (ja) * 2021-12-03 2025-07-23 日本電気株式会社 プログラム変換装置、プログラム変換方法およびプログラム
CN116048531B (zh) * 2023-03-30 2023-08-08 南京砺算科技有限公司 指令编译方法及图形处理装置、存储介质、终端设备

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6453459B1 (en) * 1998-01-21 2002-09-17 Apple Computer, Inc. Menu authoring system and method for automatically performing low-level DVD configuration functions and thereby ease an author's job
US6745384B1 (en) * 1998-05-29 2004-06-01 Microsoft Corporation Anticipatory optimization with composite folding
US6662294B1 (en) 2000-09-28 2003-12-09 International Business Machines Corporation Converting short branches to predicated instructions
JP4044756B2 (ja) * 2001-12-11 2008-02-06 松下電器産業株式会社 プログラム変換装置、プログラム変換方法、及び当該プログラム変換装置を実現するプログラム
JP3847672B2 (ja) * 2002-07-03 2006-11-22 松下電器産業株式会社 コンパイラ装置及びコンパイル方法
US7299458B2 (en) * 2002-10-31 2007-11-20 Src Computers, Inc. System and method for converting control flow graph representations to control-dataflow graph representations
WO2004072796A2 (en) * 2003-02-05 2004-08-26 Arizona Board Of Regents Reconfigurable processing
US8823718B2 (en) 2003-11-14 2014-09-02 Microsoft Corporation Systems and methods for downloading algorithmic elements to a coprocessor and corresponding techniques
US7847800B2 (en) * 2004-04-16 2010-12-07 Apple Inc. System for emulating graphics operations
US7793079B2 (en) 2007-06-27 2010-09-07 Qualcomm Incorporated Method and system for expanding a conditional instruction into a unconditional instruction and a select instruction
US20100262813A1 (en) 2009-04-14 2010-10-14 International Business Machines Corporation Detecting and Handling Short Forward Branch Conversion Candidates
US10360039B2 (en) 2009-09-28 2019-07-23 Nvidia Corporation Predicted instruction execution in parallel processors with reduced per-thread state information including choosing a minimum or maximum of two operands based on a predicate value
US20110078424A1 (en) * 2009-09-30 2011-03-31 International Business Machines Corporation Optimizing program code using branch elimination
US9495136B2 (en) * 2011-01-28 2016-11-15 International Business Machines Corporation Using aliasing information for dynamic binary optimization

Similar Documents

Publication Publication Date Title
JP2015509249A5 (enExample)
CN102576314B (zh) 具有横跨多个处理器的数据并行线程之映射处理逻辑
JP6329274B2 (ja) コンパイラ最適化のためのメモリ参照メタデータ
JP6411477B2 (ja) Ｇｐｕ発散バリア
US8782645B2 (en) Automatic load balancing for heterogeneous cores
CN105487838B (zh) 一种动态可重构处理器的任务级并行调度方法与系统
US20150193234A1 (en) Register allocation for vectors
CN101551761A (zh) 一种异构多处理器中共享流内存的方法
JP2021034023A (ja) アクセラレータにおいてヘテロジニアスコンポーネントを設定する方法及び装置
TW202109285A (zh) 用以致能工作負載之靜態映射的亂序管線化執行之方法及設備
Membarth et al. Code generation for embedded heterogeneous architectures on Android
Mikushin et al. KernelGen--The Design and Implementation of a Next Generation Compiler Platform for Accelerating Numerical Models on GPUs
CN104423994B (zh) 一种代码生成方法、编译器、调度方法、装置及调度系统
JP2019049843A (ja) 実行ノード選定プログラム、実行ノード選定方法及び情報処理装置
JP2012059078A (ja) Ｐｌｃシステム、その開発支援装置
CN116301874B (zh) 代码编译方法、电子设备及存储介质
CN117591242B (zh) 基于底层虚拟机的编译优化方法、系统、存储介质及终端
Clarkson et al. Towards practical heterogeneous virtual machines
Nomizu et al. Implementation of xcalablemp device acceleration extention with opencl
US11573777B2 (en) Method and apparatus for enabling autonomous acceleration of dataflow AI applications
Chard et al. Productive Parallel Programming with Parsl
Yang et al. The support of an experimental OpenCL compiler on HSA environments
Zhang et al. Reducing inter-task interference delay by optimizing bank-to-core mapping
US20170192759A1 (en) Method and system for generation of machine-executable code on the basis of at least dual-core predictive latency
US20150212837A1 (en) Parallelization method and system