JP2015191379A - simulation method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a simulation method capable of simulating electrical characteristics of a vertical semiconductor device with high accuracy.SOLUTION: The simulation method is a method of simulating electrical characteristics of a vertical semiconductor device including a drain electrode terminal and a source electrode terminal. The simulation method includes a step to simulate the electrical characteristics of the vertical semiconductor device by using a first function representing a forward current which flows from the drain electrode terminal to the source electrode terminal relevant to an inter-terminal voltage applied across the drain electrode terminal and the source electrode terminal and a second function representing a reverse current which flows from the source electrode terminal and the drain electrode terminal relevant to an inter-terminal voltage. The first function and the second function have a relationship of a reverse function.

Description

  The present invention relates to a simulation method and the like.

  In general, in the development of power electronics devices such as inverters and converters, the circuit configuration is analyzed by simulation, and the circuit configuration is verified by trial evaluation. For example, similar to a circuit simulation using a SPICE (Simulation Program with Integrated Circuit Emphasis) model of a semiconductor integrated circuit, various device models are used in the conventional simulation. Specifically, a device model that simulates the electrical characteristics of a power semiconductor device such as a diode, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), or an IGBT (Insulated Gate Bipolar Transistor) is used.

  Power devices used in power electronics circuits such as inverters are compatible with high withstand voltage (several tens of volts) and high current, unlike the “horizontal” structure for signal processing used in conventional semiconductor integrated circuits. It is a “vertical” structure. For this reason, in the signal processing model (MOSFET SPICE model Level 1-3) that is standardly installed in general circuit simulation, the accuracy is low only by correcting the parameters, and the circuit efficiency (loss) is simulated by the circuit simulation. It is difficult to consider.

  On the other hand, for example, Patent Documents 1 and 2 propose device models that reflect the characteristics of “vertical” power devices (vertical semiconductor devices). Specifically, parasitic capacitance between electrode terminals, PN diode (body diode) formed between a P-type injection layer and an N-type drift layer, resistance of an N-type drift layer formed to ensure a breakdown voltage, etc. Is added as a subcircuit to the conventional device model.

Japanese Patent No. 5069711 Japanese Patent No. 5117926

  However, the above-described prior art has a problem that the electrical characteristics of the vertical semiconductor device cannot be simulated (simulated) with high accuracy. For example, the techniques described in Patent Documents 1 and 2 cannot accurately simulate the reverse current-voltage characteristics.

  Therefore, the present invention provides a simulation method that can simulate the electrical characteristics of a vertical semiconductor device with high accuracy.

  In order to solve the above problem, a simulation method according to an aspect of the present invention is a simulation method for simulating electrical characteristics of a vertical semiconductor device including a first electrode terminal and a second electrode terminal, and the first electrode terminal A first function representing a first current flowing from the first electrode terminal to the second electrode terminal with respect to an inter-terminal voltage applied between the first electrode terminal and the second electrode terminal, and the second function with respect to the inter-terminal voltage. Using the second function representing the second current flowing from the electrode terminal to the first electrode terminal, and simulating the electrical characteristics of the vertical semiconductor device, wherein the first function and the second function are: It has an inverse function type relationship.

  These comprehensive or specific modes may be realized by a system, a method, an integrated circuit, a computer program, or a recording medium such as a computer-readable CD-ROM. The system, method, integrated circuit, computer program And any combination of recording media.

  According to the present invention, the electrical characteristics of a vertical semiconductor device can be simulated with high accuracy.

It is a figure which shows the circuit structure of the conventional vertical semiconductor device. It is a schematic sectional drawing which shows the structure of the vertical semiconductor device which concerns on embodiment. It is a figure which shows the circuit structure of the vertical semiconductor device which concerns on embodiment. It is a figure which shows the current-voltage characteristic of the device model of the vertical semiconductor device which concerns on embodiment. It is a figure which shows the current-voltage characteristic of the forward direction of the vertical semiconductor device which concerns on embodiment. It is a figure which shows the current-voltage characteristic of the reverse direction of the vertical semiconductor device which concerns on embodiment. It is a figure which shows the current-voltage characteristic of the reverse direction of the vertical semiconductor device which concerns on embodiment by logarithm display. It is a figure which shows the comparison result with another device model in the current-voltage characteristic of the reverse direction of the vertical semiconductor device which concerns on embodiment. It is a figure which shows the comparison result with another device model in the current-voltage characteristic of the reverse direction of the vertical semiconductor device which concerns on embodiment. It is a block diagram which shows the function structure of the simulation apparatus which concerns on embodiment. It is a flowchart which shows the simulation method which concerns on embodiment. It is a flowchart which shows the process which determines each coefficient in the simulation method which concerns on embodiment. It is a figure which shows typically the process which determines each coefficient in the simulation method which concerns on embodiment. It is a figure which shows the current-voltage characteristic when temperature T = -50 degree of the vertical semiconductor device which concerns on embodiment. It is a figure which shows the current-voltage characteristic in case temperature T = 25 degree | times of the vertical semiconductor device which concerns on embodiment. It is a figure which shows the current-voltage characteristic in case temperature T = 75 degree | times of the vertical semiconductor device which concerns on embodiment. It is a figure which shows the current-voltage characteristic when temperature T = 125 degree | times of the vertical semiconductor device which concerns on embodiment. It is a figure which shows the actual value of the current-voltage characteristic of another vertical semiconductor device which concerns on embodiment. It is a figure which shows the actual value of the current-voltage characteristic of another vertical semiconductor device which concerns on embodiment. It is a figure which shows the current-voltage characteristic of the forward direction of another vertical semiconductor device which concerns on embodiment. It is a figure which shows the current-voltage characteristic of the reverse direction of another vertical semiconductor device which concerns on embodiment. It is a figure which shows the dependence with respect to the voltage between terminals of the drain-source of the capacity | capacitance between terminals of the vertical semiconductor device which concerns on embodiment. It is a figure which shows the switching characteristic (turn-on) of the vertical semiconductor device which concerns on embodiment. It is a figure which shows the switching characteristic (turn-off) of the vertical semiconductor device which concerns on embodiment. It is a figure which shows the reverse recovery characteristic of the reverse current of the vertical semiconductor device which concerns on embodiment.

(Knowledge that became the basis of the present invention)
The present inventor has found that the following problems occur with respect to the conventional simulation method described in the “Background Art” column.

  In the above conventional simulation method, the reverse current flowing in the reverse bias state between the drain and the source is modeled as being caused by the current flowing in the body diode. That is, the equivalent circuit of the vertical semiconductor device in the conventional simulation method has a configuration in which the body diode is connected between the drain and the source, as shown in FIG.

  On the other hand, in recent years, development of new power devices (vertical semiconductor devices) such as MOSFETs having an epichannel structure has been advanced. In such a new vertical semiconductor device, the reverse current may flow through the channel without necessarily flowing through the body diode. For this reason, the current-voltage characteristic in the reverse direction may show gate voltage dependency.

  Therefore, the conventional simulation method has a problem that the reverse current voltage characteristics of a new vertical semiconductor device cannot be accurately simulated.

  In order to solve such a problem, a simulation method according to an aspect of the present invention is a simulation method for simulating electrical characteristics of a vertical semiconductor device including a first electrode terminal and a second electrode terminal, A first function representing a first current flowing from the first electrode terminal to the second electrode terminal with respect to an inter-terminal voltage applied between one electrode terminal and the second electrode terminal, and for the inter-terminal voltage, Using the second function representing the second current flowing from the second electrode terminal to the first electrode terminal to simulate the electrical characteristics of the vertical semiconductor device, the first function and the second function And have an inverse function type relationship.

  Thereby, since the first function and the second function having an inverse function type relationship are used, the electrical characteristics of the vertical semiconductor device can be simulated with high accuracy. For example, the reverse current-voltage characteristics can be simulated with high accuracy.

  For example, the simulation method further includes a step of determining a first coefficient of the first function and a second coefficient of the second function based on an actual measurement value of the vertical semiconductor device, In the step of simulating, the electrical characteristics may be simulated using the first function for which the first coefficient is determined and the second function for which the second coefficient is determined.

  Thereby, the first function and the second function based on the actual measurement value can be used by determining the first coefficient and the second coefficient using the actual measurement value. Therefore, a more accurate simulation can be performed.

  For example, the second function may be a function in which a coefficient of an inverse function of the first function is replaced with the second coefficient.

  Thus, by using a function obtained by replacing the coefficient of the inverse function of the first function indicating the forward current-voltage characteristic with the second coefficient as the second function, not only the forward current-voltage characteristic but also the vertical semiconductor device The current-voltage characteristics in the reverse direction can be simulated with high accuracy.

  In addition, for example, the vertical semiconductor device may further include a control electrode terminal, and the first function and the second function may be functions depending on a voltage applied to the control electrode terminal.

  As a result, electrical characteristics depending on the voltage applied to the control electrode terminal can be simulated with high accuracy.

For example, when the first current and the second current are represented by I _ds and the terminal voltage is represented by V _ds , the first function is represented by (Equation A), and the second function is represented by equation (B), the first coefficient _a F, _{B F} and _{C F} and the second coefficient _a R of the formula (B), _{B R} and _{C R} (formula a), the The value may not depend on V _ds .

  Thereby, the current-voltage characteristics of a vertical semiconductor device can be simulated with high accuracy by using the functions represented by (Expression A) and (Expression B).

  Further, for example, the first coefficient and the second coefficient may be expressed by a control voltage applied between the control electrode terminal and the second electrode terminal and a third function depending on temperature. .

  Thereby, each coefficient can be determined using the measured value measured for every combination of control voltage and temperature.

  Further, for example, the variable of the third function is the control voltage, and the third coefficient of the third function is represented by a fourth function having the temperature as a variable, and the first coefficient and the second coefficient In the determining step, the first coefficient and the second coefficient may be determined by determining a fourth coefficient of the fourth function.

  Thereby, each coefficient can be determined using the measured value measured for every combination of control voltage and temperature.

  In addition, for example, in the step of determining the first coefficient and the second coefficient, (i) fitting the first function and the second function to the actual measurement value so that the first coefficient and the second coefficient are determined for each control voltage. Determining the second coefficient; and (ii) determining the third coefficient by fitting the third function to the first coefficient and the second coefficient determined for each control voltage. The third coefficient is determined for each temperature by executing for each temperature, and the fourth coefficient is determined by fitting the fourth function to the third coefficient determined for each temperature. May be.

  Thereby, for example, each coefficient can be easily determined by fitting using the least square method.

  These comprehensive or specific modes may be realized by a system, a method, an integrated circuit, a computer program, or a recording medium such as a computer-readable CD-ROM. The system, method, integrated circuit, computer program And any combination of recording media.

  Hereinafter, embodiments will be specifically described with reference to the drawings.

  It should be noted that each of the embodiments described below shows a comprehensive or specific example. The numerical values, shapes, materials, constituent elements, arrangement positions and connecting forms of the constituent elements, steps, order of steps, and the like shown in the following embodiments are merely examples and are not intended to limit the present invention. In addition, among the constituent elements in the following embodiments, constituent elements that are not described in the independent claims indicating the highest concept are described as optional constituent elements.

(Embodiment)
[1. Configuration of vertical semiconductor device]
First, a vertical semiconductor device to be simulated by the simulation method according to the present embodiment will be described with reference to FIGS. 2A and 2B. FIG. 2A is a schematic cross-sectional view showing the configuration of the vertical semiconductor device 10 according to the present embodiment. FIG. 2B is a diagram showing a circuit configuration of the vertical semiconductor device 10 according to the present embodiment.

[1-1. Cross-sectional configuration of vertical semiconductor device]
The “vertical” semiconductor device according to the present embodiment includes two or more electrodes. At least one of the two or more electrodes is provided on a different surface from the other electrodes. For example, in a MOSFET that is an example of a “vertical” semiconductor device, a source electrode and a gate electrode are provided on the same surface, and a drain electrode is provided on the other surface. That is, in the “vertical type” MOSFET, the drain electrode is provided so as to face the source electrode and the gate electrode across the substrate, and a drain current (drain-source current) flows in the stacking direction of each semiconductor layer. .

  The vertical semiconductor device 10 according to the present embodiment is an example of a power device, and is, for example, a MOSFET configured using silicon carbide (SiC). As shown in FIG. 2A, the vertical semiconductor device 10 includes a substrate 11, a drift layer 12, a well region 13, a source region 14, a drain electrode 15, a source electrode 16, a gate electrode 17, and gate insulation. And a membrane 18.

The substrate 11 is, for example, an n ⁺ type SiC substrate. The drift layer 12 is a semiconductor layer provided on the substrate 11, and is, for example, an n ⁻ type SiC layer. Note that superscripts (“+” and “−”) such as “n ⁺ ” and “n ⁻ ” indicate relative impurity concentration relationships.

The well region 13 is a p-type semiconductor region formed in the drift layer 12. The source region 14 is an n ⁺ type semiconductor region formed in the well region 13.

  The drain electrode 15 is formed on the back surface of the substrate 11.

  The source electrode 16 is formed so as to contact the surface of the well region 13 (p-type contact region) and the source region 14.

  The gate electrode 17 is formed on the gate insulating film 18 formed so as to be in contact with the drift layer 12, the well region 13, and the source region 14. The gate insulating film 18 is an insulating film such as a silicon oxide film, for example. The drain electrode 15, the source electrode 16, and the gate electrode 17 are metal electrodes, such as aluminum, for example.

  Note that the vertical semiconductor device 10 shown in FIG. 2A is merely an example, and the materials and the like are not limited to those described above. For example, instead of SiC, silicon (Si), gallium nitride (GaN), or the like may be used. Further, the p-type and n-type may be interchanged.

[1-2. Circuit configuration of vertical semiconductor device]
The vertical semiconductor device 10 shown in FIG. 2A can be represented by a bidirectional current source 20 and variable capacitors 21 to 23 as shown in FIG. 2B.

  The bidirectional current source 20 includes a drain electrode terminal D, a source electrode terminal S, and a gate electrode terminal G. The drain electrode terminal D is an example of a first electrode terminal and corresponds to the drain electrode 15 shown in FIG. 2A. The source electrode terminal S is an example of a second electrode terminal and corresponds to the source electrode 16 shown in FIG. 2A. The gate electrode terminal G is an example of a control electrode terminal, and corresponds to the gate electrode 17 shown in FIG. 2A. The bidirectional current source 20 outputs a current corresponding to the inter-terminal voltage applied between the drain electrode terminal D and the source electrode terminal S.

The variable capacitor 21 is a variable capacitor connected between the drain electrode terminal D and the source electrode terminal S. The capacitance C _ds of the variable capacitor 21 varies depending on the inter-terminal voltage V _ds applied between the drain electrode terminal D and the source electrode terminal S.

The variable capacitor 22 is a variable capacitor connected between the drain electrode terminal D and the gate electrode terminal G. The capacitance C _dg of the variable capacitor 22 varies depending on the inter-terminal voltage V _dg applied between the drain electrode terminal D and the gate electrode terminal G.

The variable capacitor 23 is a variable capacitor connected between the gate electrode terminal G and the source electrode terminal S. The capacitance C _gs of the variable capacitor 23 varies depending on the inter-terminal voltage V _gs applied between the gate electrode terminal G and the source electrode terminal S.

In the present embodiment, the first current flowing from the drain electrode terminal D to the source electrode terminal S is a forward current, and the second current flowing from the source electrode terminal S to the drain electrode terminal D is a reverse current. That is, the forward current is the drain current I _ds (> 0) that flows from the drain electrode terminal D to the source electrode terminal S when the inter-terminal voltage V _ds is positive (V _ds > 0). The reverse current is a drain current I _ds (<0) that flows from the drain electrode D to the source electrode terminal S when the inter-terminal voltage V _ds is negative (V _ds <0).

[2. Electrical characteristics of vertical semiconductor devices]
Next, electrical characteristics of the vertical semiconductor device 10 that is a target of the simulation method according to the present embodiment will be described with reference to FIG. FIG. 3 is a diagram showing current-voltage characteristics of the device model of the vertical semiconductor device 10 according to the present embodiment.

  In the present embodiment, the forward current is represented by a first function, and the reverse current is represented by a second function. The first function and the second function have an inverse function type relationship.

The first function is a function representing a first current flowing from the first electrode terminal to the second electrode terminal with respect to the inter-terminal voltage applied between the first electrode terminal and the second electrode terminal. Specifically, the first function represents the drain current I _ds with respect to the inter-terminal voltage V _ds when the inter-terminal voltage V _ds is positive. In other words, the first function is a function that represents the forward current (that is, the drain current I _ds when V _ds > 0) using the terminal voltage V _ds that is a variable and the first coefficient.

  Specifically, the first function is expressed by (Expression 1).

Here, the first coefficients A _F , B _F and C _F are values that do not depend on the inter-terminal voltage V _ds . The first coefficients A _F , B _F and C _F depend on the gate voltage V _gs and the temperature T, for example. In other words, the first coefficients A _F , B _F and C _F are expressed by a third function depending on the gate voltage V _gs and the temperature T. Details of the third function will be described later.

The second function is a function representing a second current flowing from the second electrode terminal to the first electrode terminal with respect to the inter-terminal voltage applied between the first electrode terminal and the second electrode terminal. Specifically, the second function represents the drain current I _ds with respect to the inter-terminal voltage V _ds when the inter-terminal voltage V _ds is negative. In other words, the second function is a function that represents the reverse current (that is, the drain current I _ds when V _ds <0) using the terminal voltage V _ds that is a variable and the second coefficient.

  Specifically, the second function is expressed by (Expression 2).

Here, the second coefficient _A R, _{B R} and _{C R} are values that do not depend on the inter-terminal voltage Vds. Second coefficient _A R, _{B R} and _{C R} are, for example, depends on the gate voltage _{V gs} and temperature T. In other words, the second coefficient _A R, _{B R} and _{C R,} the first coefficient _A F, as with _{B F} and _{C F,} represented by the third function depending on the gate voltage _{V gs} and temperature T. Details of the third function will be described later.

As described above, the first function and the second function are functions that depend on the voltage applied to the gate electrode terminal G (for example, the gate voltage V _gs ). The gate voltage V _gs is an example of a control voltage applied between the control electrode terminal and the second electrode terminal.

Note that the inverse function type relationship means that the first function and the second function are represented by functions according to the inverse functions of each other. For example, the first function is a function according to the inverse function of the second function. Specifically, the first function is a function in which the coefficient of the inverse function of the second function is replaced with the first coefficients A _F , B _F, and C _F. Similarly, the second function, the coefficients of the inverse function of the first function is a function obtained by replacing the second coefficient A _R, B _R and C _R.

FIG. 3 is a graph illustrating (Equation 1) and (Equation 2) described above. First coefficient _A F, _{B F} and _{C F} and the second coefficient _A R, since _{B R} and _{C R} is dependent on the gate voltage _{V gs,} as shown in FIG. 3, the shape of the graph in response to the gate voltage _{V gs} Is different.

First coefficient _A F, _{B F} and _{C F} and the second coefficient _A R, _{B R} and _{C R} is determined based on the measured value of the vertical semiconductor device 10. For example, it is determined by performing fitting by the least square method with an actual measurement value obtained for each combination of gate voltage and temperature. A specific example of how to determine each coefficient will be described later.

[3. Result of fitting between measured value and function]
Subsequently, the fitting result of the measured value and the function of the current-voltage characteristic of the vertical semiconductor device 10 according to the present embodiment will be described with reference to FIGS. 4, 5A, and 5B.

  FIG. 4 is a diagram showing current-voltage characteristics in the forward direction of the vertical semiconductor device 10 according to the present embodiment. In FIG. 4, white circles indicate actual measurement values, and a solid line indicates the result of fitting the first function represented by (Equation 1). In other words, the solid line indicates the first function in which the first coefficient is determined by fitting with the actual measurement value. FIG. 4 shows actual measurement values and fitting results when the temperature T is 25 degrees.

As shown in FIG. 4, it can be seen that fitting is appropriately performed for various values of the gate voltage V _gs . Therefore, by using the first function represented by (Expression 1), the forward current-voltage characteristics of the vertical semiconductor device 10 can be simulated with high accuracy.

  FIG. 5A is a diagram showing current-voltage characteristics in the reverse direction of the vertical semiconductor device 10 according to the present embodiment. Moreover, FIG. 5B is a figure which shows the current-voltage characteristic of the reverse direction of the vertical semiconductor device 10 based on this Embodiment by logarithm display. In FIG. 5A and FIG. 5B, white circles indicate actual measurement values, and solid lines indicate the results of fitting the second function represented by (Equation 2). In other words, the solid line indicates the second function in which the second coefficient is determined by fitting with the actual measurement value. 5A and 5B show measured values and fitting results when the temperature T is 25 degrees.

As shown in FIG. 5A and FIG. 5B, it can be seen that the fitting is appropriately performed for various values of the gate voltage V _gs . Therefore, by using the second function represented by (Equation 2), the current-voltage characteristics in the reverse direction of the vertical semiconductor device 10 can be simulated with high accuracy.

From the above, when the gate voltage V _gs and the temperature T are constant, the forward current-voltage characteristics can be simulated with high accuracy by the first function expressed by (Equation 1), and the reverse direction It can be seen that the current-voltage characteristics of can be simulated with high accuracy by the second function represented by (Equation 2).

[4. Comparison with other models]
Subsequently, a comparison result between the device model (function) according to the present embodiment and another model (other function) will be described with reference to FIGS. 6A and 6B. 6A and 6B are diagrams showing a comparison result with another device model in the reverse direction current-voltage characteristics of the vertical semiconductor device 10 according to the present embodiment.

  In the present embodiment, as represented by (Equation 1) and (Equation 2), the second function representing the reverse current-voltage characteristic is an inverse function type of the first function representing the forward current-voltage characteristic. . That is, in the device model according to the present embodiment, the reverse current-voltage characteristics are represented by a function that depends on the gate voltage.

  On the other hand, in another device model, the current-voltage characteristic in the reverse direction is expressed by an exponential function shown in (Equation 3), for example, as a current due to a diode independent of the gate voltage.

  Here, A, B, and R are values determined by fitting. R corresponds to a series resistance component.

In FIG. 6A and FIG. 6B, the black circles indicate actual measurement values, the solid line indicates the second function expressed by (Expression 2), and the broken line indicates the exponential function expressed by (Expression 3). 6A shows a case where the temperature T is 25 degrees and the gate voltage V _gs is 0 V, and FIG. 6B shows that the temperature T is 25 degrees and the gate voltage V _gs is −6 V. It shows a case.

In FIG. 6A, the cases of (Equation 2) and (Equation 3) can appropriately simulate the case of about 1.3 V or more. On the other hand, in FIG. 6B, (Equation 3) cannot simulate the case where V _ds is about 2.2 V or less, whereas in (Equation 2), V _ds is about 2.2 V or less. It can be seen that in some cases (up to about 1.7V) it can be simulated.

Thus, in the case of (Equation 2), the current-voltage characteristics can be simulated with high accuracy even when the gate voltage V _gs changes, whereas in the case of (Equation 3), the gate voltage V _gs can be simulated. When the voltage V _gs changes, the current-voltage characteristic may not be simulated. Therefore, it can be seen that (Equation 2) can simulate the measured value with higher accuracy than (Equation 3).

Hereinafter, the reason why the current-voltage characteristics cannot be simulated with high accuracy when the gate voltage V _gs changes (Formula 3) will be briefly described with reference to FIG. 2A.

In the vertical semiconductor device 10 shown in FIG. 2A, when a reverse bias (V _ds <0) is applied between the drain electrode 15 and the source electrode 16, a PN diode (body body) composed of the well region 13 and the drift layer 12 is formed. Current flows through the diode (solid arrow). Therefore, if there is no other influence, the reverse current can be expressed by an exponential function based on the diode characteristics as shown in (Equation 3).

However, for example, in a vertical semiconductor device in which an n-type doped layer is formed immediately below the gate insulating film 18, when a gate voltage _Vgs is applied to the gate electrode 17, the vicinity of the surface of the well region 13 (gate insulating film) A channel is formed in the vicinity of 18). Alternatively, a channel may be formed even when the gate voltage _Vgs is not applied.

For this reason, when a reverse bias (V _ds <0) is applied between the drain electrode 15 and the source electrode 16, a current flows through the channel instead of the body diode (broken arrow). As the gate voltage V _gs is increased, a channel is more easily formed, and the current flowing through the channel becomes more dominant than the current flowing through the body diode.

The exponential function represented by (Equation 3) is determined assuming the current flowing through the body diode, and does not assume the current flowing through the channel depending on the gate voltage V _gs . For this reason, as shown to FIG. 6B, there exists a case where a current-voltage characteristic cannot be simulated accurately.

[5. Configuration of simulation apparatus]
Hereinafter, a simulation apparatus that determines the coefficient using the device model (function) as described above and simulates the current-voltage characteristics of the vertical semiconductor device 10 will be described with reference to FIG. FIG. 7 is a block diagram showing a functional configuration of the simulation apparatus 100 according to the present embodiment.

  As shown in FIG. 7, the simulation apparatus 100 includes an actual measurement value acquisition unit 110, a coefficient determination unit 120, and a simulation unit 130. Note that each processing unit included in the simulation apparatus 100 includes, for example, a CPU (Central Processing Unit), a RAM (Random Access Memory), a ROM (Read Only Memory), a communication interface, an I / O port, a hard disk, a display, and the like. It may be realized by software such as a program executed on a computer, or may be realized by hardware such as an electronic circuit.

The actual measurement value acquisition unit 110 acquires actual measurement values of the vertical semiconductor device 10. For example, the actual measurement value acquisition unit 110 acquires measurement data (actual measurement value) from a measuring instrument that measures the current-voltage characteristics of the vertical semiconductor device 10 and stores it in a memory or the like. The actual measurement value is, for example, the value of the drain current I _ds with respect to the inter-terminal voltage V _ds measured for each combination of the gate voltage V _gs and the temperature T.

  The coefficient determination unit 120 determines the first coefficient of the first function and the second coefficient of the second function based on the actual value acquired by the actual value acquisition unit 110. As shown in FIG. 7, the coefficient determination unit 120 includes a first coefficient determination unit 121, a second coefficient determination unit 122, a third coefficient determination unit 123, and a fourth coefficient determination unit 124.

The first coefficient determination unit 121 determines the first coefficients A _F , B _F, and C _F of the first function expressed by (Expression 1). Specifically, the first function A _F , B _F, and C _F are determined for each combination of the gate voltage V _gs and the temperature T by fitting the first function to the actually measured value.

For example, a first function whose first coefficient is undetermined is stored in advance in a memory or the like. The first coefficient determination unit 121 reads the first function and the actual measurement value from a memory or the like. At this time, the read actual value is an actual value corresponding to the combination of the gate voltage V _gs and the temperature T. The first coefficient determination unit 121, the measured value of the first function, by fitting using the least squares method, the first coefficient A _F corresponding to the combination of the gate voltage V _gs and the temperature _T, B _F and Determine C _F. The determined first coefficients A _F , B _F and C _F are stored in the memory in association with the combination of the gate voltage V _gs and the temperature T, for example.

Second coefficient determining unit 122 determines the second coefficient _A R, _{B R} and _{C R} of the second function expressed by Equation (2). Specifically, by fitting a second function to the measured value, for each combination of the gate voltage V _gs and the temperature T, to determine a second coefficient A _R, B _R and C _R.

For example, a second function whose second coefficient is undetermined is stored in advance in a memory or the like. The second coefficient determination unit 122 reads the second function and the actual measurement value from a memory or the like. At this time, the read actual value is an actual value corresponding to the combination of the gate voltage V _gs and the temperature T. The second coefficient determining unit 122, the measured values of the second function, by fitting using the least squares method, the second coefficient A _R corresponding to the combination of the gate voltage V _gs and the temperature _T, B _R and to determine the C _R. Second coefficient _A R was determined, _{B R} and _{C R} are, for example, are stored in the memory in association with the combination of the gate voltage _{V gs} and temperature T.

The third factor determining unit 123, by fitting the third function, the first coefficient _A F determined for each gate voltage _{V gs, B F} and _{C F} and the second coefficient _A R, the _{B R} and _{C R} The third coefficient is determined. Specifically, the third coefficient determination unit 123 sets the third function for each temperature, the first coefficients A _F , B _F and C _F and the second coefficients A _R , B determined for each gate voltage V _gs. fitting in _R and _{C R.} Thereby, the 3rd coefficient determination part 123 determines a 3rd coefficient for every temperature.

For example, a third function whose third coefficient is undetermined is stored in advance in a memory or the like. Third coefficient determining unit 123 reads the third function from such as a memory, the first coefficient _A F determined, _{B F} and _{C F} and the second coefficient _A R, and _{B R} and _{C R.} In this case, the first coefficient _A F, _{B F} and _{C F} and the second coefficient _A R, _{B R} and _{C R} to be read, a coefficient corresponding to the temperature T. The third coefficient determining unit 123, a third function, the first coefficient _A F determined, _{B F} and _{C F} and the second coefficient _A R, the _{B R} and _{C R,} using the method of least squares fitting As a result, the third coefficient corresponding to the temperature T is determined. The determined third coefficient is stored in the memory in association with the temperature T, for example.

The third function is a function that depends on the gate voltage V _gs and the temperature T. First coefficient _A F, _{B F} and _{C F} and the second coefficient _A R, _{B R} and _{C R} are, for example, represented by the third function of the gate voltage _{V gs} as a variable.

  The third coefficient is a coefficient of the third function and is a coefficient depending on the temperature T. That is, the third coefficient is represented by a fourth function having the temperature T as a variable. Specific examples of the third function and the fourth function will be described later.

The fourth coefficient determination unit 124 determines the fourth coefficient by fitting the fourth function to the third coefficient determined for each temperature. The fourth coefficient is a coefficient of the fourth function, and is a coefficient that does not depend on temperature. When the fourth coefficient determination unit 124 determines the fourth coefficient, the first coefficients A _F , B _F and C _F and the second coefficients A _R , _BR and _CR are determined.

  For example, a fourth function whose fourth coefficient is undetermined is stored in advance in a memory or the like. The fourth coefficient determination unit 124 reads the fourth function and the determined third coefficient from a memory or the like. Then, the fourth coefficient determination unit 124 determines the fourth coefficient by fitting the fourth function to the determined third coefficient using the least square method. The determined fourth coefficient is stored in a memory, for example.

  The simulation unit 130 simulates the electrical characteristics of the vertical semiconductor device 10 using the first function and the second function. Specifically, the simulation unit 130 simulates the electrical characteristics using the first function for which the first coefficient is determined and the second function for which the second coefficient is determined. For example, the simulation unit 130 simulates current-voltage characteristics, switching characteristics, and the like. For example, the simulation unit 130 reads out the determined first function and second function from the memory and performs necessary calculations to simulate current-voltage characteristics and the like.

  For example, the simulation unit 130 writes the simulation result in a memory or the like. Or the simulation part 130 may display a simulation result on the display etc. with which the simulation apparatus 100 is provided.

  For example, when each processing unit is realized by software, the function of the processing unit is realized by executing a program using computer hardware resources such as a CPU, a memory, and an input / output circuit. Is done. That is, the CPU reads out (takes out) processing target data from the memory or the input / output circuit, and temporarily stores (outputs) the calculation result in the memory or the input / output circuit. The function is realized.

[6. Operation]
Next, the operation of the simulation apparatus 100 according to the present embodiment will be described with reference to FIGS. 8A, 8B, and 9. FIG. 8A is a flowchart showing a simulation method according to the present embodiment. FIG. 8B is a flowchart showing processing for determining each coefficient in the simulation method according to the present embodiment. FIG. 9 is a diagram schematically showing processing for determining each coefficient in the simulation method according to the present embodiment.

First, the actual measurement value acquisition unit 110 acquires actual measurement values (S100). Specifically, when actual measurement values at a plurality (n) of temperatures are acquired, the actual measurement value acquisition unit 110 classifies the acquired actual measurement values into groups T _{1 to} T _n . Furthermore, the actual measurement value acquisition unit 110 classifies the actual measurement values classified for each temperature for each gate voltage _Vgs . For example, when the actual measurement values at a plurality (m) of gate voltages are acquired, the actual measurement value acquisition unit 110 classifies the acquired actual measurement values into groups of V _{gs1 to} V _gsm . Specifically, the actual measurement value acquisition unit 110 performs grouping of the actual measurement values by storing the acquired actual measurement values in a memory in association with the combination of the gate voltage V _gs and the temperature T.

  Next, the coefficient determination unit 120 determines each coefficient of each function (S110). A specific determination method will be described below with reference to FIG. 8B.

First, the first coefficient determination unit 121 and the second coefficient determination unit 122 select one group from the n groups of T _{1 to} T _n (S112). For example, and selects a group of measured values measured at a temperature T _1.

The first coefficient determination unit 121 and the second coefficient determination unit 122 determine the first coefficient and the second coefficient for each gate voltage V _gs by fitting the first function and the second function to the actual measurement values (S114). ). Specifically, first, the first coefficient determination unit 121 and the second coefficient determination unit 122 select one group from the m groups of V _{gs1 to} V _gsm . For example, _assume that a group of actually measured values measured at the gate voltage V _gs1 is selected. More specifically, the first coefficient determining unit 121 and the second coefficient determining section 122, from the memory, reads the measured value data corresponding to the temperature _{T 1} and the gate voltage _{V gs1.}

In this case, the first coefficient determination unit 121 performs fitting by the least square method using the measured value measured by the gate voltage V _gs1 and the first function expressed by (Equation 1), so that the first coefficient A Determine _{F 1} , B _F and C _F. Similarly, the second coefficient determination unit 122 performs fitting by the least square method using the actual measurement value measured by the gate voltage V _gs1 and the second function represented by (Equation 2), so that the second coefficient A _{R 1} , _BR and _CR are determined. Thus, the first coefficient _A F corresponding to the temperature _{T 1} and the gate voltage _{V gs1, B F} and _{C F} and the second coefficient _A R, _{B R} and _{C R} are determined.

Next, different groups of gate voltages V _gs (eg, V _gs2 ) are selected until the coefficients corresponding to all groups of gate voltages are determined, and the first coefficients A _F , B _F and C _F and second performing the step of determining the coefficients _a R, _{B R} and _{C R.} Thus, a certain temperature (e.g., _{T 1)} the first coefficient _A F of each gate voltages corresponding to, _{B F} and _{C F} and the second coefficient _A R, _{B R} and _{C R} are determined (in FIG. 9 ( S114)).

A third factor determining unit 123, fitting the third function, the first coefficient _A F determined for each gate voltage, _{B F} and _{C F} and the second coefficient _A R, the _{B R} and _{C R} Thus, the third coefficient is determined (S116).

For example, the third function representing the first coefficient A _F is expressed by (Expression 4).

The third coefficients a _{1 to} a ₈ are values that do not depend on the gate voltage V _gs . Specifically, the third coefficient is represented by a fourth function having the temperature T as a variable.

The third coefficient determination unit 123 _fits the third coefficient a _{1 to} a a by fitting the third function represented by (Equation 4) to the first coefficient A _F for each gate voltage V _gs corresponding to the temperature T _{1. 8} is determined.

Similarly, the first coefficient _{B F} and _{C F} and the second coefficient _A R, for even _{B R} and _{C R,} can be expressed as a third function depending on the gate voltage _{V gs} and temperature T. The third factor determining unit 123, first coefficient _{B F} and _{C F} and the second coefficient _A R for each gate voltage _{V gs} corresponding to the temperature _{T 1,} each of _{B R} and _{C R,} the corresponding coefficient 3 The third coefficient is determined by fitting the function ((S116) in FIG. 9).

Then, different temperature T groups (eg, T ₂ ) are selected until the third coefficients corresponding to all temperature groups are determined, and similarly, the first coefficients A _F , B _F and C _F and the first coefficients 2 factor _a R, executes the step (S114) for determining the _{B R} and _{C R,} and a step (S116) for determining a third coefficient (S112). Thus, the first coefficient _A F, _{B F} and _{C F} and the second coefficient _A R, for each of the _{B R} and _{C R,} the third coefficients are determined for each temperature.

  Next, the fourth coefficient determination unit 124 determines the fourth coefficient of the fourth function by fitting the fourth function to the third coefficient determined for each temperature (S118).

Thereby, for example, the third coefficient a ₁ is expressed by (Expression 5).

Similarly, the third coefficients a _{2 to} a ₈ can be determined. The first factor _{B F} and _{C F} and the second coefficient _A R, similarly for each of the _{B R} and _{C R,} by using a formula equivalent to equation (4) and (5), the gate voltage V It can be expressed as a function of _gs and temperature T.

Thus, the first function and the second function represented by (Expression 1) and (Expression 2) have real values determined from the actual measurement values as coefficients, and the terminal voltage V _ds , the gate voltage V _gs , It can be expressed by a function having the temperature T as a variable ((S118) in FIG. 9).

  Finally, as shown in FIG. 8A, the simulating unit 130 uses the first function for which the first coefficient is determined and the second function for which the second coefficient is determined to determine the electrical characteristics of the vertical semiconductor device 10. Simulate (S120).

[7. simulation result]
Subsequently, a simulation result using the first function and the second function determined by the above-described method will be described.

[7-1. Current-voltage characteristics]
10A to 10D are diagrams showing current-voltage characteristics of the vertical semiconductor device 10 according to the present embodiment. 10A to 10D show current-voltage characteristics at temperatures T = −50 degrees, 25 degrees, 75 degrees, and 125 degrees, respectively. In each figure, white circles indicate actual measurement values, and a solid line indicates a first function expressed by (Expression 1) and a second function expressed by (Expression 2) (that is, a device model).

  As shown in FIGS. 10A to 10D, it can be seen that (Equation 1) and (Equation 2) can simulate the measured values with high accuracy for each temperature in both forward and reverse current-voltage characteristics.

  11A and 11B are diagrams showing current-voltage characteristics of vertical semiconductor devices A and B different from the vertical semiconductor device 10 according to the present embodiment. Both the device A shown in FIG. 11A and the device B shown in FIG. 11B have the same configuration as the vertical semiconductor device 10 described above, and have characteristics similar to the current-voltage characteristics. That is, in the devices A and B, when a reverse bias is applied, the current flowing from the source electrode terminal to the drain electrode terminal includes a current flowing through the channel and a current flowing through the body diode.

  12A and 12B are diagrams illustrating simulation results using the first function expressed by (Expression 1) and the second function expressed by (Expression 2) for the devices A and B described above. . Specifically, FIG. 12A shows current-voltage characteristics in the forward direction, and FIG. 12B shows current-voltage characteristics in the reverse direction. In each figure, white circles indicate actual measurement values, and broken lines indicate (Expression 1) or (Expression 2).

  As shown in FIGS. 12A and 12B, it can be seen that (Equation 1) and (Equation 2) can simulate the measured values with high accuracy in both forward and reverse current-voltage characteristics.

  Thus, it can be seen that the first function represented by (Expression 1) and the second function represented by (Expression 2) can be applied not only to a specific device but also to other vertical semiconductor devices.

[7-2. Switching characteristics]
Next, switching characteristics of the vertical semiconductor device 10 according to the present embodiment will be described with reference to FIGS. 13, 14A, and 14B. FIG. 13 is a diagram showing the dependency of the inter-terminal capacitance of the vertical semiconductor device according to the present embodiment on the drain-source voltage. 14A and 14B are diagrams showing the switching characteristics of the vertical semiconductor device according to the present embodiment.

First, in order to determine the switching characteristics of the vertical semiconductor device 10 to simulate the variable capacitance 21 to 23 of the capacitance value _{C ds,} C _dg, voltage dependence a predetermined function of _{C gs} between the terminals.

For example, measured values obtained by measuring the input capacitance C _iss , the output capacitance C _oss , and the feedback capacitance C _rss of the vertical semiconductor device 10 at V _gs = 0 V, and the following (Formula 6) to (Formula 6) 8) is used to calculate the values of capacitance values C _ds , C _dg , C _gs (corresponding to actual measured values).

(Formula 6) _Cds = _{Coss- Crss}
(Expression 7) C _dg = C _rss
(Formula 8) _Cgs = _{Ciss- Crss}

Then, by fitting to the values of C _ds , C _dg , and C _gs (corresponding to actual measurement values) using the functions expressed by the following (Equation 9) and (Equation 10), (Equation 9) and ( The coefficient (fitting parameter) of Equation 10) is calculated.

Incidentally, A, B, C, D , F, G, H, R, P, Q, V J is the fitting parameter. Each fitting parameter is determined by fitting (Equation 9) and (Equation 10) to C _ds , C _dg , and C _gs corresponding to the actually measured values by the least square method.

Based on (Equation 9) and (Equation 10) in which the fitting parameters are determined, the input capacitance _Ciss , the output capacitance _Coss, and the feedback capacitance _Crss are calculated. A solid line shown in FIG. 13 indicates a calculation result (that is, a fitting result). As shown in FIG. 13, the input capacitance _Ciss , the output capacitance _Coss, and the feedback capacitance _Crss can be simulated with high accuracy.

  FIG. 14A and FIG. 14B show the results of simulation of the switching characteristics in the forward direction of the vertical semiconductor device 10 using (Equation 9) and (Equation 10) determined as described above and (Equation 1). Shown in 14A and 14B show the simulation results of the vertical semiconductor device 10 in the double pulse test. The solid line indicates the actual measurement value, and the broken line indicates the device model. In any case, it can be seen that the simulation can be performed with high accuracy.

  FIG. 15 shows reverse recovery characteristics of reverse current of the vertical semiconductor device 10 according to the present embodiment. The solid line indicates the actual measurement value, and the broken line indicates the device model.

  As shown in FIG. 15, the reverse recovery characteristic indicates the time change of the reverse current that flows due to the minority carrier accumulation effect. Specifically, the reverse recovery characteristic indicates a time change of a reverse current that flows when minority carriers accumulated when a forward bias is applied move when the reverse bias is applied.

  As shown in FIG. 15, it can be seen that the simulation method according to the present embodiment can be simulated with high accuracy.

As described above, the simulation method according to the present embodiment is a simulation method for simulating the electrical characteristics of the vertical semiconductor device 10 including the drain electrode terminal D and the source electrode terminal S, and is in order with respect to the inter-terminal voltage _Vds . Using the first function representing the directional current and the second function representing the reverse current with respect to the inter-terminal voltage V _ds to simulate the electrical characteristics of the vertical semiconductor device 10, and the first function and the second function And have an inverse function type relationship.

  Thereby, the first function and the second function having an inverse function type relationship are used, so that the electrical characteristics of the vertical semiconductor device 10 can be simulated with high accuracy.

(Other embodiments)
Although the simulation method according to one or more aspects has been described above based on the embodiments, the present invention is not limited to these embodiments. Unless it deviates from the main point of this invention, what made the various deformation | transformation which those skilled in the art think about this embodiment, and the form constructed | assembled combining the component in a different embodiment are also included in the scope of the present invention. It is.

  For example, in the above-described embodiment, the example in which the vertical semiconductor device 10 is the vertical MOSFET has been described. However, the present invention is not limited to this. For example, the vertical semiconductor device according to one embodiment of the present invention may be an IGBT.

  In the above-described embodiment, the vertical semiconductor device 10 has been described as an example including the three terminals of the first electrode terminal, the second electrode terminal, and the control electrode terminal. However, the vertical semiconductor device 10 may not include the control electrode terminal. Good. For example, the vertical semiconductor device according to one embodiment of the present invention may be a diode.

For example, in the above embodiment, the example in which the control voltage is the gate-source terminal voltage V _gs has been described. However, the control voltage may be, for example, the gate-drain terminal voltage V _gd. .

  Further, for example, in the above embodiment, (Formula 1), (Formula 2), (Formula 4) and (Formula 5) are used for the first function, the second function, the third function, and the fourth function representing the device model. However, these are merely examples, and it is sufficient that the first function and the second function have an inverse function relationship, and another polynomial or the like may be used.

  Each of the above-described embodiments can be variously changed, replaced, added, omitted, etc. within the scope of the claims or an equivalent scope thereof.

  The present invention can be used as a simulation method capable of simulating a vertical semiconductor device with high accuracy, and can be used, for example, in the design of power electronics circuits such as inverters and converters.

DESCRIPTION OF SYMBOLS 10 Vertical semiconductor device 11 Substrate 12 Drift layer 13 Well area | region 14 Source area | region 15 Drain electrode 16 Source electrode 17 Gate electrode 18 Gate insulating film 20 Bidirectional current source 21, 22, 23 Variable capacity | capacitance 100 Simulation apparatus 110 Actual value acquisition part 120 Coefficient determining unit 121 First coefficient determining unit 122 Second coefficient determining unit 123 Third coefficient determining unit 124 Fourth coefficient determining unit 130 Simulating unit

Claims (8)

A simulation method for simulating electrical characteristics of a vertical semiconductor device having a first electrode terminal and a second electrode terminal,
A first function representing a first current flowing from the first electrode terminal to the second electrode terminal with respect to an inter-terminal voltage applied between the first electrode terminal and the second electrode terminal; and the inter-terminal voltage And simulating the electrical characteristics of the vertical semiconductor device using a second function representing a second current flowing from the second electrode terminal to the first electrode terminal.
The simulation method, wherein the first function and the second function have an inverse function relationship. The simulation method further includes:
Determining a first coefficient of the first function and a second coefficient of the second function based on an actual measurement value of the vertical semiconductor device;
In the simulating step,
The simulation method according to claim 1, wherein the electrical characteristics are simulated using the first function for which the first coefficient is determined and the second function for which the second coefficient is determined. The simulation method according to claim 2, wherein the second function is a function in which a coefficient of an inverse function of the first function is replaced with the second coefficient. The vertical semiconductor device further includes a control electrode terminal,
The simulation method according to claim 2, wherein the first function and the second function are functions that depend on a voltage applied to the control electrode terminal. When the first current and the second current are represented by I _ds and the terminal voltage is represented by V _ds ,
The first function is represented by (Formula A),
The second function is expressed by (Formula B),
Wherein the first coefficient _A F, _{B F} and _{C F} and the second coefficient _A R of the formula (B), _{B R} and _{C R} are claims is a value which does not depend on the _{V ds} (Formula A) 4. The simulation method according to 4.

The said 1st coefficient and the said 2nd coefficient are represented by the 3rd function depending on the control voltage applied between the said control electrode terminal and the said 2nd electrode terminal, and temperature. Simulation method. The variable of the third function is the control voltage,
The third coefficient of the third function is represented by a fourth function having the temperature as a variable,
In the step of determining the first coefficient and the second coefficient,
The simulation method according to claim 6, wherein the first coefficient and the second coefficient are determined by determining a fourth coefficient of the fourth function. In the step of determining the first coefficient and the second coefficient,
(I) determining the first coefficient and the second coefficient for each control voltage by fitting the first function and the second function to the measured value; and (ii) changing the third function to The step of determining the third coefficient by fitting to the first coefficient and the second coefficient determined for each control voltage is performed for each temperature, so that the third coefficient is determined for each temperature. Decide
The simulation method according to claim 7, wherein the fourth coefficient is determined by fitting the fourth function to a third coefficient determined for each temperature.

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