JP2015185979A - Moving image encoding device and moving image encoder - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a moving image encoding device capable of compressing a delay in encoding processing.SOLUTION: A moving image encoding device 1 including plural moving image encoders 100 for respectively encoding plural regions obtained by dividing one image of a moving image is characterized in that at least one of the moving image encoders 100 encodes a first region where a partial region of an encoded region transferred from another moving image encoder is not retrieved, and thereafter encodes a second region where a partial region is retrieved. Both of the beginning part of the first region and that of the second region are slice boundaries or tile boundaries.

Description

  The present invention relates to a moving image encoding device and a moving image encoder.

  As a compression encoding method for moving images, a technique for compressing an information amount using inter-frame prediction (inter-picture prediction) has been generalized. Such a technique is used in, for example, Moving Picture Experts Group-2 (MPEG-2), MPEG-4, H.264 / Advanced Video Coding (H.264 / AVC), and the like. H.265 / High Efficiency Video Coding (H.265 / HEVC) has been standardized as the latest video compression standard. H. H.265 / HEVC is expected to be used for Ultra High Definition Television (UHDTV), which is planned as the next-generation television. UHDTV handles ultra-high-definition images such as 4K2K (for example, 4,096 × 2,160 pixels or 3,840 × 2,160 pixels) and 8K4K (for example, 8,192 × 4,096 pixels).

  In order to encode such an ultra-high-definition image, a multi-chip encoding LSI can be used rather than encoding using a one-chip moving image encoder (hereinafter referred to as an encoding LSI) and a memory. Encoding in parallel using a memory is desirable from the viewpoint of improving processing performance. When encoding in parallel using a plurality of encoding LSIs and memories, a picture (or frame), which is one image of a moving image, is divided into a plurality of areas called slices, and each encoding LSI is responsible for the slice that it is responsible for. It is known to encode (see, for example, Patent Documents 1 to 4).

JP 2011-217082 A JP 2009-027693 A JP-A-8-205142 JP 2009-296169 A

  By the way, in an encoding LSI that performs inter-frame prediction, an encoding unit area called Macroblock (MB: Macroblock) or Coding Tree Unit (CTU: Coding Tree Unit) is included in past reference images (local decoded images). Motion vector detection for searching for similar regions is performed. In this case, it is desirable that an area in a wider range than the slice that each coding LSI is responsible is stored in the memory. Therefore, in the vicinity of the slice boundary, a part of the area adjacent to the slice among the adjacent slices of the past reference image adjacent to the slice may be stored in the memory used by the encoding LSI together with the slice. desirable.

  When encoding each slice sequentially from the coding unit area located at the head of the slice to the coding unit area located at the end of the slice while synchronizing each picture by each coding LSI, the code located at the head The encoding process is completed in order from the encoding unit area. When the encoding process for each slice is completed by completing the encoding process for each slice, the above-described part of the area where the encoding process is completed is transferred to encode each slice in the next picture. Is done.

  Here, since the coding unit area located at the back of each slice in the next picture has sufficient time to use a part of the transferred area for motion vector detection, the transfer time is reduced. Easy to secure. On the other hand, the coding unit area located in front of each slice in the next picture does not have enough time to use the transferred partial area for motion vector detection. It is difficult to secure the transfer time. That is, if a partial area of the previous picture is not transferred, encoding of the encoding unit area located in front of each slice in the current picture cannot be started. There is a problem in that a useless idle period (standby period) occurs between pictures and the encoding process is delayed.

  Therefore, in one aspect, an object of the present invention is to provide a moving image encoding device and a moving image encoder capable of compressing a delay in encoding processing.

  A moving image encoding device disclosed in the present specification is a moving image encoding device including a plurality of moving image encoders that respectively encode a plurality of regions obtained by dividing one image of a moving image, and the moving image At least one of the encoders encodes a first area that does not search for a partial area of an encoded area transferred from another video encoder, and then searches for a second area that searches for the partial area. A moving image encoding apparatus that performs encoding.

  The moving image encoder disclosed in the present specification is a moving image encoder that encodes one of regions obtained by dividing one image of a moving image, and is a code transferred from another moving image encoder. It is a moving image encoder which has an encoding means to encode the 1st area | region which does not search the partial area | region of a complete | finished area | region, and then encodes the 2nd area | region which searches the said partial area | region.

  According to the moving image encoding device and the moving image encoder disclosed in this specification, it is possible to compress the delay of the encoding process.

FIG. 1 is an example of a block diagram of a video encoding apparatus. FIG. 2 is a diagram for explaining a region. FIG. 3 is an example of a block diagram of the encoding LSI. FIG. 4 is an example of a block diagram of the codec unit. FIG. 5 is a flowchart illustrating an example of the operation of the overall control unit according to the first embodiment. FIG. 6 is a diagram for explaining an example of regions and region divisions that are handled by each encoding LSI according to the first embodiment. FIG. 7 is a diagram for explaining an area handled by an LSI to which LSI # 1 according to the first embodiment is assigned and areas before and after the area. FIG. 8 is a flowchart showing an example of the operation of the inter-chip data transfer unit in the first embodiment. FIG. 9 is a diagram for explaining the operation timing of each encoding LSI. FIG. 10 is a diagram for explaining the memory state of picture # 1 at a predetermined time. FIG. 11 is a diagram for explaining the operation timing of each encoding LSI according to the first comparative example. FIG. 12 is a diagram for explaining the operation timing of each encoding LSI according to the second comparative example. FIG. 13 is a flowchart illustrating an example of the operation of the overall control unit according to the second embodiment. FIG. 14 is a diagram for explaining an example of regions and region divisions that are handled by each encoding LSI according to the second embodiment. FIG. 15 is a diagram for explaining a part of an area (slice # 1) and a part of the previous area (slice # 0) that are handled by the encoding LSI to which LSI # 1 according to the second embodiment is assigned. FIG. FIG. 16 is a flowchart illustrating an example of the operation of the inter-chip data transfer unit in the second embodiment. FIG. 17 is a diagram for explaining the operation timing of each encoding LSI. FIG. 18 is a diagram for explaining the memory state of picture # 1 at a predetermined time. FIG. 19 is a diagram for explaining an example of tiles and tile divisions handled by each encoding LSI.

  Hereinafter, an embodiment for carrying out this case will be described with reference to the drawings.

(First embodiment)
FIG. 1 is an example of a block diagram of the moving picture encoding apparatus 1. FIG. 2 is a diagram for explaining a region.
As shown in FIG. 1, the moving image encoding apparatus 1 includes a plurality of encoding LSIs 100 and a plurality of memories 200 corresponding to the respective encoding LSIs 100. The memory 200 is realized by, for example, a Synchronous Dynamic Random Access Memory (SDRAM). Since each encoding LSI 100 basically has the same configuration, in the following description, the encoding LSI 100 to which LSI # 1 is assigned as an identifier and the corresponding memory 200 will be described.

  In the memory 200, an area 220 generated by dividing the picture 210 horizontally and partial areas 231 and 241 of adjacent areas 230 and 240 adjacent to the area 220 are stored as reference areas. The partial areas 231 and 241 each have 128 pixels in the vertical direction. For example, as shown in FIG. 2, by dividing one picture 210 horizontally into four equal parts, an area 220, an adjacent area 230, 240, and an adjacent area 250 further adjacent to the adjacent area 240 are generated. When the size of the picture 210 is 8K4K (8 bits / pixel, 4: 2: 0 format), the size of each of the region 220 and the adjacent regions 230, 240, and 250 is 8K1K by dividing the picture 210 into four equal parts. (8,192 × 1,024 pixels). Therefore, when the area 220 is stored in the memory 200, as shown in FIG. 2, the partial areas 231 and 241 of the adjacent areas 230 and 240 including the part adjacent to the area 220 among the adjacent areas 230 and 240 are also stored. Is done. When encoding the current (current time) picture area 220 assigned to the encoding LSI 100 to which the LSI # 1 is assigned, the reference picture area 220 and the partial areas 231 and 241 are stored as reference areas stored in the memory 200. Used for motion vector detection, the region 220 of the current picture is encoded.

  As shown in FIG. 1, the encoding LSI 100 includes a moving image encoding unit 110, an interchip data transfer unit 120, and a memory control unit 130. The encoding LSI 100 also includes an overall control unit 140 described later, but is omitted in FIG. The inter-chip data transfer unit 120 includes, for example, a Direct Memory Access Controller (DMAC: Direct Memory Access Control Unit) and a PCI express (PCIe) controller. For example, the partial areas 221 and 222 (see FIG. 2) having 128 pixels in the vertical direction stored in the memory 200 are read by the DMAC and transferred via PCIe. More specifically, the partial area 221 is transferred to the encoding LSI 100 to which LSI # 0 is assigned. The partial area 222 is transferred to the encoding LSI 100 to which LSI # 2 is assigned.

  Next, details of the above-described encoding LSI 100 will be described with reference to FIG.

FIG. 3 is an example of a block diagram of the encoding LSI 100.
As described above, the encoding LSI 100 includes the moving image encoding unit 110, the interchip data transfer unit 120, the memory control unit 130, and the overall control unit 140.
The moving image encoding unit 110 includes a codec unit 111, an image input unit 112, and a stream output unit 113.

  The region 220 is input from the image input device to the image input unit 112. The image input unit 112 outputs the input area 220 to the memory control unit 130. The codec unit 111 encodes the current picture region 220 using the current picture region 220 acquired from the memory control unit 130 and the reference picture region 220 and the partial regions 231 and 241 as reference regions. The codec unit 111 outputs a stream (bit stream) corresponding to the encoded current picture area 220 to the memory control unit 130. Also, partial areas 221 and 222 of the encoded current picture area 220 are output to the inter-chip data transfer unit 120. The stream output unit 113 acquires a stream from the memory control unit 130 and outputs the acquired stream.

  The inter-chip data transfer unit 120 transfers the partial areas 221 and 222 output from the codec unit 111 to another encoding LSI 100. More specifically, the inter-chip data transfer unit 120 transfers the partial area 221 to the encoding LSI 100 to which LSI # 0 is assigned. Further, the inter-chip data transfer unit 120 transfers the partial area 222 to the encoding LSI 100 to which LSI # 2 is assigned. Further, the inter-chip data transfer unit 120 receives the partial areas 231 and 241 transferred from another encoding LSI 100 and outputs them to the memory control unit 130.

  The memory control unit 130 controls input / output of various data between the moving image encoding unit 110 and the inter-chip data transfer unit 120 and the memory 200. More specifically, the memory control unit 130 stores the current picture region 220 output from the image input unit 112, the stream output from the codec unit 111, and the partial regions 231 and 241 output from the inter-chip data transfer unit 120. Store in the memory 200. In addition, the memory control unit 130 acquires a stream from the memory 200 and outputs the stream to the stream output unit 113, and acquires the current picture region 220, the reference picture region 220, and the partial regions 231 and 241 as reference regions. And output to the codec unit 111.

  The overall control unit 140 controls the overall operation of the encoding LSI 100. More specifically, the overall control unit 140 controls operations of the codec unit 111, the image input unit 112, the stream output unit 113, and the inter-chip data transfer unit 120. Thereby, setting of the operation mode of each part (each module), synchronization control, etc. are performed.

  Next, the details of the codec unit 111 described above will be described with reference to FIG.

FIG. 4 is an example of a block diagram of the codec unit 111.
The codec unit 111 includes a preprocessing unit 10, an image encoding unit 20, a variable length encoding unit 30, a data transfer unit 40, a codec control unit 50, a buffer 60, and a cache 70.

  The preprocessing unit 10 includes, for example, an intra prediction unit 11 and a reduced motion vector search unit (reduced ME) 12, and is connected to the data transfer unit 40. For example, the intra prediction unit 11 receives the current picture region 220 from the memory 200 via the memory control unit 130 and the data transfer unit 40. Then, using the current picture region 220, the intra prediction unit 11 calculates an intra-frame prediction mode and cost (such as a sum of absolute differences) for each coding unit region. That is, the intra prediction unit 11 calculates the cost in intraframe prediction for each coding unit region.

  The intra-frame prediction mode and cost calculated by the intra prediction unit 11 are stored in the memory 200 via the data transfer unit 40 and the memory control unit 130, for example, and are used by the image encoding unit 20. The intra prediction unit 11 may output the intra-frame prediction mode and cost to the image encoding unit 20 without using the memory 200. For example, the intra prediction unit 11 may output the intra-frame prediction mode and cost to the image encoding unit 20 via the data transfer unit 40. At this time, the mode and cost of the intra-frame prediction may be held in the intra prediction unit 11 until used in the image coding unit 20, or until used in the image coding unit 20. May be held within.

  For example, the reduced motion vector search unit 12 performs a previous search process of the hierarchical motion vector search process in the inter-frame prediction. For example, the reduced motion vector search unit 12 receives a reduced region obtained by reducing the region 220 from the memory 200 via the memory control unit 130 and the data transfer unit 40. Then, the reduced motion vector search unit 12 calculates a coarsely accurate motion vector and cost for each coding unit region using the reduced region. That is, the reduced motion vector search unit 12 calculates the cost in inter-frame prediction for each coding unit region.

  The motion vector and cost calculated by the reduced motion vector search unit 12 are stored in the memory 200 via the data transfer unit 40 and used by the image encoding unit 20, for example. Note that the reduced motion vector search unit 12 may output the motion vector and the cost to the image encoding unit 20 without using the memory 200. For example, the reduced motion vector search unit 12 may output the motion vector and the cost to the image encoding unit 20 via the data transfer unit 40. At this time, the motion vector and the cost may be held in the reduced motion vector search unit 12 until used in the image encoding unit 20, or in the image encoding unit 20 until used in the image encoding unit 20. May be held.

  The image encoding unit 20 includes an equal-size motion vector search unit (equal-size ME) 21, a predicted image generation unit 22, a difference calculation unit (DIFF) 23, an orthogonal transform unit (T) 24, a quantization unit (Q) 25, An inverse quantization unit (IQ) 26, an inverse orthogonal transform unit (IT) 27, a motion compensation unit (MC) 28, and a loop filter unit (LF) 29 are included.

  For example, the same-size motion vector search unit 21 reads the current picture region 220 and the reference picture region 220 and the partial regions 231 and 241 as the reference region from the memory 200 via the memory control unit 130 and the data transfer unit 40, The motion vector of each coding unit area is searched.

  The prediction image generation unit 22 generates a prediction image for intra-frame prediction and a prediction image for inter-frame prediction. For example, the prediction image generation unit 22 reads adjacent pixels of the encoding unit region to be processed from the buffer 60 via the data transfer unit 40, and generates a prediction image for intra-frame prediction. Further, for example, the predicted image generation unit 22 reads reference picture data as a reference area from the memory 200 or the like via the data transfer unit 40, and generates a predicted image for inter-frame prediction. For example, when the reference picture data is stored in the cache 70 as a reference area necessary for the processing of the coding unit area, it is read from the cache 70.

  The difference calculation unit 23 receives the coding unit region data of the current picture from the memory 200 via the memory control unit 130 and the data transfer unit 40, and receives the predicted image from the predicted image generation unit 22. Then, the difference calculation unit 23 calculates a difference between the coding unit region data of the current picture and the predicted image, and outputs the difference image. The orthogonal transform unit 24 orthogonally transforms the difference image output from the difference calculation unit 23 and outputs the difference image.

  The quantization unit 25 quantizes the transformed difference image output from the orthogonal transform unit 24 and generates post-quantization data. Then, the quantization unit 25 outputs the quantized data to the inverse quantization unit 26 and the variable length coding unit 30.

  The inverse quantization unit 26 inversely quantizes the quantized data output from the quantization unit 25 and outputs the result. The inverse orthogonal transform unit 27 performs inverse orthogonal transform on the data output from the inverse quantization unit 26. The motion compensation unit 28 adds the inverse transformed data output from the inverse orthogonal transform unit 27 and the predicted image received from the predicted image generation unit 22, and outputs the decoded image to the loop filter unit 29.

  The loop filter unit 29 performs loop filter processing such as deblocking filter processing on the decoded image output from the motion compensation unit 28. For example, the loop filter unit 29 reads out adjacent pixels in the encoding unit region to be processed from the buffer 60 via the data transfer unit 40, and performs loop filter processing. As a result, a local decoded image is generated. The local decoded image is stored in the memory 200 or the like via the data transfer unit 40 and the memory control unit 130, for example.

  The variable length encoding unit 30 is MPEG, H.264, or the like. H.264, H.C. A variable-length encoding process conforming to H.265 is executed. For example, the variable length encoding unit 30 receives the encoded data generated by the image encoding unit 20, and performs variable length encoding on the encoded data to generate a stream. The stream is stored in the memory 200 via the data transfer unit 40 and the memory control unit 130.

The data transfer unit 40 performs data transfer with the preprocessing unit 10, the image encoding unit 20, the variable length encoding unit 30, the buffer 60, the cache 70, the inter-chip data transfer unit 120, and the memory control unit 130.
The codec control unit 50 controls the overall operation of the codec unit 111, such as setting of the operation mode of each module (circuit) in the codec unit 111 and synchronization control.

The buffer 60 temporarily stores data such as adjacent pixels for intra-frame prediction and adjacent pixels for deblocking filter processing. For example, the buffer 60 temporarily stores data such as adjacent pixels for intra-frame prediction. The buffer 60 temporarily stores data such as adjacent pixels for deblocking filter processing.
The cache 70 is, for example, a cache memory used when reading the reference area. For example, the cache 70 automatically prefetches an area that is highly likely to be referred to in the coding unit area being processed.

  Next, the operation of the encoding LSI 100 will be described with reference to FIGS. Since any of the encoding LSIs 100 to which LSIs # 0 to # 3 are assigned operates basically in the same manner, the following description will be made of the operation of the encoding LSI 100 to which LSIs # 1 are assigned.

  FIG. 5 is a flowchart illustrating an example of the operation of the overall control unit 140 according to the first embodiment. FIG. 6 is a diagram for explaining an example of areas and area divisions that each encoding LSI 100 according to the first embodiment takes charge of. FIG. 7 is a diagram for explaining a region 220 that is handled by the encoding LSI 100 to which LSI # 1 according to the first embodiment is assigned, and adjacent regions 230 and 240 before and after the region 220. In FIG. 6, the area 220 and adjacent areas 230 to 250 (see FIG. 2) that each encoding LSI 100 is responsible for are each divided into two slices. The 128 pixel lines from the head of the area handled by each encoding LSI 100 are one slice, and the remaining 896 pixel lines are the other slice.

  Here, as illustrated in FIG. 5, the overall control unit 140 causes the codec unit 111 to execute the encoding process of the region B (step S <b> 101). As a result, the codec unit 111 encodes the region B. Here, as shown in FIGS. 6 and 7, the area B is an area that is not searched for the above-described partial area 231 in the area 220 that is handled by the encoding LSI 100 to which LSI # 1 is assigned. This corresponds to a region not searched from the region 241. That is, in FIG. 6 and FIG. 7, in the partial area 221 corresponding to the area A to which the slice # 2 is assigned, when searching for the motion vector of the coding unit area, the adjacent area 230 to which the slice # 1 is assigned. The partial area 231 is searched. Further, the partial area 241 to which slice # 4 is assigned searches for a partial area 222 of the area 220 corresponding to the area C when searching for a motion vector of the coding unit area. Therefore, first, the codec unit 111 performs an encoding process on the region B excluding the partial regions 221 and 222 from the region 220 to which the slice # 2 and the slice # 3 are allocated.

  Next, the overall control unit 140 determines whether or not the area A from the lower adjacent LSI has been transferred (step S102). That is, it is determined whether or not the past partial area 241 assigned to the encoding LSI 100 is transferred from the encoding LSI 100 to which the LSI # 2 is assigned. If the overall control unit 140 determines that the area A from the lower adjacent LSI has been transferred (step S102: YES), the overall control unit 140 causes the codec unit 111 to execute the encoding process for the area C (step S103). As a result, the codec unit 111 encodes the region C, that is, the partial region 222. When the overall control unit 140 determines that the area A from the lower adjacent LSI has not been transferred, the overall control unit 140 confirms the waiting for transfer (step S102: NO), but partially receives the transfer start instruction from the past partial area 241. Since a sufficient transfer time is secured until the area 222 starts using the partial area 241, there is almost no actual waiting for transfer.

  When the process of step S103 is completed, the overall control unit 140 then outputs an instruction to transfer the area C to the lower adjacent LSI (step S104). That is, an instruction to transfer the encoded partial area 222 to the encoding LSI 100 to which LSI # 2 is assigned is output to the inter-chip data transfer unit 120. The encoded partial area 222 is used when the partial area 241 (area A) is encoded at a time earlier than the current time.

  Next, the overall control unit 140 determines whether or not the area C from the upper adjacent LSI has been transferred (step S105). That is, it is determined whether or not the past partial area 231 assigned to the encoding LSI 100 is transferred from the encoding LSI 100 to which the LSI # 0 is assigned. When the overall control unit 140 determines that the area C from the upper adjacent LSI has been transferred (step S105: YES), the overall control unit 140 causes the codec unit 111 to execute the encoding process of the area A (step S106). As a result, the codec unit 111 encodes the area A, that is, the partial area 221. As described above, when the overall control unit 140 determines that the area C from the upper adjacent LSI has not been transferred, the overall control unit 140 waits for completion of the transfer (step S105: NO), but starts transfer of the past partial area 231. Since a sufficient transfer time is secured from the instruction until the partial area 221 starts using the partial area 231, there is almost no actual waiting for transfer.

  When the process of step S106 is completed, the overall control unit 140 then outputs an instruction to transfer the area A to the upper adjacent LSI (step S107). That is, an instruction to transfer the encoded partial area 221 to the encoding LSI 100 to which LSI # 0 is assigned is output to the inter-chip data transfer unit 120. The encoded partial area 221 is used when the partial area 231 (area C) is encoded at a time earlier than the current time.

FIG. 8 is a flowchart showing an example of the operation of the inter-chip data transfer unit 120 in the first embodiment. This flowchart is a process performed in parallel with the encoding process. Data transfer processing is performed by the inter-chip data transfer unit 120 in accordance with the operation of the codec unit 111.
As shown in FIG. 8, the inter-chip data transfer unit 120 determines whether there is a transfer instruction for the area C from the overall control unit 140 (step S201). If the inter-chip data transfer unit 120 determines that there is an area C transfer instruction from the overall control unit 140 in accordance with the processing of step S104 described above (step S201: YES), the local decode image of the region C is transferred to the lower adjacent LSI. Transfer (step S202). That is, the inter-chip data transfer unit 120 acquires the partial area 222 (see FIGS. 2 and 7) for which the encoding process has been completed from the codec unit 111 or the memory 200 and transfers the partial area 222 to the encoding LSI 100 to which LSI # 2 is assigned. Forward. The partial area 222 is used as a part of a motion vector search area when encoding the partial area 241 of the next adjacent area 240 in time series with respect to the current.

  Next, the inter-chip data transfer unit 120 determines whether or not there is an area A transfer instruction from the overall control unit 140 (step S203). If the inter-chip data transfer unit 120 determines that there is an area A transfer instruction from the overall control unit 140 in accordance with the process of step S107 described above (step S203: YES), the local decode image of the area A is transferred to the upper adjacent LSI. Transfer (step S204). That is, the inter-chip data transfer unit 120 acquires the partial area 221 (see FIGS. 2 and 7) for which the encoding process has been completed from the codec unit 111 or the memory 200, and transfers the partial area 221 to the encoding LSI 100 to which LSI # 0 is assigned. Forward. The partial area 221 is used as a part of a motion vector search area when the partial area 231 of the next adjacent area 230 is encoded in time series with respect to the current.

  Next, with reference to FIG. 9 and FIG. 10, the operation timing of the video encoding device 1 according to the first embodiment will be described.

FIG. 9 is a diagram for explaining the operation timing of each encoding LSI 100. FIG. 10 is a diagram for explaining the memory state of picture # 1 at a predetermined time.
First, as shown in FIG. 9, as time t elapses, the encoding process of the picture 210 to which the picture # 0 is assigned first is performed, and then the encoding of the picture 210 to which the picture # 1 is assigned is performed. Processing is performed. Here, as described in the above-described flowchart, both the picture 210 of the picture # 0 and the picture 210 of the picture # 1 are encoded in the order of the region B, the region C, and the region A.

  Here, when the encoding process of the picture 210 of the picture # 0 is completed in the encoding LSI 100 to which the LSI # 1 is assigned, the encoding of the area B in the picture 210 of the picture # 1 is started. Since the region B starts at a slice boundary that represents the boundary of the slice, it is not necessary to use the upper adjacent information in the picture 210 (the encoded information of the region A adjacent to the upper side of the region B), and the upper region is encoded. Encoding is possible even if it is not completed. In this case, the first memory state in the memory 200 is as shown in FIG. That is, the coding unit region CUR is selected from the search range SR in the region 220 (slice # 3 corresponding to the regions B and C) including the partial region 221 (slice # 2 corresponding to the region A) of the picture # 0. Although the motion vector is searched, as shown in FIG. 9, after the encoding process of the area A in the picture # 0 is completed, the encoding process of the area B in the picture # 1 is continuously performed. Reference numeral 221 denotes an area which is not transferred from another encoding LSI 100 (LSI # 0 or LSI # 2). Therefore, the transfer time for the partial area 221 does not occur.

  Next, as illustrated in FIG. 9, when the encoding process of the area B in the picture # 1 is completed, the encoding process of the area C in the picture # 1 is started, but the encoding process of the area C is performed. The second memory state in the memory 200 is as shown in FIG. In this case, the search range SR of the coding unit region CUR of the region C includes a partial region 241 (slice # 4 corresponding to the region A) in the adjacent region 240 of the picture # 0, but as illustrated in FIG. The coding is completed for the area A of the picture # 0 that is handled by the coding LSI 100 of the LSI # 2. Further, when the partial area 241 (area A) is transferred from the encoding LSI 100 of LSI # 2 to the encoding LSI 100 of LSI # 1, at least the picture # until the encoding process of the area C of picture # 1 is started. There is a time until the encoding process for one region B is completed. For this reason, there is sufficient time for the transfer of the partial area 241 to be completed until the encoding process of the area C of the picture # 1 is started. Therefore, the encoding process delay of the area C due to the transfer not being in time is avoided. For example, each encoding LSI 100 is responsible for a quarter of 8K4K (8K1K) as a slice, and an overlap area used for motion search, that is, a transfer area between chips (encoding LSI) is adjacent. In the case of 256 pixels, the encoding processing time is 8.3 milliseconds by (1/60) × (512/1024) (the period of 512/1024 encoding area ratio of 1/60 second which is one frame period) )

Next, as illustrated in FIG. 9, when the encoding process of the area C in the picture # 1 is completed, the encoding process of the area A in the picture # 1 is started, but the encoding process of the area A is performed. The third memory state in the memory 200 is as shown in FIG. In this case, the search range SR of the coding unit region CUR in the region A includes a partial region 231 (a portion corresponding to the region C in the slice # 1) in the adjacent region 230 of the picture # 0, as shown in FIG. In addition, the encoding of the region C of the picture # 0 that the encoding LSI 100 of the LSI # 0 is in charge of is completed. When a partial area 231 (area C) is transferred from the LSI # 0 encoding LSI 100 to the LSI # 1 encoding LSI 100, at least the picture # 1 until the encoding process of the area A of the picture # 1 is started. There is a time (about 16.7 seconds as one frame period) until the encoding process of the area A of 0, the area B and the area C of the picture # 1 is completed. For this reason, there is sufficient time for the transfer of the partial area 231 to be completed until the encoding process of the area A of the picture # 1 is started. Therefore, the encoding process delay in the region A due to the transfer not being in time can be avoided.
The contents described above also apply to the encoding LSI 100 other than the encoding LSI 100 of LSI # 1.

  Next, a first comparative example with respect to the operation timing in the above-described first embodiment will be described with reference to FIG.

FIG. 11 is a diagram for explaining the operation timing of each encoding LSI 100 according to the first comparative example.
In each encoding LSI 100 in the first comparative example shown in FIG. 11, both the picture 210 of picture # 0 and the picture 210 of picture # 1 are encoded in the order of area A, area B, and area C. In this case, when the area C of the picture # 1 is encoded in the encoding LSI 100 to which the LSI # 1 is assigned, the area of the picture # 0 from the encoding LSI 100 to which the LSI # 2 is assigned is searched for a motion vector search. A needs to be forwarded. However, until the encoding LSI 100 of LSI # 1 encodes the region C of the picture # 1, at least the region B and the region C of the picture # 0 and the region A and the region B of the picture # 1 are encoded. Since there is time, sufficient transfer time is secured.

  On the other hand, when coding area 100 of picture # 1 in coding LSI 100 to which LSI # 1 is assigned, area C of picture # 0 is assigned from coding LSI 100 to which LSI # 0 is assigned for motion vector search. Need to be transferred. However, there is only a time for switching from picture # 0 to picture # 1 before the encoding LSI 100 of LSI # 1 encodes region A of picture # 1. For this reason, the transfer time is not sufficiently secured, and the encoding LSI 100 to which the LSI # 0 is assigned before the encoding LSI 100 of the LSI # 1 starts encoding the area A of the picture # 1. The transfer of 0 area C is not in time. That is, until the transfer of the region C of the picture # 0 is completed, the encoding LSI 100 of the LSI # 1 cannot start the encoding of the region A of the picture # 1, and the encoding process is delayed.

  For example, as described above, when each encoding LSI 100 is responsible for a quarter of 8K4K (8K1K) as a slice and the transfer area is adjacent 256 pixels, the data transfer size is about 2.52 megabits (8,192). × 256 × 8 bits × 1.5). At this time, assuming that the data transfer speed between chips is 4 Gbps, the time required for transfer is approximately 6.3 milliseconds. Even if the transfer is started simultaneously with the start of the encoding process in accordance with the progress of the encoding process of 256 pixels in the transfer area, the encoding process time is 4.2 by (1/60) × (256/1024). This is a millisecond (a period of 1 / 60th of a coding region area ratio of 256/1024) which is one frame period, which exceeds the coding processing time, and is an idle period (a waiting period) of about 2.1 milliseconds. ) Occurs.

  Next, a second comparative example with respect to the operation timing in the first embodiment will be described with reference to FIG.

FIG. 12 is a diagram for explaining the operation timing of each encoding LSI 100 according to the second comparative example.
In order to avoid the problem of the first comparative example described above, for example, the region C of picture # 0 in charge of the LSI # 0 encoding LSI 100 is the LSI in charge of the immediately lower slice, that is, the encoding of LSI # 1. It may be considered that each encoding LSI 100 is processed in a pipeline so that the encoding processing by the encoding LSI 100 is performed after the transfer to the LSI 100 is completed. In this case, generation of wasted time between the pictures # 0 and # 1 is suppressed, but the LSI after the encoding LSI 100 of LSI # 0 starts encoding the area A of picture # 0. Considering until the encoding LSI 100 of # 3 completes the encoding of the region C of the picture # 1, the total encoding time is longer than that of the first comparative example, and the encoding time is delayed as a whole. To do. In the case of the second comparative example, since the encoding LSI 100 is not synchronized between pictures, the code amount of the next picture is completely before the encoding process of the previous picture is completed in the code amount allocation in units of pictures. It is necessary to perform allocation processing, and rate control becomes difficult.

  As described above, in the first comparative example, useless time is generated between pictures, and in the second comparative example, encoding delay for the picture 210 occurs and rate control becomes difficult. In the region 220 and the adjacent regions 230 to 250, the order of the regions to be encoded is changed, and the partial region 231 of the adjacent region 230 of the input past picture is not searched. After coding the excluded area, the partial area 221 of the area 220 to be searched for the partial area 231 is encoded. As a result, useless idle periods do not occur between pictures, and performance degradation due to data transfer overhead is eliminated. Therefore, the improvement in processing performance by the plurality of encoding LSIs 100 can be extracted.

  Further, it is not necessary to increase the frequency in order to compensate for a useless idle period, and power consumption can be kept low. Since sufficient time can be secured from the completion of processing of each area to be transferred to the start of use, the transfer speed between chips can be reduced, and a lower cost interface can be used. Further, since each encoding LSI 100 described in the second comparative example is not processed in a pipeline manner, a delay based on the pipeline does not occur, and synchronization can be achieved in picture processing, so that rate control is also possible. It becomes easy.

  Further, in the first embodiment, the region A is set as one slice, the region B and the region C are set as one slice, and the data dependency in the picture 210 is divided by the slice, so that the region B and the region C are divided into regions. It is possible to perform the encoding process before A. By making the region A into one slice, the dependency relationship with the region above it (the region handled by another encoding LSI) can be cut off, and the encoding information required for encoding is transferred between the encoding LSIs 100 There is no need to do it.

  In the first embodiment, the area obtained by dividing the picture 210 in the horizontal direction (horizontal direction) has been described as an example. However, as shown in FIG. 19, tiles obtained by dividing the area in the vertical direction (vertical direction) are used. May be. When tiles are used, the first part of the first area where the area B and the area C are one tile and the beginning part of the second area where the area A is one tile are both tile boundaries representing the tile boundary. It is required to be.

(Second Embodiment)
Next, a second embodiment will be described with reference to FIGS. The second embodiment is different from the first embodiment in that the area handled by each encoding LSI 100 does not start from the top of the slice.
First, the operation of the encoding LSI 100 will be described with reference to FIGS.

  FIG. 13 is a flowchart illustrating an example of the operation of the overall control unit 140 according to the second embodiment. FIG. 14 is a diagram for explaining an example of regions and region divisions that each encoding LSI 100 according to the second embodiment takes charge of. FIG. 15 illustrates a part of the area 220 (slice # 1) handled by the encoding LSI 100 to which the LSI # 1 according to the second embodiment is assigned and a part of the adjacent area 230 (slice # 0) before that. It is a figure for doing. As shown in FIG. 14, each encoding LSI 100 is in charge of 8K1K that is vertically shifted from the slice boundary by 128 pixels above the search range SR. The encoding LSI 100 to which LSI # 0 is assigned is responsible for the upper 896 pixel lines of slice # 0 and the lower 128 pixel lines of slice # 3. In FIG. 15, a region A is a region for the lower 128 pixel lines of slice # 0. Area B is an area for the upper 768 pixel lines of slice # 1. Area C is an area for 128 pixel lines below area B of slice # 1.

  Here, as illustrated in FIG. 13, the overall control unit 140 causes the codec unit 111 to execute the encoding process of the region B (step S <b> 301). As a result, the codec unit 111 encodes the region B. As shown in FIG. 15, the area B starts at a slice boundary, so it is not necessary to use the upper neighbor information, and the area B can be encoded even if the area A above the area B has not been encoded.

  Next, the overall control unit 140 determines whether or not the area A from the lower adjacent LSI has been transferred (step S302). That is, it is determined whether or not the past partial area 223 (see FIG. 15) assigned to the encoding LSI 100 is transferred from the encoding LSI 100 to which the LSI # 2 is assigned. If the overall control unit 140 determines that the area A from the lower adjacent LSI has been transferred (step S302: YES), the overall control unit 140 causes the codec unit 111 to execute the encoding process for the area C (step S303). As a result, the codec unit 111 encodes the region C, that is, the partial region 224. When the overall control unit 140 determines that the area A from the lower adjacent LSI has not been transferred, the overall control unit 140 confirms the waiting for transfer (step S302: NO), but partially receives the transfer start instruction from the past partial area 223. Since sufficient transfer time is secured until the area 224 starts using the partial area 223, there is almost no actual waiting for transfer.

  When the process of step S303 is completed, the overall control unit 140 then outputs an intra-slice encoded information transfer instruction to the lower adjacent LSI to the inter-chip data transfer unit 120 (step S304). The intra-slice encoded information transfer instruction is an instruction to transfer later-described encoded information required for intra-slice encoding. Next, the overall control unit 140 outputs a transfer instruction for the area C to the lower adjacent LSI to the inter-chip data transfer unit 120 (step S305). Through these processes, the inter-chip data transfer unit 120 transfers the encoded information in the slice and the partial area 224 corresponding to the area C to the encoding LSI 100 to which LSI # 2 is assigned. The encoding LSI 100 of LSI # 2 encodes the area A that it is in charge of using the encoding information in the slice and the area C.

  Next, the overall control unit 140 determines whether or not the encoded information in the slice from the upper adjacent LSI has been transferred (step S306). That is, it is determined whether or not the encoded information in the slice has been transferred from the encoded LSI 100 to which LSI # 0 is assigned. In encoding the subsequent area A, since the leading portion of the area A is a non-slice boundary that does not start from the slice boundary, the encoding LSI 100 of the LSI # 0 that is in charge of the area above the area A is referred to in the slice. It is required to carry out encoding by taking over the encoding information. For this reason, before starting the encoding process of the area A, it is confirmed that the encoding process of the area C of the encoding LSI 100 (upper adjacent LSI) of LSI # 0 is completed, and the encoding information in the slice is It is required to be forwarded.

  As encoded information to be transferred, an upper adjacent pixel and prediction mode used for intra encoding, and an upper adjacent prediction vector and encoding mode for performing inter encoding are necessary. In order to apply the deblocking filter, the upper adjacent four pixel lines, the encoding mode for calculating the filter parameter, the upper adjacent vector, the quantized value, the presence / absence information of the orthogonal transformation coefficient, and the like are necessary. In addition, for entropy coding, it is necessary to transfer entropy coding and adjacent coding information and context model. The encoded information is output from the image encoding unit 20 and the variable length encoding unit 30, temporarily stored in the buffer 60, and transferred to the adjacent encoding LSI 100 via the interchip data transfer unit 120. The encoded information is sent to the adjacent lower-order encoding LSI 100 and is taken into the image encoding unit 20 and the variable-length encoding unit 30 of the lower-order encoding LSI 100, thereby continuously encoding the region. Can do. Since these pieces of coding information are coding information within several pixel lines adjacent to the boundary of the area handled by each coding LSI 100 or one adjacent block line, compared with the reference area for the search area, The amount of data is small and the transfer time can be ignored.

  When determining that the encoded information in the slice from the upper adjacent LSI has been transferred (step S306: YES), the overall control unit 140 determines whether or not the area C from the upper adjacent LSI has been transferred. (Step S307). That is, it is determined whether or not the past partial area 232 (see FIG. 15) assigned to the encoding LSI 100 is transferred from the encoding LSI 100 to which the LSI # 0 is assigned. If the overall control unit 140 determines that the region C from the upper adjacent LSI has been transferred (step S307: YES), the overall control unit 140 causes the codec unit 111 to execute the encoding process of the region A (step S308). Accordingly, the codec unit 111 encodes the area A, that is, the partial area 233 (see FIG. 15). As described above, when the overall control unit 140 determines that the area C from the upper adjacent LSI has not been transferred, the overall control unit 140 waits for completion of transfer (NO in step S307), but starts transfer of the past partial area 232. Since a sufficient transfer time is secured from the instruction until the partial area 233 starts using the partial area 232, there is almost no actual waiting for transfer.

  When the process of step S308 is completed, the overall control unit 140 then outputs an instruction to transfer the area A to the upper adjacent LSI (step S309). That is, an instruction to transfer the encoded partial area 233 to the encoding LSI 100 to which LSI # 0 is assigned is output to the inter-chip data transfer unit 120. The encoded partial area 233 is used when the partial area 232 (area C) is encoded at a time earlier than the current.

FIG. 16 is a flowchart illustrating an example of the operation of the inter-chip data transfer unit 120 in the second embodiment. This flowchart is also a process performed in parallel with the encoding process. Data transfer processing is performed by the inter-chip data transfer unit 120 in accordance with the operation of the codec unit 111.
As illustrated in FIG. 16, the inter-chip data transfer unit 120 determines whether or not there is an intra-slice encoded information transfer instruction from the overall control unit 140 (step S401). When the inter-chip data transfer unit 120 determines that there is an intra-slice encoded information transfer instruction from the overall control unit 140 (step S401: YES), the inter-chip data transfer unit 120 transfers the intra-slice encoded information to the lower adjacent LSI (step S402). . That is, the encoded information in the slice is transferred to the encoding LSI 100 of LSI # 2.

  Next, the inter-chip data transfer unit 120 determines whether or not there is a transfer instruction for the area C from the overall control unit 140 (step S403). If the inter-chip data transfer unit 120 determines that there is an area C transfer instruction from the overall control unit 140 in accordance with the process of step S305 described above (step S403: YES), the local decode image of the area C is transferred to the lower adjacent LSI. Transfer (step S404). That is, the inter-chip data transfer unit 120 acquires a partial area 224 (see FIG. 15) for which the encoding process has been completed from the codec unit 111 or the memory 200, and transfers the partial area 224 to the encoding LSI 100 to which LSI # 2 is assigned. The partial area 224 is used as a part of a motion vector search area when the next partial area 223 is encoded in time series with respect to the current.

  Next, the chip-to-chip data transfer unit 120 determines whether there is a transfer instruction for the area A from the overall control unit 140 (step S405). If the inter-chip data transfer unit 120 determines that there is an area A transfer instruction from the overall control unit 140 in accordance with the processing of step S309 described above (step S405: YES), the local decode image of the region A is transferred to the upper adjacent LSI. Transfer (step S406). That is, the inter-chip data transfer unit 120 acquires the partial area 233 (see FIG. 15) for which the encoding process has been completed from the codec unit 111 or the memory 200, and transfers it to the encoding LSI 100 to which LSI # 0 is assigned. The partial area 233 is used as a part of a motion vector search area when the next partial area 232 is encoded in time series with respect to the current.

  Next, with reference to FIG.17 and FIG.18, the operation | movement timing of the moving image encoder 1 which concerns on 2nd Embodiment is demonstrated.

FIG. 17 is a diagram for explaining the operation timing of each encoding LSI 100. FIG. 18 is a diagram for explaining the memory state of picture # 1 at a predetermined time.
First, as shown in FIG. 17, as time t elapses, the encoding process of the picture 210 to which the picture # 0 is assigned first is performed, and then the encoding of the picture 210 to which the picture # 1 is assigned is performed. Processing is performed. Here, as described in the flowchart described with reference to FIG. 13, also in the second embodiment, the picture 210 of the picture # 0 and the picture 210 of the picture # 1 are in the order of the area B, the area C, and the area A. An encoding process is performed.

  Here, when the encoding process of the picture 210 of the picture # 0 is completed in the encoding LSI 100 to which the LSI # 1 is assigned, the encoding of the area B in the picture 210 of the picture # 1 is started. Since the region B starts at a slice boundary that represents the boundary of the slice, it is not necessary to use the upper adjacent information in the picture 210, and the region B can be encoded even if the upper region has not been encoded. In this case, the first memory state in the memory 200 is as shown in FIG. That is, the coding unit region CUR is a part of the search range SR in a part of the region 220 (a part of the region B) including the partial region 223 (slice # 0 corresponding to the region A) of the already encoded picture # 0. A motion vector is searched from inside. As shown in FIG. 17, after the encoding process of the area A in the picture # 0 is completed, the encoding process of the area B in the picture # 1 is continuously performed. The partial area 233 is not an area transferred from another encoding LSI 100 (LSI # 0 or LSI # 2). Therefore, the transfer time for the partial area 233 does not occur.

  Next, as illustrated in FIG. 17, when the encoding process of the area B in the picture # 1 is completed, the encoding process of the area C in the picture # 1 is started, but the encoding process of the area C is performed. The second memory state in the memory 200 is as shown in FIG. In this case, the search range SR of the coding unit region CUR of the region C includes a partial region 223 (slice # 1 corresponding to the region A transferred from the LSI # 0) in the region 220 of the picture # 0. As shown in FIG. 17, the encoding of the area A of the picture # 0, which is handled by the encoding LSI 100 of the LSI # 2, has been completed. Further, when the partial area 223 (area A) is transferred from the LSI # 2 encoding LSI 100 to the LSI # 1 encoding LSI 100, at least the picture # 1 until the encoding process of the area C of the picture # 1 is started. There is a time until the encoding process for one region B is completed. For this reason, there is sufficient time for the transfer of the partial area 223 to be completed until the encoding process of the area C of the picture # 1 is started. Therefore, the encoding process delay of the area C due to the transfer not being in time is avoided.

Next, as illustrated in FIG. 17, when the encoding process of the area C in the picture # 1 is completed, the encoding process of the area A in the picture # 1 using the encoding information in the slice is started. When the A encoding process is performed, the third memory state in the memory 200 is as shown in FIG. In this case, the search range SR of the coding unit region CUR of the region A includes a partial region 232 in the adjacent region 230 of the picture # 0 (a portion corresponding to the region C in the slice # 0 transferred from the LSI # 0). However, as shown in FIG. 17, the encoding of the region C of picture # 0, which is handled by the encoding LSI 100 of LSI # 0, has been completed. Further, when a partial area 232 (area C) is transferred from the encoding LSI 100 of LSI # 0 to the encoding LSI 100 of LSI # 1, at least the picture # until the encoding process of the area A of picture # 1 is started. There is a time until the encoding process of the region A of 0, the region B and the region C of the picture # 1 is completed. For this reason, there is sufficient time for the transfer of the partial area 232 to be completed until the encoding process of the area A of the picture # 1 is started. Therefore, the encoding process delay in the region A due to the transfer not being in time can be avoided.
The contents described above also apply to the encoding LSI 100 other than the encoding LSI 100 of LSI # 1.

  As described above, even in the second embodiment, the order of the regions to be encoded in the region 220 and the adjacent regions 230 to 250 is changed, and the partial region 232 of the past past adjacent region 230 that has been input is not searched. After encoding the area excluding the partial area 223 from the area 220, the partial area 233 of the area 220 to be searched for the partial area 232 is encoded. As a result, useless idle periods do not occur between pictures, and performance degradation due to data transfer overhead is eliminated. In the second embodiment, since the number of divisions is smaller than that in the first embodiment, the coding efficiency is increased. In particular, in the second embodiment, at the start of the encoding process for the area A, the encoding LSI 100 for the LSI # 0 in charge of the upper area waits for the completion of the encoding process for the areas B and C, and continues the area. Thus, it is required to receive encoding information for performing the encoding process. By receiving the encoding information in the slice from the encoding LSI 100 of LSI # 0, the encoding process can be performed as continuous slices.

  In the second embodiment, the area obtained by dividing the picture 210 in the horizontal direction has been described as an example. However, as described with reference to FIG. 19, tiles obtained by further dividing the area in the vertical direction may be used. . When tiles are used, it is required that the leading portion of the first area having the areas B and C as one tile is a tile boundary. Even in this case, the encoding information described using the slice is required.

  The preferred embodiments of the present invention have been described in detail above, but the present invention is not limited to the specific embodiments according to the present invention, and various modifications are possible within the scope of the gist of the present invention described in the claims.・ Change is possible. For example, the number of encoding LSIs 100 may be determined according to the number of divisions of the picture 210.

In addition, the following additional notes are disclosed regarding the above description.
(Additional remark 1) It is a moving image encoder which contains the several moving image encoder which each encodes the several area | region which divided | segmented one image of a moving image, Comprising: At least 1 of the said moving image encoder is, A moving image characterized by encoding a first area that does not search for a partial area of an encoded area transferred from another moving image encoder and then encoding a second area for searching for the partial area. Image encoding device.
(Supplementary note 2) The moving picture encoding apparatus according to supplementary note 1, wherein the leading portion of the first region and the leading portion of the second region are both slice boundaries or tile boundaries.
(Supplementary Note 3) The leading portion of the first region is a slice boundary or a tile boundary, the leading portion of the second region is a non-boundary that is not the slice boundary or the tile boundary, and the moving image encoder is Receiving from the other moving image encoder information required to encode the second region continuously from the first region encoded by the other moving image encoder. The moving image encoding apparatus according to appendix 1.
(Supplementary note 4) The information includes at least one of an upper adjacent pixel of the second region boundary, a prediction mode, a prediction vector, a quantization value, a coding mode, and a context used for entropy coding. 4. The moving image encoding apparatus according to 3.
(Supplementary Note 5) A moving image encoder that encodes one of regions obtained by dividing one image of a moving image, and searches for a partial region of the encoded region transferred from another moving image encoder A moving image encoder comprising: encoding means for encoding a second area in which the partial area is searched after encoding the first area not to be encoded.
(Additional remark 6) The moving image encoder of Additional remark 5 characterized by the head part of the said 1st area | region and the head part of the said 2nd area | region being both a slice boundary or a tile boundary.
(Supplementary note 7) The head of the first area is a slice boundary or a tile boundary, the head of the second area is a non-boundary that is not the slice boundary or the tile boundary, and the moving image encoder is Receiving from the other moving image encoder information required to encode the second region continuously from the first region encoded by the other moving image encoder. The moving image encoder according to appendix 5.
(Supplementary note 8) The information includes at least one of an upper adjacent pixel of the second region boundary, a prediction mode, a prediction vector, a quantization value, a coding mode, and a context used for entropy coding. 8. The moving image encoder according to 7.

DESCRIPTION OF SYMBOLS 1 Moving image encoding apparatus 20 Image encoding part (encoding means)
100 Encoding LSI (video encoder, other video encoder)
200 memory

Claims (4)

A moving image encoding apparatus including a plurality of moving image encoders that respectively encode a plurality of regions obtained by dividing one image of a moving image,
At least one of the moving image encoders encodes a first region that does not search for a partial region of an encoded region transferred from another moving image encoder, and then searches for the partial region. 2. A moving picture coding apparatus characterized by coding two regions.   The moving image encoding apparatus according to claim 1, wherein a head portion of the first region and a head portion of the second region are both slice boundaries or tile boundaries. The leading portion of the first region is a slice boundary or a tile boundary, and the leading portion of the second region is a non-boundary that is not the slice boundary or the tile boundary,
The moving image encoder receives from the other moving image encoder information necessary for encoding the second region continuously from the first region encoded by the other moving image encoder. The video encoding apparatus according to claim 1, wherein the video encoding apparatus receives the video. A moving image encoder that encodes one of regions obtained by dividing one image of a moving image,
A moving image having encoding means for encoding a first area that does not search a partial area of an encoded area transferred from another moving image encoder and then encoding a second area that searches for the partial area Image encoder.

Images