JP2015176899A - Method of manufacturing composite substrate - Google Patents
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本発明は、ハンドル基板上に単結晶シリコン層などの半導体層を備えた複合基板の製造方法に関し、ハンドル基板と半導体層の接合界面にＳｉＯ２層を実質的に有しない複合基板の製造方法に関する。 The present invention relates to a method for manufacturing a composite substrate having a semiconductor layer such as a single crystal silicon layer on a handle substrate, and relates to a method for manufacturing a composite substrate having substantially no SiO 2 layer at the bonding interface between the handle substrate and the semiconductor layer. .
ＳＯＩ（Ｓｉｌｉｃｏｎ Ｏｎ Ｉｎｓｕｌａｔｏｒ）ウェーハは、半導体素子において接合容量の低減やリーク電流の抑制、高周波特性などの観点から、パワーデバイスや高周波デバイスなどの用途に用いられている。 SOI (Silicon On Insulator) wafers are used in applications such as power devices and high-frequency devices from the viewpoint of reducing junction capacitance, suppressing leakage current, high-frequency characteristics, and the like in semiconductor elements.
ＳＯＩウェーハの代表的な製造方法として、ＳＩＭＯＸ（Ｓｅｐａｒａｔｉｏｎ ｂｙ ＩＭｐｌａｎｔａｔｉｏｎ ｏｆ ＯＸｙｇｅｎ）法や貼り合わせ法が挙げられる。ＳＩＭＯＸ法では、半導体であるシリコンウェーハに酸素イオンを高濃度で注入した後に高温で熱処理を行い、ウェーハ内に絶縁体となる酸化膜を形成することによってＳＯＩウェーハとする。一方、貼り合わせ法では、半導体であるシリコンウェーハと絶縁体のハンドルウェーハとを貼り合わせ後、シリコンウェーハを薄膜化することによってＳＯＩウェーハとする（特許文献１、非特許文献１）。 As a typical method for manufacturing an SOI wafer, there is a SIMOX (Separation by IM plantation of Oxygen) method and a bonding method. In the SIMOX method, oxygen ions are implanted at a high concentration into a silicon wafer, which is a semiconductor, and then heat treatment is performed at a high temperature to form an oxide film serving as an insulator in the wafer, thereby obtaining an SOI wafer. On the other hand, in the bonding method, a silicon wafer that is a semiconductor and an insulator handle wafer are bonded together, and then the silicon wafer is thinned to form an SOI wafer (Patent Document 1, Non-Patent Document 1).
貼り合わせ法においてシリコンウェーハを薄膜化する方法としては、貼り合わせようとする面から水素イオンや希ガスイオンを注入して内部にイオン注入層を有するシリコンウェーハと、ハンドルウェーハとを貼り合わせた後に、熱処理を行うことによってイオン注入層を脆化させ剥離させるＳｍａｒｔＣｕｔ法や、貼り合わせようとする面から水素イオンを注入して内部にイオン注入層を有するシリコンウェーハと、ハンドルウェーハとを貼り合わせる前に、これらのウェーハの貼り合わせ面に表面活性化処理を施した後に貼り合わせて、低温（例えば、１００〜３００℃）で熱処理を施して接合強度を高めた後に、常温で機械的に剥離してＳＯＩウェーハを得るＳｉＧｅｎ法等の貼り合わせによる手法が知られている。このような貼り合わせの手法は、シリコンウェーハの代わりに他の単結晶半導体のボンドウェーハを用いたり、ボンドウェーハの材料と異なる材料のハンドルウェーハを用いたりすることができることから、様々なハンドルウェーハ上に膜厚の均一性良好な単結晶半導体薄膜を備えた複合基板を得ることが可能である。 As a method of thinning the silicon wafer in the bonding method, hydrogen ions or rare gas ions are implanted from the surfaces to be bonded, and the silicon wafer having an ion implantation layer inside is bonded to the handle wafer. SmartCut method that embrittles and peels the ion-implanted layer by performing heat treatment, or before bonding the silicon wafer having the ion-implanted layer inside by implanting hydrogen ions from the surface to be bonded and the handle wafer In addition, after the surface activation treatment is performed on the bonding surfaces of these wafers, the wafers are bonded together, heat-treated at a low temperature (for example, 100 to 300 ° C.) to increase the bonding strength, and then mechanically peeled off at room temperature. Thus, a method by bonding such as SiGen method for obtaining an SOI wafer is known. Such a bonding method can use another single crystal semiconductor bond wafer instead of a silicon wafer, or a handle wafer made of a material different from the material of the bond wafer. In addition, it is possible to obtain a composite substrate provided with a single crystal semiconductor thin film with good film thickness uniformity.
上述したような貼り合わせ手法を用いることにより得られる複合基板は、ハンドルウェーハとボンドウェーハの貼り合わせ界面に絶縁体となる埋め込み酸化膜を有する場合がある。例えば、高周波デバイス用途では、絶縁性および誘電損失が小さいことが要求されるため、サファイアや窒化ケイ素、窒化アルミニウムなどをハンドルウェーハとし、その上に単結晶シリコン層を貼り合わせ法により形成する複合基板も開発されているが、その貼り合わせ面にはＳｉＯ２膜が設けられている。 A composite substrate obtained by using the bonding method as described above may have a buried oxide film serving as an insulator at the bonding interface between the handle wafer and the bond wafer. For example, in high-frequency device applications, insulation and dielectric loss are required to be small, so sapphire, silicon nitride, aluminum nitride, etc. are used as handle wafers, and a single crystal silicon layer is formed on the composite substrate by bonding. Has been developed, but an SiO 2 film is provided on the bonding surface.
近年、デバイスの高パワー化や高集積化により、デバイス層からの発熱量が増加し、その放熱が問題となっている。デバイス層の下部に絶縁体層であるＳｉＯ２膜が存在する複合基板において、ＳｉＯ２膜は絶縁性が良好である一方、熱伝導率は１．５Ｗ／ｍ・Ｋ程度と低く、デバイス側で発生した熱を放熱しにくくされている。そのため、放熱性を向上させるためにＳｉＯ２膜を無くすことが望ましい。 In recent years, due to higher power and higher integration of devices, the amount of heat generated from the device layer has increased, and heat dissipation has become a problem. In composite substrate SiO 2 film at the bottom of the device layer is an insulator layer is present, while the SiO 2 film has good insulating properties, thermal conductivity is as low as about 1.5 W / m · K, the device side It is difficult to dissipate the generated heat. Therefore, it is desirable to eliminate the SiO 2 film in order to improve heat dissipation.
しかしながら、ＳｉＯ２膜を薄くすると、貼り合わせ界面でボイドやブリスターが発生し易くなる場合があった。また、ＳｉＯ２膜を介さないで接合を行う方法として、真空下で貼り合わせ面を活性化した後に、貼り合わせを行う常温接合法（非特許文献１）があるが、超高真空の雰囲気下で表面の活性化および貼り合わせを行うため、スループットが低く、生産性が悪い場合があった。さらに、装置が高価であり、複合基板のコストが高くなる場合があった。
このように、ＳｉＯ２膜を介せずに、低コスト且つ貼り合わせ界面の欠陥が極めて少ない複合基板を作製することは困難であった。
However, when the SiO 2 film is thinned, voids and blisters are likely to occur at the bonding interface. Further, as a method for performing bonding without using an SiO 2 film, there is a room temperature bonding method (Non-Patent Document 1) in which bonding is performed after activation of a bonding surface under vacuum, but in an ultrahigh vacuum atmosphere. In this case, the surface is activated and bonded together, so that the throughput is low and the productivity is sometimes low. Furthermore, the device is expensive, and the cost of the composite substrate may be high.
Thus, it has been difficult to produce a composite substrate that is low in cost and has few defects at the bonding interface without using an SiO 2 film.
上記問題点に対し、本発明者が鋭意検討した結果、水素イオン注入をした単結晶半導体基板とハンドル基板との貼り合わせ面において、意図的にＳｉＯ２膜を設けずに、貼り合わせの前に酸素雰囲気下で表面活性化処理を施し、さらに貼り合わせ時の温度を２００℃以上の温度で行うことによって、貼り合わせ界面のボイドの発生を抑制し、また、ボイドの数を低減させることを見出した。さらに、貼り合わせた基板を、従来熱剥離させる場合に用いられる温度よりも低い温度で熱処理して接合体とした後、機械的エネルギーあるいは光エネルギーを付与して、単結晶半導体基板を剥離させることによって、接合界面（貼り合わせ界面）にボイド欠陥が極めて少ない複合基板を製造することを見出した。 As a result of intensive studies by the inventor on the above problems, the SiO 2 film is intentionally not provided on the bonding surface between the single crystal semiconductor substrate into which the hydrogen ions have been implanted and the handle substrate before bonding. It has been found that by performing surface activation treatment in an oxygen atmosphere and further performing bonding at a temperature of 200 ° C. or higher, generation of voids at the bonding interface is suppressed, and the number of voids is reduced. It was. Further, the bonded substrate is heat-treated at a temperature lower than that used in the case of heat peeling in the past to form a bonded body, and then mechanical energy or light energy is applied to peel off the single crystal semiconductor substrate. Thus, it has been found that a composite substrate having very few void defects at the bonding interface (bonding interface) can be produced.
すなわち、本発明の一つの態様では、零または１ｎｍ以下のＳｉＯ２膜を有する表面からイオンを注入して内部にイオン注入層を有する単結晶半導体基板の前記イオン注入した表面と、前記単結晶半導体基板と貼り合わせるハンドル基板の表面との少なくとも一方に、酸素濃度が８０〜１００ｖｏｌ％である酸素雰囲気下で表面活性化処理を施す工程と、前記表面活性化処理後の、前記単結晶半導体基板の前記イオン注入した表面と前記ハンドル基板の前記表面とを、２００〜４００℃下で貼り合わせる工程と、前記貼り合わせた基板を２００〜４００℃で熱処理して、接合体を得る工程と、前記接合体を前記イオン注入層に沿って剥離し、前記ハンドル基板上に単結晶半導体薄膜を転写する工程とを少なくとも含む、単結晶半導体薄膜をハンドル基板に備えた複合基板の製造方法を提供することができる。 That is, in one aspect of the present invention, the ion-implanted surface of a single-crystal semiconductor substrate having an ion-implanted layer formed by implanting ions from a surface having a SiO 2 film of zero or 1 nm or less, and the single-crystal semiconductor A step of subjecting at least one of the surface of the handle substrate to be bonded to the substrate and a surface activation treatment in an oxygen atmosphere having an oxygen concentration of 80 to 100 vol%; The step of bonding the ion-implanted surface and the surface of the handle substrate at 200 to 400 ° C., the step of heat-treating the bonded substrate at 200 to 400 ° C. to obtain a bonded body, and the bonding Peeling the body along the ion implantation layer, and transferring the single crystal semiconductor thin film onto the handle substrate. It is possible to provide a method of manufacturing a composite substrate provided for the handle substrate.
本発明により、単結晶半導体基板とハンドル基板との貼り合わせ面において、意図的にＳｉＯ２膜を設けなくても、貼り合わせ界面のボイドの数を低減させることが可能となる。すなわち、表面活性化処理を酸素雰囲気下で施すことで、ボイド欠陥の発生を抑制できるため、接合界面（貼り合わせ界面）にボイド欠陥が極めて少ない複合基板となる。 According to the present invention, the number of voids at the bonding interface can be reduced without intentionally providing a SiO 2 film on the bonding surface between the single crystal semiconductor substrate and the handle substrate. That is, since the generation of void defects can be suppressed by performing the surface activation treatment in an oxygen atmosphere, the composite substrate has a very small number of void defects at the bonding interface (bonding interface).
以下、本発明を実施するための一例である最良の形態を詳細に説明するが、本発明の範囲はこの形態に限定するものではない。 Hereinafter, the best mode which is an example for carrying out the present invention will be described in detail, but the scope of the present invention is not limited to this mode.
本発明は、一実施の形態によれば、単結晶半導体薄膜をハンドル基板に備えた複合基板の製造方法に関する。すなわち、本発明の一つの態様は、零または１ｎｍ以下のＳｉＯ２膜を有する表面からイオンを注入して内部にイオン注入層を有する単結晶半導体基板のイオン注入した表面と、単結晶半導体基板と貼り合わせるハンドル基板の表面との少なくとも一方に、酸素濃度が８０〜１００ｖｏｌ％である酸素雰囲気下で表面活性化処理を施す工程と、表面活性化処理後の、単結晶半導体基板のイオン注入した表面とハンドル基板の前記表面とを、２００〜４００℃下で貼り合わせる工程と、貼り合わせた基板を２００〜４００℃で熱処理して、接合体を得る工程と、接合体をイオン注入層に沿って剥離し、ハンドル基板上に単結晶半導体薄膜を転写する工程とを少なくとも含む、単結晶半導体薄膜をハンドル基板に備えた複合基板の製造方法である。 The present invention, according to one embodiment, relates to a method of manufacturing a composite substrate having a single crystal semiconductor thin film on a handle substrate. That is, according to one aspect of the present invention, an ion-implanted surface of a single-crystal semiconductor substrate having an ion-implanted layer formed by implanting ions from a surface having a SiO 2 film of zero or 1 nm or less, a single-crystal semiconductor substrate, A step of subjecting at least one of the surfaces of the handle substrate to be bonded to a surface activation treatment in an oxygen atmosphere having an oxygen concentration of 80 to 100 vol%, and an ion-implanted surface of the single crystal semiconductor substrate after the surface activation treatment And the surface of the handle substrate are bonded to each other at 200 to 400 ° C., the bonded substrate is heat-treated at 200 to 400 ° C. to obtain a bonded body, and the bonded body along the ion implantation layer. And a step of peeling and transferring the single crystal semiconductor thin film onto the handle substrate. .
本発明のハンドル基板および単結晶半導体基板は、意図的に表面にＳｉＯ２膜を有さないものであり、例えば熱酸化やＣＶＤ法、蒸着やスパッタリングなどのＰＶＤ法等によって、積極的にＳｉＯ２膜を設けていないものである。シリコン基板を用いる場合は、通常、ＨＦなどで処理しなければ１ｎｍ以下の自然酸化膜が形成されているが、そのまま用いても、ＨＦで処理して自然酸化膜のＳｉＯ２膜を除去して用いてもかまわない。 Handle substrate and the single crystal semiconductor substrate of the present invention has no SiO 2 film is deliberately surface, for example, thermal oxidation or CVD, by PVD method such as vapor deposition or sputtering, actively SiO 2 The film is not provided. In the case of using a silicon substrate, a natural oxide film of 1 nm or less is usually formed unless treated with HF or the like. However, even if it is used as it is, the SiO 2 film of the natural oxide film is removed by treating with HF. You can use it.
ハンドル基板としては、単結晶半導体薄膜を支持しうるものであれば特に限定されず、
シリコン、炭化珪素、窒化ケイ素、サファイア、ダイヤモンド、窒化アルミニウム、窒化ガリウム、および酸化亜鉛などの基板が挙げられる。
The handle substrate is not particularly limited as long as it can support a single crystal semiconductor thin film,
Examples include substrates such as silicon, silicon carbide, silicon nitride, sapphire, diamond, aluminum nitride, gallium nitride, and zinc oxide.
単結晶半導体基板としては、シリコン、シリコンーゲルマニウム、炭化ケイ素、ゲルマニウム、窒化ガリウム、およびガリウム砒素などの基板が挙げられる。 Examples of the single crystal semiconductor substrate include substrates such as silicon, silicon-germanium, silicon carbide, germanium, gallium nitride, and gallium arsenide.
単結晶半導体基板は、零または１ｎｍ以下のＳｉＯ２膜を有する表面からイオンを注入して内部にイオン注入層を有している。イオン注入層は、単結晶半導体基板の零または１ｎｍ以下のＳｉＯ２膜を有する表面から所望の深さにイオン注入層を形成できるような注入エネルギーで、所定の線量の水素イオン（Ｈ＋）または水素分子イオン（Ｈ２ ＋）を注入することにより形成される。このときの条件として、例えば注入エネルギーは５０〜１００ｋｅＶとすることができる。注入する水素イオン（Ｈ＋）のドーズ量は、５．０×１０１６ａｔｏｍ／ｃｍ２〜２．０×１０１７ａｔｏｍ／ｃｍ２であることが好ましい。５．０×１０１６ａｔｏｍ／ｃｍ２未満であると、後の工程でイオン注入層の脆化が起こらない場合があり、２．０×１０１７ａｔｏｍ／ｃｍ２を超えると、貼り合わせ後の熱処理中に気泡となり転写不良となる場合がある。注入イオンとして水素分子イオン（Ｈ２ ＋）を用いる場合、そのドーズ量は、２．５×１０１５ａｔｏｍｓ／ｃｍ２〜１．０×１０１７ａｔｏｍｓ／ｃｍ２であることが好ましい。２．５×１０１５ａｔｏｍｓ／ｃｍ２未満であると、後の工程でイオン注入層の脆化が起こらない場合があり、１．０×１０１７ａｔｏｍｓ／ｃｍ２を超えると、貼り合わせ後の熱処理中に気泡となり転写不良となる場合がある。 A single crystal semiconductor substrate has ions implanted from the surface having a SiO 2 film of zero or 1 nm or less and has an ion implantation layer inside. The ion implantation layer has a predetermined dose of hydrogen ions (H + ) or an implantation energy that can form an ion implantation layer at a desired depth from the surface of the single crystal semiconductor substrate having a SiO 2 film of zero or 1 nm or less. It is formed by implanting hydrogen molecular ions (H 2 + ). As a condition at this time, for example, the implantation energy can be set to 50 to 100 keV. The dose amount of hydrogen ions (H + ) to be implanted is preferably 5.0 × 10 16 atoms / cm 2 to 2.0 × 10 17 atoms / cm 2 . If it is less than 5.0 × 10 16 atoms / cm 2 , the ion implantation layer may not be embrittled in a later step. If it exceeds 2.0 × 10 17 atoms / cm 2 , In some cases, bubbles may be formed during heat treatment, resulting in poor transfer. When hydrogen molecular ions (H 2 + ) are used as implanted ions, the dose is preferably 2.5 × 10 15 atoms / cm 2 to 1.0 × 10 17 atoms / cm 2 . If it is less than 2.5 × 10 15 atoms / cm 2 , the ion implantation layer may not be embrittled in a later step. If it exceeds 1.0 × 10 17 atoms / cm 2 , In some cases, bubbles may be formed during heat treatment, resulting in poor transfer.
ハンドル基板と単結晶半導体基板との組み合わせは、特に限定されることなく、用途に応じて基板を選択することができる。 The combination of the handle substrate and the single crystal semiconductor substrate is not particularly limited, and the substrate can be selected according to the application.
ハンドル基板および単結晶半導体基板は、また、単結晶半導体基板のイオン注入した表面と、単結晶半導体基板と貼り合わせるハンドル基板の表面との少なくとも一方に、非晶質シリコン、アルミナ、窒化ケイ素、炭化珪素、および窒化アルミニウムなどの膜を備えていてもよい。これらの膜は、常圧ＣＶＤ、減圧ＣＶＤ、プラズマＣＶＤなどのＣＶＤ法、スパッタリングや電子ビーム蒸着、イオンビーム蒸着などのＰＶＤ法等によって形成することができる。膜の厚さは、５ｎｍ〜１０μｍが好ましい。５ｎｍより薄いと、膜の付与による平坦性の向上効果が得られにくい。１０μｍより厚いと、膜自体にクラックが生じる恐れがある。形成された膜の表面を、研磨機等で鏡面化を行ってもよい。これらの膜は、ＳｉＯ２膜と異なり、熱伝導性を有することから、所望の放熱性を有する複合基板とすることが可能である。また、これらの膜をハンドル基板と同素材とする場合、例えばハンドル基板に窒化ケイ素基板を用いてその表面に窒化ケイ素を蒸着させる場合、蒸着（および研磨）によって基板表面の平坦性および平滑性を改善することが可能であるだけでなく、窒化ケイ素基板は一般的に金属不純物を含むため、基板表面に膜を形成することによって不純物の拡散を防止することが可能となる。この場合、減圧ＣＶＤ法（ＬＰＣＶＤ）を用いると、基板の一面だけでなく上面、底面および側面についても蒸着させて膜を形成することができるため、底面やエッジからの不純物の拡散についても防止し得る。 The handle substrate and the single crystal semiconductor substrate may be formed of amorphous silicon, alumina, silicon nitride, carbonized on at least one of an ion-implanted surface of the single crystal semiconductor substrate and a surface of the handle substrate to be bonded to the single crystal semiconductor substrate. A film made of silicon, aluminum nitride, or the like may be provided. These films can be formed by a CVD method such as atmospheric pressure CVD, low pressure CVD, or plasma CVD, or a PVD method such as sputtering, electron beam evaporation, or ion beam evaporation. The thickness of the film is preferably 5 nm to 10 μm. If it is thinner than 5 nm, it is difficult to obtain the effect of improving the flatness due to the application of the film. If it is thicker than 10 μm, the film itself may be cracked. The surface of the formed film may be mirror-finished with a polishing machine or the like. Unlike the SiO 2 film, these films have thermal conductivity, so that a composite substrate having desired heat dissipation can be obtained. In addition, when these films are made of the same material as the handle substrate, for example, when a silicon nitride substrate is used as the handle substrate and silicon nitride is deposited on the surface thereof, the flatness and smoothness of the substrate surface is improved by vapor deposition (and polishing). In addition to being able to improve, silicon nitride substrates generally contain metal impurities, so that diffusion of impurities can be prevented by forming a film on the substrate surface. In this case, if low pressure CVD (LPCVD) is used, not only one surface of the substrate but also the top, bottom, and side surfaces can be deposited to form a film, thus preventing diffusion of impurities from the bottom surface and edges. obtain.
上述したハンドル基板および単結晶半導体基板を用いて、まずは、単結晶半導体基板のイオン注入した表面と、単結晶半導体基板と貼り合わせるハンドル基板の表面との少なくとも一方に、酸素雰囲気下で表面活性化処理を施す。表面活性化処理としては、プラズマ活性化処理、イオンビーム照射処理、ＵＶオゾン処理、オゾン水処理などが挙げられ、プラズマ処理またはイオンビーム処理が好ましい。表面活性化処理は、閉鎖系の装置内で酸素雰囲気下として処理する。酸素雰囲気下とすることにより、基板表面を活性化すると同時に、基板表面に物理吸着する水分量を低く抑えられるので、貼り合わせ時の基板界面に捕捉される吸着水量を少なくすることが可能となる。酸素雰囲気での酸素濃度は、８０〜１００ｖｏｌ％である。酸素濃度が１００ｖｏｌ％未満の場合、窒素、アルゴンおよびこれらの混合ガスを含んでいてもよい。８０ｖｏｌ％よりも少ないと、基板表面に物理吸着する水分量が多くなり、貼り合わせた後の接合時の熱処理によって、貼り合わせ界面にボイドが発生し易い。酸素濃度は、例えば酸素供給源から配管等によって閉鎖系の装置内に酸素を供給する導入ラインの中、または、処理室内並びに閉鎖系の装置内を酸素濃度計でモニターすることによって測定することができる。また、雰囲気中に含まれる水分量が多いと、表面活性化処理後の基板表面に物理吸着する水分量が多くなるため、水分を制御することが望ましい。雰囲気中の水分は、例えば高純度の酸素ガスを用いたり、酸素導入ライン中に含まれる水分を除去したりすることにより、調節することができる。酸素雰囲気下且つ雰囲気中に含まれる水分量が低い状態で、貼り合わせ面を活性化処理することにより、水分が物理吸着しにくい表面に改質することができる。このことによって、貼り合わせた後の接合時の熱処理において、貼り合わせ界面でのボイド発生を抑制することが可能となる。 Using the above-described handle substrate and single crystal semiconductor substrate, first, surface activation is performed in an oxygen atmosphere on at least one of the ion-implanted surface of the single crystal semiconductor substrate and the handle substrate surface to be bonded to the single crystal semiconductor substrate. Apply processing. Examples of the surface activation treatment include plasma activation treatment, ion beam irradiation treatment, UV ozone treatment, ozone water treatment, and the like, and plasma treatment or ion beam treatment is preferable. The surface activation treatment is performed in an oxygen atmosphere in a closed system. In the oxygen atmosphere, the substrate surface is activated, and at the same time, the amount of water physically adsorbed on the substrate surface can be kept low, so that the amount of adsorbed water trapped at the substrate interface at the time of bonding can be reduced. . The oxygen concentration in the oxygen atmosphere is 80 to 100 vol%. When the oxygen concentration is less than 100 vol%, nitrogen, argon and a mixed gas thereof may be included. If it is less than 80 vol%, the amount of moisture physically adsorbed on the substrate surface increases, and voids are likely to occur at the bonding interface due to heat treatment during bonding after bonding. The oxygen concentration can be measured, for example, by monitoring the inside of the processing chamber as well as the inside of the closed system with an oxygen concentration meter in an inlet line for supplying oxygen into the closed system by piping or the like from an oxygen supply source. it can. In addition, when the amount of moisture contained in the atmosphere is large, the amount of moisture that is physically adsorbed on the substrate surface after the surface activation treatment increases, so it is desirable to control the moisture. The moisture in the atmosphere can be adjusted, for example, by using high-purity oxygen gas or by removing moisture contained in the oxygen introduction line. By activating the bonded surface in an oxygen atmosphere and in a state where the amount of moisture contained in the atmosphere is low, the surface can be modified so that moisture is hardly physically adsorbed. This makes it possible to suppress the generation of voids at the bonding interface in the heat treatment during bonding after bonding.
プラズマ処理の場合には、例えば、チャンバー中に単結晶半導体基板および／またはハンドル基板を載置し、プラズマ用ガスとして酸素ガスを減圧下で導入した後、チャンバー中の酸素濃度を８０〜１００ｖｏｌ％として、５０〜５００Ｗ程度の高周波プラズマに５〜１２０秒間さらして、表面を処理する。この処理により単結晶半導体基板および／またはハンドル基板の表面の有機物が酸化して除去され、さらに表面のＯＨ基が増加し、活性化する。 In the case of plasma treatment, for example, a single crystal semiconductor substrate and / or a handle substrate is placed in a chamber, oxygen gas is introduced as a plasma gas under reduced pressure, and then the oxygen concentration in the chamber is set to 80 to 100 vol%. Then, the surface is treated by exposing to high frequency plasma of about 50 to 500 W for 5 to 120 seconds. By this treatment, organic substances on the surface of the single crystal semiconductor substrate and / or the handle substrate are oxidized and removed, and the OH groups on the surface are increased and activated.
イオンビームで処理する場合、例えば、ガスクラスターイオンビームを備えたチャンバー内に単結晶半導体基板および／またはハンドル基板を載置し、酸素ガスを減圧下で導入した後、チャンバー中の酸素濃度を８０〜１００ｖｏｌ％として、加速電圧を１０Ｖ〜５ｋＶとしてイオンビームを３０秒〜３０分間照射することによって処理することが可能である。 In the case of processing with an ion beam, for example, a single crystal semiconductor substrate and / or a handle substrate is placed in a chamber equipped with a gas cluster ion beam, oxygen gas is introduced under reduced pressure, and then the oxygen concentration in the chamber is set to 80. It can be processed by irradiating an ion beam for 30 seconds to 30 minutes with an acceleration voltage of 10 V to 5 kV at ˜100 vol%.
ＵＶオゾンで処理をする場合、例えば、チャンバー内に単結晶半導体基板および／またはハンドル基板を載置し、チャンバー中の酸素濃度を８０〜１００ｖｏｌ％として、低圧水銀灯などＵＶ光を照射することによって処理することが可能である。また、オゾン水で処理する場合、例えば、オゾン発生器（オゾナイザー）で発生させたオゾンを純水と混合してオゾン水とし、オゾン水中に単結晶半導体基板および／またはハンドル基板を浸漬させることによって処理することが可能である。 When processing with UV ozone, for example, a single crystal semiconductor substrate and / or a handle substrate is placed in the chamber, the oxygen concentration in the chamber is set to 80 to 100 vol%, and the processing is performed by irradiating UV light such as a low-pressure mercury lamp. Is possible. In the case of treating with ozone water, for example, ozone generated by an ozone generator (ozonizer) is mixed with pure water to form ozone water, and the single crystal semiconductor substrate and / or handle substrate is immersed in the ozone water. Can be processed.
上記の処理は、単結晶半導体基板のイオン注入した表面、およびハンドル基板の貼り合わせ面の両方について行うのがより好ましいが、いずれか一方だけ行ってもよい。表面活性化の確認には親水性の程度（濡れ性）を見ることで確認が出来る。具体的には、基板表面に水をたらし、その接触角（コンタクトアングル）を測ることで簡便に測定が出来る。 The above treatment is preferably performed on both the ion-implanted surface of the single crystal semiconductor substrate and the bonding surface of the handle substrate, but only one of them may be performed. The surface activation can be confirmed by looking at the degree of hydrophilicity (wetting). Specifically, the measurement can be performed simply by putting water on the substrate surface and measuring the contact angle.
表面活性化処理の後、単結晶半導体基板のイオン注入した表面と、ハンドル基板の単結晶半導体基板と貼り合わせる表面とを、２００〜４００℃下で貼り合わせる。貼り合わせ時の温度は、単結晶半導体基板およびハンドル基板の種類や組み合わせ、および単結晶半導体基板に注入した水素イオンのドーズ量によって異なり、いずれにおいてもイオン注入層を脆化させない温度が好ましく、具体的には、２００〜４００℃である。２００℃より低いと、ボイド発生を抑制することが難しい。４００℃より高いと、単結晶半導体基板とハンドル基板との線膨張係数の差が大きくなり、その後の冷却時に、いずれか一方あるいは両方の基板が割れやすくなる。貼り合わせの際、例えば、単結晶半導体基板とハンドル基板とを、２００〜４００℃のオーブン内で貼り合わせることが好ましく、貼り合わせを行う時間は、貼り合わせることができれば特に限定しないが、例えば１０秒〜１分である。酸素雰囲気下（酸素濃度８０〜１００ｖｏｌ％）で表面活性化処理することで、表面活性化処理前に基板表面に吸着していた物理的な吸着水を除去し表面改質された単結晶半導体基板とハンドル基板とを、２００〜４００℃で貼り合わせることにより、貼り合わせた基板の貼り合わせ界面に捕捉される水分量が極めて少なくなり、貼り合わせ界面でのボイド発生を抑制することが可能となる。 After the surface activation treatment, the ion-implanted surface of the single crystal semiconductor substrate is bonded to the surface of the handle substrate to be bonded to the single crystal semiconductor substrate at 200 to 400 ° C. The temperature at the time of bonding differs depending on the type and combination of the single crystal semiconductor substrate and the handle substrate, and the dose of hydrogen ions implanted into the single crystal semiconductor substrate. In any case, the temperature at which the ion implanted layer is not embrittled is preferable. Specifically, it is 200-400 degreeC. If it is lower than 200 ° C., it is difficult to suppress the generation of voids. When the temperature is higher than 400 ° C., the difference in linear expansion coefficient between the single crystal semiconductor substrate and the handle substrate increases, and one or both of the substrates are easily cracked during subsequent cooling. At the time of bonding, for example, it is preferable to bond the single crystal semiconductor substrate and the handle substrate in an oven at 200 to 400 ° C., and the time for performing the bonding is not particularly limited as long as the bonding can be performed. Second to 1 minute. A single crystal semiconductor substrate whose surface is modified by removing the physical adsorbed water adsorbed on the substrate surface before the surface activation treatment by performing the surface activation treatment in an oxygen atmosphere (oxygen concentration of 80 to 100 vol%). By bonding the handle substrate and the handle substrate at 200 to 400 ° C., the amount of moisture trapped at the bonding interface of the bonded substrates becomes extremely small, and it becomes possible to suppress the generation of voids at the bonding interface. .
上述したように貼り合わせた基板を、さらに２００〜４００℃で熱処理して接合体を得る。熱処理温度は２００℃より低いと、結合強度が上がらず、４００より高いと、接合体が破損する可能性があるため好ましくない。熱処理は、貼り合わせ界面の接合強度を高めること、および水素イオン注入層の脆化を行うために行われる。このため、熱処理温度は貼り合わせ時の温度よりも高いことが好ましく、例えば、貼り合わせ時の温度より２０〜１００℃高いことが好ましい。また、熱処理温度は、単結晶半導体基板およびハンドル基板の種類や組み合わせによって異なり、いずれにおいても熱剥離に達しない温度が好ましい。熱処理は、温度を分けて２段階以上に分けて行ってもよい。熱処理時間としては、温度にもある程度依存するが、１２時間〜７２時間が好ましい。 The bonded substrates as described above are further heat-treated at 200 to 400 ° C. to obtain a joined body. When the heat treatment temperature is lower than 200 ° C., the bonding strength does not increase, and when it is higher than 400, the bonded body may be damaged, which is not preferable. The heat treatment is performed in order to increase the bonding strength at the bonding interface and embrittle the hydrogen ion implanted layer. For this reason, it is preferable that the heat processing temperature is higher than the temperature at the time of bonding, for example, it is preferable that it is 20-100 degreeC higher than the temperature at the time of bonding. Further, the heat treatment temperature varies depending on the types and combinations of the single crystal semiconductor substrate and the handle substrate, and in any case, a temperature that does not reach thermal separation is preferable. The heat treatment may be performed by dividing the temperature into two or more stages. The heat treatment time is preferably 12 hours to 72 hours, although depending on the temperature to some extent.
熱処理して得られた接合体を、接合体のイオン注入層に沿って剥離し、ハンドル基板上に単結晶半導体薄膜を転写する。剥離を行う方法として、イオン注入層に向けて、機械的衝撃および／または光照射を与えることにより剥離を生じさせることが挙げられる。剥離を行う方法は単独で用いてもよいし、複数組み合わせて用いてもよい。 The bonded body obtained by the heat treatment is peeled along the ion implantation layer of the bonded body, and the single crystal semiconductor thin film is transferred onto the handle substrate. As a method for performing peeling, for example, peeling may be caused by applying mechanical impact and / or light irradiation toward the ion implantation layer. The method of performing peeling may be used alone or in combination.
イオン注入層に衝撃を与えて機械的剥離を行う場合、加熱に伴う熱歪、ひび割れ、貼り合わせた面の剥離等が発生するおそれがない。機械的剥離は、一端部から他端部に向かうへき開によるものが好ましい。へき開用部材として、好ましくは楔状の部材、例えば楔（くさび）をイオン注入層（注入界面）に挿入し、楔による変形でへき開を進行させて剥離する方法であってもよい。この方法の使用に際しては、楔が接触する部分での傷やパーティクルの発生や、楔を打ち込むことにより生じる基板の過大な変形による基板割れの発生を回避するように留意する。イオン注入層に衝撃を与えるためには、例えば、ガスや液体等の流体のジェットを貼り合わせた基板の側面から連続的または断続的に吹き付ければよいが、衝撃による機械的剥離が生じる方法であれば特に限定はされない。 When mechanical peeling is performed by applying an impact to the ion-implanted layer, there is no possibility that thermal strain, cracks, peeling of the bonded surfaces, and the like accompanying heating occur. The mechanical peeling is preferably by cleavage from one end to the other end. As the cleavage member, a wedge-shaped member, for example, a wedge (wedge) is preferably inserted into the ion implantation layer (implantation interface), and the cleavage is progressed by the deformation by the wedge, and the separation may be performed. When using this method, care should be taken to avoid generation of scratches and particles at the contacted portion of the wedge, and generation of substrate cracking due to excessive deformation of the substrate caused by driving the wedge. In order to give an impact to the ion-implanted layer, for example, a jet of a fluid such as a gas or a liquid may be sprayed continuously or intermittently from the side surface of the bonded substrate. If there is no particular limitation.
単結晶半導体基板および／またはハンドル基板が透明である場合、透明である基板から光を照射することによってイオン注入層を剥離させることが可能である。この場合、光源は可視光であることが好ましい。単結晶半導体基板の内部に形成されたイオン注入界面近傍がアモルファス化していることによって、可視光の吸収を受けやすく、エネルギーを選択的に受容しやすいという機構によってイオン注入層を脆化させ剥離することが可能である。また、この剥離方法は、機械的剥離よりも簡易であるため好ましい。可視光の光源は、Ｒａｐｉｄ Ｔｈｅｒｍａｌ Ａｎｎｅａｌｅｒ（ＲＴＡ）、グリーンレーザー光、またはフラッシュランプ光等であることが好ましい。 When the single crystal semiconductor substrate and / or the handle substrate is transparent, the ion implantation layer can be peeled off by irradiating light from the transparent substrate. In this case, the light source is preferably visible light. Since the vicinity of the ion implantation interface formed inside the single crystal semiconductor substrate is amorphized, the ion implantation layer becomes brittle and peels by a mechanism that easily absorbs visible light and easily accepts energy. It is possible. Moreover, this peeling method is preferable because it is simpler than mechanical peeling. The visible light source is preferably a Rapid Thermal Annealer (RTA), a green laser light, a flash lamp light, or the like.
光照射による剥離においては、光照射に先立ち、接合体の端部、貼り合わせ面近傍に機械的衝撃を与えておき、光照射による熱の衝撃が端部の機械的衝撃の起点部から貼り合わせ基板全面にわたってイオン注入界面に破壊を生ぜしめてもよい。または、光照射の後、イオン注入層の界面に機械的衝撃を加え、イオン注入界面に沿って貼り合わせた基板を剥離してもよい。このようにして、接合体のイオン注入層に沿って剥離し、単結晶半導体薄膜をハンドル基板に備えた複合基板を得ることができる。 In peeling by light irradiation, prior to light irradiation, a mechanical shock is applied to the edge of the joined body and the vicinity of the bonding surface, and the heat shock due to light irradiation is bonded from the mechanical shock starting point of the edge. Destruction may occur at the ion implantation interface over the entire surface of the substrate. Alternatively, after light irradiation, mechanical impact may be applied to the interface of the ion implantation layer, and the bonded substrate may be peeled along the ion implantation interface. In this way, it is possible to obtain a composite substrate that is peeled along the ion-implanted layer of the bonded body and has a single crystal semiconductor thin film on the handle substrate.
本発明にかかる複合基板の製造工程は、特に限定されるものではないが、その一態様を図１に示す。これによれば、単結晶半導体基板１の一つの表面からイオン３を注入してイオン注入層４を形成する（ａ）。イオン注入した表面１ｓとハンドル基板２の貼り合わせ面２ｓに、酸素雰囲気（酸素濃度８０ｖｏｌ％）下でプラズマ５による表面活性化処理を施す（ｂおよびｃ）。次に、２５０℃下で、表面活性化処理した基板の面１ｓ、２ｓを対向して重ね合わせて貼り合わせる（ｄ）。貼り合わせた基板６に、３００℃で熱処理を施し接合体７を得る（ｅ）。次に、接合体７のイオン注入層４に楔状の治具を挿入し、イオン注入層４に沿って単結晶半導体基板１ｂを剥離することにより、ハンドル基板２上に単結晶半導体基板１ａが転写した複合基板８を得ることができる（ｆ）。 Although the manufacturing process of the composite substrate concerning this invention is not specifically limited, The one aspect | mode is shown in FIG. According to this, the ion implantation layer 4 is formed by implanting ions 3 from one surface of the single crystal semiconductor substrate 1 (a). A surface activation treatment by plasma 5 is performed on the bonded surface 2s of the ion-implanted surface 1s and the handle substrate 2 under an oxygen atmosphere (oxygen concentration 80 vol%) (b and c). Next, at 250 ° C., the surfaces 1s and 2s of the substrate subjected to the surface activation treatment are overlapped and bonded together (d). The bonded substrate 6 is heat treated at 300 ° C. to obtain a bonded body 7 (e). Next, a wedge-shaped jig is inserted into the ion implantation layer 4 of the bonded body 7, and the single crystal semiconductor substrate 1 b is peeled along the ion implantation layer 4, whereby the single crystal semiconductor substrate 1 a is transferred onto the handle substrate 2. The composite substrate 8 can be obtained (f).
以下に実施例および比較例を挙げて本発明にかかる複合基板の製造方法について更に説明するが、本発明はこれらに限定されるものではない。 Hereinafter, the method for producing a composite substrate according to the present invention will be further described with reference to Examples and Comparative Examples, but the present invention is not limited to these.
＜実施例１＞
単結晶半導体基板として、外径６インチ、厚さ６２５μｍの単結晶Ｓｉウェハを用いた。単結晶Ｓｉウェハの鏡面側から、Ｈ＋イオンをドーズ量７．０×１０１６ ａｔｏｍ／ｃｍ２、加速電圧７０ｋｅＶの条件でイオン注入した。
<Example 1>
As the single crystal semiconductor substrate, a single crystal Si wafer having an outer diameter of 6 inches and a thickness of 625 μm was used. From the mirror surface side of the single crystal Si wafer, H + ions were implanted under the conditions of a dose amount of 7.0 × 10 16 atoms / cm 2 and an acceleration voltage of 70 keV.
ハンドル基板として、単結晶Ｓｉウェハと同サイズの窒化ケイ素基板を用いた。窒化ケイ素基板上に、ＬＰ−ＣＶＤ装置（日立国際電気社製）で、ＳｉＮを厚さ１μｍとなるように蒸着した後、研磨を行って鏡面化した。 A silicon nitride substrate having the same size as the single crystal Si wafer was used as the handle substrate. On the silicon nitride substrate, SiN was vapor-deposited with a LP-CVD apparatus (manufactured by Hitachi Kokusai Electric Co., Ltd.) so as to have a thickness of 1 μm, and then polished to be mirror-finished.
それぞれの基板に対し、ＳＣ−１洗浄液（ＮＨ４ＯＨ＋Ｈ２Ｏ２＋Ｈ２Ｏ）に含浸させ、パーティクル除去および親水化処理を行った。その後、単結晶Ｓｉウェハのイオン注入した表面と、単結晶Ｓｉウェハと貼り合わせる窒化ケイ素基板のＳｉＮを蒸着した表面に、酸素雰囲気下で、ガスクラスターイオンビーム（アルバック社製）を備えたチャンバー内でイオンビーム照射を行い、表面活性化処理を実施した。チャンバー内の雰囲気は、供給するガス種の選択によって制御した。すなわち、酸素ガスをチャンバー内に供給して、酸素濃度を１００ｖｏｌ％とした。 Each substrate was impregnated with an SC-1 cleaning solution (NH 4 OH + H 2 O 2 + H 2 O) to perform particle removal and hydrophilic treatment. Then, in a chamber equipped with a gas cluster ion beam (manufactured by ULVAC) on an ion-implanted surface of the single crystal Si wafer and a surface of the silicon nitride substrate to be bonded to the single crystal Si wafer on which SiN is vapor deposited. The surface activation treatment was performed by ion beam irradiation. The atmosphere in the chamber was controlled by selecting the type of gas to be supplied. That is, oxygen gas was supplied into the chamber, and the oxygen concentration was set to 100 vol%.
次に、表面活性化処理した単結晶Ｓｉウェハのイオン注入した表面と窒化ケイ素基板の表面とを、貼り合わせ装置を用いて２８０℃下で貼り合わせた。 Next, the ion-implanted surface of the surface activated single crystal Si wafer and the surface of the silicon nitride substrate were bonded at 280 ° C. using a bonding apparatus.
貼り合わせた基板を、１０時間、３００℃で熱処理して接合体を得た。その後、単結晶Ｓｉウェハのイオン注入層に、ブレードを用いて機械的衝撃を与え、単結晶Ｓｉウェハをイオン注入層に沿って剥離し、窒化ケイ素基板上に単結晶Ｓｉウェハを転写した複合基板を得た。 The bonded substrate was heat-treated at 300 ° C. for 10 hours to obtain a joined body. Thereafter, a mechanical impact is applied to the ion implantation layer of the single crystal Si wafer using a blade, the single crystal Si wafer is peeled along the ion implantation layer, and the single crystal Si wafer is transferred onto the silicon nitride substrate. Got.
貼り合わせた基板および３００℃熱処理での接合体の貼り合わせ界面の欠陥の有無を、超音波顕微鏡（日立建機ファインテック製 Ｆｉｎｅ ＳＡＴ ＦＳ２００II）で評価した。貼り合わせた基板および接合体の超音波顕微鏡画像を、図２（ａ）および（ｂ）に示す。貼り合わせた基板および接合体ともに、貼り合わせ界面に欠陥は観察されなかった。また、得られた複合基板にも欠陥は見られなかった。 The presence or absence of defects at the bonding interface of the bonded substrate and the bonded body after 300 ° C. heat treatment was evaluated with an ultrasonic microscope (Fine SAT FS200II manufactured by Hitachi Construction Machinery Finetech). Ultrasonic microscope images of the bonded substrate and bonded body are shown in FIGS. 2 (a) and 2 (b). In both the bonded substrate and the bonded body, no defect was observed at the bonded interface. In addition, no defects were found in the obtained composite substrate.
＜実施例２＞
表面活性化処理した単結晶Ｓｉウェハのイオン注入した表面と窒化ケイ素基板の表面とを、２００℃下で貼り合わせた以外は、実施例１と同様に行い、窒化ケイ素基板上に単結晶Ｓｉウェハを転写した複合基板を得た。
<Example 2>
The single crystal Si wafer was formed on the silicon nitride substrate in the same manner as in Example 1 except that the ion-implanted surface of the surface activated single crystal Si wafer and the surface of the silicon nitride substrate were bonded together at 200 ° C. A composite substrate to which was transferred was obtained.
得られた複合基板は、窒化ケイ素基板全面に単結晶Ｓｉウェハが転写していることを、光学顕微鏡による観察で確認した。貼り合わせた基板および接合体を、超音波顕微鏡で評価したところ、貼り合わせた基板および接合体ともに、貼り合わせ界面に欠陥は観察されなかった。 The obtained composite substrate was confirmed by observation with an optical microscope that the single crystal Si wafer was transferred to the entire surface of the silicon nitride substrate. When the bonded substrate and bonded body were evaluated by an ultrasonic microscope, no defect was observed at the bonded interface in both the bonded substrate and bonded body.
＜比較例１＞
単結晶Ｓｉウェハのイオン注入した表面と窒化ケイ素基板の表面とに表面活性化処理をせずに、室温（２５℃）で貼り合わせて、１０時間、１５０℃で熱処理した以外は、実施例１と同様に行い、接合体を得た。得られた接合体を、さらに２４時間、３００℃で熱処理して、単結晶Ｓｉウェハのイオン注入層に、ブレードを用いて機械的衝撃を与え、単結晶Ｓｉウェハをイオン注入層に沿って剥離し、窒化ケイ素基板上に単結晶Ｓｉウェハを転写した複合基板を得た。
<Comparative Example 1>
Example 1 except that the ion-implanted surface of the single crystal Si wafer and the surface of the silicon nitride substrate were bonded together at room temperature (25 ° C.) without being subjected to surface activation treatment and heat-treated at 150 ° C. for 10 hours. In the same manner as above, a joined body was obtained. The obtained bonded body was further heat-treated at 300 ° C. for 24 hours, and a mechanical impact was applied to the ion implantation layer of the single crystal Si wafer using a blade, and the single crystal Si wafer was peeled along the ion implantation layer. As a result, a composite substrate in which a single crystal Si wafer was transferred onto a silicon nitride substrate was obtained.
貼り合わせた基板および１５０℃熱処理での接合体を、超音波顕微鏡で評価した。結果を図３（ａ）および（ｂ）に示す。貼り合わせた基板には、欠陥が見られなかったが、熱処理後の接合体には、貼り合わせ界面全体に多数のブリスター状の欠陥が観察された。また、得られた複合基板には、多数のボイドが見られた。 The bonded substrate and the bonded body after heat treatment at 150 ° C. were evaluated with an ultrasonic microscope. The results are shown in FIGS. 3 (a) and (b). No defects were found on the bonded substrates, but many blister-like defects were observed on the entire bonded interface in the bonded body after the heat treatment. Moreover, many voids were seen in the obtained composite substrate.
＜比較例２＞
単結晶Ｓｉウェハのイオン注入した表面と窒化ケイ素基板の表面とを、チャンバー内に供給するガス種を窒素のみとし、実質的に酸素を含まない窒素雰囲気下（酸素濃度０ｖｏｌ％）でイオンビーム照射して表面活性化処理を行い、活性化処理したウェハ同士を室温で貼り合わせて、１０時間、１５０℃で熱処理した以外は、実施例１と同様に行い、接合体を得た。得られた接合体を、さらに、２４時間、３００℃で熱処理して、単結晶Ｓｉウェハのイオン注入層に、ブレードを用いて機械的衝撃を与え、単結晶Ｓｉウェハをイオン注入層に沿って剥離し、窒化ケイ素基板上に単結晶Ｓｉウェハを転写した複合基板を得た。
<Comparative Example 2>
Ion beam irradiation in a nitrogen atmosphere (oxygen concentration 0 vol%) containing nitrogen alone as the gas species supplied into the chamber between the surface of the single crystal Si wafer implanted with ions and the surface of the silicon nitride substrate. Then, surface activation treatment was performed, and the activated wafers were bonded to each other at room temperature and heat treated at 150 ° C. for 10 hours to obtain a joined body. The obtained bonded body was further heat-treated at 300 ° C. for 24 hours, and a mechanical impact was applied to the ion implantation layer of the single crystal Si wafer using a blade, and the single crystal Si wafer was moved along the ion implantation layer. The composite substrate which peeled and transferred the single crystal Si wafer on the silicon nitride substrate was obtained.
貼り合わせた基板および１５０℃熱処理での接合体を、超音波顕微鏡で評価した。結果を図４（ａ）および（ｂ）に示す。貼り合わせた基板には、欠陥が見られなかったが、熱処理後の接合体には、貼り合わせ界面全体に多数の欠陥が観察された。また、得られた複合基板には、多数のボイドが見られた。 The bonded substrate and the bonded body after heat treatment at 150 ° C. were evaluated with an ultrasonic microscope. The results are shown in FIGS. 4 (a) and (b). No defects were found on the bonded substrates, but many defects were observed on the entire bonded interface in the bonded body after the heat treatment. Moreover, many voids were seen in the obtained composite substrate.
＜比較例３＞
単結晶Ｓｉウェハのイオン注入した表面と窒化ケイ素基板の表面とを、チャンバー内に供給するガス種を窒素のみとし、実質的に酸素を含まない窒素雰囲気下（酸素濃度０ｖｏｌ％）で、イオンビーム照射を行い、表面活性化処理を実施した後、１００℃下で貼り合わせて、１０時間、１５０℃で熱処理した以外は、実施例１と同様に行い、接合体を得た。得られた接合体を、さらに、２４時間、３００℃で熱処理して、単結晶Ｓｉウェハのイオン注入層に、ブレードを用いて機械的衝撃を与え、単結晶Ｓｉウェハをイオン注入層に沿って剥離し、窒化ケイ素基板上に単結晶Ｓｉウェハを転写した複合基板を得た。
<Comparative Example 3>
The ion beam of the surface of the single crystal Si wafer and the surface of the silicon nitride substrate that is supplied into the chamber is only nitrogen, and the ion beam is substantially contained in an oxygen-free nitrogen atmosphere (oxygen concentration 0 vol%). After irradiating and performing surface activation treatment, a bonded body was obtained in the same manner as in Example 1 except that bonding was performed at 100 ° C. and heat treatment was performed at 150 ° C. for 10 hours. The obtained bonded body was further heat-treated at 300 ° C. for 24 hours, and a mechanical impact was applied to the ion implantation layer of the single crystal Si wafer using a blade, and the single crystal Si wafer was moved along the ion implantation layer. The composite substrate which peeled and transferred the single crystal Si wafer on the silicon nitride substrate was obtained.
貼り合わせた基板および１５０℃の熱処理での接合体を、超音波顕微鏡で評価した。結果を図５（ａ）および（ｂ）に示す。貼り合わせた基板には欠陥が見られなかったが、熱処理後の接合体には、貼り合わせ界面に直径２．０ｃｍのサイズのボイド欠陥が２個観察された。また、得られた複合基板には、熱処理後の接合体に見られたボイド欠陥と同じ位置に直径２．０ｃｍのボイドが見られた。 The bonded substrate and the bonded body by heat treatment at 150 ° C. were evaluated with an ultrasonic microscope. The results are shown in FIGS. 5 (a) and (b). Although no defect was found in the bonded substrate, two void defects having a diameter of 2.0 cm were observed at the bonded interface in the bonded body after the heat treatment. Further, in the obtained composite substrate, a void having a diameter of 2.0 cm was observed at the same position as the void defect observed in the bonded body after the heat treatment.
＜比較例４＞
単結晶Ｓｉウェハのイオン注入した表面と窒化ケイ素基板の表面とを、チャンバー内に供給するガス種を酸素と窒素とし、酸素と窒素の流量比７０：３０とした酸素雰囲気下（酸素濃度７０ｖｏｌ％）で、イオンビーム照射を行い、表面活性化処理を実施した後、２００℃で貼り合わせて、１０時間、２５０℃で熱処理した以外は、実施例１と同様に行い、接合体を得た。得られた接合体を、さらに、２４時間、３００℃で熱処理して、単結晶Ｓｉウェハのイオン注入層に、ブレードを用いて機械的衝撃を与え、単結晶Ｓｉウェハをイオン注入層に沿って剥離し、窒化ケイ素基板上に単結晶Ｓｉウェハを転写した複合基板を得た。
<Comparative Example 4>
In an oxygen atmosphere (oxygen concentration 70 vol%), the gas species supplied into the chamber between the ion-implanted surface of the single-crystal Si wafer and the surface of the silicon nitride substrate is oxygen and nitrogen, and the oxygen / nitrogen flow ratio is 70:30. ), Ion beam irradiation was performed, surface activation treatment was performed, bonding was performed at 200 ° C., and heat treatment was performed at 250 ° C. for 10 hours to obtain a joined body. The obtained bonded body was further heat-treated at 300 ° C. for 24 hours, and a mechanical impact was applied to the ion implantation layer of the single crystal Si wafer using a blade, and the single crystal Si wafer was moved along the ion implantation layer. The composite substrate which peeled and transferred the single crystal Si wafer on the silicon nitride substrate was obtained.
貼り合わせた基板および２５０℃熱処理での接合体を、超音波顕微鏡で評価した。結果を図６（ａ）および（ｂ）に示す。貼り合わせた基板には欠陥が見られなかったが、熱処理後の接合体には、貼り合わせ界面に直径２．５ｃｍのサイズのボイド欠陥が１個観察された。また、得られた複合基板には、熱処理後の接合体に見られたボイド欠陥と同じ位置に直径２．５ｃｍのボイドが見られた。 The bonded substrate and the bonded body at 250 ° C. heat treatment were evaluated with an ultrasonic microscope. The results are shown in FIGS. 6 (a) and (b). Although no defect was found on the bonded substrate, one void defect having a diameter of 2.5 cm was observed at the bonding interface in the bonded body after the heat treatment. Further, in the obtained composite substrate, a void having a diameter of 2.5 cm was observed at the same position as a void defect observed in the bonded body after the heat treatment.
＜比較例５＞
表面活性化処理した単結晶Ｓｉウェハのイオン注入した表面と窒化ケイ素基板の表面とを、１００℃下で貼り合わせて、１０時間、２５０℃で熱処理した以外は、実施例１と同様に行い、接合体を得た。得られた接合体を、さらに３００℃で熱処理して、単結晶Ｓｉウェハのイオン注入層に、ブレードを用いて機械的衝撃を与え、単結晶Ｓｉウェハをイオン注入層に沿って剥離し、窒化ケイ素基板上に単結晶Ｓｉウェハを転写した複合基板を得た。
<Comparative Example 5>
Except that the ion-implanted surface of the surface activated single crystal Si wafer and the surface of the silicon nitride substrate were bonded together at 100 ° C. and heat-treated at 250 ° C. for 10 hours. A joined body was obtained. The obtained bonded body is further heat-treated at 300 ° C., mechanical impact is applied to the ion implantation layer of the single crystal Si wafer using a blade, the single crystal Si wafer is peeled along the ion implantation layer, and nitriding is performed. A composite substrate in which a single crystal Si wafer was transferred onto a silicon substrate was obtained.
貼り合わせた基板および２５０℃熱処理での接合体を、超音波顕微鏡で評価した。結果を図７（ａ）および（ｂ）に示す。貼り合わせた基板には欠陥が見られなかったが、熱処理後の接合体には、貼り合わせ界面に直径１〜３ｍｍのサイズのボイド欠陥が４個観察された。また、得られた複合基板には、熱処理後の接合体に見られたボイド欠陥と同じ位置に直径１〜３ｍｍのボイドが見られた。 The bonded substrate and the bonded body at 250 ° C. heat treatment were evaluated with an ultrasonic microscope. The results are shown in FIGS. 7 (a) and (b). Although no defect was found on the bonded substrate, four void defects having a diameter of 1 to 3 mm were observed at the bonding interface in the bonded body after the heat treatment. Further, in the obtained composite substrate, voids having a diameter of 1 to 3 mm were observed at the same positions as the void defects observed in the bonded body after the heat treatment.
以上の結果を表１に示す。接合面に意図的にＳｉＯ２膜を形成しないと、比較例１に示すようにかなり低い温度で多数のボイドが発生し、剥離したＳｉ層に欠陥が残存した。転写するＳｉ層の欠陥を無くすには、Ｓｉ層の剥離が可能となる温度までボイドの発生を抑制する必要がある。また、表面活性化処理をＮ２存在下（酸素濃度７０ｖｏｌ％以下）で行った場合には、ボイドが発生した。一方、表面活性化処理の雰囲気をＯ２（酸素濃度８０〜１００ｖｏｌ％）とし、貼り合わせ時の温度を高くすることでボイドのサイズや数を低減でき、また、接合時の温度を２００℃以上とすることで、ボイドをゼロとすることが可能であった。すなわち、本発明によって、貼り合わせ界面に意図的にＳｉＯ２膜を形成せずに、放熱性に優れた複合基板を得ることができた。 The results are shown in Table 1. If the SiO 2 film was not intentionally formed on the bonding surface, a large number of voids were generated at a considerably low temperature as shown in Comparative Example 1, and defects remained in the peeled Si layer. In order to eliminate defects in the transferred Si layer, it is necessary to suppress the generation of voids up to a temperature at which the Si layer can be peeled off. Further, when the surface activation treatment was performed in the presence of N 2 (oxygen concentration 70 vol% or less), voids were generated. On the other hand, the surface activation treatment atmosphere is O 2 (oxygen concentration 80 to 100 vol%), and the temperature at the time of bonding can be increased to reduce the size and number of voids. By doing so, it was possible to make the void zero. That is, according to the present invention, it was possible to obtain a composite substrate excellent in heat dissipation without intentionally forming a SiO 2 film at the bonding interface.
１ 単結晶半導体基板
１ｓ 表面活性化処理した単結晶半導体基板の表面
１ａ 単結晶半導体薄膜
１ｂ 剥離された単結晶半導体基板
２ ハンドル基板
２ｓ 表面活性化処理したハンドル基板の表面
３ イオン
４ イオン注入層
５ プラズマ
６ 貼り合わせた基板
７ 接合体
８ 複合基板
DESCRIPTION OF SYMBOLS 1 Single crystal semiconductor substrate 1s Surface activated surface 1a of single crystal semiconductor substrate Single crystal semiconductor thin film 1b Stripped single crystal semiconductor substrate 2 Handle substrate 2s Surface activated surface of handle substrate 3 Ion 4 Ion implantation layer 5 Plasma 6 Bonded substrate 7 Bonded body 8 Composite substrate
Claims (6)
前記表面活性化処理後の、前記単結晶半導体基板の前記イオン注入した表面と前記ハンドル基板の前記表面とを、２００〜４００℃下で貼り合わせる工程と、
前記貼り合わせた基板を２００〜４００℃で熱処理して、接合体を得る工程と、
前記接合体を前記イオン注入層に沿って剥離し、前記ハンドル基板上に単結晶半導体薄膜を転写する工程と
を少なくとも含む、単結晶半導体薄膜をハンドル基板に備えた複合基板の製造方法。 The ion-implanted surface of a single crystal semiconductor substrate having an ion-implanted layer by implanting ions from a surface having a zero or 1 nm or less SiO 2 film and the surface of a handle substrate to be bonded to the single crystal semiconductor substrate At least one of performing a surface activation treatment in an oxygen atmosphere having an oxygen concentration of 80 to 100 vol%;
Bonding the ion-implanted surface of the single crystal semiconductor substrate and the surface of the handle substrate after the surface activation treatment at 200 to 400 ° C .;
Heat-treating the bonded substrates at 200 to 400 ° C. to obtain a joined body;
A method of manufacturing a composite substrate including a single crystal semiconductor thin film on a handle substrate, comprising at least a step of peeling the bonded body along the ion implantation layer and transferring the single crystal semiconductor thin film onto the handle substrate.
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| JPH0391227A (en) * | 1989-09-01 | 1991-04-16 | Nippon Soken Inc | Adhering method for semiconductor substrate |
| JP2005294800A (en) * | 2003-12-02 | 2005-10-20 | Bondotekku:Kk | Joining method, device created thereby, surface activating device and joining device provided therewith |
| JP2006202989A (en) * | 2005-01-20 | 2006-08-03 | Shin Etsu Chem Co Ltd | Soi wafer and manufacturing method therefor |
| JP2008177531A (en) * | 2006-12-18 | 2008-07-31 | Soi Tec Silicon On Insulator Technologies | Double plasma utbox |
| JP2008288556A (en) * | 2007-04-18 | 2008-11-27 | Shin Etsu Chem Co Ltd | Method for manufacturing bonded substrate |
| JP2010263073A (en) * | 2009-05-07 | 2010-11-18 | Shin-Etsu Chemical Co Ltd | Method for manufacturing bonded wafer |
| JP2012044157A (en) * | 2010-07-23 | 2012-03-01 | Semiconductor Energy Lab Co Ltd | Manufacturing method of silicon on insulator (soi) substrate and manufacturing method of semiconductor device |
| WO2014020906A1 (en) * | 2012-07-30 | 2014-02-06 | 住友化学株式会社 | Method for manufacturing composite substrate and method for manufacturing semiconductor crystal layer formation substrate |
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