JP2015165646A - Circuit having via and related method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a circuit configured to suppress electric signal deterioration.SOLUTION: A circuit may include a signal path, a first layer including the signal path, and a second layer including the signal path. The circuit may additionally include a path via having a signal-path via location and configured to connect the signal path on the first layer to the signal path on the second layer. The circuit may also include a ground plane associated with the first layer. The ground plane may have a ground-plane location that corresponds to the signal-path via location. The ground plane may also include an asymmetrical cutout portion that extends away from the ground-plane location on a first side of the ground plane opposite to a second side of the ground plane corresponding to the first layer side where the path via comes into contact with the signal path on the first layer.

Description

  Embodiments disclosed herein relate to manipulating magnetic fields around vias.

  Vias may be used to electrically connect conductors in different layers of a circuit board or integrated circuit. The electrical signal typically travels horizontally on the layer, then makes a sharp (eg 90 °) turn when it reaches the via, and travels vertically to the other layer. The electrical signal then makes a sudden turn once again and resumes running in the lateral direction. A sudden turn between lateral travel and vertical travel can cause impedance discontinuities that can lead to reflection and degradation of electrical signals.

  The subject matter claimed herein is not limited to embodiments that solve the above disadvantages or that operate only in environments such as those described above. Rather, this background is only provided to illustrate one example technology area where some embodiments described herein can be implemented.

  A circuit configured to suppress electrical signal degradation is provided.

  According to an embodiment of an aspect, a circuit configured to suppress electrical signal degradation includes a signal path configured to carry a forward current of an electrical signal and a first including the signal path. And a second layer including the signal path. The circuit may further include a path via having a signal path via location and configured to connect the signal path of the first layer with the signal path of the second layer. The circuit may also include a ground plane associated with the first layer and configured to carry a return current of the electrical signal. The ground plane may have a ground plane position corresponding to the signal path via position. The ground plane is also the ground plane opposite to the second side of the ground plane corresponding to the first layer side where the path via is in contact with the signal path of the first layer. An asymmetric cutout portion extending in a direction away from the ground plane position on the first side of the first plane.

  The objects and advantages of the embodiments will be realized and attained by means of the elements, features and combinations particularly pointed out in the appended claims.

  As will be appreciated, both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention as claimed.

The accompanying drawings, including the following figures, are used to describe and explain example embodiments with greater specificity and detail.
It is a figure which shows one structural example of the circuit comprised so that an electromagnetic (EM) field might be operated. It is a figure which shows the example of 1 cross section of the circuit of FIG. 1A. It is a figure which shows the cross-sectional example of the circuit similar to the circuit of FIG. 1A and 1B except having no EM field operation. It is a figure which shows one structural example of the circuit comprised so that the EM field regarding the differential mode of a differential signal might be operated. It is a figure which shows the example of 1 structure of the circuit comprised so that the EM field regarding the common mode of a differential signal might be operated. It is a flowchart which shows the example of 1 method which suppresses the electrical signal degradation in a circuit.

  As will be described in detail below, electrical signals (hereinafter “signals”) are abrupt when they enter and exit the vias from various layers of the circuit (eg, 90 °) The circuit may be configured to suppress signal degradation that may be associated with performing a turn. In some examples, signal degradation may be caused by impedance discontinuities that may occur at corners where vias may contact circuit layers. Impedance discontinuities can be caused, at least in part, by disruption of the electromagnetic (EM) field associated with the signal.

  For example, when a signal is propagating along its signal path in a layer, the corresponding EM field is such that both the electric and magnetic fields of the EM field are substantially perpendicular to the direction of signal propagation. The transverse (transverse) electromagnetic (TEM) mode. However, when the signal reaches a sharp corner (eg, at the via location), a sudden change in direction will cause the EM field inside the corner to have a shorter propagation distance than the EM field outside the corner. Due to the discontinuities between these propagation distances, the corresponding EM field is no longer in TEM mode, which in turn can cause impedance discontinuities and associated reflections.

  In some embodiments, the circuit may be configured to manipulate EM coupling between the circuit signal path and the circuit ground plane. The manipulation of EM coupling can result in increased EM coupling at the inner portion of the signal path corner to the outer portion of the corner, thereby reducing discontinuities between the EM field directions, It may allow the EM field of the signal to be in TEM mode more than without the EM coupling operation. Therefore, impedance discontinuity and accompanying signal degradation can be reduced. As described in detail below, EM coupling can be manipulated by setting the size and shape of the signal path and cutouts with respect to the ground plane around the circuit area that may include vias. Further, in some embodiments, the circuit may include additional vias that may help manipulate EM coupling as desired.

  An embodiment according to the present disclosure will be described with reference to the accompanying drawings.

  FIG. 1A illustrates an example configuration of a circuit 100 configured to manipulate an EM field to suppress electrical signal degradation in accordance with at least one embodiment disclosed herein. The circuit 100 may be a layered circuit, such as a printed circuit board (PCB) or an integrated circuit (IC), or an IC package that may include two or more layers. The layers of the circuit 100 can be stacked one above the other. In FIG. 1A, a top view of each of layers 108a-108h of circuit 100 is depicted. Although these are depicted side by side in FIG. 1A, layers 108a-108h are layer 108h at the bottom and layers 108g, 108f, 108e, 108d, 108c, 108b and 108a in that order, May be stacked on top of each other. This number of layers of circuit 100 is merely an example, and a circuit configured in accordance with the present disclosure may have any number of applicable layers.

  Circuit 100 may include a signal path 102 that may be configured to carry current. In the illustrated embodiment, the signal path 102 may be configured to carry a forward current for the signal. The forward current is depicted in the signal path 102 by a dashed arrow. In the illustrated embodiment, the signal path 102 may include traces 106b associated with the layer 108a that may be in and / or supported by the layer 108a. Signal path 102 may also include wiring 106a associated with layer 108f that may be in and / or supported by layer 108f. The wirings 106b and 106a may be made of any suitable conductor that can carry current.

  The signal path 102 may also include a path via 104 coupled to the layer 106a wiring 106b and the layer 108f wiring 106a. The path via 104 may be made of any suitable conductor that allows forward current to pass through the path via 104 between the wirings 106b and 106a. Accordingly, path via 104 can be configured to electrically connect signal path 102 at layer 108f and layer 108a.

  The junction between the path via 104 and the wirings 106b and 106a has a signal path 102 that has a substantially sharp corner (eg, 90 °) that can make a substantially sharp turn when the signal enters and exits the path via 104. Can be included. In the illustrated embodiment, the junction portion of the path via 104 with the wiring 106 a can be referred to as the corner 105 a of the signal path 102, and the junction portion of the path via 104 with the wiring 106 b can be referred to as the corner 105 b of the signal path 102. .

  The side of the layer 108f where the path via 104 contacts the wiring 106a can be referred to as the interface side 111 of the layer 108f. The side of the layer 108f opposite the interface side 111 may be referred to as the interface opposite side 113 of the layer 108f. Similarly, the side of layer 108a where path via 104 contacts wiring 106b may be referred to as interface side 115 of layer 108a. The side of the layer 108a opposite the interface side 115 may be referred to as the interface opposite side 117 of the layer 108a. In order to draw a boundary between different sides of the layer group 108 described above, a dividing line 150 that runs through the center of the route via 104 is used as shown. As described below, the circuit 100 can be configured such that impedance mismatch at the corner 105 is reduced and electrical signal degradation is suppressed.

  One or more of the layers of the circuit 100 can also be configured as a ground plane, and one or more of the ground planes can correspond to the forward current carried by the signal path 102. It may be configured to carry the return current of the signal. The return current is depicted by a solid arrow in FIG. 1A. The terms “forward current” and “return current” do not necessarily correspond to a particular direction of current, but are merely used to indicate that they can propagate in opposite directions relative to each other.

  In the illustrated embodiment, layers 108b, 108d, 108e, and 108g can be configured as ground planes, and can be referred to as ground planes 110a, 110b, 110c, and 110d, respectively. The ground planes 110a, 110b, 110c, and 110d may include any suitable type of conductor that can cover a significant portion of each layer so that current can pass through the ground planes 110a, 110b, 110c, and 110d.

  When a signal passes through the signal path 102 so that the forward current passes through the signal path 102 and the corresponding return current passes through the associated ground plane, the conductors of the signal path 102 and the conductors of the ground plane In between, it can have EM coupling that can affect the EM field associated with the signal. As will be described in more detail below, the conductors associated with the signal path 102 have an EM field associated with the signal at the corner where the via contacts the signal path wiring due to EM coupling between the conductors. It may be configured to allow more TEM mode than with conventional implementations.

  For example, the wiring 106a and the path via 104 can be electromagnetically coupled to the ground plane 110c and the ground plane 110d, respectively. The circuit 100 is configured such that the closer the wiring 106a is to the first corner 105a of the signal path 102, the greater the EM coupling of the wiring 106a with the ground plane 110c may be than the EM coupling of the wiring 106a with the ground plane 110d. Can be done. In these and other embodiments, the ground plane 110d can be configured such that EM coupling between the path via 104 and the ground plane 110d can be reduced. Further, the ground plane 110c has an EM coupling between the ground plane 110c and the path via 104 on the first side 120 of the ground plane 110c opposite to the interface side 111 of the layer 108f. May be configured to be reduced compared to the corresponding EM coupling on the second side 122 of the ground plane 110c corresponding to. Similarly, the ground plane 110c compares the EM coupling between the ground plane 110c and the wiring 106a on the first side 120 of the ground plane 110c with the corresponding EM coupling on the second side 122 of the ground plane 110c. And can be configured to be reduced.

  As another example, the wiring 106b and the path via 104 can also be electromagnetically coupled to the ground plane 110a. In the ground plane 110a, the EM coupling between the ground plane 110a and the path via 104 on the first side 124 of the ground plane 110a opposite to the interface side 115 of the layer 108a corresponds to the interface side 115 of the layer 108a. To be reduced compared to the corresponding EM coupling on the second side 126 of the ground plane 110a. Similarly, ground plane 110a compares the EM coupling between ground plane 110a and wiring 106b on first side 124 of ground plane 110a with the corresponding EM coupling on second side 126 of ground plane 110a. And can be configured to be reduced.

  The above-described configuration can increase the EM field near the first corner 105a inside the first corner 105a more than the EM field near the first corner 105a outside the first corner 105a. Similarly, the above-described configuration can increase the EM field near the second corner 105b inside the second corner 105b more than the EM field near the second corner 105b outside the second corner 105b. As described above, an increase in the EM field inside the corner 105 relative to the EM field outside the corner 105 can suppress impedance discontinuity at the corner, thereby suppressing signal degradation.

  FIG. 1B illustrates an example of a cross-section 112 of the circuit 100 taken along line 114 of FIG. 1A in accordance with at least one embodiment described herein. The thick solid arrow in FIG. 1B indicates the return current of the signal, and the thick dashed arrow indicates the forward current of the signal that can propagate along the signal path 102. The thin arrows in the cross-section 112 indicate the electric field in the EM field that can accompany a signal that can propagate along the signal path 102. There may also be a magnetic field associated with this EM field, which is not explicitly shown in FIG. 1B.

  As indicated by the electric field arrow in the cross section 112, as the wiring 106a approaches the path via 104 and the corner 105a, the EM field between the wiring 106a and the ground plane 110d is reduced or eliminated by the EM coupling operation described above. The EM field between the wiring 106a and the ground plane 110c can be maintained or increased. Further, the above-described EM coupling operation may cause the EM field between the path via 104 and the ground plane 110d to be reduced or eliminated on both sides of the path via 104. Also, the EM field between the path via 104 and the ground plane 110c on the first side 120 of the ground plane 110c (which may be the opposite side of the interface side 111 of the layer 108f) may be reduced or eliminated. Thus, the EM field outside the first corner 105a can be reduced or eliminated and / or the electric field inside the first corner 105a can be increased.

  Further, as shown in cross-section 112 by the electric field arrow, the ground plane 110a is similarly depicted in FIG. 1B so that the EM field outside the second corner 105b is inside the second corner 105b. The EM field can be configured to be reduced. Operation of the EM field as shown may allow the EM field to maintain more TEM modes at the first corner 105a and the second corner 105b. Since most if not all of the respective EM fields can be inside the first and second corners 105a and 105b, the TEM mode can be better maintained. Thus, a dominant, if not all, part of the EM field can be inside the first and second corners 105a and 105b, so that the EM outside the first and second corners 105a and 105b. The difference between the propagation distance of the field and the propagation distance of the EM field inside the first and second corners 105a and 105b results in less interference.

  In contrast, FIG. 1C shows an example of a circuit cross-section 160 similar to circuit 100, except that there is no EM coupling and EM field manipulation as described above. As shown by a comparison of the enclosed portion of the cross-section 160 with the corresponding location in the cross-section 112 of FIG. There may be a propagation distance imbalance between the inside and outside of the corners that causes the EM field to be in TEM mode less than the EM field for FIG. 1B.

  Returning to FIG. 1A, the above-described EM coupling and EM field manipulation may be accomplished by manipulating the size, shape and / or position of the conductors associated with the wiring 106 and / or the ground plane 110. For example, in some embodiments, the ground plane 110d may include a cutout portion 116 that omits electrical conductors associated with the ground plane 110d. The ground plane 110 d may include a ground plane position 118 that is below (eg, directly below) the path via 104 such that the ground plane position 118 may coincide with the position of the path via 104. In some embodiments, the cutout portion 116 may be configured to extend away from the ground plane location 118 on the first side 128 of the ground plane 110d, which may be opposite the interface side 111 of the layer 108f. The extension of the cut-out portion 116 in the direction away from the ground plane position 118 on the first side 128 is, for example, as shown in the comparison between FIGS. 1B and 1C with the ground plane 110d outside the corner 105a. EM coupling (and consequently EM field) with the path via 104 may be reduced.

  In these or other embodiments, the cut-out portion 116 may be configured to extend away from the ground plane location 118 on the second side 130 of the ground plane 110d that may correspond to the interface side 111 of the layer 108f. The cut-out portion 116 extending away from the ground plane position 118 on the second side 130 causes the EM coupling (and consequently EM) between the ground plane 110d and the wiring 106a as the wiring 106a approaches the corner 105a. Field) can be reduced.

  In some embodiments, the cutout portion 116 may be configured in a tapered shape as illustrated in FIG. 1A. Accordingly, in some embodiments, the cut-out portion 116 may be asymmetric and may be wider at the ground plane location 118 at the termination position on the second side 130 where the cut-out portion 116 ends. The taper shape may allow the EM coupling between the wiring 106a and the ground plane 110d to gradually decrease rather than suddenly. The extension of the cut-out portion on the first side 128 of the ground plane 110d is also between the ground plane 110d and the wiring 106a outside the corner 105a, as shown, for example, in a comparison between FIGS. 1B and 1C. EM coupling (and consequently the EM field) can be reduced.

  Further, in some embodiments, the wiring 106a (and consequently the signal path 102) is routed so that the wiring 106a is wider at the junction with the path via 104 at a point away from the path via 104. It can be configured to increase in width as it approaches the via 104 and the corner 105a. The EM coupling (and consequently the EM field) between the wiring 106a and the ground plane 110c can be increased by increasing the width of the wiring 106a and the presence of the cutout portion 116. Increasing the width of the wiring 106a and the cutout portion 116 may increase EM coupling inside the corner 105a relative to EM coupling outside the corner 105a. The width and taper of the cut-out portion 116 on the second side 130 of the ground plane 110d and the varying width of the wiring 106a are such that the characteristic impedance at the widened portion of the wiring 106a is not widened and / or The ground plane 110d may be selected so as to be substantially equal to the characteristic impedance of the wiring 106a in a portion not having the cutout portion 116.

  In some embodiments, the ground plane 110 c can also include a cutout portion 134 that can be an antipad associated with the path via 104. The cut-out portion 134 is more asymmetric on the first side 120 of the ground plane 110c opposite to the interface side 111 of the layer 108f, on the second side 122 of the ground plane 110c, which may correspond to the interface side 111 of the layer 108f. The cutout portion 134 can be asymmetric so that it can be configured as an anti-pad. Cutout portion 134 can help reduce EM coupling near corner 105a outside corner 105a.

  In these or other embodiments, ground plane 110a may include a cutout portion 136 that may be an antipad associated with path via 104, similar to cutout portion 134. The cut-out portion 136 is more asymmetric on the second side 126 of the ground plane 110a that may correspond to the interface side 115 of the layer 108a, on the first side 124 of the ground plane 110a opposite to the interface side 115 of the layer 108a. The cutout portion 136 can be asymmetric so that it can be configured as an anti-pad. The cutout portion 136 can help reduce EM coupling near the second corner 105b outside the second corner 105b.

  The circuit 100 may also include ground vias configured to carry return current between the ground planes 110. In the illustrated embodiment, the circuit 100 can include ground vias 140a and 140b that can be aligned with the path via 104 along the straight line 150 shown in FIG. 1A. The ground vias 140a and 140b may be configured in the traditional configuration of ground vias. Further, in some embodiments, one or more ground vias 138 are each associated with and associated with one of the corners 105 to help increase the EM field inside the corner 105. It can be included inside the associated corner 105 near the area of the circuit 100 where the corner 105 is located. The ground via 138 may allow more of the return current portion to propagate inside the associated corner 105 of each ground via 138 than if only the ground vias 140a and 140b were used. Can be configured. The increased return current from the ground via 138 inside the corner 105 helps to increase the EM field inside the corner 105 compared to the EM field outside the corner 105, thereby reducing signal degradation. Can be suppressed.

  For example, in the illustrated embodiment, the circuit 100 can include a ground via 138a configured to couple the ground plane 110a with the ground plane 110b such that at least a portion of the return current is from the ground plane 110a. It may be possible to pass through the ground via 138a to the ground plane 110b. The ground via 138a may be coupled to the ground plane 110a on the second side 126 of the ground plane 110a as shown in FIG. 1A such that the ground via 138a is substantially inside the corner 105b. Therefore, the return current passing through the ground via 138a and the forward current passing through the path via 104 generate an EM field between the path via 104 between the ground planes 110a and 110b and the ground via 138a, Thereby, the EM field inside the corner 105b can be increased compared to the outside of the corner 105b. FIG. 1B shows an example of an electric field between the path via 104 and the ground via 138a.

  As another example, in the illustrated embodiment, the circuit 100 can include a ground via 138b configured to couple the ground plane 110b with the ground plane 110c so that at least a portion of the return current is at ground. It may be possible to pass through the ground via 138b from the plane 110b to the ground plane 110c. The ground via 138b may be coupled to the ground plane 110c on the second side 122 of the ground plane 110c as shown in FIG. 1A such that the ground via 138b is substantially inside the corner 105a. Therefore, the return current passing through the ground via 138b and the forward current passing through the path via 104 generate an EM field between the path via 104 between the ground planes 110b and 110c and the ground via 138b, Thereby, the EM field inside the corner 105a can be increased compared to the outside of the corner 105a. FIG. 1B shows an example of an electric field between the path via 104 and the ground via 138b.

  Also, in some embodiments, the circuit 100 can include ground vias 138c, 138d, 138e, and 138f that can be configured to couple the ground plane 110c with the ground plane 110d so that the return current is at ground. It may be possible to pass through the ground vias 138c-138f from the plane 110c to the ground plane 110d. As shown in FIG. 1A, the ground vias 138c-138f can be coupled to the ground plane 110c at the second side 122 of the ground plane 110c and can be coupled to the ground plane 110d at the second side 130 of the ground plane 110d. . Accordingly, the ground vias 138c-138f can be made to be inside the corner 105a near the corner 105a, so that a corresponding EM field can be generated inside the corner 105a.

  The circuit 100 can thus be configured as described above so that impedance discontinuities and corresponding signal degradation associated with signals passing through the vias can be suppressed. Changes may be made to the circuit 100 without departing from the scope of the present disclosure. For example, the specific layout and configuration of the circuit 100 is merely used as an example. The number and location of vias (paths or grounds) can vary depending on the specific application. Also, the number of circuit layers varies, and any layer may be connected by vias. Also, the circuit need not necessarily implement all of the EM field manipulation techniques disclosed herein.

  FIG. 2 illustrates an example configuration of a circuit 200 configured to manipulate the EM field for differential mode of differential signals in accordance with at least one embodiment disclosed herein. The circuit 200 may be a layered circuit, such as a printed circuit board (PCB) or an integrated circuit (IC), or an IC package that may include two or more layers. The layers of the circuit 200 can be stacked one above the other. In the illustrated embodiment, a top view of each of layers 208a-208h of circuit 200 is depicted, similar to a top view of layers 108a-108h of circuit 100 in FIG. 1A. This number of layers of circuit 200 is merely an example, and a circuit configured according to the present disclosure may have any number of applicable layers.

  Circuit 200 may include a signal path 202 and a signal path 203 that may be configured to carry current. In the illustrated embodiment, the signal path 202 can be configured to carry a forward current for the first signal, and the signal path 203 is configured to carry a return current for the second signal. be able to. The forward current for the first current may be referred to as the “first signal forward current” and the return current for the second current may be referred to as the “second signal return current”. In the illustrated embodiment, signal path 202 may include traces 206b associated with layer 208a that may be in and / or supported by layer 208a. Signal path 202 may also include wiring 206a associated with layer 208f that may be in and / or supported by layer 208f. Similarly, signal path 203 may include wiring 209b associated with layer 208a that may be in and / or supported by layer 208a. Signal path 203 may also include wiring 209a associated with layer 208f that may be in and / or supported by layer 208f. The wirings 206a, 206b, 209a and 209b may comprise any suitable conductor that can carry current.

  The signal path 202 may also include a path via 204 coupled to the layer 208a wiring 206b and the layer 208f wiring 206a. The path via 204 may comprise any suitable conductor that allows the first signal forward current to pass through the path via 204 between the wirings 206b and 206a. Accordingly, the path via 204 can be configured to electrically connect the signal path 202 at layer 208f and layer 208a. Similarly, signal path 203 may also include a path via 207 coupled to layer 208a wiring 209b and layer 208f wiring 209a. The path via 207 may be made of any suitable conductor that allows the second signal return current to pass through the path via 207 between the wirings 209a and 209b. Accordingly, the path via 207 can be configured to electrically connect the signal path 203 at layer 208f and layer 208a.

  The signal path 202 may include a corner 205a where the path via 204 can contact the wiring 206a. Further, the signal path 202 may include a corner 205b where the path via 204 can contact the wiring 206b. Similarly, the signal path 203 may include a corner 201a where the path via 207 can contact the wiring 209a. Further, the signal path 203 may include a corner 201b where the path via 207 can contact the wiring 209b.

  The side of the layer 208f where the path via 204 contacts the wiring 206a and the path via 207 contacts the wiring 209a can be referred to as the interface side 211 of the layer 208f. The side of the layer 208 f opposite the interface side 211 may be referred to as the interface opposite side 213 of the layer 208 f. Similarly, the side of the layer 208a where the path via 204 contacts the wiring 206b and the path via 207 contacts the wiring 209b can be referred to as the interface side 215 of the layer 208a. The side of layer 208a opposite the interface side 215 may be referred to as the interface opposite side 217 of layer 208a. In order to draw the boundary between the different sides of the layer group 208 described above, a dividing line 250 running through the center of the path vias 204 and 207 is used as shown. As will be described later, the circuit 200 can be configured such that differential mode impedance mismatch at corners 205 and 201 is reduced and degradation of differential mode differential signals is suppressed.

  One or more of the layers of the circuit 200 can also be configured as a ground plane, one or more of the ground planes corresponding to the first signal forward current carried by the signal path 202. It may be configured to carry a return current of a first signal that may be. Also, one or more of the ground planes may be configured to carry a second signal forward current that may correspond to a second signal return current carried by the signal path 203. The return current for the first signal may be referred to as “first signal return current” and the forward current for the second signal may be referred to as “second signal forward current”.

  In the illustrated embodiment, layers 208b, 208d, 208e, and 208g can be configured as ground planes and can be referred to as ground planes 210a, 210b, 210c, and 210d, respectively. The ground planes 210a, 210b, 210c, and 210d may include any suitable type of conductor that can cover a substantial portion of each layer so that current can pass through the ground planes 210a, 210b, 210c, and 210d.

  Circuit 200 is similar to that described above with respect to circuit 100 and FIG. 1, with the EM field near the corners of circuit 200 inside the corners (eg, corners 205a and 205b and corners 201a and 201b) outside the corners. It can be configured to increase with respect to the EM field near the corners. The described EM field operations are performed by manipulating the size, shape and / or position of the conductors associated with the wirings 206, 209 and / or the ground plane 210 in the same manner as described above with respect to the circuit 100. Can be achieved.

  For example, in some embodiments, the ground plane 210d can include a cutout portion 216 from which conductors associated with the ground plane 210d are omitted. The ground plane 210d may include ground plane positions 218a and 218b below the path vias 204 and 207, respectively, such that the ground plane positions 218a and 218b can coincide with the positions of the path vias 204 and 207, respectively. In some embodiments, the cut-out portion 216 is configured to extend away from the ground plane locations 218a and 218b on the first side 228 of the ground plane 210d, which may be opposite the interface side 211 of the layer 208f. obtain. The extension of cutout 216 away from ground plane locations 218a and 218b on first side 228 results in EM coupling between ground plane 210d and path vias 204 and 207 outside corners 205a and 201a. And as a result, the EM field) can be reduced.

  In these or other embodiments, the cutout portion 216 is configured to extend away from the ground plane locations 218a and 218b on the second side 230 of the ground plane 210d that may correspond to the interface side 211 of the layer 208f. obtain. The extension of the cut-out portion 216 in the direction away from the ground plane positions 218a and 218b on the second side 230 is such that the lines 206a and 209a approach the corners 205a and 201a, respectively, as the ground plane 210d and the lines 206a and 209a EM coupling between (and consequently the EM field) can be reduced. In some embodiments, the cut-out portion 216 may be configured with a tapered shape as illustrated in FIG. Thus, in some embodiments, the cut-out portion 216 may be asymmetric and may be wider at the ground plane location 218 at the end position of the second side 230 where the cut-out portion 216 ends.

  Further, in some embodiments, the wirings 206a and 209a may be configured to approach each other near the corners 205a and 201a as illustrated in FIG. In some embodiments, when going from the far right side of the interface side 211 toward the corners 205a and 201a, the wirings 206a and 209a may also be configured to become increasingly thinner as they approach each other. Approaching and / or thinning the wirings 206a and 209a can increase EM coupling between the wirings 206a and 209a, thereby increasing the EM field between the wirings 206a and 209a.

  The wirings 206a and 209a can also be configured to deviate between the corners 205a and 201a and the area where the wirings 206a and 209a approach as illustrated in FIG. In some embodiments, the wirings 206a and 209a may be configured to increase in width as they approach the path vias 204 and 207 as they deviate from each other. Due to the configuration of the wirings 206a and 209a and the cutout portion 216 of the ground plane 210d, the EM fields associated with the first signal forward current and the second signal return current are concentrated inside the corners 205a and 201a, respectively. Can be done. When the wirings 206a and 209a approach and deviate, the wirings 206a and 209a are widened and tapered, and the distance between the wirings 206a and 209b is such that the differential mode characteristic impedance of the wirings 206a and 209a is wide. Can be selected such that it can be substantially equivalent to that of the wirings 206a and 209a where they are not tapered, tapered, approximated or deflected.

  In some embodiments, the ground plane 210 c can also include a cutout portion 234 that can be an antipad associated with the path vias 204 and 207. The cutout portion 234 can be asymmetric so that the cutout portion 234 can be configured as a larger asymmetric anti-pad on the second side 222 of the ground plane 210c on the first side 220 of the ground plane 210c. As shown in FIG. 2, the first side 220 may be opposite to the interface side 211 of the layer 208f and the second side 222 may correspond to the interface side 211 of the layer 208f. Accordingly, the cutout portion 234 can reduce EM coupling and EM fields near the corners 205a and 201a outside the corners 205a and 201a.

  In these or other embodiments, ground plane 210a may include a cutout portion 236 that may be an antipad associated with path vias 204 and 207, similar to a cutout portion 234 that is an antipad associated with path vias 204 and 207. . The cutout portion 236 can be asymmetric so that the cutout portion 236 can be configured as a larger asymmetric anti-pad on the second side 226 of the ground plane 210a on the first side 224 of the ground plane 210a. As shown in FIG. 2, the first side 224 may be the opposite side of the interface side 215 of the layer 208a, and the second side 226 may correspond to the interface side 215 of the layer 208a. Thus, the cutout portion 236 can reduce EM coupling and EM fields near the corners 205b and 201b outside the corners 205b and 201b.

  In some embodiments, the circuit 200 may include ground vias configured to carry a first signal return current and a second signal forward current between the ground planes 210. In the illustrated embodiment, circuit 200 may include ground vias 240a and 240b that may be aligned with path vias 204 and 207 as shown in FIG. The ground vias 240a and 240b may be configured in a traditional configuration of ground vias and may be similar to the ground vias 140a and 140b of FIG. 1A. Further, in some embodiments, one or more ground vias 238 are provided at the corners 205a, 205b, 201a, and / or 201b to increase the EM field inside the corners 205a, 205b, 201a, and / or 201b. Each of the associated corners may be included within each associated corner near the area of the circuit 200 that is associated with one or more of the associated corners. As compared with the case where only the ground vias 240a and 240b are used, the ground via 238 has a larger portion of the first signal return current and the second signal forward current associated with each of the ground vias 238. Can be configured to propagate inside the corners.

  For example, in the illustrated embodiment, the circuit 200 may include ground vias 238a and 238b configured similarly to the ground vias 138a and 138b of FIG. 1A. Thus, the ground via 238a can increase the EM field inside the corners 201b and 205b associated with the corners 201b and 205b. Similarly, the ground via 238b can be associated with the corners 201a and 205a to increase the EM field inside the corners 201a and 205a.

  The circuit 200 may thus be configured as described above to suppress differential mode impedance discontinuities and corresponding signal degradation associated with differential mode differential signals passing through vias. Changes may be made to the circuit 200 without departing from the scope of the present disclosure. For example, the specific layout and configuration of the circuit 200 is merely used as an example. The number and location of vias (paths or grounds) can vary depending on the specific application. Also, the number of circuit layers varies, and any layer may be connected by vias. Also, the circuit need not necessarily implement all of the EM field manipulation techniques disclosed herein.

  FIG. 3 illustrates an example configuration of a circuit 300 configured to manipulate an EM field to suppress electrical signal degradation related to a common mode of differential signals in accordance with at least one embodiment disclosed herein. ing. The circuit 300 may be a layered circuit, such as a printed circuit board (PCB) or an integrated circuit (IC), or an IC package that may include two or more layers. The layers of the circuit 300 can be stacked one above the other. In the illustrated embodiment, a top view of layers 308a-308h of circuit 300 is depicted, similar to the depiction of layers 108a-108h of circuit 100 in FIG. 1A. This number of layers of circuit 300 is merely an example, and a circuit configured in accordance with the present disclosure may have any number of applicable layers.

  The circuit 300 may include a signal path 302 and a signal path 303 that may be configured to carry current. In the illustrated embodiment, the signal path 302 can be configured to carry a forward current for the first signal, and the signal path 303 is configured to carry a forward current for the second signal. You can do it. The forward current for the first current may be referred to as the “first signal forward current” and the forward current for the second current may be referred to as the “second signal forward current”.

  The signal path 302 can be similar to the signal path 202 of FIG. 2 and can be similar to the lines 206a and 206b, path via 204, corner 205a and corner 205b of FIG. 2, wiring 306a and 306b, path via 304, A corner 305a and a corner 305b may be included. The signal path 303 can be the same as the signal path 203 in FIG. 2, and the wirings 309a and 309b, the path via 307, which can be the same as the wirings 209a and 209b, the path via 207, the corner 201a and the corner 201b in FIG. A corner 301a and a corner 301b may be included. In some embodiments, the wirings 306a and 309a may differ from the wirings 206a and 209a in that the wirings 306a and 309a may not be configured to approach and deviate like the wirings 206a and 209a. The circuit 300 may also include ground planes 310a-310d that may be configured to carry the return currents of the first and second signals.

  Circuit 300 is similar to that described above with respect to circuit 200 of FIG. 2 and / or circuit 100 of FIG. 1A, near the corners of circuit 300 (eg, corners 305a and 305b, and corners 301a and 301b) inside the corners. The EM field can be configured to increase relative to the EM field near the corner outside the corner. The described EM field manipulation can be accomplished by manipulating the size, shape and / or position of the conductors associated with the wires 306 and 309 and / or the ground plane 310.

  For example, the ground plane 310a can include a cutout portion 336, the ground plane 310c can include a cutout portion 334, the ground plane 310d can include a cutout portion 316, and the cutout portions 336, 334, and 316 can be Each may be configured in the same manner as cutout portions 236, 234, and 216 of FIG. Accordingly, the cutout portions 336, 334, and 316 provide an EM field near the corners of the circuit 300 (eg, corners 305a and 305b and corners 301a and 301b) inside the corners, and an EM field near the corners outside the corners. Can be configured to increase with respect to.

  In addition, the wirings 306a and 309a may not be configured to approach each other in some embodiments, but may be configured to become wider when approaching the corners 305a and 301a, respectively. Thus, by making the wirings 306a and 309a wide and the cut-out portion 316 of the ground plane 310d, the EM fields associated with the first signal forward current and the second signal forward current become corners 305a and 301a, respectively. Can be concentrated inside.

  Circuit 300 may also include ground vias 340a and 340b configured similarly to ground vias 140a and 140b of FIG. 1A and ground vias 240a and 240b of FIG. 2, respectively. Further, the circuit 300 may include ground vias 338a-338f that may be configured similar to the ground vias 138a-138f of FIG. 1A. Accordingly, the ground vias 338a-338f can direct the first signal return current and the second signal return current to the inside of the associated corners 305 and 301, respectively, so that the first signal return current and the first signal return current can be directed. The EM field between the forward current and the EM field between the second signal return current and the second signal forward current can be increased inside the corners 305 and 301.

  The circuit 300 can thus be configured as described and illustrated to suppress common mode impedance discontinuities and corresponding signal degradation associated with common mode differential signals passing through vias. Changes may be made to the circuit 300 without departing from the scope of the present disclosure. For example, the specific layout and configuration of the circuit 300 is merely used as an example. The number and location of vias (paths or grounds) can vary depending on the specific application. Also, the number of circuit layers varies, and any layer may be connected by vias. Also, the circuit need not necessarily implement all of the EM field manipulation techniques disclosed herein.

  FIG. 4 is a flowchart of an example method 400 for suppressing electrical signal degradation in a circuit, organized in accordance with at least one embodiment disclosed herein. The method 400 may be performed in some embodiments by forming or fabricating a layered circuit according to the principles described above with respect to the circuits 100, 200, and 300 of FIGS. 1A, 2 and 3, respectively. Although illustrated as individual blocks, various blocks may be divided into further blocks, combined into fewer blocks, or eliminated, depending on the desired implementation.

  The method 400 begins, and at block 402, a first layer of circuitry may be formed. The first layer may be formed to include a signal path configured to carry a forward current of the electrical signal. At block 404, a second layer of circuitry may be formed. The second layer can also be formed to include a signal path. At block 406, path vias configured to connect the first layer signal path with the second layer signal path may be formed. Path vias may have signal path via locations at the first and second layer locations. In some embodiments, the signal path may be configured according to any one of the signal paths 102, 202, 203, 302, and 303 described above.

  At block 408, a ground plane associated with the first layer and the second layer may be formed. The ground plane can be configured to carry the return current of the electrical signal and can have a ground plane position that matches the signal path via position. At block 410, an asymmetric cutout associated with the ground plane may be formed. The asymmetric cut-out is a ground plane on the first side of the ground plane opposite to the second side of the ground plane corresponding to the side of the first layer where the path via contacts the signal path of the first layer. It may be formed to extend in a direction away from the position. For example, the asymmetric cut-out portion may be any one of the cut-out portions 116, 134, 136, 216, 234, 236, 316, 334, or 336 of the circuits 100, 200, and 300 described above.

  By configuring the circuit according to method 400, the EM field associated with the circuit can be manipulated as described above with respect to FIGS. 1A, 1B, 2 and 3, thereby reducing impedance discontinuities and associated signal degradation. obtain. Changes may be made to the method 400 without departing from the scope of the present disclosure. For example, the order of the steps for these blocks may be performed in a different order than presented. In some embodiments, the method 400 may also include steps relating to the formation and configuration of ground vias, such as the ground vias 138a-138f, 238a, 238b, and 338a-338f described above.

  All examples and conditional words contained herein are intended for educational purposes to assist the reader in understanding the invention and the concepts provided by the inventors of the present application to advance the technology. And should not be construed as limiting to the examples and conditions so specifically described. Although embodiments according to the present disclosure have been described in detail, it should be understood that various changes, substitutions and modifications have been made to these embodiments without departing from the spirit and scope of the present invention. obtain.

Regarding the above description, the following additional notes are disclosed.
(Supplementary note 1) A circuit configured to suppress electrical signal degradation,
A signal path configured to carry a forward current of the electrical signal;
A first layer including the signal path;
A second layer including the signal path;
A path via having a signal path via location and configured to connect the signal path of the first layer to the signal path of the second layer;
A ground plane associated with the first layer and configured to carry a return current of the electrical signal, the ground plane having a ground plane position corresponding to the signal path via position; The plane includes an asymmetric cutout portion extending in a direction away from the ground plane position on the first side of the ground plane, and the first side of the ground plane includes the path vias in the first layer. A ground plane opposite the second side of the ground plane corresponding to the side of the first layer in contact with the signal path of
Circuit with.
(Supplementary note 2) The circuit according to supplementary note 1, wherein the signal path includes a wide portion that becomes wider on the first layer as the signal path via position is approached.
(Appendix 3) Increasing the width of the signal path means that the characteristic impedance of the signal path is made substantially the same in the wide portion as in a portion where the width is not widened. Circuit.
(Supplementary Note 4) The asymmetric cut-out portion is an asymmetric antipad associated with the path via, and the asymmetric antipad is the second side of the ground plane at the first side of the ground plane. The circuit of claim 1, wherein the circuit is configured to be larger than.
(Supplementary Note 5) The asymmetric cutout portion extends in a direction away from the ground plane position on the second side of the ground plane, and ends at a terminal position on the second side of the ground plane. The circuit according to claim 1, wherein the asymmetric cutout portion is wider at the ground plane position than at the end position.
(Supplementary Note 6) The asymmetric cutout portion is tapered on the second side of the ground plane such that the asymmetric cutout portion is wider at the end position at the ground plane position. The circuit according to appendix 5.
(Supplementary note 7) The circuit according to supplementary note 6, wherein the signal path is widened on the first layer so as to correspond to the tapered shape of the asymmetric cutout portion.
(Supplementary Note 8) The ground plane is a first ground plane, and the circuit further includes:
A second ground plane;
A ground via coupled to the second side of the first ground plane, the ground via being located inside a corner of the signal path where the signal path contacts the path via. The ground via connects the first ground plane with the second ground plane so that the return current passes through the ground via between the first ground plane and the second ground plane. The circuit according to claim 1, further comprising a ground via.
(Supplementary note 9) The electrical signal is a differential signal including a first signal and a second signal, and the signal path is configured to carry the first signal. And a second signal path configured to carry the second signal so that the first signal path and the second signal path approach and deviate. The circuit according to appendix 1, wherein the circuit is configured.
(Supplementary Note 10) At least one of the first signal path and the second signal path is configured to be narrow when the first signal path and the second signal path approach each other. The circuit according to appendix 9.
(Supplementary Note 11) A method for suppressing electrical signal deterioration,
Forming a first layer including a signal path configured to carry a forward current of an electrical signal;
Forming a second layer including the signal path;
Forming a path via having a signal path via location and configured to connect the signal path of the first layer with the signal path of the second layer;
Forming a ground plane associated with the first layer and configured to carry a return current of the electrical signal, the ground plane having a ground plane position corresponding to the signal path via position; Forming,
Forming an asymmetric cutout portion associated with the ground plane, wherein the asymmetric cutout portion is formed to extend in a direction away from the ground plane position on a first side of the ground plane, The first side of the ground plane is the opposite side of the second side of the ground plane corresponding to the side of the first layer where the path via contacts the signal path of the first layer; Forming,
Having a method.
(Additional remark 12) The said signal path | route is further formed so that the said signal path may include the wide part which becomes wide on the said 1st layer as it approaches the said signal path | route via position, The additional remark 11 description Method.
(Supplementary Note 13) The signal path may be widened so that the characteristic impedance of the signal path is substantially the same in the wide portion as in the non-wide portion. The method according to appendix 12, further comprising: forming.
(Supplementary note 14) The method further includes configuring the asymmetric cut-out portion as an asymmetric antipad associated with the path via, the asymmetric antipad being the first side of the ground plane. 12. The method of claim 11, wherein the method is configured to be larger on the second side of the ground plane.
(Supplementary note 15) The method further includes the asymmetric cutout extending in a direction away from the ground plane position on the second side of the ground plane, and terminating on the second side of the ground plane. 12. The method of claim 11, comprising configuring the asymmetric cutout portion to end in position, wherein the asymmetric cutout portion is made wider at the ground plane location at the termination location.
(Supplementary Note 16) The asymmetric cutout portion is tapered on the second side of the ground plane so that the asymmetric cutout portion is wider at the end position at the ground plane position. The method of claim 15, further comprising constructing an asymmetric cutout portion.
(Supplementary note 17) The supplementary note 16, further comprising: configuring the signal path such that the signal path is widened on the first layer so as to correspond to the tapered shape of the asymmetric cutout portion. the method of.
(Supplementary Note 18) The ground plane is a first ground plane, and the method further includes:
Forming a second ground plane;
Forming a ground via coupled to the second side of the first ground plane, wherein the ground via is inside a corner of the signal path where the signal path contacts the path via. To be positioned, to form,
The ground via is connected so that the first ground plane is connected to the second ground plane so that the return current passes through the ground via between the first ground plane and the second ground plane. The method of claim 11 comprising: configuring.
(Supplementary note 19) The electrical signal is a differential signal including a first signal and a second signal, and the method further includes:
The signal path as a differential signal path including a first signal path configured to carry the first signal and a second signal path configured to carry the second signal Configuring
12. The method of claim 11, comprising configuring the first signal path and the second signal path to approach and deviate.
(Supplementary note 20) configuring at least one of the first signal path and the second signal path so that the width becomes narrower when the first signal path and the second signal path approach each other; The method according to appendix 19, further comprising:

100, 200, 300 Circuit 102, 202, 203, 302, 303 Signal path 104, 204, 207, 304, 307 Path via 105, 201, 205, 301, 305 Corner 106, 206, 209, 306, 309 Wiring 108, 208, 308 Layer 110, 210, 310 Ground plane 111, 115, 211, 215, 311, 315 Interface (contact) side 116, 134, 136, 216, 234, 236, 316, 334, 336 Cutout portion 118, 218, 318 Ground plane location 120, 124, 128, 220, 224, 228, 320, 324, 328 Ground plane first side 122, 126, 130, 222, 226, 230, 322, 326, 330 Ground plane second Side of Corresponding to the interface side side)
138, 140, 238, 240, 338, 340 Ground via

Claims (11)

A circuit configured to suppress electrical signal degradation,
A signal path configured to carry a forward current of the electrical signal;
A first layer including the signal path;
A second layer including the signal path;
A path via having a signal path via location and configured to connect the signal path of the first layer to the signal path of the second layer;
A ground plane associated with the first layer and configured to carry a return current of the electrical signal, the ground plane having a ground plane position corresponding to the signal path via position; The plane includes an asymmetric cutout portion extending in a direction away from the ground plane position on the first side of the ground plane, and the first side of the ground plane includes the path vias in the first layer. A ground plane opposite the second side of the ground plane corresponding to the side of the first layer in contact with the signal path of
Circuit with.   The circuit of claim 1, wherein the signal path includes a wide portion that increases in width on the first layer as it approaches the signal path via location.   The circuit according to claim 2, wherein increasing the width of the signal path is such that the characteristic impedance of the signal path is substantially the same in the wide portion as in the non-wide portion.   The asymmetric cutout is an asymmetric antipad associated with the path via, the asymmetric antipad being larger on the first side of the ground plane and on the second side of the ground plane. The circuit according to claim 1, which is configured as follows.   The asymmetric cutout portion extends in a direction away from the ground plane position on the second side of the ground plane and ends at a termination position on the second side of the ground plane; The circuit of claim 1, wherein the cut-out portion is wider at the ground plane position than at the end position.   The asymmetric cut-out portion is tapered on the second side of the ground plane, such that the asymmetric cut-out portion is wider at the ground plane position at the end position. The circuit described.   The circuit of claim 6, wherein the signal path is widened on the first layer to correspond to the tapered shape of the asymmetric cutout. The ground plane is a first ground plane, and the circuit further includes:
A second ground plane;
A ground via coupled to the second side of the first ground plane, the ground via being located inside a corner of the signal path where the signal path contacts the path via. The ground via connects the first ground plane with the second ground plane so that the return current passes through the ground via between the first ground plane and the second ground plane. The circuit of claim 1, comprising: a ground via configured to:   The electrical signal is a differential signal including a first signal and a second signal, and the signal path is a first signal path configured to carry the first signal; A differential signal path including a second signal path configured to carry two signals, the first signal path and the second signal path being configured to approach and deviate The circuit according to claim 1.   The at least one of the first signal path and the second signal path is configured to be narrow when the first signal path and the second signal path approach each other. Circuit described in. A method of suppressing electrical signal degradation,
Forming a first layer including a signal path configured to carry a forward current of an electrical signal;
Forming a second layer including the signal path;
Forming a path via having a signal path via location and configured to connect the signal path of the first layer with the signal path of the second layer;
Forming a ground plane associated with the first layer and configured to carry a return current of the electrical signal, the ground plane having a ground plane position corresponding to the signal path via position; Forming,
Forming an asymmetric cutout portion associated with the ground plane, wherein the asymmetric cutout portion is formed to extend in a direction away from the ground plane position on a first side of the ground plane, The first side of the ground plane is the opposite side of the second side of the ground plane corresponding to the side of the first layer where the path via contacts the signal path of the first layer; Forming,
Having a method.

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