JP2015162115A - Information processing device and information processing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an information processing device and information processing method capable of achieving high speed and security.SOLUTION: An information processing device includes: a memory that stores a first program composed of a plurality of instructions and a second program composed of a plurality of instructions; a processor that has a pipeline processing function for starting processing of one or more instructions of the second program before processing of one or more instructions of the first program ends; and a random number generator that generates a random number. The processor checks the random number generated by the random number generator before or after the processing of the one or more instructions of the second program is started; and if the random number is a predetermined value, performs the processing of the one or more instructions of the first program.

Description

  The present invention relates to a technical field such as an apparatus in which an OS requiring security and a OS requiring high speed can coexist on one processor.

  In recent years, a TEE (Trusted Execution Environment) is known as an OS (Operating System) that performs authentication processing, encryption processing, and the like on a processor installed in a mobile terminal such as a mobile phone or a smartphone. TEE requires security. On the other hand, traditionally, as attacks against cryptographic processing, timing attacks that estimate secret information by analyzing processing time (Timing Attack) and power analysis attacks that estimate secret information by observing power consumption during cryptographic processing ( SCA (Side Channel Analysis) such as Power Analysis Attack) is known. As a countermeasure against such an attack, Patent Document 1 discloses a technique for generating a modulated clock signal according to a signal based on a random number, determining data processing timing based on the modulated clock signal, and executing data processing. Has been.

  In the TEE described above, security is maintained by executing dummy processing (for example, NOP processing that does nothing) in accordance with a random number generated by a random number generator (random number generator). As an OS requiring high speed (that is, high speed operation) compared to such TEE, RIE (Rich Execution Environment) such as iOS (registered trademark) and ANDROID (registered trademark) is known.

JP 2005-45752 A

  By the way, for example, TEE and REE coexist on one CPU provided in a portable terminal, and pipeline processing (also referred to as parallel processing) for starting processing of one instruction of REE before the processing of one instruction of TEE is completed. ) Is required to achieve high speed and security.

  It is an object of the present invention to provide an information processing apparatus and an information processing method capable of realizing high speed and security.

  In order to solve the above-mentioned problem, the invention described in claim 1 is directed to a memory for storing a first program composed of a plurality of instructions and a second program composed of a plurality of instructions, A processor having a pipeline processing function for starting processing of one or more instructions of the second program before completion of processing of one or more instructions of one program, and a random number generator for generating random numbers An information processing apparatus comprising: the processor confirms a random number generated by the random number generator before or after starting processing of one or more instructions of the second program, and the random number is a predetermined value In this case, one or more instructions of the first program are processed.

  According to a second aspect of the present invention, in the information processing apparatus according to the first aspect, the processor includes a first program counter that stores an address of the memory that stores an instruction of the first program, and the first program counter. A second program counter for storing an address of the memory for storing instructions of the second program, and generated by the random number generator immediately before reading the instruction at the address indicated by the second program counter from the memory If the random number is a predetermined value and the random number is a predetermined value, the instruction at the address indicated by the first program counter is read, interpreted and executed instead of the instruction at the address indicated by the second program counter. It is characterized by performing.

  According to a third aspect of the present invention, in the information processing apparatus according to the first or second aspect, the first program is an operating system that requires high-speed processing, and the second program is processing security. It is an operating system that requires high performance.

  According to a fourth aspect of the present invention, there is provided a memory for storing a first program composed of a plurality of instructions and a second program composed of a plurality of instructions, and one or more of the first programs Information performed by an information processing apparatus including a processor having a pipeline processing function for starting processing of one or more instructions of the second program before completion of instruction processing and a random number generator for generating random numbers A processing method, wherein the processor confirms a random number generated by the random number generator before or after starting processing of one or more instructions of the second program, and the random number is a predetermined value. Determining whether or not the processor determines that the confirmed random number is a predetermined value, processing one or more instructions of the first program; Characterized in that it comprises a.

  According to the present invention, the processor checks the random number generated by the random number generator before starting the processing of one instruction of the second program, and if the random number is a predetermined value, the processor Since it is configured to process one instruction, high speed and security can be realized.

It is a figure showing an example of outline composition of communications system S concerning this embodiment. (A) is a block diagram which shows the example of a schematic structure of the portable terminal 1 which concerns on this embodiment, (B) is a figure which shows the example of a schematic structure of CPU, (C) is performed by CPU. It is a figure showing an example of outline composition of software. (A) is a figure which shows an example of a normal pipeline process, (B) is a figure which shows an example of the pipeline process in the case of confirming a random number.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The embodiment described below is an embodiment when the present invention is applied to a communication system.

  First, with reference to FIG. 1 etc., the structure and functional outline | summary of the communication system S which concern on this embodiment are demonstrated.

  FIG. 1 is a diagram illustrating a schematic configuration example of a communication system S according to the present embodiment. As shown in FIG. 1, the communication system S includes a mobile terminal 1, a payment processing terminal 2, a payment processing host 3, an information providing server 4, and the like. The information providing server 4 is connected to a communication network NW configured by the Internet. The mobile terminal 1 can access the information providing server 4 via a wireless communication line (for example, a 3G (3rd Generation) line or a Wi-Fi (Wireless Fidelity) line) and the communication network NW to acquire information. Yes. The payment processing terminal 2 is installed in a store, for example, and can be connected to the payment processing host 3 via a dedicated line. Further, the payment processing terminal 2 performs wireless communication (for example, NFC (Near Field Communication)) with the portable terminal 1 by radio waves emitted by a reader (for example, an IC card reader / writer) connected to the payment processing terminal 2. It is possible to perform transaction settlement processing while performing non-contact communication) defined in the standard. Such payment processing methods include an online payment method and an offline payment method. In the online payment method, the payment processing terminal 2 connects to the payment processing host 3 online to perform the payment processing. In the offline payment method, the payment processing terminal 2 performs payment processing without connecting to the payment processing host 3.

  The mobile terminal 1 is equipped with a SIM card 18 (small IC card) and a CLF (Contactless Front End) 19. The mobile terminal 1 is an example of an information processing apparatus of the present invention. For example, a mobile phone or a smartphone can be applied to the mobile terminal 1. The SIM card 18 is one of UICCs (Universal Integrated Circuit Cards). For example, the SIM card 18 is equipped with a contact IC chip whose function is expanded based on a conventional SIM (Subscriber Identity Module). Although not shown, the SIM card 18 has eight terminals of known C1 to C8. The CLF 19 is a non-contact type IC chip (for example, an NFC module) for wireless communication (for example, non-contact communication defined by the NFC standard) with a reader connected to the payment processing terminal 2 by radio waves. An antenna for performing the communication in the field of non-contact communication is connected to the CLF 19. The CLF 19 can be operated by the OS of the mobile terminal 1.

  FIG. 2A is a block diagram illustrating a schematic configuration example of the mobile terminal 1 according to the present embodiment. As shown in FIG. 2A, the mobile terminal 1 includes a processing unit 11, a storage unit 12, a wireless communication unit 13, a random number generator 14, an input unit 15, an IC card protocol processing unit 16, an IC card connector 16a, and the like. These components are connected to each other via a bus 17.

  The processing unit 11 is configured by a CPU (Central Processing Unit) or the like. The CPU is an example of a processor in the present invention. The storage unit 12 includes, for example, a RAM, a ROM, and a nonvolatile memory (for example, a flash memory). The ROM or nonvolatile memory in the storage unit 12 stores an OS (Operating System), an API (Application Program Interface), application software (software configured from an application program language), and the like. The API is an interface for using the function of the OS from the application software. Application software (also simply referred to as “application”) is a program that can be downloaded from a predetermined server, for example. The application software includes an application program responsible for an instruction input function and a display function from a user, an application program responsible for a communication function via the wireless communication unit 13, and an application program responsible for data communication with the CLF 19 at the time of payment processing by the payment processing terminal 2. Is included.

  The OS includes TEE and REE. That is, in this embodiment, TEE and REE are configured to coexist on one CPU. Here, the REE program is an example of the first program in the present invention, and high-speed processing is required. On the other hand, the TEE program is an example of the second program in the present invention, and processing security is required. The CPU has a pipeline processing function (for example, configured by a logic circuit) that starts processing of one or more instructions of the TEE program before the end of processing of one or more instructions of the REE program.

  FIG. 2B is a diagram showing a schematic configuration example of the CPU and a program example of REE and TEE stored in the nonvolatile memory. FIG. 2C is a schematic configuration example of software executed by the CPU. FIG. As shown in FIG. 2B, the CPU includes a program counter 111 (first program counter), a program counter 112 (second program counter), an instruction processing unit 113 having an instruction register, and the like. Here, the program counter (for REE) 111 stores an address of a memory (RAM, ROM, or non-volatile memory) that stores a REE program instruction (hereinafter referred to as a REE instruction). The program counter (for TEE) 112 stores the address of the memory for storing TEE program instructions (hereinafter referred to as TEE instructions). The program counter 111 and the program counter 112 are registers each having a predetermined bit length, and after one or more instructions are executed in order to sequentially execute instructions of the OS from the top address, an instruction to be executed next is stored. There is a role to indicate the address that is being used. The instruction processing unit 113 performs processing such as reading (fetching) an instruction indicated by the program counter 111 or the program counter 112 from the memory, interpretation (decoding), execution, and writing of an execution result. The instruction processing unit 113 uses the pipeline processing function to process one or more instructions in the TEE before the end of processing of one or more instructions in the REE (that is, in the middle of the instruction cycle (fetch cycle) related to the instruction). Is supposed to start. Further, the instruction processing unit 113 starts processing one or more instructions in the REE before the end of processing of one or more instructions in the TEE (that is, in the middle of the instruction cycle (fetch cycle) related to the instruction). It has become. Note that switching between processing of the REE command and processing of the TEE command is performed by, for example, a switching driver shown in FIG. Further, as shown in FIG. 2C, the API and application executed on the REE and the API and application executed on the TEE are independently separated.

  The wireless communication unit 13 includes an antenna and controls wireless communication performed with the wireless communication line. The random number generator 14 generates a random number and outputs it to the processing unit 11. The input unit 15 is, for example, a touch panel type input interface, receives an operation instruction from the user, and outputs a signal corresponding to the operation instruction to the processing unit 11.

  The IC card connector 16 a connects the IC card protocol processing unit 16 and the C7 terminal of the SIM card 18. The IC card protocol processing unit 16 and the IC card protocol processing unit 16 control communication with the SIM card 18. Between the IC card protocol processing unit 16 and the SIM card 18, T = 0 protocol communication defined by the ISO / IEC7816 standard is performed. The T = 0 protocol communication is a half-duplex communication method, which recognizes communication data by changing the voltage level. When one of the two-party communication is transmission, the other is reception. The IC card connector 16a connects the CLF 19 and the C6 terminal of the SIM card 18. SWP (Single Wire Protocol) communication is performed between the CLF 19 and the SIM card 18. SWP communication is a full-duplex communication method that can simultaneously transmit in both directions.

  The CPU confirms the random number (random number value) generated by the random number generator 14 before or after starting the processing of one or more instructions of the TEE, and if the random number is a predetermined value, Process. Here, the predetermined value may be any value. For example, the predetermined value is set to “1111” (hereinafter referred to as “ON”). “1111” is referred to as ON, and the others are referred to as OFF.

  FIG. 3A is a diagram illustrating an example of normal pipeline processing, and FIG. 3B is a diagram illustrating an example of pipeline processing when a random number is confirmed. In FIG. 3, T1 to T9 indicate timing (time). In the example of FIG. 3A, the instruction processing unit 113 reads “REE instruction 1” at the address indicated by the program counter 111 from, for example, a non-volatile memory, and performs processing of interpretation, execution, and writing. During the cycle, the “TEE instruction 1” at the address indicated by the program counter 112 is read from the memory and interpreted, executed, and written. In the example of FIG. 3B, the REE instruction and the TEE instruction are alternately performed, but they are not necessarily performed alternately.

  On the other hand, in the example of FIG. 3B, the instruction processing unit 113 performs processing for reading, interpreting, and executing “REE instruction 1” at the address indicated by the program counter 111 from the memory, but during the instruction cycle. Furthermore, the random number generated by the random number generator 14 is confirmed, that is, the random number is confirmed immediately before the “TEE instruction 1” at the address indicated by the program counter 112 is read from the memory, and the random number is OFF. (If; OFF), the “TEE instruction 1” is read from the memory. Thereafter, the instruction processing unit 113 reads the “REE instruction 2” at the address indicated by the program counter 111 from the memory and performs processing such as interpretation and execution. The instruction processing unit 113 generates the random number generator 14 during the instruction cycle. In other words, the random number is confirmed immediately before reading “TEE instruction 2” at the address indicated by the program counter 112 from the memory, and the random number is ON (if; ON). Instead of the “command 2”, the “REE command 3” at the address indicated by the program counter 112 is read, interpreted, and executed. As described above, the processing timing of the TEE instruction changes according to the random number generated by the random number generator 14 (that is, the processing cycle changes), so that security can be maintained against the SCA. On the other hand, since the processing timing of the REE instruction is shortened according to the random number generated by the random number generator 14, high speed can be realized.

  As described above, according to the embodiment, the CPU confirms the random number generated by the random number generator 14 before or after starting the processing of one or more instructions of the TEE, and the random number is predetermined. If the value is a value, the processing is performed so that the REE instruction is processed, so that high speed and security can be realized.

  In the above embodiment, the OS is described as an example of the program in the present invention, but the present invention can also be applied to application software. In the above embodiment, the case where the instruction processing is performed using the two program counters 111 and 112 has been described as an example. However, as another example, the state of the TEE task (for example, the value of the register) And REE task status may be managed to process instructions.

DESCRIPTION OF SYMBOLS 1 Portable terminal 11 Processing part 12 Storage part 13 Wireless communication part 14 Random number generator 15 Input part 16 IC card protocol processing part 16a IC card connector 18 SIM card 19 CLF

Claims (4)

A memory for storing a first program composed of a plurality of instructions and a second program composed of a plurality of instructions;
A processor having a pipeline processing function for starting processing of one or more instructions of the second program before completion of processing of one or more instructions of the first program;
A random number generator for generating random numbers;
An information processing apparatus comprising:
The processor confirms the random number generated by the random number generator before or after starting processing of one or more instructions of the second program, and if the random number is a predetermined value, An information processing apparatus that processes one or more instructions of a program. The processor includes a first program counter that stores an address of the memory that stores an instruction of the first program, and a second program counter that stores an address of the memory that stores an instruction of the second program And having
If the random number generated by the random number generator is checked immediately before reading the instruction at the address indicated by the second program counter from the memory, and the random number is a predetermined value, the instruction at the address indicated by the second program counter The information processing apparatus according to claim 1, wherein instead of, an instruction at an address indicated by the first program counter is read, interpreted, and executed.   3. The first program according to claim 1, wherein the first program is an operating system that requires high-speed processing, and the second program is an operating system that requires processing security. Information processing device. A memory for storing a first program composed of a plurality of instructions and a second program composed of a plurality of instructions;
A processor having a pipeline processing function for starting processing of one or more instructions of the second program before completion of processing of one or more instructions of the first program;
A random number generator for generating random numbers;
An information processing method performed by an information processing apparatus comprising:
The processor checks the random number generated by the random number generator before or after starting the processing of one or more instructions of the second program, and determines whether the random number is a predetermined value. Steps,
If the processor determines that the confirmed random number is a predetermined value, processing one or more instructions of the first program;
An information processing method comprising:

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