JP2015146385A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform heat radiation depending on a type of a semiconductor chip without preparing a heat radiation member for each type of the semiconductor chip.SOLUTION: A semiconductor device comprises a first semiconductor chip, a second semiconductor chip, and a heat radiation member performing heat radiation to the exterior. The heat radiation member has a plurality of first contact parts with different heights from each other, and a second contact part. One of the plurality of the first contact parts contacts with the first semiconductor chip. The second contact part contacts with the second semiconductor chip. No first semiconductor chip exist below at least one of the plurality of the first contact parts.

Description

  The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

  In a semiconductor device in which a semiconductor chip is mounted on a package substrate, a method is used in which heat generated when the semiconductor chip operates is radiated to the outside by a heat radiating member (heat spreader).

JP 2007-188930 A JP-A-11-121666

  If the type of semiconductor chip is different, the height of the semiconductor chip may be different. For example, a stacked memory chip in which a plurality of memory chips are stacked has different heights depending on the number of stacked memory chips. In order to properly contact the plurality of semiconductor chips mounted on the package substrate and the heat radiating member, a plurality of types of heat radiating members corresponding to the height of the semiconductor chip have been prepared. The object of the present invention is to provide a technique for performing heat dissipation according to the type of semiconductor chip without preparing a heat dissipation member for each type of semiconductor chip.

  A semiconductor device according to an aspect of the present invention includes a first semiconductor chip, a second semiconductor chip, and a heat radiating member that radiates heat to the outside, and each of the heat radiating members has a plurality of first contact portions having different heights. And one of the plurality of first contact portions is in contact with the first semiconductor chip, the second contact portion is in contact with the second semiconductor chip, and a plurality of the first contact portions is provided. The first semiconductor chip is not present below at least one of the one contact portions.

  According to this case, it is possible to radiate heat according to the type of semiconductor chip without preparing a heat radiating member for each type of semiconductor chip.

FIG. 1 is a cross-sectional structure diagram of a semiconductor device. FIG. 2 is a top view of the package substrate and the heat dissipation member. FIG. 3 is an enlarged view of the stacked memory chip. FIG. 4 is an explanatory diagram of alignment of the heat dissipation member. FIG. 5 is a cross-sectional structure diagram of the semiconductor device. FIG. 6 is a top view of the package substrate and the heat dissipation member. FIG. 7 is a flowchart of the manufacturing process of the semiconductor device according to the first embodiment. FIG. 8 is a diagram showing a table in which combinations of the height of the stacked memory chip and the height of the first protrusion are recorded. FIG. 9 is a cross-sectional structure diagram of the semiconductor device. FIG. 10 is a top view of the package substrate and the heat dissipation member. FIG. 11 is an explanatory diagram of alignment of the heat dissipation member. FIG. 12 is a cross-sectional structure diagram of the semiconductor device. FIG. 13 is a top view of the package substrate and the heat dissipation member. FIG. 14 is an explanatory diagram of alignment of the heat dissipation member. FIG. 15 is a sectional view of a semiconductor device. FIG. 16 is a top view of the package substrate and the heat dissipation member. FIG. 17 is an explanatory diagram of alignment of the heat dissipation member. FIG. 18 is a cross-sectional structure diagram of a semiconductor device. FIG. 19 is a top view of the package substrate and the heat dissipation member. FIG. 20A is a flowchart of a manufacturing process of the semiconductor device according to the second embodiment. FIG. 20B is a flowchart of a manufacturing process of the semiconductor device according to the second embodiment. FIG. 21 is a diagram illustrating a table in which combinations of the height of the stacked memory chip and the height of the first protrusion are recorded. FIG. 22 is a top view of the package substrate and the heat dissipation member. FIG. 23 is an explanatory diagram of alignment of the heat dissipation member.

  Hereinafter, a semiconductor device and a method for manufacturing the semiconductor device according to the embodiment will be described with reference to the drawings. The configurations of Examples 1 to 3 below are exemplifications, and the semiconductor device and the method for manufacturing the semiconductor device according to the embodiment are not limited to the configurations of Examples 1 to 3.

<Example 1>
The semiconductor device 1 according to the first embodiment will be described with reference to FIGS. FIG. 1 is a cross-sectional structure diagram of a semiconductor device (mounting module) 1. The semiconductor device 1 includes a package substrate 2, a stacked memory chip (L3 cache) 3, a processor chip 4, a capacitor component 5, and a heat dissipation member (heat spreader) 6. The package substrate 2 is an example of a substrate. The stacked memory chip 3 is an example of a first semiconductor chip. The processor chip 4 is an example of a second semiconductor chip. The stacked memory chip 3 and the processor chip 4 are mounted on the package substrate 2 via a relay substrate (silicon interposer) 11. A through hole is formed in the relay substrate 11, and a through electrode 12 is formed in the through hole of the relay substrate 11.

  In the stacked memory chip 3, the same kind of memory chips are three-dimensionally stacked, and the memory chips are electrically connected. The memory chip is an example of a third semiconductor chip. The laminated memory chip 3 is flip-chip bonded to the relay substrate 11. That is, with the circuit surface of the laminated memory chip 3 facing the relay substrate 11, the electrodes formed on the circuit surface of the laminated memory chip 3 and the through electrodes 12 formed on the relay substrate 11 are formed by the bumps 13. It is joined.

The processor chip 4 is, for example, a CPU (Central Processing Unit) chip.
The processor chip 4 is flip-chip bonded to the relay substrate 11. That is, with the circuit surface of the processor chip 4 facing the relay substrate 11, the electrodes formed on the circuit surface of the processor chip 4 and the through electrodes 12 formed on the relay substrate 11 are joined by the bumps 13. ing.

Mold resin 14 is formed between the stacked memory chip 3 and the relay substrate 11 and between the processor chip 4 and the relay substrate 11. The through electrode 12 formed on the relay substrate 11 and the electrode formed on the package substrate 2 are joined by the bump 15. A mold resin 16 is formed between the package substrate 2 and the relay substrate 11. On the back surface of the package substrate 2, BGA (Ball Grid Array) or LGA (Land Grid Arr)
Solder balls 17 such as ay) are formed.

  The heat radiating member 6 is a metal. The shape of the heat radiating member 6 is rectangular in plan view. The heat radiating member 6 is provided with a column portion along the outer peripheral portion of the heat radiating member 6, and the column portion of the heat radiating member 6 is bonded and fixed to the outer peripheral portion of the package substrate 2.

  2A is a top view of the package substrate 2, and FIG. 2B is a top view of the heat dissipation member 6. The heat radiating member 6 has a plurality of first convex portions 21 and second convex portions 22. The 1st convex part 21 is an example of a 1st contact part. The 2nd convex part 22 is an example of a 2nd contact part. The plurality of first protrusions 21 and second protrusions 22 are provided on the back surface (ceiling) of the heat dissipation member 6. In the first embodiment, the two first convex portions 21 are provided on the back surface of the heat radiating member 6. In the first embodiment, one of the two first protrusions 21 is indicated as a first protrusion 21A, and one of the two first protrusions 21 is indicated as a first protrusion 21B. The position of the first protrusion 21 </ b> A of the heat dissipation member 6 and the position of the first protrusion 21 </ b> B of the heat dissipation member 6 are rotationally symmetric with respect to the position of the second protrusion 22 of the heat dissipation member 6. For example, when the heat radiating member 6 is rotated 180 degrees in the plane direction around the position of the second convex portion 22 of the heat radiating member 6, the position of the first convex portion 21A of the heat radiating member 6 is before the heat radiating member 6 is rotated. It overlaps with the position of the first convex portion 21B of the heat radiating member 6.

  The heights of the first convex portion 21A and the first convex portion 21B of the heat dissipation member 6 are different from each other. In Example 1, for example, the height of the first convex portion 21A of the heat radiating member 6 is 1 mm, and the height of the first convex portion 21B of the heat radiating member 6 is 2 mm.

  As shown in FIG. 1, the stacked memory chip 3 and the first convex portion 21 </ b> A of the heat radiating member 6 are in contact with each other, and the processor chip 4 and the second convex portion 22 of the heat radiating member 6 are in contact with each other. The heat generated by the stacked memory chip 3 is radiated from the heat radiating member 6 to the outside through the first convex portion 21 </ b> A of the heat radiating member 6. The heat generated by the processor chip 4 is radiated from the heat radiating member 6 to the outside via the second convex portion 22 of the heat radiating member 6. The laminated memory chip 3 and the processor chip 4 do not exist below the first convex portion 21B of the heat dissipation member 6.

  FIG. 3 is an enlarged view of the stacked memory chip 3. In the example shown in FIG. 3, the distance A1 from the mounting position of the stacked memory chip 3 (the lower surface of the stacked memory chip 3) to the back surface of the heat radiating member 6 is 4 mm, and the first convex portion provided on the back surface of the heat radiating member 6 The height B1 of 21A is 1 mm, and the height (thickness) C1 of the stacked memory chip 3 is 3 mm.

  FIG. 4 is an explanatory diagram of alignment of the heat dissipation member 6. For example, when the stacked memory chip 3 having a height (thickness) of 3 mm is mounted on the package substrate 2, the heat radiating member 6 is aligned as shown in FIG. 4A, the first convex portion 21A of the heat radiating member 6 is aligned with the mounting position of the stacked memory chip 3, and the second convex portion 22 of the heat radiating member 6 is aligned with the mounting position of the processor chip 4. In FIG. To do. In FIG. 4, illustration of the column portion of the heat radiating member 6, the capacitor component 5, the mold resins 14 and 16, etc. is omitted. Next, the heat dissipation member 6 is attached to the package substrate 2 such that the stacked memory chip 3 and the first protrusion 21A of the heat dissipation member 6 are in contact with each other, and the processor chip 4 and the second protrusion 22 of the heat dissipation member 6 are in contact with each other. Install.

The height of the first protrusion 21 </ b> A of the heat dissipation member 6 may be an integral multiple of the height (thickness) of the memory chip included in the stacked memory chip 3. For example, when the height of the memory chip included in the stacked memory chip 3 is 0.5 mm and the stacked memory chip 3 is stacked with 6 layers of memory chips, the height of the stacked memory chip 3 is 3 mm. When the laminated memory chip 3 having a height of 3 mm is mounted on the package substrate 2, the laminated memory chip 3 and the first convex portion 21 </ b> A of the heat dissipation member 6 are in contact with each other. Since the height of the first convex portion 21A of the heat radiating member 6 is 1 mm, the height of the first convex portion 21A of the heat radiating member 6 is twice the height of the memory chip included in the stacked memory chip 3.

  For example, when the stacked memory chip 3 having a height of 2 mm is mounted on the package substrate 2, the heat radiating member 6 is aligned as shown in FIG. In FIG. 4B, the first convex portion 21B of the heat radiating member 6 is aligned with the mounting position of the stacked memory chip 3, and the second convex portion 22 of the heat radiating member 6 is aligned with the mounting position of the processor chip 4. To do. The arrangement position of the heat radiating member 6 shown in FIG. 4B is a position obtained by rotating the heat radiating member 6 180 degrees in the parallel direction from the arrangement position of the heat radiating member 6 shown in FIG.

  Next, the heat radiation member 6 is attached to the package substrate 2 such that the stacked memory chip 3 and the first protrusion 21B of the heat dissipation member 6 are in contact with each other, and the processor chip 4 and the second protrusion 22 of the heat dissipation member 6 are in contact with each other. Install. The position of the first protrusion 21 </ b> A of the heat dissipation member 6 and the position of the first protrusion 21 </ b> B of the heat dissipation member 6 are rotationally symmetric with respect to the position of the second protrusion 22 of the heat dissipation member 6. By rotating the heat radiating member 6, the first convex portion 21B of the heat radiating member 6 is positioned above the stacked memory chip 3, and the second convex portion 22 of the heat radiating member 6 is positioned above the processor chip 4. Positioning of the 1st convex part 21B and the 2nd convex part 22 of the thermal radiation member 6 is attained.

  FIG. 5 is a cross-sectional structure diagram of the semiconductor device 1. 6A is a top view of the package substrate 2, and FIG. 6B is a top view of the heat dissipation member 6. The arrangement position of the heat radiating member 6 shown in FIGS. 5 and 6 is the same as the arrangement position of the heat radiating member 6 shown in FIG.

  As shown in FIG. 5, the stacked memory chip 3 and the first convex portion 21 </ b> B of the heat radiating member 6 are in contact with each other, and the processor chip 4 and the second convex portion 22 of the heat radiating member 6 are in contact with each other. The heat generated by the stacked memory chip 3 is radiated from the heat radiating member 6 to the outside via the first convex portion 21 </ b> B of the heat radiating member 6. The heat generated by the processor chip 4 is radiated from the heat radiating member 6 to the outside via the second convex portion 22 of the heat radiating member 6. The laminated memory chip 3 and the processor chip 4 do not exist below the first convex portion 21A of the heat dissipation member 6.

  The height of the first protrusion 21 </ b> B of the heat dissipation member 6 may be an integral multiple of the height (thickness) of the memory chip included in the stacked memory chip 3. For example, when the height of the memory chip included in the laminated memory chip 3 is 0.5 mm and the laminated memory chip 3 is laminated by four layers of memory chips, the height of the laminated memory chip 3 is 2 mm. When the stacked memory chip 3 having a height of 2 mm is mounted on the package substrate 2, the stacked memory chip 3 and the first convex portion 21 </ b> B of the heat dissipation member 6 are in contact with each other. Since the height of the first convex portion 21B of the heat radiating member 6 is 2 mm, the height of the first convex portion 21B of the heat radiating member 6 is four times the height of the memory chip included in the stacked memory chip 3.

  A manufacturing process of the semiconductor device 1 according to the first embodiment will be described. FIG. 7 is a flowchart of the manufacturing process of the semiconductor device 1 according to the first embodiment.

  First, in step S101, the stacked memory chip 3 and the processor chip 4 are mounted on the package substrate 2. Next, in step S102, it is determined whether or not the height of the stacked memory chip 3 mounted on the package substrate 2 is 3 mm. The determination process in step S102 may be performed by a user who is engaged in manufacturing the semiconductor device 1, or may be performed by the information processing apparatus based on the design data.

When the stacked memory chip 3 mounted on the package substrate 2 has a height of 3 mm (step S102: YES), the process proceeds to step S103. In step S103, the first convex portion 21A (height: 1 mm) of the heat dissipation member 6 is aligned with the mounting position of the stacked memory chip 3, and the second convex portion 22 of the heat dissipation member 6 is mounted on the processor chip 4. Align to position.

  Next, in the process of step S104, the stacked memory chip 3 and the first protrusion 21A of the heat dissipation member 6 are in contact with each other, and the processor chip 4 and the second protrusion 22 of the heat dissipation member 6 are in contact with each other. 6 is installed on the package substrate 2. For example, the heat radiating member 6 may be installed on the package substrate 2 by bonding and fixing the pillar portion of the heat radiating member 6 to the outer peripheral portion of the package substrate 2. When the process of step S104 is performed, the flow of the manufacturing process of the semiconductor device 1 ends.

  On the other hand, if the height of the stacked memory chip 3 mounted on the package substrate 2 is not 3 mm (step S102: NO), the process proceeds to step S105. In step S105, it is determined whether or not the height of the stacked memory chip 3 mounted on the package substrate 2 is 2 mm. The determination process in step S105 may be performed by a user who is engaged in manufacturing the semiconductor device 1, or may be performed by the information processing apparatus based on the design data.

  If the height of the stacked memory chip 3 mounted on the package substrate 2 is 2 mm (step S105: YES), the process proceeds to step S106. In step S106, the first convex portion 21B (height: 2 mm) of the heat radiating member 6 is aligned with the mounting position of the stacked memory chip 3, and the second convex portion 22 of the heat radiating member 6 is mounted on the processor chip 4. Align to position.

  Next, in step S107, the stacked memory chip 3 and the first protrusion 21B of the heat dissipation member 6 are in contact with each other, and the processor chip 4 and the second protrusion 22 of the heat dissipation member 6 are in contact with each other. 6 is installed on the package substrate 2. For example, the heat radiating member 6 may be installed on the package substrate 2 by bonding and fixing the pillar portion of the heat radiating member 6 to the outer peripheral portion of the package substrate 2. When the process of step S107 is performed, the flow of the manufacturing process of the semiconductor device 1 ends.

  On the other hand, when the height of the stacked memory chip 3 mounted on the package substrate 2 is not 2 mm (step S105: NO), the heat dissipation member 6 cannot be installed on the package substrate 2, and thus the semiconductor device 1 is manufactured. The process flow ends.

  In the first embodiment, one of the plurality of first protrusions 21 of the heat dissipation member 6 is selected according to the height of the stacked memory chip 3. That is, the heat radiating member so that the distance from the mounting position of the laminated memory chip 3 to the back surface of the heat radiating member 6 and the total value of the height of the laminated memory chip 3 and the height of the first convex portion 21 are the same. One of the plurality of first convex portions 21 is selected.

  FIG. 8 is a view showing a table in which combinations of the height of the stacked memory chip 3 and the height of the first convex portion 21 are recorded. For example, the table shown in FIG. 8 may be stored in the storage unit of the information processing device, and the information processing device may select the first convex portion 21 corresponding to the height of the stacked memory chip 3. In the table shown in FIG. 8, when the distance from the mounting position of the laminated memory chip 3 to the back surface of the heat dissipation member 6 is 4 mm, the combination of the height of the laminated memory chip 3 and the height of the first convex portion 21 is shown. It is recorded. For example, when the stacked memory chip 3 having a height of 3 mm is mounted on the package substrate 2, the first convex portion 21A having a height of 1 mm is selected. For example, when the stacked memory chip 3 having a height of 2 mm is mounted on the package substrate 2, the first convex portion 21B having a height of 2 mm is selected.

In the first embodiment, the first protrusion 21 corresponding to the height of the stacked memory chip 3 is selected, and the heat radiating member 6 is placed on the package substrate 2 so that the selected first protrusion 21 contacts the stacked memory chip 3. Is installed. Therefore, the heat radiation of the plurality of stacked memory chips 3 having different heights can be performed by the single heat radiating member 6. Since it is not necessary to prepare a plurality of heat dissipation members 6 according to the height of the stacked memory chip 3, the manufacturing cost of the semiconductor device 1 can be reduced. Further, when the specifications of the stacked memory chip 3 (number of memory chip layers) are different, the height of the stacked memory chip 3 may be different. According to the first embodiment, even if the semiconductor device 1 has a different specification of the stacked memory chip 3 mounted on the package substrate 2, it is not necessary to prepare the heat dissipation member 6 separately. Can be reduced.

<Example 2>
With reference to FIGS. 9-21, the semiconductor device 1 which concerns on Example 2 is demonstrated. FIG. 9 is a cross-sectional structure diagram of the semiconductor device 1. FIG. 10A is a top view of the package substrate 2, and FIG. 10B is a top view of the heat dissipation member 31.

  The semiconductor device 1 includes a package substrate 2, a stacked memory chip 3, a processor chip 4, a capacitor component 5, and a heat dissipation member 31. The package substrate 2, the laminated memory chip 3, the processor chip 4, the capacitor component 5, the relay substrate 11, the through electrode 12, the bumps 13 and 15, the mold resins 14 and 16, and the solder balls 17 in the second embodiment are the same as those in the first embodiment. It is the same.

  The heat radiating member 31 is a metal. The shape of the heat dissipation member 31 is rectangular in plan view. The heat radiating member 31 is provided with a column portion along the outer peripheral portion of the heat radiating member 31, and the column portion of the heat radiating member 31 is bonded and fixed to the outer peripheral portion of the package substrate 2.

  The heat dissipation member 31 has a plurality of first protrusions 41 and second protrusions 42. The first convex portion 41 is an example of a first contact portion. The 2nd convex part 42 is an example of the 2nd contact part. The plurality of first protrusions 41 and second protrusions 42 are provided on the back surface (ceiling) of the heat dissipation member 31. In the second embodiment, the four first protrusions 41 are provided on the back surface of the heat dissipation member 31. In Example 2, one of the four first protrusions 41 is referred to as a first protrusion 41A, and one of the four first protrusions 41 is referred to as a first protrusion 41B. One of the first convex portions 41 is indicated as a first convex portion 41C, and one of the four first convex portions 41 is indicated as a first convex portion 41D. The positions of the first convex portions 41 </ b> A to 41 </ b> D of the heat radiating member 31 are rotationally symmetric with respect to the position of the second convex portion 42 of the heat radiating member 31. For example, when the heat radiating member 31 is rotated 90 degrees clockwise in the plane direction around the position of the second convex portion 42 of the heat radiating member 31, the position of the first convex portion 41A of the heat radiating member 31 rotates the heat radiating member 31. It overlaps with the position of the first convex portion 41B of the front heat dissipation member 31.

  The heights of the first convex portions 41A to 41D of the heat radiating member 31 are different from each other. In Example 2, for example, the height of the first convex portion 42A of the heat radiating member 31 is 1 mm, the height of the first convex portion 42B of the heat radiating member 31 is 2 mm, and the first convex portion 41C of the heat radiating member 31 is. The height of the first protrusion 42D of the heat dissipation member 31 is 0 mm.

  As shown in FIG. 9, the stacked memory chip 3 and the first convex portion 42 </ b> D of the heat radiating member 31 are in contact with each other, and the processor chip 4 and the second convex portion 42 of the heat radiating member 31 are in contact with each other. The heat generated by the stacked memory chip 3 is radiated from the heat radiating member 31 to the outside via the first convex portion 41 </ b> D of the heat radiating member 31. The heat generated by the processor chip 4 is radiated from the heat radiating member 31 to the outside through the second convex portion 42 of the heat radiating member 31. The stacked memory chip 3 and the processor chip 4 do not exist below the first convex portions 41 </ b> A to 41 </ b> C of the heat dissipation member 31.

FIG. 11 is an explanatory diagram of the alignment of the heat radiating member 31. For example, when the stacked memory chip 3 having a height of 4 mm is mounted on the package substrate 2, the heat radiating member 31 is aligned as shown in FIG. In FIG. 11A, the first protrusion 41D of the heat dissipation member 31 is aligned with the mounting position of the stacked memory chip 3, and the second protrusion 4 of the heat dissipation member 31 is aligned.
2 is aligned with the mounting position of the processor chip 4. In FIG. 11, the column portion of the heat radiating member 31, the capacitor component 5, the mold resins 14 and 16, and the like are not shown. Next, the heat dissipation member 31 is mounted on the package substrate 2 such that the stacked memory chip 3 and the first protrusion 41D of the heat dissipation member 31 are in contact with each other, and the processor chip 4 and the second protrusion 42 of the heat dissipation member 31 are in contact with each other. Install.

  For example, when the laminated memory chip 3 having a height of 1 mm is mounted on the package substrate 2, the heat radiating member 31 is aligned as shown in FIG. In FIG. 11B, the first protrusion 41C of the heat dissipation member 31 is aligned with the mounting position of the stacked memory chip 3, and the second protrusion 42 of the heat dissipation member 31 is aligned with the mounting position of the processor chip 4. To do. The arrangement position of the heat radiating member 31 shown in FIG. 11B is a position obtained by rotating the heat radiating member 31 clockwise 90 degrees in the parallel direction from the arrangement position of the heat radiating member 31 shown in FIG.

  Next, the heat dissipation member 31 is attached to the package substrate 2 such that the stacked memory chip 3 and the first protrusion 41C of the heat dissipation member 31 are in contact with each other, and the processor chip 4 and the second protrusion 42 of the heat dissipation member 31 are in contact with each other. Install. The position of the first convex portion 41C of the heat radiating member 31 and the position of the first convex portion 41D of the heat radiating member 31 are rotationally symmetric about the position of the second convex portion 42 of the heat radiating member 31. By rotating the heat radiating member 31, the first convex portion 41C of the heat radiating member 31 is positioned above the stacked memory chip 3, and the second convex portion 42 of the heat radiating member 31 is positioned above the processor chip 4. The first protrusion 41C and the second protrusion 42 of the heat dissipation member 31 can be aligned.

  FIG. 12 is a cross-sectional structure diagram of the semiconductor device 1. FIG. 13A is a top view of the package substrate 2, and FIG. 13B is a top view of the heat dissipation member 31. The arrangement position of the heat radiating member 31 shown in FIGS. 12 and 13 is the same as the arrangement position of the heat radiating member 31 shown in FIG.

  As shown in FIG. 12, the stacked memory chip 3 and the first convex portion 41C of the heat dissipation member 31 are in contact with each other, and the processor chip 4 and the second convex portion 42 of the heat dissipation member 31 are in contact with each other. The heat generated by the stacked memory chip 3 is radiated from the heat radiating member 31 to the outside via the first convex portion 41 </ b> C of the heat radiating member 31. The heat generated by the processor chip 4 is radiated from the heat radiating member 31 to the outside through the second convex portion 42 of the heat radiating member 31. The laminated memory chip 3 and the processor chip 4 do not exist below the first convex portions 41A, 41B, and 41D of the heat dissipation member 31.

  The height of the first protrusion 41 </ b> C of the heat dissipation member 31 may be an integral multiple of the height (thickness) of the memory chip included in the stacked memory chip 3. For example, when the height of the memory chip included in the stacked memory chip 3 is 0.5 mm and the stacked memory chip 3 is stacked by two layers of memory chips, the height of the stacked memory chip 3 is 1 mm. When the laminated memory chip 3 having a height of 1 mm is mounted on the package substrate 2, the laminated memory chip 3 and the first convex portion 41 </ b> C of the heat dissipation member 31 are in contact with each other. Since the height of the first convex portion 41C of the heat radiating member 31 is 3 mm, the height of the first convex portion 41C of the heat radiating member 31 is six times the height of the memory chip included in the stacked memory chip 3.

FIG. 14 is an explanatory diagram of alignment of the heat radiating member 31. For example, when the stacked memory chip 3 having a height of 2 mm is mounted on the package substrate 2, the heat radiating member 31 is aligned as shown in FIG. In FIG. 14B, the first protrusion 41B of the heat dissipation member 31 is aligned with the mounting position of the stacked memory chip 3, and the second protrusion 42 of the heat dissipation member 31 is aligned with the mounting position of the processor chip 4. To do. The arrangement position of the heat radiation member 31 shown in FIG. 14B is a position obtained by rotating the heat radiation member 31 clockwise 90 degrees in the parallel direction from the arrangement position of the heat radiation member 31 shown in FIG. Therefore, the arrangement position of the heat radiating member 31 shown in FIG. 14B is a position where the heat radiating member 31 is rotated 180 degrees to the right in the parallel direction from the arrangement position of the heat radiating member 31 shown in FIG. In FIG. 14, illustration of the column portion of the heat radiating member 31, the capacitor component 5, the mold resins 14 and 16, etc. is omitted.

  Next, the heat radiation member 31 is attached to the package substrate 2 so that the stacked memory chip 3 and the first protrusion 41B of the heat dissipation member 31 are in contact with each other, and the processor chip 4 and the second protrusion 42 of the heat dissipation member 31 are in contact with each other. Install. The position of the first convex portion 41 </ b> B of the heat radiating member 31 and the position of the first convex portion 41 </ b> C of the heat radiating member 31 are rotationally symmetric with respect to the position of the second convex portion 42 of the heat radiating member 31. By rotating the heat radiating member 31, the first convex portion 41B of the heat radiating member 31 is positioned above the stacked memory chip 3, and the second convex portion 42 of the heat radiating member 31 is positioned above the processor chip 4. The first protrusion 41B and the second protrusion 42 of the heat dissipation member 31 can be aligned.

  FIG. 15 is a cross-sectional structure diagram of the semiconductor device 1. FIG. 16A is a top view of the package substrate 2, and FIG. 16B is a top view of the heat dissipation member 31. The arrangement position of the heat dissipation member 31 shown in FIGS. 15 and 16 is the same as the arrangement position of the heat dissipation member 31 shown in FIG.

  As shown in FIG. 15, the stacked memory chip 3 and the first convex portion 41 </ b> B of the heat radiating member 31 are in contact with each other, and the processor chip 4 and the second convex portion 42 of the heat radiating member 31 are in contact with each other. The heat generated by the stacked memory chip 3 is radiated from the heat radiating member 31 to the outside via the first convex portion 41 </ b> B of the heat radiating member 31. The heat generated by the processor chip 4 is radiated from the heat radiating member 31 to the outside through the second convex portion 42 of the heat radiating member 31. The laminated memory chip 3 and the processor chip 4 do not exist below the first convex portions 41A, 41C, and 41D of the heat dissipation member 31.

  The height of the first convex portion 41 </ b> B of the heat dissipation member 31 may be an integral multiple of the height (thickness) of the memory chip included in the stacked memory chip 3. For example, when the height of the memory chip included in the laminated memory chip 3 is 0.5 mm and the laminated memory chip 3 is laminated by four layers of memory chips, the height of the laminated memory chip 3 is 2 mm. When the stacked memory chip 3 having a height of 2 mm is mounted on the package substrate 2, the stacked memory chip 3 and the first convex portion 41 </ b> B of the heat dissipation member 31 are in contact with each other. Since the height of the first convex portion 41B of the heat radiating member 31 is 2 mm, the height of the first convex portion 41B of the heat radiating member 31 is four times the height of the memory chip included in the stacked memory chip 3.

  FIG. 17 is an explanatory diagram of the alignment of the heat dissipation member 31. For example, when the stacked memory chip 3 having a height of 3 mm is mounted on the package substrate 2, the heat radiating member 31 is aligned as shown in FIG. In FIG. 17B, the first convex portion 41A of the heat dissipation member 31 is aligned with the mounting position of the stacked memory chip 3, and the second convex portion 42 of the heat dissipation member 31 is aligned with the mounting position of the processor chip 4. To do. The arrangement position of the heat radiating member 31 shown in FIG. 17B is a position obtained by rotating the heat radiating member 31 clockwise by 90 degrees in the parallel direction from the arrangement position of the heat radiating member 31 shown in FIG. Therefore, the arrangement position of the heat dissipation member 31 shown in FIG. 17B is a position obtained by rotating the heat dissipation member 31 to the right by 270 degrees in the parallel direction from the arrangement position of the heat dissipation member 31 shown in FIG. In FIG. 17, the column portion of the heat radiating member 31, the capacitor component 5, the mold resins 14 and 16, and the like are not shown.

  Next, the heat dissipation member 31 is attached to the package substrate 2 so that the stacked memory chip 3 and the first protrusion 41A of the heat dissipation member 31 are in contact with each other, and the processor chip 4 and the second protrusion 42 of the heat dissipation member 31 are in contact with each other. Install. The position of the first convex portion 41 </ b> A of the heat radiating member 31 and the position of the first convex portion 41 </ b> B of the heat radiating member 31 are rotationally symmetric with respect to the position of the second convex portion 42 of the heat radiating member 31. By rotating the heat radiating member 31, the first convex portion 41A of the heat radiating member 31 is located above the stacked memory chip 3, and the second convex portion 42 of the heat radiating member 31 is located above the processor chip 4. The first protrusion 41A and the second protrusion 42 of the heat dissipation member 31 can be aligned.

  FIG. 18 is a cross-sectional structure diagram of the semiconductor device 1. FIG. 19A is a top view of the package substrate 2, and FIG. 19B is a top view of the heat dissipation member 31. The arrangement position of the heat dissipation member 31 shown in FIGS. 18 and 19 is the same as the arrangement position of the heat dissipation member 31 shown in FIG.

  As shown in FIG. 18, the stacked memory chip 3 and the first convex portion 41A of the heat dissipation member 31 are in contact with each other, and the processor chip 4 and the second convex portion 42 of the heat dissipation member 31 are in contact with each other. The heat generated by the stacked memory chip 3 is radiated from the heat radiating member 31 to the outside via the first convex portion 41 </ b> A of the heat radiating member 31. The heat generated by the processor chip 4 is radiated from the heat radiating member 31 to the outside through the second convex portion 42 of the heat radiating member 31. The stacked memory chip 3 and the processor chip 4 do not exist below the first protrusions 41B to 41D of the heat dissipation member 31.

  The height of the first protrusion 41 </ b> A of the heat dissipation member 31 may be an integral multiple of the height (thickness) of the memory chip included in the stacked memory chip 3. For example, when the height of the memory chip included in the stacked memory chip 3 is 0.5 mm and the stacked memory chip 3 is stacked with 6 layers of memory chips, the height of the stacked memory chip 3 is 3 mm. When the laminated memory chip 3 having a height of 3 mm is mounted on the package substrate 2, the laminated memory chip 3 and the first convex portion 41 </ b> A of the heat dissipation member 31 are in contact with each other. Since the height of the first convex portion 41A of the heat radiating member 31 is 1 mm, the height of the first convex portion 41A of the heat radiating member 31 is twice the height of the memory chip included in the stacked memory chip 3.

  A manufacturing process of the semiconductor device 1 according to the second embodiment will be described. 20A and 20B are flowcharts of manufacturing steps of the semiconductor device 1 according to the second embodiment.

  First, in step S201, the stacked memory chip 3 and the processor chip 4 are mounted on the package substrate 2. Next, in step S202, it is determined whether or not the height of the stacked memory chip 3 mounted on the package substrate 2 is 4 mm. The determination process in step S202 may be performed by a user who is engaged in manufacturing the semiconductor device 1, or may be performed by the information processing apparatus based on the design data.

  When the height of the stacked memory chip 3 mounted on the package substrate 2 is 4 mm (step S202: YES), the process proceeds to step S203. In step S203, the first protrusion 41D (height: 0 mm) of the heat dissipation member 31 is aligned with the mounting position of the stacked memory chip 3, and the second protrusion 42 of the heat dissipation member 31 is mounted on the processor chip 4. Align to position.

  Next, in step S204, the stacked memory chip 3 and the first protrusion 41D of the heat dissipation member 31 are in contact with each other, and the processor chip 4 and the second protrusion 42 of the heat dissipation member 31 are in contact with each other. 31 is installed on the package substrate 2. For example, the heat radiating member 31 may be installed on the package substrate 2 by bonding and fixing the heat radiating member 31 to the outer peripheral portion of the package substrate 2. When the process of step S204 is performed, the flow of the manufacturing process of the semiconductor device 1 ends.

  On the other hand, when the height of the stacked memory chip 3 mounted on the package substrate 2 is not 4 mm (step S202: NO), the process proceeds to step S205. In step S205, it is determined whether or not the height of the stacked memory chip 3 mounted on the package substrate 2 is 3 mm. The determination process in step S205 may be performed by a user who is engaged in the manufacture of the semiconductor device 1, or may be performed by the information processing apparatus based on the design data.

  When the height of the stacked memory chip 3 mounted on the package substrate 2 is 3 mm (step S205: YES), the process proceeds to step S206. In step S206, the first protrusion 41A (height: 1 mm) of the heat dissipation member 31 is aligned with the mounting position of the stacked memory chip 3, and the second protrusion 42 of the heat dissipation member 31 is mounted on the processor chip 4. Align to position.

  Next, in step S207, the stacked memory chip 3 and the first protrusion 41A of the heat dissipation member 31 are in contact with each other, and the processor chip 4 and the second protrusion 42 of the heat dissipation member 31 are in contact with each other. 31 is installed on the package substrate 2. For example, the heat radiating member 31 may be installed on the package substrate 2 by bonding and fixing the heat radiating member 31 to the outer peripheral portion of the package substrate 2. When the process of step S207 is performed, the flow of the manufacturing process of the semiconductor device 1 ends.

  On the other hand, when the height of the stacked memory chip 3 mounted on the package substrate 2 is not 3 mm (step S205: NO), the process proceeds to step S208. In step S208, it is determined whether or not the height of the stacked memory chip 3 mounted on the package substrate 2 is 2 mm. The determination process in step S208 may be performed by a user who is engaged in manufacturing the semiconductor device 1, or may be performed by the information processing apparatus based on the design data.

  When the height of the stacked memory chip 3 mounted on the package substrate 2 is 2 mm (step S208: YES), the process proceeds to step S209. In step S209, the first protrusion 41B (height: 2 mm) of the heat dissipation member 31 is aligned with the mounting position of the stacked memory chip 3, and the second protrusion 42 of the heat dissipation member 31 is mounted on the processor chip 4. Align to position.

  Next, in step S210, the stacked memory chip 3 and the first protrusion 41B of the heat dissipation member 31 are in contact with each other, and the processor chip 4 and the second protrusion 42 of the heat dissipation member 31 are in contact with each other. 31 is installed on the package substrate 2. For example, the heat radiating member 31 may be installed on the package substrate 2 by bonding and fixing the heat radiating member 31 to the outer peripheral portion of the package substrate 2. When the process of step S210 is performed, the flow of the manufacturing process of the semiconductor device 1 ends.

  On the other hand, when the height of the stacked memory chip 3 mounted on the package substrate 2 is not 2 mm (step S208: NO), the process proceeds to step S211. In step S211, it is determined whether or not the height of the stacked memory chip 3 mounted on the package substrate 2 is 1 mm. The determination step in step S211 may be performed by a user who is engaged in manufacturing the semiconductor device 1, or may be performed by an information processing device based on design data.

  When the height of the stacked memory chip 3 mounted on the package substrate 2 is 1 mm (step S211: YES), the process proceeds to step S212. In step S212, the first convex portion 41C (height: 3 mm) of the heat radiating member 31 is aligned with the mounting position of the stacked memory chip 3, and the second convex portion 42 of the heat radiating member 31 is mounted on the processor chip 4. Align to position.

  Next, in the process of step S213, the stacked memory chip 3 and the first protrusion 41C of the heat dissipation member 31 are in contact with each other, and the processor chip 4 and the second protrusion 42 of the heat dissipation member 31 are in contact with each other. 31 is installed on the package substrate 2. For example, the heat radiating member 31 may be installed on the package substrate 2 by bonding and fixing the heat radiating member 31 to the outer peripheral portion of the package substrate 2. When the process of step S213 is performed, the flow of the manufacturing process of the semiconductor device 1 ends.

  On the other hand, if the height of the stacked memory chip 3 mounted on the package substrate 2 is not 1 mm (step S211: NO), the heat dissipation member 31 cannot be installed on the package substrate 2, and thus the semiconductor device 1 is manufactured. The process flow ends.

  In Example 2, one of the plurality of first protrusions 41 of the heat dissipation member 31 is selected according to the height of the stacked memory chip 3. That is, the heat radiating member so that the distance from the mounting position of the laminated memory chip 3 to the back surface of the heat radiating member 31 and the total value of the height of the laminated memory chip 3 and the height of the first convex portion 41 are the same. One of the plurality of first convex portions 41 is selected.

  FIG. 21 is a view showing a table in which combinations of the height of the stacked memory chip 3 and the height of the first convex portion 41 are recorded. For example, the table shown in FIG. 21 may be stored in the storage unit of the information processing device, and the information processing device may select the first convex portion 41 corresponding to the height of the stacked memory chip 3. In the table shown in FIG. 21, when the distance from the mounting position of the stacked memory chip 3 to the back surface of the heat dissipation member 31 is 4 mm, the combination of the height of the stacked memory chip 3 and the height of the first convex portion 41 is shown. It is recorded. For example, when the stacked memory chip 3 having a height of 4 mm is mounted on the package substrate 2, the first convex portion 41D having a height of 0 mm is selected. For example, when the stacked memory chip 3 having a height of 3 mm is mounted on the package substrate 2, the first convex portion 41C having a height of 1 mm is selected. For example, when the stacked memory chip 3 having a height of 2 mm is mounted on the package substrate 2, the first convex portion 41B having a height of 2 mm is selected. For example, when the stacked memory chip 3 having a height of 1 mm is mounted on the package substrate 2, the first convex portion 41A having a height of 3 mm is selected.

  In the second embodiment, the first convex portion 41 corresponding to the height of the stacked memory chip 3 is selected, and the heat radiating member 31 is placed on the package substrate 2 so that the selected first convex portion 41 contacts the stacked memory chip 3. Is installed. Therefore, the heat radiation of the plurality of stacked memory chips 3 having different heights can be performed by the single heat radiation member 31. Since it is not necessary to prepare a plurality of heat dissipation members 31 according to the height of the stacked memory chip 3, the manufacturing cost of the semiconductor device 1 can be reduced. According to the second embodiment, even if the semiconductor device 1 has a different specification of the stacked memory chip 3 mounted on the package substrate 2, it is not necessary to prepare the heat dissipation member 31 separately. Can be reduced.

<Example 3>
With reference to FIGS. 22 and 23, the semiconductor device 1 according to the third embodiment will be described. The semiconductor device 1 according to the third embodiment may be applied to the first and second embodiments.

  22A is a top view of the package substrate 2, and FIG. 22B is a top view of the heat dissipation member 61. The heat radiating member 61 is a metal. The shape of the heat dissipation member 61 is circular in plan view. The heat radiating member 61 is provided with a column portion (not shown) along the outer peripheral portion of the heat radiating member 61, and the column portion of the heat radiating member 61 is bonded and fixed to the outer peripheral portion of the package substrate 2.

The heat dissipation member 61 has a plurality of first protrusions 71 and second protrusions 72. The 1st convex part 71 is an example of a 1st contact part. The 2nd convex part 72 is an example of a 2nd contact part. The plurality of first protrusions 71 and second protrusions 72 are provided on the back surface (ceiling) of the heat dissipation member 61. In Example 3, the three first protrusions 71 are provided on the back surface of the heat dissipation member 61. In Example 3, one of the three first protrusions 71 is referred to as a first protrusion 71A, and one of the three first protrusions 71 is referred to as a first protrusion 71B. One of the one convex portions 71 is indicated as a first convex portion 71C. The positions of the first protrusions 71 </ b> A to 71 </ b> C of the heat dissipation member 61 are rotationally symmetric with respect to the position of the second protrusion 72 of the heat dissipation member 61. For example, when the heat dissipation member 61 is rotated clockwise by 120 degrees in the plane direction around the position of the second protrusion 72 of the heat dissipation member 61, the position of the first protrusion 71A of the heat dissipation member 61 rotates the heat dissipation member 61. It overlaps with the position of the first convex portion 71B of the front heat dissipation member 61.

  The heights of the first convex portions 71A to 71C of the heat radiating member 61 are different from each other. In Example 3, for example, the height of the first convex portion 71A of the heat dissipation member 61 is 1 mm, the height of the first convex portion 71B of the heat dissipation member 61 is 2 mm, and the first convex portion 71C of the heat dissipation member 61 is. Is 3 mm in height.

  FIG. 23 is an explanatory diagram of alignment of the heat dissipation member 61. For example, when the stacked memory chip 3 having a height of 1 mm is mounted on the package substrate 2, the heat radiation member 61 is aligned as shown in FIG. In FIG. 23A, the first protrusion 71C of the heat dissipation member 61 is aligned with the mounting position of the stacked memory chip 3, and the second protrusion 72 of the heat dissipation member 61 is aligned with the mounting position of the processor chip 4. To do. In FIG. 23, illustration of the column portion of the heat dissipation member 61, the capacitor component 5, the mold resins 14, 16 and the like is omitted. Next, the heat radiation member 61 is attached to the package substrate 2 such that the stacked memory chip 3 and the first convex portion 71C of the heat dissipation member 61 are in contact with each other, and the processor chip 4 and the second convex portion 72 of the heat dissipation member 61 are in contact with each other. Install.

  For example, when the stacked memory chip 3 having a height of 2 mm is mounted on the package substrate 2, the heat radiating member 61 is aligned as shown in FIG. In FIG. 23B, the first protrusion 71B of the heat radiating member 61 is aligned with the mounting position of the stacked memory chip 3, and the second protrusion 72 of the heat radiating member 61 is aligned with the mounting position of the processor chip 4. To do. The arrangement position of the heat radiating member 61 shown in FIG. 23B is a position obtained by rotating the heat radiating member 61 clockwise by 120 degrees in the parallel direction from the arrangement position of the heat radiating member 61 shown in FIG.

  Next, the heat dissipation member 61 is attached to the package substrate 2 such that the stacked memory chip 3 and the first protrusion 71B of the heat dissipation member 61 are in contact with each other, and the processor chip 4 and the second protrusion 72 of the heat dissipation member 61 are in contact with each other. Install. The position of the first protrusion 71 </ b> B of the heat dissipation member 61 and the position of the first protrusion 71 </ b> C of the heat dissipation member 61 are rotationally symmetric with respect to the position of the second protrusion 72 of the heat dissipation member 61. By rotating the heat radiating member 61, the first convex portion 71B of the heat radiating member 61 is positioned above the stacked memory chip 3, and the second convex portion 72 of the heat radiating member 61 is positioned above the processor chip 4. Positioning of the 1st convex part 71B and the 2nd convex part 72 of the thermal radiation member 61 is attained.

  According to the third embodiment, since the shape of the heat dissipation member 61 is circular in plan view, the plurality of first convex portions 71 can be provided at any position on the back surface of the heat dissipation member 61. Therefore, the first protrusion 71 can be aligned with the mounting position of the stacked memory chip 3 by rotating the heat dissipating member 61 at an arbitrary angle in the parallel direction.

DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Package substrate 3 Multilayer memory chip 4 Processor chip 5 Capacitor component 6 Heat dissipation member 11 Relay substrate 12 Through electrode 13 Bump 14 Mold resin 15 Bump 16 Mold resin 17 Solder balls 21, 21A, 21B First convex portion 22 Second Convex part 31 Heat radiation member 41, 41A, 41B, 41C, 41D First convex part 42 Second convex part 61 Heat radiation member 71, 71A, 71B, 71C First convex part 72 Second convex part

Claims (8)

A first semiconductor chip;
A second semiconductor chip;
A heat dissipating member that dissipates heat to the outside;
With
The heat dissipation member has a plurality of first contact portions and second contact portions having different heights, respectively.
One of the plurality of first contact portions is in contact with the first semiconductor chip,
The second contact portion is in contact with the second semiconductor chip;
The semiconductor device, wherein the first semiconductor chip does not exist below at least one of the plurality of first contact portions. The first semiconductor chip is a laminated semiconductor chip in which a plurality of third semiconductor chips are laminated,
The semiconductor device according to claim 1, wherein a height of the first contact portion is an integral multiple of a height of the third semiconductor chip.   3. The semiconductor device according to claim 1, wherein each of the plurality of first contact portions is rotationally symmetric about the position of the second contact portion. Mounting a first semiconductor chip and a second semiconductor chip on a substrate;
Selecting one of a plurality of first contact parts included in a heat dissipation member that radiates heat to the outside according to the height of the first semiconductor chip;
Aligning the position of the selected first contact portion with the mounting position of the first semiconductor chip and aligning the position of the second contact portion of the heat dissipation member with the mounting position of the second semiconductor chip; When,
Placing the heat dissipation member on the substrate such that the first semiconductor chip and the selected first contact portion are in contact with each other, and the second semiconductor chip and the second contact portion are in contact with each other;
With
The method of manufacturing a semiconductor device, wherein the plurality of first contact portions have different heights.   The method of manufacturing a semiconductor device according to claim 4, wherein the first semiconductor chip does not exist below at least one of the plurality of first contact portions. The first semiconductor chip is a laminated semiconductor chip in which a plurality of third semiconductor chips are laminated,
6. The method of manufacturing a semiconductor device according to claim 4, wherein a height of the first contact portion is an integral multiple of a height of the third semiconductor chip.   In the selecting step, the distance from the mounting position of the first semiconductor chip to the heat dissipation member and the total value of the height of the first semiconductor chip and the height of the first contact portion are the same value. The method for manufacturing a semiconductor device according to claim 4, wherein one of the plurality of first contact portions is selected.   8. The method of manufacturing a semiconductor device according to claim 4, wherein each of the plurality of first contact portions is rotationally symmetric about the position of the second contact portion. 9. .

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