JP2015129926A - Light emitting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a light emitting device in which variation in luminance of pixels is suppressed.SOLUTION: A light emitting device has a pixel, a first circuit that generates a signal comprising the value of a current extracted from the pixel as data, a second circuit that corrects an image signal according to the signal, and a third circuit electrically connected to a route of the current between the pixel and the first circuit through a first switch, wherein the pixel has a light emitting element, a transistor that controls supply of the current to the light emitting element according to the image signal, and a second switch that controls extraction of the current from the pixel.

Description

  The present invention relates to an object, a method, or a manufacturing method. Or this invention relates to a process, a machine, a manufacture, or a composition (composition of matter). In particular, one embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, a memory device, a driving method thereof, or a manufacturing method thereof. In particular, one embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, a driving method thereof, or a manufacturing method thereof. For example, the present invention relates to a semiconductor device, and more particularly to a light emitting device in which a transistor is provided in each pixel.

  In an active matrix light-emitting device using a light-emitting element, variation in threshold voltage of a transistor (driving transistor) that controls a current value supplied to the light-emitting element in accordance with an image signal is easily reflected in luminance of the light-emitting element. In order to prevent the influence of the variation in the threshold voltage on the luminance of the light emitting element, in Patent Document 1 below, the threshold voltage and the mobility are detected from the source voltage of the driving transistor, and based on the detected threshold voltage and the mobility. A display device for setting a program data signal corresponding to a display image is described.

2009-265459

  The current output from the pixel when reading the electrical characteristics of the driving transistor has a very small value of about several tens of nA to several hundreds of nA. Therefore, if an off-current flows between power supply lines in a circuit that is electrically connected to a wiring serving as the current path, it is difficult to accurately read the electrical characteristics of the driving transistor. In this case, the current value supplied to the light emitting element is reduced so that the influence of the electrical characteristics of the driving transistor is reduced even if the image signal input to the pixel is corrected using the current output from the pixel. It is difficult to correct.

  In view of the above-described technical background, an object of one embodiment of the present invention is to provide a light-emitting device in which variation in luminance between pixels is suppressed.

  Note that an object of one embodiment of the present invention is to provide a novel semiconductor device or the like. Note that the description of these problems does not disturb the existence of other problems. Note that one embodiment of the present invention does not necessarily have to solve all of these problems. Issues other than these will be apparent from the description of the specification, drawings, claims, etc., and other issues can be extracted from the descriptions of the specification, drawings, claims, etc. It is.

  A light-emitting device according to one embodiment of the present invention includes a pixel, a first circuit that generates a signal including the value of a current extracted from the pixel as data, a second circuit that corrects an image signal according to the signal, A third circuit electrically connected to the current path via a first switch between the pixel and the first circuit, the pixel according to the light emitting element and the image signal, A transistor that controls supply of the current to the light-emitting element; and a second switch that controls extraction of the current from the pixel.

  A light-emitting device according to one embodiment of the present invention includes a pixel, a first circuit that generates a signal including the value of a current extracted from the pixel as data, a second circuit that corrects an image signal according to the signal, A third circuit electrically connected to the current path via a first switch between the pixel and the first circuit, the pixel according to the light emitting element and the image signal, A transistor for controlling the supply of the current to the light emitting element, a second switch for controlling the extraction of the current from the pixel, and a conduction state between the gate and the drain of the transistor, or the transistor And a third switch for controlling a conduction state between the gate and the wiring.

  Further, in the light-emitting device of one embodiment of the present invention, the transistor may include a channel formation region in the oxide semiconductor film.

  Furthermore, in the light-emitting device according to one embodiment of the present invention, the third circuit may include a diode.

  According to one embodiment of the present invention, a light-emitting device in which variation in luminance between pixels can be suppressed can be provided.

  Note that according to one embodiment of the present invention, a novel semiconductor device or the like can be provided. Note that the description of these effects does not disturb the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of these effects. It should be noted that the effects other than these are naturally obvious from the description of the specification, drawings, claims, etc., and it is possible to extract the other effects from the descriptions of the specification, drawings, claims, etc. It is.

FIG. 6 illustrates a structure of a light-emitting device. FIG. 6 illustrates a structure of a light-emitting device. FIG. 9 illustrates a structure of a pixel. Pixel timing chart. The figure which shows the connection relation of the pixel part and the circuit electrically connected to the path | route of an electric current. The figure which shows the connection relation of the pixel part and the circuit electrically connected to the path | route of an electric current. The structural example of the circuit electrically connected to the path | route of an electric current. FIG. 9 illustrates a structure of a pixel. Pixel timing chart. FIG. 9 illustrates a structure of a pixel. Pixel timing chart. The circuit diagram of a monitor circuit. The top view of a pixel. Sectional drawing of a light-emitting device. FIG. 14 is a cross-sectional view of a transistor. The perspective view of a light-emitting device. Illustration of electronic equipment.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below.

  Note that a source of a transistor means a source region that is part of a semiconductor film functioning as a semiconductor film or a source electrode that is electrically connected to the semiconductor film. Similarly, a drain of a transistor means a drain region that is part of a semiconductor film functioning as a semiconductor film or a drain electrode that is electrically connected to the semiconductor film. The gate means a gate electrode.

  The terms “source” and “drain” of a transistor interchange with each other depending on the conductivity type of the transistor and the level of potential applied to each terminal. In general, in an n-channel transistor, a terminal to which a low potential is applied is called a source, and a terminal to which a high potential is applied is called a drain. In a p-channel transistor, a terminal to which a low potential is applied is called a drain, and a terminal to which a high potential is applied is called a source. In this specification, for the sake of convenience, the connection relationship between transistors may be described on the assumption that the source and the drain are fixed. However, the names of the source and the drain are actually switched according to the above-described potential relationship. .

<Example configuration of light emitting device>
FIG. 1 illustrates an example of a structure of a light-emitting device according to one embodiment of the present invention. The light emitting device 10 shown in FIG. 1 is electrically connected to the current path between the pixel 11, the monitor circuit 12, the image processing circuit 13, the switch 19, and the current between the pixel 11 and the monitor circuit 12 via the switch 19. Circuit 16 to be operated. The current path between the pixel 11 and the monitor circuit 12 means a wiring that serves as a signal path between the pixel 11 and the monitor circuit 12. The pixel 11 includes a light emitting element 14, a transistor 15, a switch 17, and a capacitor element 18.

  The light emitting element 14 includes, in its category, an element whose luminance is controlled by current or voltage, such as an LED (Light Emitting Diode) and an OLED (Organic Light Emitting Diode). For example, the OLED has at least an EL layer, an anode, and a cathode. The EL layer includes a single layer or a plurality of layers provided between the anode and the cathode, and includes at least a light-emitting layer containing a light-emitting substance in these layers. In the EL layer, electroluminescence is obtained by a current supplied when the potential difference between the cathode and the anode becomes equal to or higher than the threshold voltage of the light emitting element 14. Electroluminescence includes light emission (fluorescence) when returning from the singlet excited state to the ground state and light emission (phosphorescence) when returning from the triplet excited state to the ground state.

  The drain current value of the transistor 15 is determined in accordance with the image signal input to the pixel 11 through the wiring SL. Specifically, in the transistor 15, one of a source and a drain is electrically connected to the anode of the light-emitting element 14, and the other of the source and the drain is electrically connected to the wiring VL.

  Note that the transistor 15 may have a back gate (second gate) for controlling the threshold voltage in addition to a normal gate (first gate). FIG. 1 illustrates the case where the transistor 15 is an n-channel type, and one of the source and the drain of the transistor 15 is electrically connected to the anode of the light-emitting element 14. When the transistor 15 is a p-channel type, one of the source and the drain of the transistor 15 is electrically connected to the cathode of the light-emitting element 14.

  The switch 17 has a function of controlling the drain current flowing through the transistor 15 from the pixel 11 and a function of controlling the supply of the drain current flowing through the transistor 15 to the light-emitting element 14. Specifically, the switch 17 has a function of controlling a conduction state between one of a source and a drain of the transistor 15 and the wiring ML. The drain current of the transistor 15 extracted from the wiring ML through the switch 17 is supplied to the monitor circuit 12.

  For example, the switch 17 can be configured using one or a plurality of transistors. Alternatively, the switch 17 may use a capacitor in addition to one or a plurality of transistors.

  Specifically, when the transistor 15 is an n-channel type, the cathode of the light-emitting element 14 is electrically connected to the wiring CL. When the potential of the wiring VL is higher than the potential obtained by adding the threshold voltage Vthe of the light-emitting element 14 and the threshold voltage Vth of the transistor 15 to the potential of the wiring CL, the drain current of the transistor 15 is supplied to the light-emitting element 14. The The luminance of the light emitting element 14 is determined by the value of the drain current. Further, the potential of the wiring ML is lower than the potential obtained by adding the threshold voltage Vthe of the light-emitting element 14 to the potential of the wiring CL, and the potential of the wiring VL is higher than the potential obtained by adding the threshold voltage Vth of the transistor 15 to the potential of the wiring ML. When the switch 17 is turned on, the drain current of the transistor 15 is extracted from the pixel 11 through the wiring ML.

  When the transistor 15 is a p-channel type, the anode of the light-emitting element 14 is electrically connected to the wiring CL. In addition, when the potential of the wiring CL is higher than the potential obtained by adding the threshold voltage Vthe of the light-emitting element 14 and the threshold voltage Vth of the transistor 15 to the potential of the wiring VL, the drain current of the transistor 15 is supplied to the light-emitting element 14. The The luminance of the light emitting element 14 is determined by the value of the drain current. Further, the potential of the wiring ML is higher than the potential obtained by subtracting the threshold voltage Vthe of the light-emitting element 14 from the potential of the wiring CL, and the potential of the wiring VL is higher than the potential obtained by subtracting the threshold voltage Vth of the transistor 15 from the potential of the wiring ML. When the switch 17 is turned on, the drain current of the transistor 15 is extracted from the pixel 11 through the wiring ML when the switch 17 is turned on.

  The capacitor 18 has a function of holding a potential difference between the gate of the transistor 15 and one of the source and the drain. However, the capacitor 18 is not necessarily provided in the pixel 11 when, for example, the gate capacitance formed between the gate of the transistor 15 and the semiconductor film is sufficiently large.

  The pixel 11 may further include other circuit elements such as a transistor, a capacitor, a resistor, and an inductor as well as the light-emitting element 14, the transistor 15, the switch 17, and the capacitor 18.

  The monitor circuit 12 has a function of generating a signal including the value of the current as data using the drain current of the transistor 15 extracted from the pixel 11 through the switch 17. The drain current of the transistor 15 includes the electrical characteristics of the transistor 15 as data. As the monitor circuit 12, for example, a current-voltage conversion circuit such as an integration circuit can be used.

  The image processing circuit 13 has a function of correcting an image signal input to the pixel 11 in accordance with the signal generated by the monitor circuit 12. Specifically, when it is determined from the signal generated by the monitor circuit 12 that the drain current of the transistor 15 is larger than a desired value, the image signal is corrected so that the drain current of the transistor 15 becomes small. Conversely, when it is determined from the signal generated by the monitor circuit 12 that the drain current of the transistor 15 is smaller than a desired value, the image signal is corrected so that the drain current of the transistor 15 is increased.

  By correcting the image signal, not only variations in threshold voltage of the transistors 15 existing between the pixels 11 but also variations in other electrical characteristics such as mobility of the transistors 15 can be corrected.

  When the switch 19 is on, the circuit 16 is in a conductive state with a wiring serving as a signal path between the pixel 11 and the monitor circuit 12. The wiring serving as a signal path is electrically connected to the wiring ML. Alternatively, the wiring ML may have a function as a wiring serving as a signal path. As the circuit 16, for example, a protection circuit having a function of preventing an overcurrent from flowing in the signal path can be used. Alternatively, as the circuit 16, a circuit having a function of supplying a predetermined potential to one of the source and the drain of the transistor 15 through the switch 17 when the gray scale is displayed in the pixel 11 according to the image signal can be used.

  Note that a current path for transmitting the drain current of the transistor 15 extracted from the pixel 11 to the monitor circuit 12, that is, a wiring, is provided in the panel in order to send the drain current from the plurality of pixels 11 to the monitor circuit 12. Be drawn around. Therefore, the wiring easily becomes a discharge path of charging phenomenon (charging), and a phenomenon (ESD: Electro-Static Discharge) in which the transistor is deteriorated or destroyed by the energy of discharge applied to the pixel 11 through the wiring. It can be caused. When a protection circuit is used as the circuit 16, since the circuit 16 functions as a discharge path, discharge energy can be prevented from flowing into the pixel 11, and ESD can be prevented from occurring in the pixel 11.

  In the pixel 11, when the voltage between the anode and the cathode of the light-emitting element 14 increases due to deterioration of the EL layer or the like, the potential of one of the source and the drain increases in the transistor 15, and a gate corresponding to the potential difference between the gate and the source. The voltage becomes smaller. In this case, the drain current of the transistor 15 supplied to the light emitting element 14 is reduced, and the luminance of the light emitting element 14 is reduced. However, by using a circuit having a function of supplying a predetermined potential to one of the source and the drain of the transistor 15 through the switch 17 as the circuit 16, the potential of the one of the source and the drain of the transistor 15 can be corrected. it can. Therefore, the drain current of the transistor 15 supplied to the light-emitting element 14 can be prevented from being reduced due to deterioration of the EL layer or the like, and a reduction in luminance of the light-emitting element 14 can be suppressed small.

  In the case where the potential of one of the source and the drain of the n-channel transistor 15 is corrected, the potential of the wiring ML is set higher than the potential obtained by adding the threshold voltage Vthe of the light-emitting element 14 to the potential of the wiring CL and the potential of the wiring VL. Is made lower than the potential obtained by subtracting the threshold voltage Vth of the transistor 15 from In the case where the potential of one of the source and the drain of the p-channel transistor 15 is corrected, the potential of the wiring ML is set lower than the potential obtained by subtracting the threshold voltage Vthe of the light-emitting element 14 from the potential of the wiring CL. Is made higher than the potential obtained by adding the threshold voltage Vth of the transistor 15 to this potential.

  Note that only one circuit 16 or a plurality of circuits 16 may be electrically connected to the current path between the pixel 11 and the monitor circuit 12. In either case, the conduction state between the circuit 16 and the current path is controlled by the switch 19.

  When the drain current of the transistor 15 is extracted from the pixel 11 through the switch 17, the switch 19 is turned off, so that the movement of charges between the drain current path and the circuit 16 can be prevented. Note that the drain current extracted from the pixel 11 when reading the electrical characteristics of the transistor 15 has a very small value of about several tens of nA to several hundreds of nA. Therefore, it is difficult to accurately read out the electrical characteristics of the transistor 15 when an off-current flows in the circuit 16 electrically connected to the wiring that becomes the path of the drain current. However, in one embodiment of the present invention, the switch 19 can be turned off to prevent charge transfer between the drain current path and the circuit 16, so that even if the drain current value extracted from the pixel 11 is small, The electric characteristic of the transistor 15 can be read accurately, and the current value supplied to the light emitting element 14 can be corrected so that the influence of the electric characteristic of the transistor 15 is reduced.

  For example, the switch 19 can be configured using one or more transistors. Alternatively, the switch 19 may use a capacitor in addition to one or a plurality of transistors.

  By using a transistor having a remarkably small off-state current for the switch 19, it is possible to more reliably prevent a charge transfer between the drain current path and the circuit 16 when the switch 19 is off. As a result, the electrical characteristics of the transistor 15 can be accurately read, and the current value supplied to the light-emitting element 14 can be more accurately corrected so that the influence of the electrical characteristics of the transistor 15 is reduced.

  Note that unless otherwise specified, off-state current in this specification refers to current that flows between a source and a drain of a transistor in a cutoff region.

  A transistor in which a channel formation region is formed in a semiconductor film having a wider band gap and lower intrinsic carrier density than silicon is suitable for use as the switch 19 because the off-state current can be significantly reduced. . As such a semiconductor, for example, an oxide semiconductor, gallium nitride, or the like having a band gap larger than twice that of silicon can be given. The transistor including the semiconductor can have extremely low off-state current compared to a transistor formed using a normal semiconductor such as silicon or germanium.

<Specific configuration example of light emitting device>
Next, an example of a more detailed configuration of the light emitting device 10 illustrated in FIG. 1 will be described. FIG. 2 is a block diagram illustrating an example of the structure of the light-emitting device 10 according to one embodiment of the present invention. In the block diagram, components are classified by function and shown as independent blocks. However, it is difficult to completely separate actual components by function, and one component is related to multiple functions. It can happen.

  2 includes a panel 25 having a plurality of pixels 11 in a pixel portion 24, a controller 26, a CPU 27, an image processing circuit 13, an image memory 28, a memory 29, a monitor circuit 12, and a switch. 19 and a circuit 16. In addition, the light emitting device 10 illustrated in FIG. 2 includes a drive circuit 30 and a drive circuit 31 on the panel 25.

  The CPU 27 decodes a command input from the outside or a command stored in a memory provided in the CPU 27 and executes the command by comprehensively controlling operations of various circuits included in the light emitting device 10. It has the function to do.

  The monitor circuit 12 generates a signal including the drain current value as data from the drain current output from the pixel 11. The memory 29 has a function of storing the data included in the signal.

  The image memory 28 has a function of storing the image data 32 input to the light emitting device 10. FIG. 2 illustrates the case where only one image memory 28 is provided in the light emitting device 10, but a plurality of image memories 28 may be provided in the light emitting device 10. For example, when a full color image is displayed on the pixel unit 24 by three image data 32 corresponding to hues such as red, blue, and green, an image memory 28 corresponding to each image data 32 is provided. May be.

  As the image memory 28, for example, a storage circuit such as a DRAM (Dynamic Random Access Memory) or SRAM (Static Random Access Memory) can be used. Alternatively, a VRAM (Video RAM) may be used for the image memory 28.

  The image processing circuit 13 has a function of writing the image data 32 to the image memory 28 and reading the image data 32 from the image memory 28 in accordance with a command from the CPU 27 and generating an image signal Sig from the image data 32. . In addition, the image processing circuit 13 has a function of reading data stored in the memory 29 in accordance with a command from the CPU 27 and correcting the image signal using the data.

  When the image signal Sig including the image data 32 is input, the controller 26 has a function of performing signal processing on the image signal Sig in accordance with the specifications of the panel 25 and supplying the processed signal to the panel 25. Further, the controller 26 has a function of controlling on / off selection (switching) of the switch 19 in accordance with a command from the CPU 27.

  The drive circuit 31 has a function of selecting the plurality of pixels 11 included in the pixel unit 24 for each row. The drive circuit 30 has a function of supplying the image signal Sig supplied from the controller 26 to the pixels 11 in the row selected by the drive circuit 31.

  The controller 26 has a function of supplying various drive signals used for driving the drive circuit 30 and the drive circuit 31 to the panel 25. The drive signals include a start pulse signal SSP that controls the operation of the drive circuit 30, a clock signal SCK, a latch signal LP, a start pulse signal GSP that controls the operation of the drive circuit 31, a clock signal GCK, and the like.

  Note that the light emitting device 10 may include an input device having a function of giving data and commands to the CPU 27 included in the light emitting device 10. As the input device, a keyboard, a pointing device, a touch panel, a sensor, or the like can be used.

<Pixel configuration example 1>
Next, a specific configuration example of the pixel 11 included in the light-emitting device 10 illustrated in FIG. 1 will be described.

  FIG. 3 shows an example of a circuit diagram of the pixel 11. The pixel 11 includes a transistor 17 t that functions as a switch 17, a capacitor 18, a light emitting element 14, and a transistor 20.

  The potential of the pixel electrode of the light emitting element 14 is controlled according to the image signal Sig input to the pixel 11. Further, the luminance of the light emitting element 14 is determined by a potential difference between the pixel electrode and the common electrode. For example, when an OLED is used as the light emitting element 14, one of the anode and the cathode functions as a pixel electrode, and the other functions as a common electrode. FIG. 3 illustrates the configuration of the pixel 11 using the anode of the light emitting element 14 as a pixel electrode and the cathode of the light emitting element 14 as a common electrode.

  The transistor 20 has a function of controlling a conduction state between the wiring SL and the gate of the transistor 15. In the transistor 15, one of a source and a drain is electrically connected to the anode of the light emitting element 14, and the other of the source and the drain is electrically connected to the wiring VL. The transistor 17 t has a function of controlling a conduction state between the wiring ML and one of the source and the drain of the transistor 15. One of the pair of electrodes of the capacitor 18 is electrically connected to the gate of the transistor 15, and the other is electrically connected to the anode of the light-emitting element 14.

  Further, switching of the transistor 20 is performed in accordance with the potential of the wiring GL electrically connected to the gate of the transistor 20. Switching of the transistor 17t is performed according to the potential of the wiring GL electrically connected to the gate of the transistor 17t.

  As the transistor included in the pixel 11, an oxide semiconductor, an amorphous semiconductor, a microcrystalline semiconductor, a polycrystalline semiconductor, or a single crystal semiconductor such as silicon or germanium can be used. When the transistor 20 includes an oxide semiconductor in a channel formation region, the off-state current of the transistor 20 can be extremely small. By using the transistor 20 having the above structure for the pixel 11, leakage of charge accumulated in the gate of the transistor 15 is compared with a case where a transistor formed of a normal semiconductor such as silicon or germanium is used for the transistor 20. Can be prevented.

  Therefore, when an image signal Sig having the same image information is written in the pixel portion over several consecutive frame periods like a still image, the drive frequency is lowered, in other words, pixels within a certain period. Even if the number of times of writing the image signal Sig to the part is reduced, the display of the image can be maintained. For example, a purified oxide semiconductor, which is purified by reducing impurities such as moisture or hydrogen serving as an electron donor (donor) and oxygen vacancies, is used for the semiconductor film of the transistor 20. Thus, the writing interval of the image signal Sig can be 10 seconds or longer, preferably 30 seconds or longer, more preferably 1 minute or longer. The longer the interval at which the image signal Sig is written, the more the power consumption can be reduced.

  In addition, since the potential of the image signal Sig can be held for a longer period, even if the capacitor 11 for holding the potential of the gate of the transistor 15 is not provided in the pixel 11, the displayed image quality is lowered. Can be prevented. Therefore, by not providing the capacitor element 18 or by reducing the size of the capacitor element 18, the aperture ratio of the pixel 11 can be increased, so that the lifetime of the light-emitting element 14 is increased. The reliability of the light emitting device 10 can be improved.

  In FIG. 3, the pixel 11 may further include other circuit elements such as a transistor, a diode, a resistance element, a capacitor element, and an inductor as necessary.

  In FIG. 3, each transistor may have at least a gate on one side of the semiconductor film, but may have a pair of gates with the semiconductor film interposed therebetween. When one of the pair of gates is a back gate, a normal gate and a back gate may be given the same potential, or only a fixed potential such as a ground potential may be given to the back gate. . By controlling the potential applied to the back gate, the threshold voltage of the transistor can be controlled. Further, by providing the back gate, the channel formation region is increased, and an increase in drain current can be realized. Further, by providing the back gate, a depletion layer can be easily formed in the semiconductor film, so that the S value can be improved.

  FIG. 3 illustrates the case where all transistors are n-channel transistors. In the case where all the transistors in the pixel 11 are the same channel type, some steps such as addition of an impurity element imparting one conductivity to the semiconductor film can be omitted in the transistor manufacturing process. Note that in the light-emitting device of one embodiment of the present invention, the transistors in the pixel 11 are not necessarily n-channel transistors. When the cathode of the light emitting element 14 is electrically connected to the wiring CL, at least the transistor 15 is preferably an n-channel type, and when the anode of the light emitting element 14 is electrically connected to the wiring CL, at least The transistor 15 is preferably a p-channel type.

  FIG. 3 illustrates the case where the transistor in the pixel 11 has a single gate structure with a single channel formation region, but one embodiment of the present invention has this structure. It is not limited. Any or all of the transistors in the pixel 11 may have a multi-gate structure having a plurality of channel formation regions by having a plurality of electrically connected gates.

<Example of correction operation>
Next, an example of correction operation of the pixel 11 illustrated in FIG. 3 will be described.

  FIG. 4 illustrates a timing chart of the potential of the wiring GL electrically connected to the pixel 11 illustrated in FIG. 3 and the potential of the image signal Sig supplied to the wiring SL. Note that the timing chart illustrated in FIG. 4 illustrates the case where all the transistors included in the pixel 11 illustrated in FIG. 3 are n-channel transistors.

  First, in the period t1, a high-level potential is applied to the wiring GL. Accordingly, the transistor 20 and the transistor 17t are turned on. Then, the potential Vdata of the image signal Sig is applied to the wiring SL, and the potential Vdata is applied to the gate of the transistor 15 through the transistor 20.

  Further, the potential Vano is applied to the wiring VL, and the potential Vcat is applied to the wiring CL. The potential Vano is preferably higher than the potential obtained by adding the threshold voltage Vthe of the light emitting element 14 and the threshold voltage Vth of the transistor 15 to the potential Vcat. By providing the potential difference between the wiring VL and the wiring CL, the value of the drain current of the transistor 15 is determined in accordance with the potential Vdata. The luminance of the light emitting element 14 is determined by supplying the drain current to the light emitting element 14.

  In the case where the transistor 15 is an n-channel transistor, in the period t1, the potential of the wiring ML is lower than the potential obtained by adding the threshold voltage Vthe of the light-emitting element 14 to the potential of the wiring CL, and the potential of the wiring VL is It is desirable that the potential be higher than the potential obtained by adding the threshold voltage Vth of the transistor 15 to this potential. With the above configuration, even when the switch 17 is on, the drain current of the transistor 15 can flow preferentially to the wiring ML instead of the light emitting element 14.

  Next, in the period t2, a low-level potential is applied to the wiring GL. Accordingly, the transistor 20 and the transistor 17t are turned off. When the transistor 20 is turned off, the potential Vdata is held at the gate of the transistor 15. Further, the potential Vano is applied to the wiring VL, and the potential Vcat is applied to the wiring CL. Therefore, the light emitting element 14 emits light according to the luminance determined in the period t1.

  Next, in a period t3, a high-level potential is applied to the wiring GL. Accordingly, the transistor 20 and the transistor 17t are turned on. In addition, the wiring SL is supplied with a potential such that the gate voltage of the transistor 15 is higher than the threshold voltage Vth. Further, the potential Vcat is applied to the wiring CL. The potential of the wiring ML is lower than the potential obtained by adding the threshold voltage Vthe of the light-emitting element 14 to the potential of the wiring CL, and the potential of the wiring VL is the potential obtained by adding the threshold voltage Vth of the transistor 15 to the potential of the wiring ML. Higher than. With the above configuration, the drain current of the transistor 15 can be preferentially passed through the wiring ML instead of the light emitting element 14.

  The drain current of the transistor 15 is supplied to the monitor circuit through the wiring ML. The monitor circuit generates a signal including the value of the drain current as information, using the drain current flowing through the wiring ML. In the light-emitting device according to one embodiment of the present invention, the value of the potential Vdata of the image signal Sig supplied to the pixel 11 can be corrected using the signal.

  Note that in the light-emitting device including the pixel 11 illustrated in FIG. 3, it is not always necessary to perform the operation in the period t3 after the operation in the period t2. For example, in the pixel 11, the operation in the period t3 may be performed after the operations in the periods t1 and t2 are repeated a plurality of times. In addition, after performing the operation in the period t3 in the pixels 11 in one row, an image signal corresponding to the minimum gradation value 0 is written in the pixels 11 in the one row in which the operation is performed, so that the light-emitting elements 14 are not emitting light. After the state, the operation in the period t3 may be performed in the pixels 11 in the next row.

<Connection between the pixel portion and a circuit electrically connected to a current path taken out from the pixel>
Next, an example of a connection configuration of the pixel portion 24, the switch 19, and the circuit 16 illustrated in FIG. 2 will be described with reference to FIG.

  5 includes a plurality of pixels 11, a plurality of wirings GL indicated by GL1 to wirings GLy, a plurality of wirings SL indicated by wirings SL1 to SLx, and wirings ML1 to MLx. A plurality of wirings ML and a plurality of wirings VL indicated by wirings VL1 to VLx are provided. The plurality of pixels 11 are electrically connected to at least one of the wirings GL, at least one of the wirings SL, at least one of the wirings ML, and at least one of the wirings VL, respectively.

  Note that the type and number of wirings provided in the pixel portion 24 can be determined by the configuration, number, and arrangement of the pixels 11. Specifically, in the pixel portion 24 illustrated in FIG. 5, the pixels 11 in x columns × y rows are arranged in a matrix, and the wirings GL1 to GLy, the wirings SL1 to SLx, the wirings ML1 to MLML, and the wirings A case where the VL1 to the wiring VLx are arranged in the pixel portion 24 is illustrated.

  The drain current extracted from the pixel 11 through the wirings ML1 to MLx is supplied to a monitor circuit (not shown) through the wiring TER. The circuit 16 is electrically connected to each wiring ML via the switch 19.

  The circuit 21 has a function of supplying a predetermined potential to the wiring ML in accordance with the potential input to the wiring PRE. For example, when the pixel 11 illustrated in FIG. 3 is operated according to the timing chart illustrated in FIG. 4, in a period t1, the potential from the circuit 21 to the wiring ML is higher than the potential obtained by adding the threshold voltage Vthe of the light-emitting element 14 to the potential of the wiring CL. A low potential may be supplied.

  Next, FIG. 6 illustrates a more specific example of the connection configuration of the pixel portion 24, the switch 19, and the circuit 16 illustrated in FIG. Further, FIG. 6 illustrates a configuration example of the sampling circuit 35 corresponding to a part of the drive circuit 30 illustrated in FIG. 2 and an example of a connection configuration between the sampling circuit 35 and the pixel unit 24.

  FIG. 6 illustrates a case where the sampling circuit 35 includes a plurality of transistors 35t, and the plurality of transistors 35t form a group every three. The three transistors 35t belonging to one set are supplied with the potential of the wiring SMP at their gates, and their switching is controlled in accordance with the potential. In FIG. 6, the potential of the wiring SMP1 is supplied to the gates of the three transistors 35t belonging to the first group, and the potential of the wiring SMP2 is supplied to the gates of the three transistors 35t belonging to the second group. The case is shown as an example. Note that the configuration of the transistor 35t belonging to the third and subsequent groups is omitted, but the potential of the wiring SMP different from that of the other groups is also supplied to the transistor 35t.

  Then, one of the three transistors 35t belonging to one set has a conductive state between the wiring 36R to which the image signal SigR corresponding to red is input and the wiring SL, and the potential of the wiring SMP input to the gate. According to the control function. In addition, another one of the three transistors 35t belonging to one set has a connection state between the wiring SL to which the image signal SigG corresponding to green is input and the wiring SL, and the wiring SMP input to the gate. It has a function of controlling in accordance with the potential. In addition, another one of the three transistors 35t belonging to one group has a connection state between the wiring 36B to which the image signal SigB corresponding to blue and the wiring SL are connected, and a wiring SMP input to the gate. It has a function of controlling in accordance with the potential.

  A plurality of pixels 11 are electrically connected to the plurality of wirings SL, respectively. The circuit 21 is electrically connected to the plurality of wirings ML that are electrically connected to the plurality of pixels 11, respectively. FIG. 6 illustrates the case where the circuit 21 includes the transistor 21t. The potential input to the wiring PRE is supplied to the gate of the transistor 21t. The transistor 21t has a function of controlling the conduction state between the wiring 33 and the wiring ML according to the potential of the wiring PRE input to the gate.

  The circuit 16 is electrically connected to the wiring ML via the switch 19. In FIG. 6, the transistor 34 having a function of controlling the conduction state between the wiring ML and the wiring TER in accordance with the potential of the wiring MSEL is provided.

<Configuration example of circuit and switch electrically connected to current path taken out from pixel>
FIG. 7 shows a specific configuration example of the circuit 16 and the switch 19.

  The circuit 16 illustrated in FIG. 7 includes n-channel transistors 90 to 93, and one of the source and the drain of each of the transistors 90 to 93 is electrically connected to the gate. The other of the source and the drain of the transistor 90 is electrically connected to the wiring 95 to which the high-level potential VH is applied, and the gate is electrically connected to the other of the source and the drain of the transistor 91. ing. The gate of the transistor 91 is electrically connected to the other of the source and the drain of the transistor 92. The gate of the transistor 92 is electrically connected to the other of the source and the drain of the transistor 93. The gate of the transistor 93 is electrically connected to a wiring 96 to which a low level potential VS is applied.

  FIG. 7 illustrates the case where the switch 19 includes the transistor 94. The transistor 94 has a function of controlling a conduction state between the gate of the transistor 91 and the wiring ML in accordance with the potential of the wiring PRO supplied to the gate. Specifically, the transistor 91 is turned on in a period in which gradation display is performed in the pixel. Further, the transistor 91 is turned off in a period in which the drain current of the transistor 15 is extracted from the pixel through the wiring ML.

  With the circuit 16 having the above structure, when the transistor 94 is in an on state, the energy of discharge flowing through the wiring ML flows through the wiring 95 or the wiring 96 of the circuit 16. Therefore, it is possible to prevent discharge energy from flowing into the pixel 11 and to prevent occurrence of ESD in the pixel 11.

<Example 2 of pixel configuration>
Next, a specific configuration example of the pixel 11 will be described.

  FIG. 8 shows an example of a circuit diagram of the pixel 11. The pixel 11 includes a transistor 15, a transistor 17 t functioning as a switch 17, a capacitor 18, a light emitting element 14, and transistors 40 to 43.

  The potential of the pixel electrode of the light emitting element 14 is controlled according to the image signal Sig input to the pixel 11. Further, the luminance of the light emitting element 14 is determined by a potential difference between the pixel electrode and the common electrode. For example, when an OLED is used as the light emitting element 14, one of the anode and the cathode functions as a pixel electrode, and the other functions as a common electrode. FIG. 8 illustrates the configuration of the pixel 11 using the anode of the light emitting element 14 as a pixel electrode and the cathode of the light emitting element 14 as a common electrode.

  The transistor 43 has a function of controlling a conduction state between the wiring 44 and the gate of the transistor 15. The transistor 41 has a function of controlling a conduction state between one of the pair of electrodes of the capacitor 18 and the gate of the transistor 15. The transistor 40 has a function of controlling a conduction state between the wiring SL and one of the pair of electrodes of the capacitor 18. The other of the pair of electrodes of the capacitor 18 is electrically connected to one of the source and the drain of the transistor 15. The transistor 42 has a function of controlling a conduction state between one of the source and the drain of the transistor 15 and the pixel electrode of the light-emitting element 14. The transistor 17t has a function of controlling electrical continuity between one of the source and the drain of the transistor 15 and the wiring ML. The other of the source and the drain of the transistor 15 is electrically connected to the wiring VL.

  Further, switching of the transistor 40 and the transistor 43 is controlled in accordance with the potential of the wiring GLA electrically connected to the gates of the transistor 40 and the transistor 43. Switching of the transistors 41 and 42 is controlled in accordance with the potential of the wiring GLB electrically connected to the gates of the transistors 41 and 42. Switching of the transistor 17t is controlled in accordance with the potential of the wiring GLC electrically connected to the gate of the transistor 17t.

  As the transistor included in the pixel 11, an oxide semiconductor, an amorphous semiconductor, a microcrystalline semiconductor, a polycrystalline semiconductor, or a single crystal semiconductor such as silicon or germanium can be used. When the transistor 40, the transistor 41, and the transistor 43 include an oxide semiconductor in a channel formation region, off-state current of the transistor 40, the transistor 41, and the transistor 43 can be extremely small. Then, by using the transistor 40, the transistor 41, and the transistor 43 having the above-described structure for the pixel 11, compared with a case where a transistor formed of a semiconductor such as normal silicon or germanium is used for the transistor 40, the transistor 41, and the transistor 43. Thus, leakage of charge accumulated in the gate of the transistor 15 can be prevented.

  Therefore, when an image signal Sig having the same image information is written in the pixel portion over several consecutive frame periods like a still image, the drive frequency is lowered, in other words, pixels within a certain period. Even if the number of times of writing the image signal Sig to the part is reduced, the display of the image can be maintained. For example, by using a highly purified oxide semiconductor for the semiconductor films of the transistor 40, the transistor 41, and the transistor 43, the writing interval of the image signal Sig is 10 seconds or longer, preferably 30 seconds or longer, more preferably 1 minute. This can be done. The longer the interval at which the image signal Sig is written, the more the power consumption can be reduced.

  In addition, since the potential of the image signal Sig can be held for a longer period, even if the capacitor 11 for holding the potential of the gate of the transistor 15 is not provided in the pixel 11, the displayed image quality is lowered. Can be prevented. Therefore, by not providing the capacitor element 18 or by reducing the size of the capacitor element 18, the aperture ratio of the pixel 11 can be increased, so that the life of the light-emitting element 14 can be extended and extended. The reliability of the light emitting device can be improved.

  In FIG. 8, the pixel 11 may further include other circuit elements such as a transistor, a diode, a resistance element, a capacitor element, and an inductor as necessary.

  In FIG. 8, each transistor only needs to have at least one gate on one side of the semiconductor film, but may have a pair of gates with the semiconductor film interposed therebetween. When one of the pair of gates is a back gate, a normal gate and a back gate may be given the same potential, or only a fixed potential such as a ground potential may be given to the back gate. . By controlling the potential applied to the back gate, the threshold voltage of the transistor can be controlled. Further, by providing the back gate, the channel formation region is increased, and an increase in drain current can be realized. Further, by providing the back gate, a depletion layer can be easily formed in the semiconductor film, so that the S value can be improved.

  FIG. 8 illustrates the case where all transistors are n-channel type. In the case where all the transistors in the pixel 11 are the same channel type, some steps such as addition of an impurity element imparting one conductivity to the semiconductor film can be omitted in the transistor manufacturing process. Note that in the light-emitting device of one embodiment of the present invention, the transistors in the pixel 11 are not necessarily n-channel transistors. When the cathode of the light emitting element 14 is electrically connected to the wiring CL, at least the transistor 15 is preferably an n-channel type, and when the anode of the light emitting element 14 is electrically connected to the wiring CL, at least The transistor 15 is preferably a p-channel type.

  FIG. 8 illustrates the case where the transistor in the pixel 11 has a single gate structure with a single channel formation region by including a single gate; however, one embodiment of the present invention has this structure. It is not limited. Any or all of the transistors in the pixel 11 may have a multi-gate structure having a plurality of channel formation regions by having a plurality of electrically connected gates.

  Next, an example of the operation of the pixel 11 illustrated in FIG. 8 will be described. FIG. 9 illustrates a timing chart of the potentials of the wiring GLA, the wiring GLB, and the wiring GLC electrically connected to the pixel 11 illustrated in FIG. 8 and the potential of the image signal Sig supplied to the wiring SL. Note that the timing chart illustrated in FIG. 9 illustrates the case where all the transistors included in the pixel 11 illustrated in FIG. 8 are n-channel transistors.

  First, in the period t1, a low-level potential is applied to the wiring GLA, a high-level potential is applied to the wiring GLB, and a high-level potential is applied to the wiring GLC. Accordingly, the transistor 41, the transistor 42, and the transistor 17t are turned on, and the transistor 40 and the transistor 43 are turned off. When the transistor 42 and the transistor 17t are turned on, the potential V0 of the wiring ML is supplied to one of the source and the drain of the transistor 15 and the other of the pair of electrodes of the capacitor 18 (illustrated as a node A).

  Further, the potential Vano is applied to the wiring VL, and the potential Vcat is applied to the wiring CL. The potential Vano is preferably higher than the potential obtained by adding the threshold voltage Vthe of the light emitting element 14 to the potential V0. Further, the potential V0 is desirably lower than a potential obtained by adding the threshold voltage Vthe of the light emitting element 14 to the potential Vcat. By setting the potential V0 to the above value, current can be prevented from flowing through the light-emitting element 14 in the period t1.

  Next, when a low-level potential is applied to the wiring GLB, the transistor 41 and the transistor 42 are turned off, and the node A is held at the potential V0.

  Next, in the period t2, a high-level potential is applied to the wiring GLA, a low-level potential is applied to the wiring GLB, and a low-level potential is applied to the wiring GLC. Accordingly, the transistor 40 and the transistor 43 are turned on, and the transistor 41, the transistor 42, and the transistor 17t are turned off.

  Note that when shifting from the period t1 to the period t2, it is preferable to switch the potential applied to the wiring GLC from the high level to the low level after switching the potential applied to the wiring GLA from the low level to the high level. By performing such an operation, fluctuation of the potential of the node A due to switching of the potential applied to the wiring GLA can be prevented.

  Further, the potential Vano is applied to the wiring VL, and the potential Vcat is applied to the wiring CL. Then, the potential Vdata of the image signal Sig is applied to the wiring SL, and the potential V1 is applied to the wiring GLB. The potential V1 is preferably higher than the potential obtained by adding the threshold voltage Vth of the transistor 15 to the potential Vcat and lower than the potential obtained by adding the threshold voltage Vth of the transistor 15 to the potential Vano.

  In the pixel configuration illustrated in FIG. 8, even if the potential V1 is higher than the value obtained by adding the threshold voltage Vthe of the light emitting element 14 to the potential Vcat, the light emitting element 14 does not emit light as long as the transistor 42 is off. Therefore, the range of values that can be set as the potential V0 can be widened, and the range of values that can be taken as V1-V0 can also be widened. Accordingly, since the degree of freedom in setting the value of V1-V0 is increased, even when the time required for acquiring the threshold voltage of the transistor 15 is shortened or when the acquisition period of the threshold voltage is limited, the transistor 15 can be accurately set. The threshold voltage can be acquired.

  Through the above operation, a potential V1 higher than the potential obtained by adding the threshold voltage to the potential of the node A is input to the gate of the transistor 15 (illustrated as the node B), and the transistor 15 is turned on. Therefore, the charge of the capacitor 18 is released through the transistor 15, and the potential of the node A that has been the potential V0 starts to increase. Finally, when the potential of the node A converges to V1-Vth and the gate voltage of the transistor 15 converges to the threshold voltage Vth, the transistor 15 is turned off.

  One of the pair of electrodes of the capacitor 18 (illustrated as a node C) is supplied with the potential Vdata of the image signal Sig supplied to the wiring SL through the transistor 40.

  Next, in a period t3, a low-level potential is applied to the wiring GLA, a high-level potential is applied to the wiring GLB, and a low-level potential is applied to the wiring GLC. Accordingly, the transistor 41 and the transistor 42 are turned on, and the transistor 40, the transistor 43, and the transistor 17t are turned off.

  Note that when shifting from the period t2 to the period t3, the potential applied to the wiring GLB is preferably switched from the low level to the high level after the potential applied to the wiring GLA is switched from the high level to the low level. With the above structure, potential fluctuation at the node A due to switching of the potential applied to the wiring GLA can be prevented.

  Further, the potential Vano is applied to the wiring VL, and the potential Vcat is applied to the wiring CL.

  Through the above operation, the potential Vdata is applied to the node B, so that the gate voltage of the transistor 15 becomes Vdata−V1 + Vth. Therefore, the gate voltage of the transistor 15 can be set to a value in consideration of the threshold voltage Vth. With the above structure, variation in the threshold voltage Vth of the transistor 15 can be suppressed. Accordingly, variation in the current value supplied to the light emitting element 14 can be suppressed, and uneven luminance of the light emitting device can be reduced.

  Note that by increasing the variation in potential applied to the wiring GLB, variation in threshold voltage of the transistor 42 can be prevented from affecting the current value supplied to the light-emitting element 14. That is, the high level potential applied to the wiring GLB is sufficiently larger than the threshold voltage of the transistor 42, and the low level potential applied to the wiring GLB is sufficiently smaller than the threshold voltage of the transistor 42. Switching off can be performed reliably, and the variation in threshold voltage of the transistor 42 can be prevented from affecting the current value of the light emitting element 14.

  Next, in a period t4, a low-level potential is applied to the wiring GLA, a low-level potential is applied to the wiring GLB, and a high-level potential is applied to the wiring GLC. Accordingly, the transistor 17t is turned on, and the transistors 40 to 43 are turned off.

  Further, the potential Vano is applied to the wiring VL, and the wiring ML is electrically connected to the monitor circuit.

  With the above operation, the drain current Id of the transistor 15 flows to the wiring ML not through the light emitting element 14 but through the transistor 17t. The monitor circuit generates a signal including the value of the drain current Id as information, using the drain current Id flowing through the wiring ML. In the light-emitting device according to one embodiment of the present invention, the value of the potential Vdata of the image signal Vsig supplied to the pixel 11 can be corrected using the signal.

  Note that in the light-emitting device including the pixel 11 illustrated in FIG. 8, it is not always necessary to perform the operation in the period t4 after the operation in the period t3. For example, in the light-emitting device, the operation in the period t4 may be performed after the operations in the periods t1 to t3 are repeated a plurality of times. In addition, after performing the operation in the period t4 in the pixels 11 in one row, an image signal corresponding to the minimum gradation value 0 is written in the pixels 11 in the row in which the operation is performed, so that the light-emitting elements 14 do not emit light. After the state, the operation in the period t4 may be performed in the pixels 11 in the next row.

  In the light-emitting device having the pixel 11 shown in FIG. 8, since the other of the source and the drain of the transistor 15 and the gate of the transistor 15 are electrically separated, each potential can be controlled individually. Therefore, in the period t2, the other potential of the source and the drain of the transistor 15 can be set higher than a potential obtained by adding the threshold voltage Vth to the gate potential of the transistor 15. Therefore, when the transistor 15 is normally on, that is, when the threshold voltage Vth has a negative value, in the transistor 15, until the other potential of the source and the drain becomes higher than the gate potential V1. Charges can be stored in the capacitor element 18. Therefore, in the light-emitting device of one embodiment of the present invention, the threshold voltage can be acquired in the period t2 even when the transistor 15 is normally on, and the value including the threshold voltage Vth can be obtained in the period t3. The gate voltage of the transistor 15 can be set.

  Therefore, in the pixel 11 illustrated in FIG. 8, for example, when an oxide semiconductor is used for the semiconductor film of the transistor 15, even when the transistor 15 is normally on, display unevenness can be reduced and display with high image quality can be performed. Can do.

  In the operation example of the pixel 11 shown in FIG. 8 as described above, threshold voltage correction (hereinafter referred to as internal correction) in the pixel 11 and image signal correction (hereinafter referred to as external correction) in the image processing circuit 13 are performed. Do both). Even when external correction is performed without performing internal correction, not only variation in the threshold voltage of the transistor 15 existing between the pixels 11 but also variation in electrical characteristics of the transistor 15 other than the threshold voltage, such as mobility, It can be corrected. However, in the case where internal correction is performed in addition to external correction, correction of the threshold voltage minus shift or plus shift is performed by internal correction. Therefore, in the external correction, variation in electrical characteristics other than the threshold voltage in the transistor 15 such as mobility may be corrected. Therefore, when the internal correction is performed in addition to the external correction, the amplitude of the potential of the image signal after the correction can be suppressed smaller than when only the external correction is performed. Therefore, since the amplitude of the potential of the image signal is too large, the potential difference of the image signal between the gradation values becomes large, and it becomes difficult to express a change in luminance in the image with a smooth gradation. Can be prevented, and deterioration of image quality can be prevented.

<Pixel Configuration Example 3>
Next, a specific configuration example of the pixel 11 different from that in FIG. 8 will be described.

  FIG. 10 shows an example of a circuit diagram of the pixel 11. The pixel 11 includes a transistor 15, a transistor 17 t that functions as the switch 17, a capacitor 18, a light-emitting element 14, transistors 50 to 53, and a capacitor 55.

  The potential of the pixel electrode of the light emitting element 14 is controlled according to the image signal Sig input to the pixel 11. Further, the luminance of the light emitting element 14 is determined by a potential difference between the pixel electrode and the common electrode. For example, when an OLED is used as the light emitting element 14, one of the anode and the cathode functions as a pixel electrode, and the other functions as a common electrode. FIG. 10 illustrates the configuration of the pixel 11 using the anode of the light emitting element 14 as a pixel electrode and the cathode of the light emitting element 14 as a common electrode.

  The transistor 50 has a function of controlling electrical continuity between the wiring SL and one of the pair of electrodes of the capacitor 18. The other of the pair of electrodes of the capacitor 18 is electrically connected to the gate of the transistor 15. The transistor 53 has a function of controlling a conduction state between the wiring 54 and the gate of the transistor 15. The transistor 51 has a function of controlling a conduction state between one of the pair of electrodes of the capacitor 18 and one of the source and the drain of the transistor 15. The transistor 52 has a function of controlling a conduction state between one of the source and the drain of the transistor 15 and the anode of the light-emitting element 14. The transistor 17t has a function of controlling electrical continuity between one of the source and the drain of the transistor 15 and the wiring ML. Further, in FIG. 10, the other of the source and the drain of the transistor 15 is electrically connected to the wiring VL. One of the pair of electrodes included in the capacitor 55 is electrically connected to one of the pair of electrodes of the capacitor 18, and the other is electrically connected to one of the source and the drain of the transistor 15. .

  Further, the switching of the transistor 50 is controlled in accordance with the potential of the wiring GLC electrically connected to the gate of the transistor 50. Switching of the transistors 51 and 53 is controlled in accordance with the potential of the wiring GLB electrically connected to the gates of the transistors 51 and 53. Switching of the transistor 52 is controlled in accordance with the potential of the wiring GLD electrically connected to the gate of the transistor 52. Switching of the transistor 17t is controlled according to the potential of the wiring GLA electrically connected to the gate of the transistor 17t.

  As the transistor included in the pixel 11, an oxide semiconductor, an amorphous semiconductor, a microcrystalline semiconductor, a polycrystalline semiconductor, or a single crystal semiconductor such as silicon or germanium can be used. When the transistor 53 includes an oxide semiconductor in a channel formation region, the off-state current of the transistor 53 can be extremely small. By using the transistor 53 having the above structure for the pixel 11, leakage of charge accumulated at the gate of the transistor 15 can be obtained as compared with a case where a transistor formed of a normal semiconductor such as silicon or germanium is used for the transistor 53. Can be prevented.

  Therefore, when an image signal Sig having the same image information is written in the pixel portion over several consecutive frame periods like a still image, the drive frequency is lowered, in other words, pixels within a certain period. Even if the number of times of writing the image signal Sig to the part is reduced, the display of the image can be maintained. For example, when a highly purified oxide semiconductor is used for the semiconductor film of the transistor 50, the writing interval of the image signal Sig can be 10 seconds or longer, preferably 30 seconds or longer, more preferably 1 minute or longer. . The longer the interval at which the image signal Sig is written, the more the power consumption can be reduced.

  In addition, since the potential of the image signal Sig can be held for a longer period, even if the capacitor 11 for holding the potential of the gate of the transistor 15 is not provided in the pixel 11, the displayed image quality is lowered. Can be prevented. Therefore, by not providing the capacitor element 18 or by reducing the size of the capacitor element 18, the aperture ratio of the pixel 11 can be increased, so that the lifetime of the light-emitting element 14 is increased. The reliability of the light emitting device 10 can be improved.

  In FIG. 10, the pixel 11 may further include other circuit elements such as a transistor, a diode, a resistance element, a capacitor element, and an inductor as necessary.

  In FIG. 10, each transistor may have at least a gate on one side of the semiconductor film, but may have a pair of gates with the semiconductor film interposed therebetween. When one of the pair of gates is a back gate, a normal gate and a back gate may be given the same potential, or only a fixed potential such as a ground potential may be given to the back gate. . By controlling the potential applied to the back gate, the threshold voltage of the transistor can be controlled. Further, by providing the back gate, the channel formation region is increased, and an increase in drain current can be realized. Further, by providing the back gate, a depletion layer can be easily formed in the semiconductor film, so that the S value can be improved.

  FIG. 10 illustrates the case where all transistors are n-channel type. In the case where all the transistors in the pixel 11 are the same channel type, some steps such as addition of an impurity element imparting one conductivity to the semiconductor film can be omitted in the transistor manufacturing process. Note that in the light-emitting device of one embodiment of the present invention, the transistors in the pixel 11 are not necessarily n-channel transistors. When the cathode of the light emitting element 14 is electrically connected to the wiring CL, at least the transistor 15 is preferably an n-channel type, and when the anode of the light emitting element 14 is electrically connected to the wiring CL, at least The transistor 15 is preferably a p-channel type.

  FIG. 10 illustrates the case where the transistor in the pixel 11 has a single gate structure with a single channel formation region by including a single gate; however, one embodiment of the present invention has this structure. It is not limited. Any or all of the transistors in the pixel 11 may have a multi-gate structure having a plurality of channel formation regions by having a plurality of electrically connected gates.

  FIG. 11 illustrates a timing chart of the potentials of the wirings GLA to GLD electrically connected to the pixel 11 illustrated in FIG. 10 and the potential of the image signal Sig supplied to the wiring SL. Note that the timing chart illustrated in FIG. 11 exemplifies a case where all the transistors included in the pixel 11 illustrated in FIG. 10 are n-channel transistors.

  First, in the period t1, a high-level potential is applied to the wiring GLA, a high-level potential is applied to the wiring GLB, a low-level potential is applied to the wiring GLC, and a low-level potential is applied to the wiring GLD. Accordingly, the transistor 51, the transistor 53, and the transistor 17t are turned on, and the transistor 50 and the transistor 52 are turned off. Through the above operation, the potential Vi2 of the wiring 54 is supplied to the gate of the transistor 15, and the potential Vi1 of the wiring ML is supplied to one of the source and the drain of the transistor 15.

  Note that the potential Vi1 is preferably lower than a potential obtained by adding the threshold voltage Vthe of the light-emitting element 14 to the potential Vcat. Further, the potential Vi2 is preferably higher than the potential obtained by adding the threshold voltage Vth of the transistor 15 to the potential Vi1. Therefore, the gate voltage of the transistor 15 is Vi2-Vi1, and the transistor 15 is turned on.

  Further, the potential Vi1 is applied to the wiring VL, and the potential Vcat is applied to the wiring CL.

  Next, in a period t2, a low-level potential is applied to the wiring GLA, a high-level potential is applied to the wiring GLB, a low-level potential is applied to the wiring GLC, and a low-level potential is applied to the wiring GLD. Accordingly, the transistor 51 and the transistor 53 are turned on, and the transistor 50, the transistor 52, and the transistor 17t are turned off. Through the above operation, the potential Vi <b> 2 is held at the gate of the transistor 15. Further, the potential Vi2 is applied to the wiring VL, and the potential Vcat is applied to the wiring CL.

  Through the above operation, the charge of the capacitor 18 is released through the transistor 15 which is turned on, and the potential of one of the source and the drain of the transistor 15 which has been the potential Vi1 starts to increase. Finally, when the potential of one of the source and the drain of the transistor 15 converges to Vi2-Vth and the gate voltage of the transistor 15 converges to the threshold voltage Vth, the transistor 15 is turned off.

  Note that in the pixel configuration illustrated in FIG. 10, the light emitting element 14 does not emit light as long as the transistor 52 is off even if the potential Vi2 is higher than the value obtained by adding the threshold voltage Vthe of the light emitting element 14 to the potential Vcat. Therefore, the range of values that can be set as the potential Vi1 can be increased, and the range of values that can be taken as Vi2-Vi1 can also be increased. Therefore, the degree of freedom in setting the value of Vi2-Vi1 is increased, so that even when the time required for acquiring the threshold voltage of the transistor 15 is shortened or when the threshold voltage acquisition period is limited, the transistor 15 can be accurately set. The threshold voltage can be acquired.

  Next, in a period t3, a high-level potential is applied to the wiring GLA, a low-level potential is applied to the wiring GLB, a high-level potential is applied to the wiring GLC, and a low-level potential is applied to the wiring GLD. Accordingly, the transistor 50 and the transistor 17t are turned on, and the transistor 51, the transistor 52, and the transistor 53 are turned off. The wiring SL is supplied with the potential Vdata of the image signal Sig, and the potential Vdata is supplied to one of the pair of electrodes of the capacitor 18 through the transistor 50.

  Since the transistor 53 is off, the gate of the transistor 15 is in a floating state. Further, since the threshold voltage Vth is held in the capacitor 18, when the potential Vdata is applied to one of the pair of electrodes of the capacitor 18, the potential of the pair of electrodes of the capacitor 18 is determined according to the law of charge conservation. The potential of the gate of the transistor 15 that is electrically connected to the other of the transistors is Vdata + Vth. In addition, the potential Vi1 of the wiring ML is supplied to one of the source and the drain of the transistor 15 through the transistor 17t. Therefore, the voltage Vdata−Vi1 is applied to the capacitor 55, and the gate voltage of the transistor 15 is Vth + Vdata−Vi1.

  Note that when shifting from the period t2 to the period t3, the potential applied to the wiring GLB is preferably switched from the low level to the high level after the potential applied to the wiring GLB is switched from the high level to the low level. With the above structure, the potential at the gate of the transistor 15 can be prevented from changing by switching the potential applied to the wiring GLC.

  Next, in a period t4, a low-level potential is applied to the wiring GLA, a low-level potential is applied to the wiring GLB, a low-level potential is applied to the wiring GLC, and a high-level potential is applied to the wiring GLD. Accordingly, the transistor 52 is turned on, and the transistor 50, the transistor 51, the transistor 53, and the transistor 17t are turned off.

  Further, the potential Vi2 is applied to the wiring VL, and the potential Vcat is applied to the wiring CL.

  Through the above operation, the threshold voltage Vth is held in the capacitor 18, the voltage Vdata−Vi1 is held in the capacitor 55, the anode of the light emitting element 14 becomes the potential Vel, the gate potential of the transistor 15 becomes the potential Vdata + Vth + Vel−Vi1, The gate voltage of the transistor 15 is Vdata + Vth−Vi1.

  Note that the potential Vel is a potential that is set when a current flows through the light-emitting element 14 through the transistor 15. Specifically, it is set to a potential between the potential Vi2 and the potential Vcat.

  Therefore, the gate voltage of the transistor 15 can be set to a value in consideration of the threshold voltage Vth. With the above structure, variation in the threshold voltage Vth of the transistor 15 can be suppressed. Therefore, variation in the current value supplied to the light-emitting element 14 can be suppressed, and uneven luminance in the light-emitting device can be reduced.

  Note that by increasing the variation in potential applied to the wiring GLD, variation in threshold voltage of the transistor 52 can be prevented from affecting the current value supplied to the light-emitting element 14. That is, the transistor 52 is turned on when the high-level potential applied to the wiring GLD is sufficiently larger than the threshold voltage of the transistor 52 and the low-level potential applied to the wiring GLD is sufficiently smaller than the threshold voltage of the transistor 52. It is possible to reliably switch off, and to prevent the variation in threshold voltage of the transistor 52 from affecting the current value of the light-emitting element 14.

  Next, in a period t5, a high-level potential is applied to the wiring GLA, a low-level potential is applied to the wiring GLB, a low-level potential is applied to the wiring GLC, and a low-level potential is applied to the wiring GLD. Accordingly, the transistor 17t is turned on, and the transistor 53, the transistor 50, the transistor 51, and the transistor 52 are turned off.

  Further, the potential Vi2 is applied to the wiring VL, and the wiring ML is electrically connected to the monitor circuit.

  With the above operation, the drain current Id of the transistor 15 flows to the wiring ML not through the light emitting element 14 but through the transistor 17t. The monitor circuit generates a signal including the value of the drain current Id as information, using the drain current Id flowing through the wiring ML. In the light-emitting device according to one embodiment of the present invention, the value of the potential Vdata of the image signal Vsig supplied to the pixel 11 can be corrected using the signal.

  Note that in the light-emitting device including the pixel 11 illustrated in FIG. 10, it is not always necessary to perform the operation in the period t5 after the operation in the period t4. For example, in the light-emitting device, the operation in the period t5 may be performed after the operations in the periods t1 to t4 are repeated a plurality of times. In addition, after performing the operation in the period t5 in the pixels 11 in one row, an image signal corresponding to the minimum gradation value 0 is written in the pixels 11 in the row in which the operation is performed, so that the light-emitting elements 14 do not emit light. After the state, the operation in the period t5 may be performed in the pixels 11 in the next row.

  In the light-emitting device having the pixel 11 shown in FIG. 10, since the other of the source and the drain of the transistor 15 and the gate of the transistor 15 are electrically separated, each potential can be controlled individually. Therefore, in the period t2, the other potential of the source and the drain of the transistor 15 can be set higher than a potential obtained by adding the threshold voltage Vth to the gate potential of the transistor 15. Therefore, when the transistor 15 is normally on, that is, when the threshold voltage Vth has a negative value, the capacitor 18 is charged until the source potential becomes higher than the gate potential in the transistor 15. Can be accumulated. Therefore, in the light-emitting device of one embodiment of the present invention, the threshold voltage can be acquired in the period t2 even when the transistor 15 is normally on, and the value including the threshold voltage Vth can be obtained in the period t4. The gate voltage of the transistor 15 can be set.

  Therefore, in the light-emitting device according to one embodiment of the present invention, for example, when an oxide semiconductor is used for a semiconductor film of the transistor 15, even when the transistor 15 is normally on, display unevenness can be reduced and display with high image quality can be performed. It can be performed.

  In the operation example of the pixel 11 shown in FIG. 10 as described above, both internal correction and external correction are performed. Even when external correction is performed without performing internal correction, not only variation in the threshold voltage of the transistor 15 existing between the pixels 11 but also variation in electrical characteristics of the transistor 15 other than the threshold voltage, such as mobility, It can be corrected. However, in the case where internal correction is performed in addition to external correction, correction of the threshold voltage minus shift or plus shift is performed by internal correction. Therefore, in the external correction, variation in electrical characteristics other than the threshold voltage in the transistor 15 such as mobility may be corrected. Therefore, when the internal correction is performed in addition to the external correction, the amplitude of the potential of the image signal after the correction can be suppressed smaller than when only the external correction is performed. Therefore, since the amplitude of the potential of the image signal is too large, the potential difference of the image signal between the gradation values becomes large, and it becomes difficult to express a change in luminance in the image with a smooth gradation. Can be prevented, and deterioration of image quality can be prevented.

<Configuration example of monitor circuit>
Next, a configuration example of the monitor circuit 12 is shown in FIG. The monitor circuit 12 illustrated in FIG. 12 includes an operational amplifier 60, a capacitive element 61, and a switch 62.

  One of the pair of electrodes included in the capacitor 61 is electrically connected to the inverting input terminal (−) of the operational amplifier 60, and the other of the pair of electrodes included in the capacitor 61 is electrically connected to the output terminal of the operational amplifier 60. Has been. The switch 62 has a function of discharging the charge accumulated in the capacitor 61. Specifically, the switch 62 has a function of controlling a conduction state between a pair of electrodes included in the capacitor 61. The non-inverting input terminal (+) of the operational amplifier 60 is electrically connected to the wiring 68, and the potential Vano is supplied to the wiring 68.

  Note that in the case where the pixel 11 illustrated in FIG. 8 operates according to the timing chart illustrated in FIG. 9, the potential Vano or the potential V0 is supplied to the wiring 68. When the pixel 11 illustrated in FIG. 10 operates according to the timing chart illustrated in FIG. 11, the potential Vano or the potential Vi <b> 1 is supplied to the wiring 68.

  In order to perform external correction, when a current is taken out from the pixel 11 via the wiring ML, first, the monitor circuit 12 is made to function as a voltage follower to supply the potential Vano to the wiring ML, and then the monitor circuit 12 is By functioning as an integration circuit, the current extracted from the pixel 11 is converted into a voltage. Specifically, by turning on the switch 62, the potential Vano supplied to the wiring 68 is supplied to the wiring ML through the monitor circuit 12, and then the switch 62 is turned off. When the drain current extracted from the pixel 11 is supplied to the wiring TER with the switch 62 turned off, electric charge is accumulated in the capacitor 61 and a voltage is generated between the pair of electrodes included in the capacitor 61. Since the voltage is proportional to the total amount of drain current supplied to the wiring TER, the wiring OUT electrically connected to the output terminal of the operational amplifier 60 has a potential corresponding to the total amount of drain current within a predetermined period. ,Given.

  Further, in order to perform internal correction in the pixel 11 shown in FIG. 8, when the potential V0 is supplied to the wiring ML of the pixel 11, the monitor circuit 12 is caused to function as a voltage follower. Specifically, by turning on the switch 62, the potential V0 supplied to the wiring 68 can be supplied to the wiring ML via the monitor circuit 12.

  Further, in order to perform internal correction in the pixel 11 shown in FIG. 10, when the potential Vi1 is supplied to the wiring ML of the pixel 11, the monitor circuit 12 functions as a voltage follower. Specifically, by turning on the switch 62, the potential Vi1 supplied to the wiring 68 can be supplied to the wiring ML via the monitor circuit 12.

  In the case of the pixel 11 shown in FIG. 8, the potential V0 is supplied to the wiring ML when performing internal correction, and the potential Vano is supplied to the wiring ML when performing external correction. The potential supplied to the wiring ML can be switched by switching the potential supplied to the wiring 68 of the monitor circuit 12 between the potential Vano and the potential V0. In the case of the pixel 11 shown in FIG. 10, the potential Vi1 is supplied to the wiring ML when performing internal correction, and the potential Vano is supplied to the wiring ML when performing external correction. The potential supplied to the wiring ML can be switched by switching the potential supplied to the wiring 68 of the monitor circuit 12 between the potential Vano and the potential Vi1.

  In the case where the circuit 21 illustrated in FIG. 6 is electrically connected to the wiring ML, the potential V0 or the potential Vi1 may be supplied to the wiring 33. In this case, when performing internal correction, the potential 0 or the potential Vi1 of the wiring 33 can be supplied to the wiring ML, and when performing external correction, the potential Vano can be supplied from the monitor circuit 12 to the wiring ML via the wiring TER. . In this case, the potential Vano may be supplied to the wiring 68 of the monitor circuit 12 without switching to another potential.

<Pixel layout>
Next, an example of the layout of the pixel 11 illustrated in FIG. 3 will be described. FIG. 13 shows a top view of the pixel 11 shown in FIG. 3 as an example. In FIG. 13, various insulating films and the light emitting element 14 are omitted in order to clarify the layout of the pixel 11.

  The transistor 20 includes a conductive film 501 having a function as a gate, a semiconductor film 502, and a conductive film 503 and a conductive film 504 which are electrically connected to the semiconductor film 502 and have a function as a source or a drain. The conductive film 501 functions as the wiring GL. In addition, the conductive film 503 functions as the wiring SL.

  The transistor 15 includes a conductive film 505 functioning as a gate, a semiconductor film 506, and a conductive film 507 and a conductive film 508 which are electrically connected to the semiconductor film 506 and function as a source or a drain. The conductive film 507 is electrically connected to the pixel electrode of the light-emitting element 14. The conductive film 508 is electrically connected to the conductive film 509, and the conductive film 509 functions as the wiring VL.

  The transistor 17t includes a conductive film 501 functioning as a gate, a semiconductor film 510, and a conductive film 507 and a conductive film 511 which are electrically connected to the semiconductor film 510 and function as a source or a drain. The conductive film 511 functions as the wiring ML.

  The capacitor 18 includes a conductive film 505, a conductive film 507, and an insulating film (not shown) provided between the conductive film 505 and the conductive film 507. The conductive film 505 is electrically connected to the conductive film 504.

  Note that a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like can be used for the electrode serving as the anode or the cathode. Specifically, indium oxide-tin oxide (ITO), indium oxide-tin oxide containing silicon or silicon oxide, indium zinc-oxide (Indium Zinc Oxide), tungsten oxide and zinc oxide were contained. Indium oxide, gold (Au), platinum (Pt), nickel (Ni), tungsten (W), chromium (Cr), molybdenum (Mo), iron (Fe), cobalt (Co), copper (Cu), palladium ( In addition to Pd) and titanium (Ti), elements belonging to Group 1 or Group 2 of the periodic table of elements, that is, alkali metals such as lithium (Li) and cesium (Cs), and calcium (Ca) and strontium (Sr) Alkaline earth metals such as magnesium (Mg) and alloys containing them (MgAg, A Li), europium (Eu), ytterbium (Yb), an alloy containing these or the like, and other can be used graphene like. Then, by appropriately selecting the above materials and setting the film thickness to an optimum value, it becomes possible to create a top emission structure, a bottom emission structure, or a dual emission structure.

  In one embodiment of the present invention, the light-emitting device may employ a color filter method for displaying a full-color image by combining a light-emitting element that emits monochromatic light such as white and a color filter. Alternatively, a method of displaying a full-color image using a plurality of light emitting elements that emit light of different hues can be employed. This method is called a coating method because the EL layer provided between the pair of electrodes included in the light-emitting element is coated for each corresponding color.

  In the case of the separate application method, the EL layer is normally applied by vapor deposition using a mask such as a metal mask. Therefore, the size of the pixel depends on the coating accuracy of the EL layer by the vapor deposition method. On the other hand, in the case of the color filter method, unlike the separate coloring method, it is not necessary to separate the EL layer. Therefore, it is easier to reduce the pixel size than in the case of the separate coloring method, and a high-definition pixel portion can be realized.

  In addition, in the case of the top emission structure, light emitted from the light emitting element is not blocked by various elements such as a wiring, a transistor, and a capacitor element, so that the light extraction efficiency from the pixel is increased as compared with the bottom emission structure. be able to. Therefore, the top emission structure is advantageous in extending the life of the light-emitting element because high luminance can be obtained even when the current value supplied to the light-emitting element is kept low.

  In one embodiment of the present invention, the light-emitting device may have a microcavity (micro-optical resonator) structure in which light emitted from the EL layer is resonated in the light-emitting element. With the microcavity structure, the light extraction efficiency of the light having a specific wavelength can be increased, so that the luminance and color purity of the pixel portion can be improved.

<Cross-sectional structure of light emitting device>
FIG. 14 illustrates an example of a cross-sectional structure of a pixel portion in a light-emitting device according to one embodiment of the present invention. Note that FIG. 14 illustrates a cross-sectional structure of the transistor 15, the capacitor 18, and the light-emitting element 14 included in the pixel 11 illustrated in FIG. 3.

  Specifically, the light-emitting device illustrated in FIG. 14 includes the transistor 15 and the capacitor 18 over the substrate 400. The transistor 15 is electrically connected to the conductive film 401 that functions as a gate, the insulating film 402 over the conductive film 401, the semiconductor film 403 that overlaps with the conductive film 401 with the insulating film 402 interposed therebetween, and the semiconductor film 403. A conductive film 404 and a conductive film 405 functioning as a source or a drain.

  The capacitor 18 includes a conductive film 401 that functions as an electrode, an insulating film 402 over the conductive film 401, and a conductive film 404 that overlaps with the conductive film 401 with the insulating film 402 interposed therebetween and that also functions as an electrode.

  As the insulating film 402, aluminum oxide, magnesium oxide, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide are used. One or more insulating films including one or more layers may be used as a single layer or stacked layers. Note that in this specification, oxynitride refers to a material having a higher oxygen content than nitrogen as its composition, and nitride oxide refers to a material having a higher nitrogen content than oxygen as its composition. Point to.

  An insulating film 411 is provided over the semiconductor film 403, the conductive film 404, and the conductive film 405. In the case where an oxide semiconductor is used for the semiconductor film 403, a material that can supply oxygen to the semiconductor film 403 is preferably used for the insulating film 411. By using the above material for the insulating film 411, oxygen contained in the insulating film 411 can be transferred to the semiconductor film 403, and the amount of oxygen vacancies in the semiconductor film 403 can be reduced. The movement of oxygen contained in the insulating film 411 to the semiconductor film 403 can be efficiently performed by performing heat treatment after the insulating film 411 is formed.

  An insulating film 420 is provided over the insulating film 411, and a conductive film 424 is provided over the insulating film 420. The conductive film 424 is electrically connected to the conductive film 404 in openings provided in the insulating film 411 and the insulating film 420.

  An insulating film 425 is provided over the insulating film 420 and the conductive film 424. The insulating film 425 has an opening in a position overlapping with the conductive film 424. An insulating film 426 is provided over the insulating film 425 at a position different from the opening of the insulating film 425. An EL layer 427 and a conductive film 428 are provided over the insulating film 425 and the insulating film 426 so as to be sequentially stacked. A portion where the conductive films 424 and 428 overlap with the EL layer 427 interposed therebetween functions as the light-emitting element 14. One of the conductive films 424 and 428 functions as an anode and the other functions as a cathode.

  In addition, the light-emitting device includes a substrate 430 that faces the substrate 400 with the light-emitting element 14 interposed therebetween. A shielding film 431 having a function of shielding light is provided on the substrate 430, that is, on the surface of the substrate 430 on the side close to the light emitting element 14. The shielding film 431 has an opening in a region overlapping with the light emitting element 14. A colored layer 432 that transmits visible light in a specific wavelength range is provided over the substrate 430 in the opening overlapping the light emitting element 14.

<Transistor structure>
Next, the structure of the transistor 70 having a channel formation region in the oxide semiconductor film is described as an example.

  A transistor 70 illustrated in FIG. 15A includes a conductive film 80 functioning as a gate, an insulating film 81 over the conductive film 80, an oxide semiconductor film 82 that overlaps the conductive film 80 with the insulating film 81 interposed therebetween, The conductive film 83 and the conductive film 84 function as a source and a drain and are electrically connected to the oxide semiconductor film 82. In addition, the transistor 70 illustrated in FIG. 15A includes the insulating films 85 to 87 which are sequentially stacked over the oxide semiconductor film 82, the conductive film 83, and the conductive film 84.

  Note that FIG. 15A illustrates the case where the insulating films 85 to 87 that are sequentially stacked are provided over the oxide semiconductor film 82, the conductive film 83, and the conductive film 84. The insulating film provided over the physical semiconductor film 82, the conductive film 83, and the conductive film 84 may be a single layer or a plurality of layers of two or more.

The insulating film 86 is preferably an insulating film having a function of supplying part of the oxygen to the oxide semiconductor film 82 by heating. The insulating film 86 preferably has few defects. Typically, the density of a spin having g = 2.001 derived from a dangling bond of silicon obtained by ESR measurement is 1 × 10 ¹⁸ spins / It is preferable that it is cm ³ or less. However, when the insulating film 86 is directly provided over the oxide semiconductor film 82, the oxide semiconductor film 82 is oxidized as illustrated in FIG. 15A when the oxide semiconductor film 82 is damaged when the insulating film 86 is formed. It may be provided between the physical semiconductor film 82 and the insulating film 86. The insulating film 85 is desirably an insulating film that has less damage to the oxide semiconductor film 82 during the formation than the insulating film 86 and has a function of transmitting oxygen. Note that the insulating film 85 is not necessarily provided as long as the insulating film 86 can be formed directly over the oxide semiconductor film 82 while suppressing damage to the oxide semiconductor film 82.

The insulating film 85 preferably has few defects. Typically, the density of a spin having g = 2.001 derived from a dangling bond of silicon obtained by ESR measurement is 3 × 10 ¹⁷ spins / cm ^3. The following is preferable. This is because if the density of defects contained in the insulating film 85 is large, oxygen is bonded to the defects, and the amount of oxygen transmitted through the insulating film 85 is reduced.

The interface between the insulating film 85 and the oxide semiconductor film 82 preferably has few defects. Typically, the oxide semiconductor film 82 is formed by ESR measurement in which the direction of a magnetic field is applied in parallel to the film surface. It is preferable that the g density derived from oxygen vacancies in the oxide semiconductor used is 1.89 to 1.96, and the density of spins is 1 × 10 ¹⁷ spins / cm ³ or less, and more preferably the detection lower limit or less.

  The insulating film 87 desirably has a blocking effect that prevents diffusion of oxygen, hydrogen, and water. Alternatively, the insulating film 87 desirably has a blocking effect that prevents diffusion of hydrogen and water.

  The insulating film exhibits a higher blocking effect as it is denser and denser, and as it is chemically stable with fewer dangling bonds. Examples of the insulating film that exhibits a blocking effect to prevent diffusion of oxygen, hydrogen, and water include aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, hafnium oxide, and hafnium oxynitride. Can be formed. The insulating film exhibiting a blocking effect for preventing diffusion of hydrogen and water can be formed using, for example, silicon nitride, silicon nitride oxide, or the like.

  In the case where the insulating film 87 has a blocking effect for preventing diffusion of water, hydrogen, and the like, it is possible to prevent the resin in the panel and impurities such as water and hydrogen existing outside the panel from entering the oxide semiconductor film 82. Can do. In the case where an oxide semiconductor is used for the oxide semiconductor film 82, water or a part of hydrogen that has penetrated into the oxide semiconductor serves as an electron donor (donor); The threshold voltage of 70 can be prevented from shifting due to donor generation.

  In the case where an oxide semiconductor is used for the oxide semiconductor film 82, the insulating film 87 has a blocking effect for preventing diffusion of oxygen, so that oxygen from the oxide semiconductor can be prevented from diffusing to the outside. Accordingly, oxygen vacancies serving as donors in the oxide semiconductor are reduced, so that the threshold voltage of the transistor 70 can be prevented from being shifted due to generation of donors.

  Note that FIG. 15A illustrates the case where the oxide semiconductor film 82 includes an oxide semiconductor film in which three layers are stacked. Specifically, in the transistor 70 illustrated in FIG. 15A, the oxide semiconductor film 82 includes oxide semiconductor films 82a to 82c which are stacked in this order from the insulating film 81 side. The oxide semiconductor film 82 of the transistor 70 is not necessarily formed of a plurality of stacked oxide semiconductor films, and may be formed of a single oxide semiconductor film.

  The oxide semiconductor film 82a and the oxide semiconductor film 82c include at least one metal element included in the oxide semiconductor film 82b as a component, and the energy at the lower end of the conduction band is higher than that of the oxide semiconductor film 82b. The oxide film has a vacuum level of 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more, and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less. Furthermore, it is preferable that the oxide semiconductor film 82b contain at least indium because carrier mobility is increased.

  As shown in FIG. 15B, the transistor 70 has a structure in which the oxide semiconductor film 82c is provided over the conductive film 83 and the conductive film 84 so as to overlap with the insulating film 85. May be.

  Note that an oxide semiconductor highly purified by reducing impurities such as moisture or hydrogen serving as an electron donor (donor) and reducing oxygen vacancies has few carrier generation sources, and thus is i-type (intrinsic). Semiconductor) or i-type. Therefore, a transistor including a channel formation region in a highly purified oxide semiconductor film has extremely low off-state current and high reliability. A transistor in which a channel formation region is formed in the oxide semiconductor film tends to have electrical characteristics (also referred to as normally-off characteristics) in which the threshold voltage is positive.

Specifically, it can be proved by various experiments that the off-state current of a transistor including a channel formation region in a highly purified oxide semiconductor film is small. For example, even in an element having a channel width of 1 × 10 ⁶ μm and a channel length of 10 μm, when the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1V to 10V, It is possible to obtain characteristics that are below the measurement limit, that is, 1 × 10 ⁻¹³ A or less. In this case, it can be seen that the off-current normalized by the channel width of the transistor is 100 zA / μm or less. In addition, the off-state current was measured using a circuit in which the capacitor and the transistor were electrically connected and the charge flowing into or out of the capacitor was controlled by the transistor. In this measurement, a highly purified oxide semiconductor film was used for a channel formation region of the transistor, and the off-state current of the transistor was measured from the change in charge amount per unit time of the capacitor. As a result, it was found that when the voltage between the source electrode and the drain electrode of the transistor is 3 V, an even smaller off current of several tens of yA / μm can be obtained. Therefore, a transistor using a highly purified oxide semiconductor film for a channel formation region has significantly lower off-state current than a transistor using crystalline silicon.

  Note that in the case where an oxide semiconductor film is used as the semiconductor film, the oxide semiconductor preferably contains at least indium (In) or zinc (Zn). In addition, it is preferable that gallium (Ga) be included in addition to the stabilizer for reducing variation in electrical characteristics of the transistor including the oxide semiconductor. Moreover, it is preferable to have tin (Sn) as a stabilizer. Moreover, it is preferable to have hafnium (Hf) as a stabilizer. Moreover, it is preferable to have aluminum (Al) as a stabilizer. Moreover, it is preferable that zirconium (Zr) is included as a stabilizer.

  Among oxide semiconductors, In—Ga—Zn-based oxides, In—Sn—Zn-based oxides, and the like have excellent electrical characteristics by sputtering or a wet method, unlike silicon carbide, gallium nitride, or gallium oxide. There is an advantage that a transistor can be manufactured and the mass productivity is excellent. Further, unlike silicon carbide, gallium nitride, or gallium oxide, the In—Ga—Zn-based oxide can manufacture a transistor with excellent electrical characteristics over a glass substrate. In addition, it is possible to cope with an increase in the size of the substrate.

  Other stabilizers include lanthanoids such as lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), and terbium (Tb). , Dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), or lutetium (Lu) may be included.

  For example, as an oxide semiconductor, indium oxide, gallium oxide, tin oxide, zinc oxide, In—Zn oxide, Sn—Zn oxide, Al—Zn oxide, Zn—Mg oxide, Sn—Mg Oxide, In—Mg oxide, In—Ga oxide, In—Ga—Zn oxide (also referred to as IGZO), In—Al—Zn oxide, In—Sn—Zn oxide Sn-Ga-Zn-based oxide, Al-Ga-Zn-based oxide, Sn-Al-Zn-based oxide, In-Hf-Zn-based oxide, In-La-Zn-based oxide, In-Pr- Zn-based oxide, In-Nd-Zn-based oxide, In-Ce-Zn-based oxide, In-Sm-Zn-based oxide, In-Eu-Zn-based oxide, In-Gd-Zn-based oxide, In-Tb-Zn-based oxide, In-Dy-Zn-based oxide, In-H -Zn oxide, In-Er-Zn oxide, In-Tm-Zn oxide, In-Yb-Zn oxide, In-Lu-Zn oxide, In-Sn-Ga-Zn oxide Oxide, In-Hf-Ga-Zn-based oxide, In-Al-Ga-Zn-based oxide, In-Sn-Al-Zn-based oxide, In-Sn-Hf-Zn-based oxide, In-Hf An -Al-Zn-based oxide can be used.

  Note that for example, an In—Ga—Zn-based oxide means an oxide containing In, Ga, and Zn, and there is no limitation on the ratio of In, Ga, and Zn. Moreover, metal elements other than In, Ga, and Zn may be included. An In—Ga—Zn-based oxide has sufficiently high resistance when no electric field is applied, and can sufficiently reduce off-state current. In addition, the In—Ga—Zn-based oxide has high mobility.

  For example, high mobility can be obtained relatively easily with an In—Sn—Zn-based oxide. However, mobility can be increased by reducing the defect density in the bulk also in the case of using an In—Ga—Zn-based oxide.

  Hereinafter, the structure of the oxide semiconductor film is described.

  In this specification, “parallel” refers to a state in which two straight lines are arranged at an angle of −10 ° to 10 °. Therefore, the case of −5 ° to 5 ° is also included. Further, “substantially parallel” means a state in which two straight lines are arranged at an angle of −30 ° to 30 °. “Vertical” refers to a state in which two straight lines are arranged at an angle of 80 ° to 100 °. Therefore, the case of 85 ° to 95 ° is also included. Further, “substantially vertical” means a state in which two straight lines are arranged at an angle of 60 ° to 120 °.

  In this specification, when a crystal is trigonal or rhombohedral, it is represented as a hexagonal system.

  An oxide semiconductor film is classified into a non-single-crystal oxide semiconductor film and a single-crystal oxide semiconductor film. Alternatively, an oxide semiconductor is classified into, for example, a crystalline oxide semiconductor and an amorphous oxide semiconductor.

  Note that examples of the non-single-crystal oxide semiconductor include a CAAC-OS (C Axis Crystallized Oxide Semiconductor), a polycrystalline oxide semiconductor, a microcrystalline oxide semiconductor, and an amorphous oxide semiconductor. As a crystalline oxide semiconductor, a single crystal oxide semiconductor, a CAAC-OS, a polycrystalline oxide semiconductor, a microcrystalline oxide semiconductor, or the like can be given.

  First, the CAAC-OS film is described.

  The CAAC-OS film is one of oxide semiconductor films having a plurality of c-axis aligned crystal parts.

  Confirming a plurality of crystal parts by observing a bright field image of a CAAC-OS film and a combined analysis image (also referred to as a high-resolution TEM image) of a CAAC-OS film with a transmission electron microscope (TEM: Transmission Electron Microscope). Can do. On the other hand, a clear boundary between crystal parts, that is, a crystal grain boundary (also referred to as a grain boundary) cannot be confirmed even by a high-resolution TEM image. Therefore, it can be said that the CAAC-OS film is unlikely to decrease in electron mobility due to crystal grain boundaries.

  When a high-resolution TEM image of a cross section of the CAAC-OS film is observed from a direction substantially parallel to the sample surface, it can be confirmed that metal atoms are arranged in layers in the crystal part. Each layer of metal atoms has a shape reflecting unevenness of a surface (also referred to as a formation surface) or an upper surface on which the CAAC-OS film is formed, and is arranged in parallel with the formation surface or the upper surface of the CAAC-OS film. .

  On the other hand, when a high-resolution TEM image of a plane of the CAAC-OS film is observed from a direction substantially perpendicular to the sample surface, it can be confirmed that metal atoms are arranged in a triangular shape or a hexagonal shape in a crystal part. However, there is no regularity in the arrangement of metal atoms between different crystal parts.

When structural analysis is performed on a CAAC-OS film using an X-ray diffraction (XRD) apparatus, for example, in the analysis of a CAAC-OS film having an InGaZnO ₄ crystal by an out-of-plane method, A peak may appear when the diffraction angle (2θ) is around 31 °. Since this peak is attributed to the (009) plane of the InGaZnO ₄ crystal, the crystal of the CAAC-OS film has c-axis orientation, and the c-axis is oriented in a direction substantially perpendicular to the formation surface or the top surface. Can be confirmed.

Note that when the CAAC-OS film including an InGaZnO ₄ crystal is analyzed by an out-of-plane method, a peak may also appear when 2θ is around 36 ° in addition to the peak where 2θ is around 31 °. A peak at 2θ of around 36 ° indicates that a crystal having no c-axis alignment is included in part of the CAAC-OS film. The CAAC-OS film preferably has a peak at 2θ of around 31 ° and no peak at 2θ of around 36 °.

  The CAAC-OS film is an oxide semiconductor film with a low impurity concentration. The impurity is an element other than the main component of the oxide semiconductor film, such as hydrogen, carbon, silicon, or a transition metal element. In particular, an element such as silicon, which has a stronger bonding force with oxygen than the metal element included in the oxide semiconductor film, disturbs the atomic arrangement of the oxide semiconductor film by depriving the oxide semiconductor film of oxygen, and has crystallinity. It becomes a factor to reduce. In addition, heavy metals such as iron and nickel, argon, carbon dioxide, and the like have large atomic radii (or molecular radii). Therefore, if they are contained inside an oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disturbed, resulting in crystallinity. It becomes a factor to reduce. Note that the impurity contained in the oxide semiconductor film might serve as a carrier trap or a carrier generation source.

  The CAAC-OS film is an oxide semiconductor film with a low density of defect states. For example, oxygen vacancies in the oxide semiconductor film can serve as carrier traps or can generate carriers by capturing hydrogen.

  A low impurity concentration and a low density of defect states (small number of oxygen vacancies) is called high purity intrinsic or substantially high purity intrinsic. A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has few carrier generation sources, and thus can have a low carrier density. Therefore, a transistor including the oxide semiconductor film is unlikely to have electrical characteristics (also referred to as normally-on) in which the threshold voltage is negative. A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has few carrier traps. Therefore, a transistor including the oxide semiconductor film has a small change in electrical characteristics and has high reliability. Note that the charge trapped in the carrier trap of the oxide semiconductor film takes a long time to be released, and may behave as if it were a fixed charge. Therefore, a transistor including an oxide semiconductor film with a high impurity concentration and a high density of defect states may have unstable electrical characteristics.

  In addition, a transistor including a CAAC-OS film has little variation in electrical characteristics due to irradiation with visible light or ultraviolet light.

  Next, a microcrystalline oxide semiconductor film is described.

  The microcrystalline oxide semiconductor film includes a region where a crystal part can be confirmed and a region where a clear crystal part cannot be confirmed in a high-resolution TEM image. In most cases, a crystal part included in the microcrystalline oxide semiconductor film has a size of 1 nm to 100 nm, or 1 nm to 10 nm. In particular, an oxide semiconductor film including a nanocrystal (nc) that is a microcrystal of 1 nm to 10 nm, or 1 nm to 3 nm is referred to as an nc-OS (nanocrystalline Oxide Semiconductor) film. In the nc-OS film, for example, a crystal grain boundary may not be clearly confirmed in a high-resolution TEM image.

  The nc-OS film has periodicity in atomic arrangement in a very small region (eg, a region of 1 nm to 10 nm, particularly a region of 1 nm to 3 nm). In addition, the nc-OS film does not have regularity in crystal orientation between different crystal parts. Therefore, orientation is not seen in the whole film. Therefore, the nc-OS film may not be distinguished from an amorphous oxide semiconductor film depending on an analysis method. For example, when structural analysis is performed on the nc-OS film using an XRD apparatus using X-rays having a diameter larger than that of the crystal part, a peak indicating a crystal plane is not detected in the analysis by the out-of-plane method. Further, when electron diffraction (also referred to as limited-field electron diffraction) using an electron beam with a probe diameter (for example, 50 nm or more) larger than that of the crystal part is performed on the nc-OS film, a diffraction pattern such as a halo pattern is observed. Is done. On the other hand, when nanobeam electron diffraction is performed on the nc-OS film using an electron beam having a probe diameter that is close to or smaller than the size of the crystal part, spots are observed. In addition, when nanobeam electron diffraction is performed on the nc-OS film, a region with high luminance may be observed so as to draw a circle (in a ring shape). Further, when nanobeam electron diffraction is performed on the nc-OS film, a plurality of spots may be observed in the ring-shaped region.

  The nc-OS film is an oxide semiconductor film that has higher regularity than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. Note that the nc-OS film does not have regularity in crystal orientation between different crystal parts. Therefore, the nc-OS film has a higher density of defect states than the CAAC-OS film.

  Next, an amorphous oxide semiconductor film is described.

  An amorphous oxide semiconductor film is an oxide semiconductor film having an irregular atomic arrangement in the film and having no crystal part. An oxide semiconductor film having an amorphous state such as quartz is an example.

  In the amorphous oxide semiconductor film, a crystal part cannot be confirmed in a high-resolution TEM image.

  When structural analysis using an XRD apparatus is performed on an amorphous oxide semiconductor film, a peak indicating a crystal plane is not detected by analysis using an out-of-plane method. Further, when electron diffraction is performed on the amorphous oxide semiconductor film, a halo pattern is observed. Further, when nanobeam electron diffraction is performed on an amorphous oxide semiconductor film, no spot is observed and a halo pattern is observed.

  Note that the oxide semiconductor film may have a structure having physical properties between the nc-OS film and the amorphous oxide semiconductor film. An oxide semiconductor film having such a structure is particularly referred to as an amorphous-like oxide semiconductor (a-like OS) film.

  In the a-like OS film, a void (also referred to as a void) may be observed in a high-resolution TEM image. Moreover, in a high-resolution TEM image, it has the area | region which can confirm a crystal part clearly, and the area | region which cannot confirm a crystal part. In some cases, the a-like OS film is crystallized by a small amount of electron irradiation as observed by a TEM, and a crystal part is grown. On the other hand, in the case of a good-quality nc-OS film, crystallization due to a small amount of electron irradiation comparable to that observed by TEM is hardly observed.

Note that the crystal part size of the a-like OS film and the nc-OS film can be measured using high-resolution TEM images. For example, a crystal of InGaZnO ₄ has a layered structure, and two Ga—Zn—O layers are provided between In—O layers. The unit cell of InGaZnO ₄ crystal has a structure in which a total of nine layers including three In—O layers and six Ga—Zn—O layers are stacked in the c-axis direction. Therefore, the distance between these adjacent layers is approximately the same as the lattice spacing (also referred to as d value) of the (009) plane, and the value is determined to be 0.29 nm from crystal structure analysis. Therefore, paying attention to the lattice fringes in the high-resolution TEM image, each lattice fringe corresponds to the ab plane of the InGaZnO ₄ crystal in a portion where the interval between the lattice fringes is 0.28 nm or more and 0.30 nm or less.

  In addition, the oxide semiconductor film may have a different density for each structure. For example, if the composition of a certain oxide semiconductor film is known, the structure of the oxide semiconductor film can be estimated by comparing with the density of a single crystal having the same composition as the composition. For example, the density of the a-like OS film is 78.6% or more and less than 92.3% with respect to the density of the single crystal. For example, the density of the nc-OS film and the density of the CAAC-OS film are 92.3% or more and less than 100% with respect to the density of the single crystal. Note that it is difficult to form an oxide semiconductor film whose density is lower than 78% with respect to that of a single crystal.

The above will be described using a specific example. For example, in an oxide semiconductor film satisfying In: Ga: Zn = 1: 1: 1 [atomic ratio], the density of single crystal InGaZnO ₄ having a rhombohedral structure is 6.357 g / cm ³ . Therefore, for example, in an oxide semiconductor film satisfying In: Ga: Zn = 1: 1: 1 [atomic ratio], the density of the a-like OS film is 5.0 g / cm ³ or more and less than 5.9 g / cm ^3. It becomes. For example, in the oxide semiconductor film satisfying In: Ga: Zn = 1: 1: 1 [atomic ratio], the density of the nc-OS film and the density of the CAAC-OS film are 5.9 g / cm ³ or more 6 Less than ³ g / cm ³ .

  Note that there may be no single crystal having the same composition. In that case, a density corresponding to a single crystal having a desired composition can be calculated by combining single crystals having different compositions at an arbitrary ratio. What is necessary is just to calculate the density of the single crystal of a desired composition using a weighted average with respect to the ratio which combines the single crystal from which a composition differs. However, the density is preferably calculated by combining as few kinds of single crystals as possible.

  Note that the oxide semiconductor film may be a stacked film including two or more of an amorphous oxide semiconductor film, an a-like OS film, a microcrystalline oxide semiconductor film, and a CAAC-OS film, for example. .

  In order to form the CAAC-OS film, the following conditions are preferably applied.

  By reducing the mixing of impurities during film formation, the crystal state can be prevented from being broken by impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) existing in the treatment chamber may be reduced. Further, the impurity concentration in the deposition gas may be reduced. Specifically, a deposition gas having a dew point of −80 ° C. or lower, preferably −100 ° C. or lower is used.

  Further, by increasing the substrate heating temperature during film formation, migration of sputtered particles occurs after reaching the substrate. Specifically, the film is formed at a substrate heating temperature of 100 ° C. to 740 ° C., preferably 200 ° C. to 500 ° C. When the substrate heating temperature at the time of film formation is increased, when the flat or pellet-like sputtered particles reach the substrate, migration occurs on the substrate, and the flat surface of the sputtered particles adheres to the substrate.

  In addition, it is preferable to reduce plasma damage during film formation by increasing the oxygen ratio in the film formation gas and optimizing electric power. The oxygen ratio in the deposition gas is 30% by volume or more, preferably 100% by volume.

  As an example of the target, an In—Ga—Zn-based oxide target is described below.

In-Ga-Zn which is polycrystalline by mixing InO _X powder, GaO _Y powder and ZnO _Z powder at a predetermined molar ratio, and after heat treatment at a temperature of 1000 ° C to 1500 ° C. A system oxide target is used. X, Y, and Z are arbitrary positive numbers. Here, the predetermined mole number ratio is, for example, 2: 2: 1, 8: 4: 3, 3: 1: 1, 1: 1: 1, 4 for InO _X powder, GaO _Y powder, and ZnO _Z powder. : 2: 3, 1: 4: 4 or 3: 1: 2. In addition, what is necessary is just to change suitably the kind of powder, and the mol number ratio to mix with the target to produce.

Note that an alkali metal is an impurity because it is not an element included in an oxide semiconductor. Alkaline earth metal is also an impurity when it is not an element constituting an oxide semiconductor. In particular, Na in the alkali metal diffuses into the insulating film and becomes Na ⁺ when the insulating film in contact with the oxide semiconductor film is an oxide. In the oxide semiconductor film, Na breaks or interrupts the bond between the metal constituting the oxide semiconductor and oxygen. As a result, for example, the transistor is deteriorated in electrical characteristics, such as being normally on due to the shift of the threshold voltage in the negative direction, and a decrease in mobility. In addition, the characteristics vary. Specifically, the measured value of Na concentration by secondary ion mass spectrometry is 5 × 10 ¹⁶ / cm ³ or less, preferably 1 × 10 ¹⁶ / cm ³ or less, more preferably 1 × 10 ¹⁵ / cm ³ or less. Good. Similarly, the measured value of the Li concentration is 5 × 10 ¹⁵ / cm ³ or less, preferably 1 × 10 ¹⁵ / cm ³ or less. Similarly, the measured value of the K concentration is 5 × 10 ¹⁵ / cm ³ or less, preferably 1 × 10 ¹⁵ / cm ³ or less.

In addition, in the case where a metal oxide containing indium is used, silicon or carbon whose binding energy to oxygen is higher than that of indium may cut the bond between indium and oxygen, thereby forming an oxygen vacancy. Therefore, when silicon or carbon is mixed in the oxide semiconductor film, the electrical characteristics of the transistor are likely to deteriorate as in the case of alkali metal or alkaline earth metal. Therefore, it is desirable that the concentration of silicon or carbon in the oxide semiconductor film be low. Specifically, the measured value of C concentration or the measured value of Si concentration by secondary ion mass spectrometry is preferably 1 × 10 ¹⁸ / cm ³ or less. With the above structure, deterioration of electrical characteristics of the transistor can be prevented, and reliability of the semiconductor device can be improved.

  Further, depending on the conductive material used for the source electrode and the drain electrode, the metal in the source electrode and the drain electrode might extract oxygen from the oxide semiconductor film. In this case, a region in contact with the source electrode and the drain electrode in the oxide semiconductor film is n-type due to formation of oxygen vacancies.

  Since the n-type region functions as a source region or a drain region, contact resistance between the oxide semiconductor film and the source and drain electrodes can be reduced. Thus, by forming an n-type region, the mobility and on-state current of the transistor can be increased, whereby high-speed operation of the semiconductor device using the transistor can be realized.

  Note that extraction of oxygen by a metal in the source electrode and the drain electrode can occur when the source electrode and the drain electrode are formed by a sputtering method or the like, and can also occur by a heat treatment performed after the source electrode and the drain electrode are formed. .

  In addition, the n-type region is more easily formed by using a conductive material that is easily bonded to oxygen for the source electrode and the drain electrode. Examples of the conductive material include Al, Cr, Cu, Ta, Ti, Mo, and W.

  In addition, the oxide semiconductor film is not necessarily composed of a single metal oxide film, and may be composed of a plurality of stacked metal oxide films. For example, in the case of a semiconductor film in which first to third metal oxide films are sequentially stacked, the first metal oxide film and the third metal oxide film constitute a second metal oxide film. At least one metal element is included in the component, and the energy at the lower end of the conduction band is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more than the second metal oxide film, and 2eV or less, 1eV or less, 0.5eV or less, or 0.4eV or less, which is an oxide film close to a vacuum level. Furthermore, it is preferable that the second metal oxide film contains at least indium because carrier mobility is increased.

  In the case where the transistor includes the semiconductor film having the above structure, when an electric field is applied to the semiconductor film by applying a voltage to the gate electrode, a channel is formed in the second metal oxide film having a lower conduction band energy in the semiconductor film. A region is formed. That is, since the third metal oxide film is provided between the second metal oxide film and the gate insulating film, the second metal oxide film separated from the gate insulating film has a channel. Regions can be formed.

  In addition, since the third metal oxide film includes at least one of the metal elements constituting the second metal oxide film in its constituent elements, the second metal oxide film and the third metal oxide film Interface scattering is unlikely to occur at the interface. Accordingly, since the movement of carriers at the interface is difficult to be inhibited, the field effect mobility of the transistor is increased.

  In addition, when an interface state is formed at the interface between the second metal oxide film and the first metal oxide film, a channel region is also formed in a region near the interface, so that the threshold voltage of the transistor fluctuates. Resulting in. However, since the first metal oxide film includes at least one of the metal elements constituting the second metal oxide film in its constituent elements, the second metal oxide film and the first metal oxide film It is difficult to form interface states at the interface. Thus, with the above structure, variation in electrical characteristics such as threshold voltage of the transistor can be reduced.

  In addition, it is preferable to stack a plurality of oxide semiconductor films so that an interface state that inhibits carrier flow is not formed at the interface between the films due to the presence of impurities between the metal oxide films. . If impurities exist between the stacked metal oxide films, the continuity of the energy at the bottom of the conduction band between the metal oxide films is lost, and carriers are trapped or re-entered near the interface. This is because the bonds disappear. By reducing the impurities between the films, a plurality of metal oxide films having at least one metal as a main component together are not simply stacked. A state of having a U-shaped well structure that continuously changes between them).

In order to form a continuous bond, it is necessary to use a multi-chamber type film forming apparatus (sputtering apparatus) provided with a load lock chamber to continuously laminate each film without exposure to the atmosphere. Each chamber in the sputtering apparatus is evacuated (5 × 10 ⁻⁷ Pa to 1 ×) using an adsorption-type evacuation pump such as a cryopump so as to remove as much water as possible from the oxide semiconductor. It is preferable to be up to about 10 ⁻⁴ Pa. Alternatively, it is preferable to combine a turbo molecular pump and a cold trap so that gas does not flow backward from the exhaust system into the chamber.

In order to obtain a high-purity intrinsic oxide semiconductor, it is important not only to evacuate each chamber to a high vacuum but also to increase the purity of a gas used for sputtering. The dew point of oxygen gas or argon gas used as the gas is −40 ° C. or lower, preferably −80 ° C. or lower, more preferably −100 ° C. or lower, and the oxide semiconductor film is made highly purified by purifying the gas used. It is possible to prevent moisture and the like from being taken into the body as much as possible. Specifically, when the second metal oxide film is an In-M-Zn oxide (M is Ga, Y, Zr, La, Ce, or Nd), the second metal oxide film is formed. In the target used for the above, when the atomic ratio of the metal element is In: M: Zn = x ₁ : y ₁ : z _{1 ,} x ₁ / y ₁ is 1/3 or more and 6 or less, and further 1 or more and 6 or less. Z ₁ / y ₁ is preferably 1/3 or more and 6 or less, and more preferably 1 or more and 6 or less. Note that when z ₁ / y ₁ is greater than or equal to 1 and less than or equal to 6, a CAAC-OS film can be easily formed as the second metal oxide film. Typical examples of the atomic ratio of the target metal element include In: M: Zn = 1: 1: 1, In: M: Zn = 3: 1: 2.

Specifically, when the first metal oxide film and the third metal oxide film are In-M-Zn oxide (M is Ga, Y, Zr, La, Ce, or Nd), In the target used for forming the metal oxide film and the third metal oxide film, when the atomic ratio of the metal element is In: M: Zn = x ₂ : y ₂ : z _{2 ,} x ₂ / y ₂ <x ₁ / y ₁ and z ₂ / y ₂ is preferably 1/3 or more and 6 or less, more preferably 1 or more and 6 or less. Note that when z ₂ / y ₂ is greater than or equal to 1 and less than or equal to 6, a CAAC-OS film can be easily formed as the first metal oxide film and the third metal oxide film. As typical examples of the atomic ratio of the target metal element, In: M: Zn = 1: 3: 2, In: M: Zn = 1: 3: 4, In: M: Zn = 1: 3: 6, In: M: Zn = 1: 3: 8 and the like.

  Note that the thicknesses of the first metal oxide film and the third metal oxide film are 3 nm to 100 nm, preferably 3 nm to 50 nm. The thickness of the second metal oxide film is 3 nm to 200 nm, preferably 3 nm to 100 nm, and more preferably 3 nm to 50 nm.

  In the semiconductor film having a three-layer structure, the first metal oxide film to the third metal oxide film can take either amorphous or crystalline forms. However, since the second metal oxide film in which the channel region is formed is crystalline, stable electrical characteristics can be given to the transistor, and thus the second metal oxide film is crystalline. It is preferable.

  Note that a channel formation region means a region of a semiconductor film of a transistor that overlaps with a gate electrode and is sandwiched between a source electrode and a drain electrode. The channel region refers to a region where current mainly flows in the channel formation region.

  For example, when an In—Ga—Zn-based oxide film formed by a sputtering method is used as the first metal oxide film and the third metal oxide film, the first metal oxide film and the third metal oxide film are used. For the formation of the physical film, a target that is an In—Ga—Zn-based oxide (In: Ga: Zn = 1: 3: 2 [atomic ratio]) can be used. The film forming conditions may be, for example, 30 sccm of argon gas and 15 sccm of oxygen gas, a pressure of 0.4 Pa, a substrate temperature of 200 ° C., and a DC power of 0.5 kW.

  In the case where the second metal oxide film is a CAAC-OS film, an In—Ga—Zn-based oxide (In: Ga: Zn = 1: 1: 1 [atomic ratio]) and a target including a polycrystalline In—Ga—Zn-based oxide is preferably used. The film forming conditions may be, for example, an argon gas of 30 sccm and an oxygen gas of 15 sccm as a film forming gas, a pressure of 0.4 Pa, a substrate temperature of 300 ° C., and a DC power of 0.5 kW.

  Note that the transistor may have a structure in which an end portion of the semiconductor film is inclined or a structure in which an end portion of the semiconductor film is rounded.

  In the case where a semiconductor film including a plurality of stacked metal oxide films is used for a transistor, regions in contact with the source electrode and the drain electrode may be n-type. With the above structure, mobility and on-state current of the transistor can be increased, and high-speed operation of the semiconductor device using the transistor can be realized. Further, in the case where a semiconductor film including a plurality of stacked metal oxide films is used for a transistor, the n-type region reaches the second metal oxide film serving as a channel region. It is more preferable in increasing mobility and on-current and realizing further high-speed operation of the semiconductor device.

<Appearance of light emitting device>
FIG. 16 is a perspective view illustrating an example of an appearance of a light-emitting device according to one embodiment of the present invention. The light-emitting device illustrated in FIG. 16 includes a panel 1601, a circuit board 1602 provided with a controller, a power supply circuit, an image processing circuit, an image memory, a CPU, and the like, and a connection portion 1603. The panel 1601 includes a pixel portion 1604 provided with a plurality of pixels, a drive circuit 1605 that selects a plurality of pixels for each row, and a drive circuit 1606 that controls input of an image signal Sig to the pixels in the selected row. Have.

  Various signals and the potential of the power supply are input to the panel 1601 from the circuit board 1602 through the connection portion 1603. As the connection portion 1603, an FPC (Flexible Printed Circuit) or the like can be used. When a COF tape is used for the connection portion 1603, a part of the circuit in the circuit board 1602 or a part of the driving circuit 1605 or the driving circuit 1606 included in the panel 1601 is formed on a separately prepared chip. The chip may be electrically connected to the COF tape using a (Chip On Film) method.

<Example configuration of electronic equipment>
A light-emitting device according to one embodiment of the present invention includes a display device, a laptop personal computer, and an image reproduction device including a recording medium (typically, a recording medium such as a DVD: Digital Versatile Disc). Device having a display). In addition, as an electronic device in which the light-emitting device of one embodiment of the present invention can be used, a mobile phone, a portable game machine, a portable information terminal, an electronic book terminal, a video camera, a digital still camera, or the like, a goggle-type display (Head mounted display), navigation system, sound reproduction device (car audio, digital audio player, etc.), copying machine, facsimile, printer, printer multifunction device, automatic teller machine (ATM), vending machine, and the like. Specific examples of these electronic devices are shown in FIGS.

  FIG. 17A illustrates a display device, which includes a housing 5001, a display portion 5002, a support base 5003, and the like. The light-emitting device according to one embodiment of the present invention can be used for the display portion 5002. The display device includes all information display devices for personal computers, TV broadcast reception, advertisement display, and the like.

  FIG. 17B illustrates a portable information terminal which includes a housing 5101, a display portion 5102, operation keys 5103, and the like. The light-emitting device according to one embodiment of the present invention can be used for the display portion 5102.

  FIG. 17C illustrates a display device including a housing 5701 having a curved surface, a display portion 5702, and the like. By using a flexible substrate for the light-emitting device of one embodiment of the present invention, the light-emitting device can be used for the display portion 5702 supported by the housing 5701 having a curved surface, which is flexible, light, and easy to use. A good display device can be provided.

  FIG. 17D illustrates a portable game machine including a housing 5301, a housing 5302, a display portion 5303, a display portion 5304, a microphone 5305, a speaker 5306, operation keys 5307, a stylus 5308, and the like. The light-emitting device according to one embodiment of the present invention can be used for the display portion 5303 or the display portion 5304. With the use of the light-emitting device according to one embodiment of the present invention for the display portion 5303 or the display portion 5304, a portable game machine that has an excellent usability and is unlikely to deteriorate in quality can be provided. Note that although the portable game machine illustrated in FIG. 17D includes two display portions 5303 and 5304, the number of display portions included in the portable game device is not limited thereto.

  FIG. 17E illustrates an electronic book terminal including a housing 5601, a display portion 5602, and the like. The light-emitting device according to one embodiment of the present invention can be used for the display portion 5602. By using a flexible substrate, the light-emitting device can be flexible, so that an electronic book terminal that is flexible, light, and easy to use can be provided.

  FIG. 17F illustrates a cellular phone. A housing 5901 is provided with a display portion 5902, a microphone 5907, a speaker 5904, a camera 5903, an external connection portion 5906, and an operation button 5905. The light-emitting device according to one embodiment of the present invention can be used for the display portion 5902. In the case where the light-emitting device according to one embodiment of the present invention is formed over a flexible substrate, the light-emitting device can be applied to the display portion 5902 having a curved surface as illustrated in FIG. is there.

DESCRIPTION OF SYMBOLS 10 Light-emitting device 11 Pixel 12 Monitor circuit 13 Image processing circuit 14 Light-emitting element 15 Transistor 16 Circuit 17 Switch 17t Transistor 18 Capacitance element 19 Switch 20 Transistor 21 Circuit 21t Transistor 24 Pixel part 25 Panel 26 Controller 27 CPU
28 image memory 29 memory 30 drive circuit 31 drive circuit 32 image data 33 wiring 34 transistor 35 sampling circuit 35t transistor 36B wiring 36G wiring 36R wiring 40 transistor 41 transistor 42 transistor 43 transistor 50 transistor 51 transistor 52 transistor 53 transistor 54 wiring 55 capacitive element 60 Operational Amplifier 61 Capacitance Element 62 Switch 68 Wiring 70 Transistor 80 Conductive Film 81 Insulating Film 82 Oxide Semiconductor Film 82a Oxide Semiconductor Film 82b Oxide Semiconductor Film 82c Oxide Semiconductor Film 83 Conductive Film 84 Conductive Film 85 Insulating Film 86 Insulating Film 87 Insulating film 90 Transistor 91 Transistor 92 Transistor 93 Transistor 94 Transistor 95 Wiring 96 Wiring 400 Substrate 401 Conductive film 40 Insulating film 403 semiconductor film 404 conductive film 405 conductive film 411 insulating film 420 insulating film 424 conductive film 425 insulating film 426 insulating film 427 EL layer 428 conductive film 430 substrate 431 shielding film 432 colored layer 501 conductive film 502 semiconductor film 503 conductive film 504 Conductive film 505 Conductive film 506 Semiconductor film 507 Conductive film 508 Conductive film 509 Conductive film 510 Semiconductor film 511 Conductive film 1601 Panel 1602 Circuit board 1603 Connection portion 1604 Pixel portion 1605 Drive circuit 1606 Drive circuit 5001 Housing 5002 Display portion 5003 Support base 5101 Housing 5102 Display portion 5103 Operation key 5301 Housing 5302 Housing 5303 Display portion 5304 Display portion 5305 Microphone 5306 Speaker 5307 Operation key 5308 Stylus 5601 Housing 5602 Display portion 5701 Housing 5702 Display unit 5901 Housing 5902 Display unit 5903 Camera 5904 Speaker 5905 Button 5906 External connection unit 5907 Microphone

Claims (4)

A pixel, a first circuit that generates a signal including a value of a current extracted from the pixel as data, a second circuit that corrects an image signal according to the signal, and the pixel and the first circuit A third circuit electrically connected to the current path through a first switch,
The pixel includes a light emitting element, a transistor that controls supply of the current to the light emitting element in accordance with the image signal, and a second switch that controls extraction of the current from the pixel. A pixel, a first circuit that generates a signal including a value of a current extracted from the pixel as data, a second circuit that corrects an image signal according to the signal, and the pixel and the first circuit A third circuit electrically connected to the current path through a first switch,
The pixel includes a light-emitting element, a transistor that controls supply of the current to the light-emitting element according to the image signal, a second switch that controls extraction of the current from the pixel, and a gate and a drain of the transistor And a third switch that controls a conduction state between the gate and the wiring of the transistor.   3. The light-emitting device according to claim 1, wherein the transistor includes a channel formation region in an oxide semiconductor film.   4. The light-emitting device according to claim 1, wherein the third circuit includes a diode.

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