JP2015127108A - Image clock generation device and image formation device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image clock generation device which can correct scan speed unevenness with high accuracy.SOLUTION: A pixel clock generation device for an image formation device of scanning a light beam modulated based on image data on a photoreceptor in a main scan direction and forming an image on the photoreceptor, comprises: a first synchronization signal generation unit which generates and outputs a first synchronization signal indicating writing start position of the light beam to the photoreceptor on the basis of the detected light beam; a high frequency clock generation unit which generates a first high frequency clock by multiplying a reference clock higher than the frequency of a pixel clock and generates and outputs a second frequency clock by dividing the first high frequency clock by a prescribed first division ratio; a pixel clock generation unit which generates and outputs a pixel clock by dividing the second high frequency clock by a prescribed second division ratio; and a light beam driving unit which modulates the light beam in accordance with image data on the basis of the pixel clock and drives light beam generation part so as to emit the modulated light beam.

Description

  The present invention relates to an image clock generating apparatus and an image forming apparatus for forming an image by scanning a semiconductor laser beam on a photosensitive member.

  For example, in an image forming apparatus such as a laser printer or a digital copying machine, a laser beam emitted from a light source is scanned by a rotating polygon mirror, and passes through a scanning lens on a photoconductor as a medium to be scanned. Exposure to form an electrostatic latent image. At this time, the photodetector detects the scanning beam for each line. In such a scanning optical system, it is necessary to correct scanning speed unevenness (scanning speed error) that causes deterioration of image quality. For example, in Patent Document 1, by calculating an error between a predetermined target value and a time interval of a synchronization signal detected by photodetectors installed at both ends of the photoreceptor, the scanning speed of the laser beam is calculated. An image forming apparatus capable of correcting an error with high accuracy is disclosed.

  However, in order to cope with a case where the linear velocity (paper transport speed) changes (for example, when different optical systems are controlled or the same optical system changes the paper type), a comparison means for calculating an error, There is a problem that the circuit scale of the calculated error frequency calculation means increases.

  An object of the present invention is to solve the above-mentioned problems, to correct scanning speed unevenness caused by various factors with high accuracy, and to provide a highly responsive image that covers a wide range of pixel clock frequencies without increasing the circuit scale. The object is to provide a clock generator.

An image clock generation device according to an aspect of the present invention includes:
A light beam generating unit that emits a light beam modulated based on image data, a photoconductor that scans the light beam according to the rotation of a polygon mirror, and forms an image; and detects the scanned light beam A pixel clock generator for an image forming apparatus comprising a scanning beam detector
A first synchronization signal generation unit that generates and outputs a first synchronization signal indicating a writing start position of the light beam on the photoconductor based on the detected light beam;
A high-frequency clock that multiplies a predetermined reference clock to generate a first high-frequency clock, divides the first high-frequency clock by a predetermined first division ratio, and generates and outputs a second high-frequency clock. A generator,
A pixel clock generation unit that divides the second high-frequency clock by a predetermined second division ratio to generate and output a pixel clock;
A light beam driving unit that modulates the image data based on the pixel clock and drives the light beam generation unit to emit a modulated light beam;
The frequency of the reference clock is set to be higher than the frequency of the pixel clock.

  According to the present invention, it is possible to generate a pixel clock by dividing a high-frequency clock by a division ratio based on a frequency designation signal calculated by a writing resolution, a linear velocity, and a rotational speed of a rotary polygon mirror. It is possible to correct the scanning speed unevenness caused by various factors with high accuracy.

1 is a block diagram showing a configuration of an image forming apparatus 1 according to Embodiment 1 of the present invention. FIG. 2 is a schematic diagram for explaining the operation of the image forming apparatus 1 in FIG. 1. It is a block diagram which shows the structure of 1 A of image forming apparatuses which concern on Embodiment 2 of this invention. It is a block diagram which shows the structure of the image forming apparatus 1B which concerns on Embodiment 3 of this invention. 6 is a timing chart showing the timing for starting image writing on the photoconductor 7A of FIG. It is a block diagram which shows the structure of 1 C of image forming apparatuses which concern on Embodiment 4 of this invention. It is a block diagram which shows the structure of image forming apparatus 1D which concerns on Embodiment 5 of this invention. FIG. 8 is a timing chart showing the timing for starting image writing and the timing for ending image writing on the photoconductor 7 </ b> A of FIG. 7. FIG. It is a block diagram which shows the structure of the image forming apparatus 1E which concerns on Embodiment 6 of this invention.

  Hereinafter, embodiments according to the present invention will be described with reference to the drawings. In addition, in each following embodiment, the same code | symbol is attached | subjected about the same component.

Embodiment 1. FIG.
FIG. 1 is a block diagram showing a configuration of an image forming apparatus 1 according to Embodiment 1 of the present invention. In FIG. 1, the image forming apparatus 1 includes an image processing unit 9 that outputs image data, a control unit 10, a pixel clock generation device 20, and a scanning optical device 40. Further, the scanning optical device 40 includes a light beam generator 4A, a rotating polygon mirror 5 having a plurality of mirror surfaces that reflect the light beam, a scanning lens 6A, and a photoconductor 7A that forms an image (electrostatic latent image). And a first scanning beam detector 8A disposed at one end of the photoconductor 7A. That is, the image forming apparatus 1 includes a light beam generator 4A that emits a light beam modulated based on image data, and a photoconductor 7A that scans the light beam according to the rotation of the rotary polygon mirror 5 to form an image. And a scanning beam detector 8A for detecting the scanned light beam. Here, the rotary polygon mirror 5 rotates around the central axis of the rotary polygon mirror 5 at a main scanning angular velocity (rotational speed) ω in the clockwise direction.

  The pixel clock generator 20 includes a high frequency clock generator 2, a pixel clock generator 3A, a light beam driver 11A, and a synchronization signal generator 12A. Here, the image forming apparatus 1 scans a light beam modulated based on image data in a main scanning direction on a photoconductor rotating at a predetermined rotation speed, and forms an image on the photoconductor 7A.

  In FIG. 1, the synchronization signal generator 12A generates a synchronization signal SS1 indicating the write start position of the light beam on the photoconductor 7A based on the light beam detected by the scanning beam detector 8A. The synchronization signal SS1 is output to the pixel clock generation unit 3A. Here, the synchronization signal SS1 is a synchronization signal indicating the timing at which writing of the scanning light SL1 to the photoconductor 7A is started.

  The high frequency clock generation unit 2 generates a first high frequency clock by multiplying a predetermined reference clock that is set to be higher than the frequency of a pixel clock described later. The high-frequency clock generation unit 2 divides the first high-frequency clock by a predetermined first division ratio to generate a second high-frequency clock VCLK, and the generated second high-frequency clock VCLK Output to the pixel clock generator 3A. Here, the predetermined first frequency division ratio is based on the writing resolution of the image forming apparatus 1, the linear speed determined based on the paper conveyance speed of the photoconductor 7 </ b> A, and the rotational speed of the rotary polygon mirror 5. Is set. Further, the first frequency division ratio is set so that the position where the scanning light SL1 is written on the photoconductor 7A is constant.

  The pixel clock generation unit 3A divides the input second high-frequency clock VCLK by a predetermined second frequency division ratio based on the initial frequency designation signal IFDS1 from the control unit 10 to generate the pixel clock ICLK1. In addition, the pixel clock generation unit 3A outputs the pixel clock ICLK1 to the light beam driving unit 11A based on the synchronization signal SS1. Here, the second frequency division ratio is set based on the writing resolution of the image forming apparatus 1, the linear velocity determined based on the paper conveyance speed of the photoconductor 7 </ b> A, and the rotational speed of the rotary polygon mirror 5. Is done. Further, the second frequency division ratio is set so that the position where the scanning light SL1 is written on the photoconductor 7A is constant.

  The light beam driving unit 11A modulates the light beam generating unit 4A based on the pixel clock ICLK1 from the pixel clock generating unit 3A according to the image data ID1 input from the image processing unit 9, and emits the modulated light beam. To drive.

  The operation of the image forming apparatus 1 according to the first embodiment configured as described above will be described below.

  FIG. 2 is a schematic diagram for explaining the operation of the image forming apparatus 1 of FIG. In FIG. 2, the light beam LB1 from the light beam generator 4A is reflected by each mirror surface arranged on the side surface of the rotary polygon mirror 5, and the reflected beam RB1 reflected reaches the scanning lens 6A. The reflected beam RB1 reflected by the rotary polygon mirror 5 is incident on the scanning beam detector 8A as scanning light SL1 through the scanning lens 6A as scanning light SL1 before main scanning of the photosensitive member 7A for one line. The detection timing of the main scanning is detected by the detection unit 8A.

  The scanning light SL1 that has passed through the scanning lens 6A undergoes main scanning on the photoconductor 7A by one line in the main scanning direction (hereinafter referred to as the X-axis direction), and the range of the effective writing width W on the photoconductor 7A. An image is formed inside, and the image on the photoreceptor 7A is transferred to the paper 50. Next, the photoconductor 7A rotates at a predetermined rotation speed in the Y-axis direction, performs main scanning for the next one line, and forms an image within the range of the effective writing width W on the photoconductor 7A. Is transferred to the paper 50. These operations are repeated to complete the main scanning of all lines. Here, in a coordinate system having an X axis and a Y axis orthogonal to each other, the longitudinal direction (rotation axis direction) of the photoconductor 7A is defined as the X axis direction, and the direction perpendicular to the rotation axis of the photoconductor 7A is defined as the Y axis direction.

  Next, a method of setting the first frequency division ratio based on the frequency division ratio designation signal DDS and the second frequency division ratio based on the initial frequency designation signal IFDS1 will be described. Here, the first frequency division ratio and the second frequency division ratio are set as follows based on the design specifications of the image forming apparatus 1.

The design specification of the image forming apparatus 1 according to the first embodiment of the present invention is set by the following elements.
(1) Write resolution (dot / inch) (= number of dots per inch)
(2) Linear velocity (mm / second) (= (paper size + paper interval) × number of printed sheets per minute / 60)
(3) Rotational speed of rotating polygon mirror (number of rotations per minute)
(4) Angle of view of scanning lens (5) Effective writing width (6) Number of light beams

Here, the above-described elements (1) to (6) are set according to mechanical characteristics, lens characteristics, paper type, and the like, and are inherent values possessed by the image forming apparatus 1. Almost no. Accordingly, the pixel clock frequency f _I (MHz) can be calculated as follows.

First, the scanning frequency f _V in the X-axis direction of the photosensitive member 7A, the light beam number n, the linear velocity using the V and writing resolution DPI (moving speed of the photosensitive member surface), can be calculated by the following equation. Here, the value of (DPI / 25.4) is the number of dots per mm.

  Next, the effective scanning period rate R can be calculated by the following equation using the number m of rotating polygon mirrors and the half angle of view θ. When the writing width of one line of the photoconductor 7A corresponds to the end of one surface of the rotary polygon mirror 5, the effective scanning period rate R is 100%.

  Using the scanning frequency fv and the effective scanning period rate R calculated by the above formulas (1) and (2) and the effective writing width W of the photoconductor 7A, the following formula can be used.

  Substituting Equation (1) and Equation (2) into Equation (3) yields the following equation:

Here, the writing resolution DPI is 1200 (dpi), the number of light beams n is 2 (pieces), the effective writing width W is 300 (mm), the number of faces m of the rotary polygon mirror 5 is 6 (faces), and the half angle of view θ. Is assumed to be 45 (degrees). In this case, the use of equation (1), the scanning frequency _{f V} is calculated to be 7086 (Hz). In addition, when Expression (3) is used, the pixel clock frequency f _I is calculated as 133.9 (MHz).

  For example, assume that the frequency of the reference clock is 2 (GHz). In this case, the first frequency division ratio is set to 2, and the second frequency division ratio is set to 29.87303. With this configuration, the second frequency division ratio can be set to a decimal value.

  According to the image forming apparatus 1 according to the above embodiment, the high-frequency clock is divided by a division ratio set based on the writing resolution of the image forming apparatus 1, the linear velocity, and the rotational speed of the rotary polygon mirror 5. Generate. Therefore, even when the paper type or size is changed, it is possible to cope with the problem by changing only the frequency division ratio of the high-frequency clock generator without changing the circuit scale of the pixel clock generator.

  Further, according to the image forming apparatus 1 according to the above embodiment, the frequency of the pixel clock can be set only by the frequency division ratio of the high-frequency clock generation unit. Accordingly, it is possible to provide an image forming apparatus with high responsiveness that covers a wide range of pixel clock frequencies, and it is possible to deal with various optical systems.

Embodiment 2. FIG.
In the image forming apparatus 1 according to the first embodiment described above, the case where the number of the photoreceptors 7A is one has been described, but the present invention is not limited to this. For example, the image forming apparatus 1A according to the second exemplary embodiment of the present invention may further include the photoconductor 7B and form images on the photoconductors 7A and 7B using a common high-frequency clock.

  FIG. 3 is a block diagram showing the configuration of the image forming apparatus 1A according to the second embodiment of the present invention. Compared with the image forming apparatus 1 in FIG. 1, the image forming apparatus 1 </ b> A includes a pixel clock generating apparatus 20 </ b> A instead of the pixel clock generating apparatus 20, and includes a scanning optical apparatus 40 </ b> A instead of the scanning optical apparatus 40. It is characterized by that. Compared to the scanning optical device 40, the scanning optical device 40A includes a light beam generating unit 4B that emits a light beam, a scanning lens 6B, and a second photoconductor 7B that forms an image (electrostatic latent image). And a second scanning beam detector 8B disposed at one end of the photoconductor 7B.

  In FIG. 3, the image forming apparatus 1A includes first and second light beam generators that emit first and second light beams modulated based on the first and second image data ID1 and ID2, respectively. 4A and 4B are comprised. In addition, the image forming apparatus 1A scans the first and second photoconductors 7A and 7B that scan the first and second light beams according to the rotation of the rotary polygon mirror 5 to form an image. The first and second scanning beam detectors 8A and 8B are configured to detect the first and second light beams, respectively.

  Compared with the pixel clock generation device 20, the pixel clock generation device 20A further includes a pixel clock generation unit 3B, a light beam driving unit 11B, and a synchronization signal generation unit 12B.

  In FIG. 3, the synchronization signal generator 12B generates a synchronization signal SS2 indicating the write start position of the light beam on the photoconductor 7B based on the light beam detected by the scanning beam detector 8B. The synchronization signal SS2 is output to the pixel clock generation unit 3B. Here, the synchronization signal SS2 is a synchronization signal indicating the timing at which writing of the scanning light SL2 to the photoconductor 7B is started.

  The pixel clock generation unit 3B divides the input second high-frequency clock VCLK by a predetermined third division ratio based on the initial frequency designation signal IFDS2 from the control unit 10 to generate the pixel clock ICLK2. Further, the pixel clock generation unit 3B outputs the pixel clock to the light beam driving unit 11B based on the synchronization signal SS2. Here, the third frequency division ratio is set based on the writing resolution of the image forming apparatus 1, the linear speed determined based on the paper conveyance speed of the photoconductor 7 </ b> B, and the rotational speed of the rotary polygon mirror 5. Is done. Further, the third frequency division ratio is set so that the position where the scanning light SL2 is written on the photoconductor 7B is constant.

  The light beam driver 11B modulates the light beam generator 4B based on the pixel clock ICLK2 from the pixel clock generator 3B in accordance with the image data ID2 input from the image processor 9, and emits the modulated light beam. To drive. The initial frequency designation signal IFDS2 is set in the same manner as the initial frequency setting signal IFDS1 of the first embodiment.

  The operation of the image forming apparatus 1A according to the second embodiment configured as described above will be described below.

  The image forming apparatus 1A according to the second embodiment is different from the image forming apparatus 1 according to the first embodiment in that the operation of the pixel clock generation unit 3B is added. Here, the operation of the pixel clock generation unit 3B is the same as that of the pixel clock generation unit 3A according to the first embodiment.

  According to the image forming apparatus 1A in the above embodiment, the same effect as that of the image forming apparatus 1 according to the first embodiment can be obtained.

Embodiment 3. FIG.
In the image forming apparatus 1 according to the first embodiment described above, an error in the main scanning speed ω is generated due to fluctuations in the rotational speed of the rotary polygon mirror 5. On the other hand, the image forming apparatus 1B according to the third embodiment is characterized by including means for correcting the error.

  FIG. 4 is a block diagram showing a configuration of an image forming apparatus 1B according to Embodiment 3 of the present invention. Compared to the image forming apparatus 1 in FIG. 1, the image forming apparatus 1 </ b> B in FIG. 4 includes a pixel clock generating apparatus 20 </ b> B instead of the pixel clock generating apparatus 20. Further, the pixel clock generation device 20B is configured to include a pixel clock generation unit 3Aa instead of the pixel clock generation unit 3A, as compared with the pixel clock generation device 20 of FIG. Further, the pixel clock generation device 20B includes a light beam drive unit 11Aa instead of the light beam drive unit 11A, and a synchronization signal generation unit 12Aa instead of the synchronization signal generation unit 12A, as compared with the pixel clock generation device 20 of FIG. It is configured with. Further, the pixel clock generation unit 3Aa includes a comparison unit 30, a frequency calculation unit 31, and a frequency division unit 32.

  In FIG. 4, the synchronization signal generator 12Aa generates a synchronization signal SS3 indicating the write start position of the light beam on the photoconductor 7A based on the light beam detected by the scanning beam detector 8A. The synchronization signal SS3 is output to the comparison unit 30 and the frequency division unit 32. Here, the synchronization signal SS3 is a synchronization signal indicating the timing at which writing of the scanning light SL1 to the photoconductor 7A is started.

The comparison unit 30 detects the time interval of the synchronization signal SS3 from the synchronization signal generation unit 12Aa, and compares the detected time interval with a signal indicating the predetermined target value T input from the control unit 10. Further, the comparison unit 30 generates error data ES corresponding to the difference between the detected time interval and the target value T based on the comparison result, and uses the generated error data ES as the frequency calculation unit 31. Output to. Here, the target value T is a value obtained by multiplying the target dot number N _ref1 for one line in the X-axis direction by one dot width Lp (psec), and is calculated by the control unit 10. That is, the target value T is set based on the design specification of the image forming apparatus 1B, and is set based on the writing resolution of the image forming apparatus 1B and the linear velocity determined by the paper conveyance speed of the photoreceptor 7A. .

  The frequency calculation unit 31 calculates a set value of the frequency of the pixel clock ICLK3 based on the initial frequency designation signal IFDS1 from the control unit 10 and the error data ES from the comparison unit 30. Further, the frequency calculating unit 31 generates a frequency specifying signal FDS1 that specifies the set value of the frequency of the pixel clock ICLK3 based on the calculated set value of the frequency of the pixel clock ICLK3, and the generated frequency specifying signal FDS1 is output to the frequency divider 32.

  The frequency division unit 32 divides the low-speed clock signal by a predetermined second frequency division ratio based on the frequency designation signal FDS1 from the frequency calculation unit 31, and the frequency-divided low-speed clock based on the synchronization signal SS3. The signal is output to the light beam driver 11Aa as the pixel clock ICLK3. That is, the pixel clock generation unit 3Aa generates the pixel clock ICLK3 so that the error data ES calculated by the comparison unit 30 becomes zero.

  The light beam driver 11Aa modulates according to the image data ID1 input from the image processor 9 based on the pixel clock ICLK3 from the frequency divider 32, and drives the light beam generator 4A so as to emit the modulated light beam. To do.

  The operation of the image forming apparatus 1B according to the third embodiment configured as described above will be described below.

  Compared to the operation of the image forming apparatus 1 according to the first embodiment described above, the operation of the image forming apparatus 1B according to the third embodiment is that an operation in which the pixel clock generation unit 3Aa corrects an error in the main scanning speed is added. Is different. Here, a method of correcting the error of the main scanning speed will be described below.

FIG. 5 is a timing chart showing timing for starting image writing on the photoconductor 7A of FIG. In FIG. 5, the time when the scanning beam detection unit 8A detects the scanning light SL1 is time t1, and the time when the scanning beam detection unit 8A detects the scanning light SL1 is time t2. Here, the target dot number N _ref1 described above can be expressed by the following equation using the synchronization signal interval La ₁ (psec) and the one-dot time width Lp (psec).

The target number of dots _{N ref1} described above, the use of pixel clock period Tp is one period of the main scanning period Ta ₁ and the pixel clock ICLK3 of one line in the X-axis direction can be expressed by the following equation.

Next, using the target dot number N _ref1 and the initial value Tclk_i of the pixel clock cycle, the target main scanning target cycle Tspsp_target is expressed by the following equation. The initial value Tclk_i of the pixel clock cycle is the value of the pixel clock ICLK1 in the first embodiment.

Further, using the main scanning cycle error Δt in the main scanning target cycle Tspsp_target and the error Δn ₁ of the target dot number N _ref1 in the target dot number N _ref1 , the equation (7) can be expressed by the following equation.

On the other hand, in order to obtain a high-definition image, the pixel clock is set so that one scanning cycle becomes the target value N _ref1 regardless of the error of the main scanning speed ω (error Δn ₁ → 0 of the target dot number N _ref1 ). It is necessary to correct the initial period value Tclk_i. Here, when 0 is substituted into the error Δn ₁ of the target dot number N _ref1 and the correction amount Δtclk_i of the initial value Tclk_i of the pixel clock period is given, the equation (8) can be expressed by the following equation.

  From equation (9), the correction amount Δtclk_i of the initial value Tclk_i of the pixel clock cycle can be expressed by the following equation.

  Here, the frequency calculation unit 31 generates the frequency designation signal FDS1 so that the pixel clock cycle becomes (Tclk_i + Δtclk_i), and outputs the frequency designation signal FDS1 to the frequency division unit 32. With this configuration, it is possible to correct an error in the main scanning speed ω due to fluctuations in the rotational speed of the rotary polygon mirror 5. Note that the frequency calculation unit 31 may repeat this calculation for each synchronization detection period to correct the scanning speed unevenness, or may update the pixel clock frequency each time the synchronization signal is detected.

  According to the image forming apparatus 1B according to the above embodiment, the same effects as those of the image forming apparatus 1 according to the first embodiment can be obtained. Furthermore, according to the image forming apparatus 1B according to the above embodiment, the time interval of the synchronization signal SS3 can be corrected so as to be the target value T based on the design specification of the image forming apparatus 1B. It is possible to more accurately control the rotation speed unevenness.

Embodiment 4 FIG.
In the image forming apparatus 1 according to the third embodiment described above, the case where the number of the photoreceptors 7A is one has been described, but the present invention is not limited to this. For example, in the image forming apparatus 1A according to Embodiment 4 of the present invention, the photoconductor 7B may be further added, and an image may be formed on each of the photoconductors 7A and 7B using a common high-frequency clock.

  FIG. 6 is a block diagram showing a configuration of an image forming apparatus 1C according to Embodiment 4 of the present invention. Compared to the image forming apparatus 1B of FIG. 4, the image forming apparatus 1C of FIG. 6 includes a pixel clock generating apparatus 20C instead of the pixel clock generating apparatus 20B, and instead of the scanning optical apparatus 40, the scanning optical apparatus 40A of FIG. It is configured with. Further, the pixel clock generation device 20C further includes a pixel clock generation unit 3Ab, a light beam driving unit 11Ab, and a synchronization signal generation unit 12Ab, as compared with the pixel clock generation device 20B of FIG. Further, the pixel clock generation unit 3Ab includes a frequency calculation unit 31A and a frequency division unit 32A.

  In FIG. 6, the synchronization signal generator 12Ab generates a synchronization signal SS4 indicating the writing start position of the light beam on the photoconductor 7B based on the light beam detected by the scanning beam detector 8B. The synchronization signal SS4 is output to the frequency divider 32. Here, the synchronization signal SS4 is a synchronization signal indicating the timing at which writing of the scanning light SL2 to the photoconductor 7B is started.

  The frequency calculation unit 31A calculates a set value of the frequency of the pixel clock ICLK4 based on the initial frequency designation signal IFDS2 from the control unit 10 and the error data ES from the comparison unit 30. Further, the frequency calculating unit 31A generates a frequency specifying signal FDS2 that specifies the set value of the frequency of the pixel clock ICLK4 based on the calculated set value of the frequency of the pixel clock ICLK4, and the generated frequency specifying signal FDS2 is output to frequency divider 32A.

  The frequency division unit 32A divides the low-speed clock signal by a predetermined second frequency division ratio based on the frequency designation signal FDS2 from the frequency calculation unit 31A, and the frequency-divided low-speed clock based on the synchronization signal SS4. The signal is output to the light beam driver 11Ab as the pixel clock ICLK4. That is, the pixel clock generation unit 3Ab generates the pixel clock ICLK4 so that the error data ES calculated by the comparison unit 30 becomes zero.

  The light beam driver 11Ab modulates according to the image data ID2 input from the image processor 9 based on the pixel clock ICLK4 from the frequency divider 32A, and drives the light beam generator 4B so as to emit the modulated light beam. To do.

  An operation of the image forming apparatus 1C according to the fourth embodiment configured as described above will be described below.

  The image forming apparatus 1C according to the fourth embodiment is different from the image forming apparatus 1B according to the third embodiment in that the operation of the pixel clock generation unit 3Ab is added. Here, the operation of the pixel clock generation unit 3Ab is the same as that of the pixel clock generation unit 3Aa according to the third embodiment.

  According to the image forming apparatus 1C in the above embodiment, the same effect as that of the image forming apparatus 1B according to the third embodiment can be obtained.

Embodiment 5. FIG.
In the image forming apparatus 1B according to the third embodiment described above, the error in the main scanning speed is corrected using only the first synchronization signal indicating the writing start position. On the other hand, the image forming apparatus 1D according to the fifth embodiment of the present invention is further characterized in that the error in the main scanning speed is corrected using the second synchronization signal indicating the writing end position.

  FIG. 7 is a block diagram showing a configuration of an image forming apparatus 1D according to the fifth embodiment of the present invention. Compared to the image forming apparatus 1B of FIG. 4, the image forming apparatus 1D of FIG. 7 includes a pixel clock generating apparatus 20D instead of the pixel clock generating apparatus 20B. Further, the image forming apparatus 1D is configured to include a scanning optical device 40B instead of the scanning optical device 40, as compared with the image forming device 1B of FIG. The scanning optical device 40B of FIG. 7 is configured to further include a scanning beam detection unit 8C opposite to the scanning beam detection unit 8A as compared with the scanning optical device 40 of FIG.

  Compared with the pixel clock generation device 20B of FIG. 4, the pixel clock generation device 20D includes a pixel clock generation unit 3Ac instead of the pixel clock generation unit 3Aa, and includes a light beam drive unit 11Ac instead of the light beam drive unit 11Aa. Instead of the synchronization signal generation unit 12Aa, a synchronization signal generation unit 12Ac is provided, and a synchronization signal generation unit 13 is further provided. Further, the pixel clock generation unit 3Ac includes a comparison unit 30A, a frequency calculation unit 31B, and a frequency division unit 32B.

  In FIG. 7, the synchronization signal generation unit 12Ac generates a synchronization signal SS5 indicating the writing start position of the light beam on the photoconductor 7A based on the light beam detected by the scanning beam detection unit 8A. The synchronization signal SS5 is output to the comparison unit 30A and the frequency division unit 32B. Here, the synchronization signal SS5 is a synchronization signal indicating the timing at which writing of the scanning light SL1 to the photoconductor 7A is started.

  Based on the light beam detected by the scanning beam detector 8C, the synchronization signal generation unit 13 generates a synchronization signal SS6 indicating the writing end position of the light beam on the photoconductor 7A, and the generated synchronization signal SS6 is generated. Output to the comparison unit 30A. Here, the synchronization signal SS6 is a synchronization signal indicating the timing at which the writing of the scanning light SL1 to the photoconductor 7A is completed.

The comparison unit 30A detects a time interval between the synchronization signal SS5 from the synchronization signal generation unit 12Ac and the synchronization signal SS6 from the synchronization signal generation unit 13, and the detected time interval and the control unit 10 are input. A signal indicating a predetermined target value Ta is compared. Further, the comparison unit 30A generates error data ES1 corresponding to the difference between the detected time interval and the target value Ta based on the comparison result, and sends the generated error data ES1 to the frequency calculation unit 31B. Output. Here, the target value Ta is a value obtained by multiplying the target dot number N _ref2 for one line in the X-axis direction by one dot width Lp (psec), and is calculated by the control unit 10. That is, the target value Ta is set based on the design specifications of the image forming apparatus 1D, and is calculated based on the writing resolution of the image forming apparatus 1D and the linear speed determined by the paper transport speed of the photoconductor 7A. .

  The frequency calculation unit 31B calculates a set value of the frequency of the pixel clock ICLK5 based on the initial frequency designation signal IFDS1 from the control unit 10 and the error data ES1 from the comparison unit 30A. Further, the frequency calculation unit 31B generates a frequency specifying signal FDS3 that specifies the set value of the frequency of the pixel clock ICLK5 based on the calculated set value of the frequency of the pixel clock ICLK5, and the generated frequency specifying signal The FDS3 is output to the frequency divider 32B.

  The frequency divider 32B divides the low-speed clock signal by a frequency division ratio based on the frequency designation signal FDS3 from the frequency calculation unit 31B, and uses the frequency-divided low-speed clock signal as the pixel clock ICLK5 based on the synchronization signal SS5. The light is output to the light beam driving unit 11Ac. That is, the pixel clock generation unit 3Ac generates the pixel clock ICLK5 so that the error data ES1 calculated by the comparison unit 30A becomes zero.

  The light beam driver 11Ac modulates according to the image data ID1 input from the image processor 9 based on the pixel clock ICLK5 from the frequency divider 32B, and drives the light beam generator 4A so as to emit the modulated light beam. To do.

  The operation of the image forming apparatus 1D according to the fifth embodiment configured as described above will be described below.

  Compared to the operation of the image forming apparatus 1 according to the first embodiment described above, the operation of the image forming apparatus 1D according to the present embodiment is added with an operation in which the pixel clock generation unit 3Ac corrects an error in the main scanning speed. Is different. Here, a method of correcting the error of the main scanning speed will be described below.

FIG. 8 is a timing chart showing the timing of starting image writing and the timing of ending image writing on the photoconductor 7A of FIG. In FIG. 8, the time when the scanning beam detection unit 8A detects the scanning light SL1 is time t11, and the time when the scanning beam detection unit 8C detects the scanning light SL1 is time t22. Here, the target dot number N _ref2 described above can be expressed by the following equation using the synchronization signal interval La ₂ (psec) and the one-dot time width Lp (psec).

The target number of dots _{N ref2} described above, the use of pixel clock period Tp is one period of the main scanning period Ta ₂ and the pixel clock ICLK5 of one line in the X-axis direction can be expressed by the following equation.

Next, when the target dot number N _ref2 and the initial value Tclk_w of the pixel clock cycle are used, the target main scanning target cycle Tstep_target is expressed by the following equation. Note that the initial value Tclk_w of the pixel clock cycle is set in the same manner as in the first embodiment.

Further, using the main scanning period error Δt in the main scanning target period Tspe_target and the error Δn ₂ of the target dot number N _ref2 in the target dot number N _ref2 , the expression (13) can be expressed by the following expression.

On the other hand, in order to obtain a high-definition image, the pixel clock is set so that one scanning cycle becomes the target value N _ref2 regardless of the error of the main scanning speed ω (the error Δn ₂ → 0 of the target dot number N _ref2 ). It is necessary to correct the initial value Tclk_w of the period. Here, when 0 is substituted into the error Δn ₂ of the target dot number N _ref2 and the correction amount Δtclk_w of the initial value Tclk_w of the pixel clock cycle is given, the equation (14) can be expressed by the following equation.

  From the equation (15), the correction amount Δtclk_w of the initial value Tclk_w of the pixel clock cycle can be expressed by the following equation.

  Here, the frequency calculation unit 31B generates the frequency designation signal FDS3 so that the pixel clock cycle becomes (Tclk_w + Δtclk_w), and outputs the frequency designation signal FDS3 to the frequency division unit 32B. With this configuration, it is possible to correct an error in the main scanning speed ω due to fluctuations in the rotational speed of the rotary polygon mirror 5. Note that the frequency calculation unit 31B may repeat this calculation for each synchronization detection period to correct the scanning speed unevenness, or may update the pixel clock frequency each time a synchronization signal is detected.

  According to the image forming apparatus 1D according to the above embodiment, the same effects as those of the image forming apparatus 1 according to the first embodiment can be obtained. Furthermore, according to the image forming apparatus 1D according to the above embodiment, the time interval between the synchronization signal SS5 and the synchronization signal SS6 can be corrected so as to be the target value Ta based on the design specification of the image forming apparatus 1D. Therefore, the rotational speed unevenness of the rotary polygon mirror 5 can be controlled more accurately.

  The comparison unit 30A may detect a time period for scanning the photoconductor 7A corresponding to the rotation of one surface of the rotary polygon mirror 5 as a time interval between the synchronization signal SS5 and the synchronization signal SS6. Further, the comparison unit 30A uses, as a time interval between the synchronization signal SS5 and the synchronization signal SS6, a value obtained by moving and averaging the time period of scanning the photoconductor 7A corresponding to the rotation of each surface of the rotary polygon mirror 5. It may be detected. Further, since the error for each surface of the rotary polygon mirror 5 always has a fixed offset, the error is detected, and the writing position for each surface of the rotary polygon mirror 5 is controlled based on the detected error. You may do it.

Embodiment 6. FIG.
In the image forming apparatus 1 according to the third embodiment described above, the case where the number of the photoreceptors 7A is one has been described, but the present invention is not limited to this. For example, in the image forming apparatus 1A according to Embodiment 4 of the present invention, the photoconductor 7B may be further added, and an image may be formed on each of the photoconductors 7A and 7B using a common high-frequency clock.

  FIG. 9 is a block diagram showing a configuration of an image forming apparatus 1E according to Embodiment 6 of the present invention. Compared to the image forming apparatus 1D of FIG. 7, the image forming apparatus 1E of FIG. 9 includes a pixel clock generating apparatus 20E instead of the pixel clock generating apparatus 20D, and includes a scanning optical apparatus 40C instead of the scanning optical apparatus 40B. Composed. The scanning optical device 40C of FIG. 9 includes scanning beam detection units 8C and 8D that face the scanning beam detection units 8A and 8B, respectively, as compared with the scanning optical device 40A of FIG.

  Compared with the pixel clock generation device 20D of FIG. 7, the pixel clock generation device 20E of FIG. 9 includes a pixel clock generation unit 3Ad, a light beam driving unit 11Ad, a synchronization signal generation unit 12Ad, and a synchronization signal generation unit 13A. In addition, it is configured. Further, the pixel clock generation unit 3Ad includes a comparison unit 30B, a frequency calculation unit 31C, and a frequency division unit 32C.

  In FIG. 9, the synchronization signal generation unit 12Ad generates a synchronization signal SS7 indicating the write start position of the light beam on the photoconductor 7B based on the light beam detected by the scanning beam detection unit 8B. The synchronization signal SS7 is output to the comparison unit 30B and the frequency division unit 32C. Here, the synchronization signal SS7 is a synchronization signal indicating the timing at which writing of the scanning light SL2 to the photoconductor 7B is started.

  Based on the light beam detected by the scanning beam detection unit 8D, the synchronization signal generation unit 13A generates a synchronization signal SS8 indicating a write end position of the light beam on the photoconductor 7B, and the generated synchronization signal SS8 is generated. Output to the comparison unit 30B. Here, the synchronization signal SS8 is a synchronization signal indicating the timing at which the writing of the scanning light SL2 to the photoconductor 7B is completed.

The comparison unit 30B detects the time interval between the synchronization signal SS7 from the synchronization signal generation unit 12Ad and the synchronization signal SS8 from the synchronization signal generation unit 13A, and is input from the detected time interval and the control unit 10. A signal indicating a predetermined target value Ta is compared. Further, the comparison unit 30B generates error data ES2 corresponding to the difference between the detected time interval and a predetermined target value Ta based on the comparison result, and the generated error data ES2 is a frequency calculation unit. Output to 31C. Here, the target value Ta is a value obtained by multiplying the target dot number N _ref2 for one line in the X-axis direction by one dot width Lp (psec), and is calculated by the control unit 10. That is, the target value Ta is set based on the design specification of the image forming apparatus 1E, and is calculated based on the writing resolution of the image forming apparatus 1E and the linear velocity determined by the paper transport speed of the photoreceptors 7A and 7B. Is done.

  The frequency calculation unit 31C calculates a set value of the frequency of the pixel clock ICLK6 based on the initial frequency designation signal IFDS2 from the control unit 10 and the error data ES2 from the comparison unit 30B. Further, the frequency calculation unit 31C generates a frequency specifying signal FDS4 that specifies the set value of the frequency of the pixel clock ICLK6 based on the calculated set value of the frequency of the pixel clock ICLK6, and the generated frequency specifying signal The FDS4 is output to the frequency divider 32C.

  The frequency dividing unit 32C divides the low-speed clock signal by a frequency dividing ratio based on the frequency designation signal FDS4 from the frequency calculating unit 31C and uses the frequency-divided low-speed clock signal as the pixel clock ICLK6 based on the synchronization signal SS7. The light is output to the light beam driver 11Ad. That is, the pixel clock generation unit 3Ad generates the pixel clock ICLK6 so that the error data ES2 calculated by the comparison unit 30B becomes zero.

  The light beam driving unit 11Ad modulates according to the image data ID2 input from the image processing unit 9 based on the pixel clock ICLK6 from the frequency dividing unit 32C, and drives the light beam generating unit 4B so as to emit the modulated light beam. To do.

  The operation of the image forming apparatus 1E according to the sixth embodiment configured as described above will be described below.

  The image forming apparatus 1E according to the present embodiment is different from the image forming apparatus 1D according to the fifth embodiment in that the operation of the pixel clock generation unit 3Ad is added. Here, the operation of the pixel clock generation unit 3Ad is the same as that of the pixel clock generation unit 3Ac according to the fifth embodiment.

  According to the image forming apparatus 1E in the above embodiment, the same effect as the image forming apparatus 1D according to the fifth embodiment can be obtained.

  The comparison unit 30B may detect a time period for scanning the photoconductor 7B corresponding to the rotation of one surface of the rotary polygon mirror 5 as a time interval between the synchronization signal SS7 and the synchronization signal SS8. Further, the comparison unit 30B uses a value obtained by moving and averaging the time period of scanning the photoreceptor 7B corresponding to the rotation of each surface of the rotary polygon mirror 5 as the time interval between the synchronization signal SS7 and the synchronization signal SS8. It may be detected. Further, since the error for each surface of the rotary polygon mirror 5 always has a fixed offset, the error is detected, and the writing position for each surface of the rotary polygon mirror 5 is controlled based on the detected error. You may do it.

Summary of Embodiments A pixel clock generation device according to a first aspect includes a light beam generating unit that emits a light beam modulated based on image data, and scanning the light beam according to the rotation of a rotating polygon mirror. A pixel clock generation device for an image forming apparatus, comprising: a photoconductor for forming an image; and a scanning beam detection unit for detecting the scanned light beam,
A first synchronization signal generation unit that generates and outputs a first synchronization signal indicating a writing start position of the light beam on the photoconductor based on the detected light beam;
A high-frequency clock that multiplies a predetermined reference clock to generate a first high-frequency clock, divides the first high-frequency clock by a predetermined first division ratio, and generates and outputs a second high-frequency clock. A generator,
A pixel clock generation unit that divides the second high-frequency clock by a predetermined second division ratio to generate and output a pixel clock;
A light beam driving unit that modulates the image data based on the pixel clock and drives the light beam generation unit to emit a modulated light beam;
The frequency of the reference clock is set to be higher than the frequency of the pixel clock.

  The pixel clock generation device according to a second aspect is the pixel clock generation device according to the first aspect, wherein the light beam is written on the photoconductor by the first frequency division ratio and the second frequency division ratio. It is characterized in that the position to be fixed is set to be constant.

A pixel clock generation device according to a third aspect is the pixel clock generation device according to the first or second aspect, wherein the pixel clock generation unit includes:
The time interval of the first synchronization signal is detected, the detected time interval is compared with a predetermined target value, and error data corresponding to the difference between the detected time interval and the predetermined target value is generated. A comparison unit that outputs
A frequency that calculates a set value of the pixel clock frequency based on the error data from the comparison unit, and that specifies a set value of the pixel clock frequency based on the calculated set value of the pixel clock frequency A frequency calculator that generates and outputs a specified signal;
A frequency divider that divides the second high-frequency clock by the second frequency division ratio based on the frequency designation signal to generate and output the pixel clock;
The pixel clock generation unit
The pixel clock is generated so that the value of the error data becomes zero.

A pixel clock generation device according to a fourth aspect is the pixel clock generation device according to the first or second aspect, and indicates a write end position of the light beam on the photoconductor based on the detected light beam. A second synchronization signal generator that generates and outputs a second synchronization signal;
The pixel clock generation unit
The time interval between the first synchronization signal and the second synchronization signal is detected, the detected time interval is compared with a predetermined target value, and the detected time interval and the predetermined target value are compared. A comparator that generates and outputs error data corresponding to the difference;
A frequency that calculates a set value of the pixel clock frequency based on the error data from the comparison unit, and that specifies a set value of the pixel clock frequency based on the calculated set value of the pixel clock frequency A frequency calculator that generates and outputs a specified signal;
A frequency divider that divides the second high-frequency clock by the second frequency division ratio based on the frequency designation signal to generate and output the pixel clock;
The pixel clock generation unit
The pixel clock is generated so that the value of the error data becomes zero.

  The pixel clock generation device according to a fifth aspect is the pixel clock generation device according to the fourth aspect, wherein the comparison unit scans the photoconductor corresponding to the rotation of one surface of the rotary polygon mirror. Is detected as a time interval between the first synchronization signal and the second synchronization signal.

  The pixel clock generation device according to a sixth aspect is the pixel clock generation device according to the fifth aspect, wherein the comparison unit scans the photoconductor corresponding to the rotation of each surface of the rotary polygon mirror. A value obtained by averaging the periods is detected as a time interval between the first synchronization signal and the second synchronization signal.

  A pixel clock generation device according to a seventh aspect is the pixel clock generation device according to any one of the first to sixth aspects, wherein the first frequency division ratio and the second frequency division ratio. Is set by the writing resolution of the image forming apparatus, the linear speed determined by the rotational speed of the photosensitive member, and the rotational speed of the rotary polygon mirror.

  The pixel clock generation device according to an eighth aspect is the pixel clock generation device according to any one of the first to seventh aspects, wherein the target value is a writing resolution of the image forming apparatus, and It is set based on the linear velocity determined by the rotational speed of the photosensitive member.

  The pixel clock generation device according to a ninth aspect is the pixel clock generation device according to any one of the first to eighth aspects, wherein the second frequency division ratio is a decimal value. Features.

A pixel clock generation device according to a tenth aspect includes first and second light beam generation units that respectively emit first and second light beams modulated based on first and second image data, respectively. The first and second light beams that scan the first and second light beams according to the rotation of the rotary polygon mirror to form an image, and the scanned first and second light beams respectively. A pixel clock generation device for an image forming apparatus including first and second scanning beam detection units to detect,
Based on the detected first and second light beams, first and second synchronization signals indicating the writing start positions of the first and second light beams to the first and second photosensitive members. Are respectively generated and output, and a second synchronization signal generator,
A high-frequency clock that multiplies a predetermined reference clock to generate a first high-frequency clock, divides the first high-frequency clock by a predetermined first division ratio, and generates and outputs a second high-frequency clock. A generator,
First and second pixel clock generators that divide the second high-frequency clock by a predetermined second and third dividing ratios to generate and output first and second pixel clocks, respectively;
Based on the first and second pixel clocks, the first and second light beams are modulated in accordance with the first and second image data, and the modulated first and second light beams are emitted. First and second light beam driving units for driving the light beam generating units, respectively,
The frequency of the reference clock is set to be higher than the frequencies of the first and second pixel clocks.

The pixel clock generation device according to an eleventh aspect is the pixel clock generation device according to the tenth aspect, wherein the first light beam is the same as the first frequency division ratio. 1 is set so that the position written on the photoconductor is constant,
The first frequency division ratio and the third frequency division ratio are set such that a position where the second light beam is written on the second photosensitive member is constant.

A pixel clock generation device according to a twelfth aspect is the pixel clock generation device according to the tenth or eleventh aspect, wherein the first pixel clock generation unit includes:
The time interval of the first synchronization signal is detected, the detected time interval is compared with a predetermined target value, and error data corresponding to the difference between the detected time interval and the predetermined target value is generated. A comparison unit that outputs
Based on the error data from the comparison unit, a set value of the frequency of the first pixel clock is calculated, and based on the calculated set value of the frequency of the first pixel clock, the first pixel clock is calculated. A frequency calculation unit that generates and outputs a first frequency designation signal that designates a set value of the frequency;
A first frequency divider that divides the second high frequency clock by the second frequency division ratio based on the frequency designation signal to generate and output the pixel clock;
The first pixel clock generation unit generates the first pixel clock so that the value of the error data becomes zero,
The second pixel clock generation unit includes:
Based on the error data from the comparison unit, a setting value of the frequency of the second pixel clock is calculated, and based on the calculated setting value of the frequency of the second pixel clock, the second pixel clock is calculated. A second frequency calculation unit that generates and outputs a second frequency specifying signal that specifies a set value of the frequency of
A second frequency divider that divides the second high-frequency clock by the third frequency division ratio based on the frequency designation signal to generate and output the second pixel clock;
The second pixel clock generation unit generates the second pixel clock so that the value of the error data becomes zero.

A pixel clock generation device according to a thirteenth aspect is the pixel clock generation device according to the tenth or eleventh aspect, wherein the first and second lights are based on the detected first and second light beams. A third and a fourth synchronization signal generator for generating and outputting a third and a fourth synchronization signal indicating the write end positions of the beam on the first and second photosensitive members;
The first pixel clock generation unit includes:
The time interval between the first synchronization signal and the third synchronization signal is detected, the detected time interval is compared with a predetermined target value, and the detected time interval and the predetermined target value are compared. A first comparator that generates and outputs first error data corresponding to the difference;
Based on the first error data from the first comparison unit, a set value of the frequency of the first pixel clock is calculated, and based on the calculated set value of the frequency of the first pixel clock, A first frequency calculating unit that generates and outputs a first frequency specifying signal that specifies a set value of the frequency of the first pixel clock;
A frequency divider that divides the second high-frequency clock by the second frequency division ratio based on the first frequency designation signal to generate and output the pixel clock;
The first pixel clock generation unit generates the first pixel clock so that the value of the first error data becomes zero,
The second pixel clock generation unit includes:
The time interval between the second synchronization signal and the fourth synchronization signal is detected, the detected time interval is compared with a predetermined target value, and the detected time interval and the predetermined target value are compared. A second comparison unit that generates and outputs second error data corresponding to the difference;
Based on the second error data from the second comparison unit, the setting value of the frequency of the second pixel clock is calculated, and based on the calculated setting value of the frequency of the second pixel clock, A second frequency calculation unit that generates and outputs a second frequency specifying signal that specifies a set value of the frequency of the second pixel clock;
A frequency divider that divides the second high-frequency clock by the second frequency division ratio based on the first frequency designation signal to generate and output the pixel clock;
The second pixel clock generation unit generates the second pixel clock so that the value of the second error data becomes zero.

  A pixel clock generation device according to a fourteenth aspect is the pixel clock generation device according to the thirteenth aspect, wherein the comparison unit scans the photosensitive member corresponding to the rotation of one surface of the rotary polygon mirror. The period is detected as a time interval between the first synchronization signal and the second synchronization signal.

  A pixel clock generation device according to a fifteenth aspect is the pixel clock generation device according to the fourteenth aspect, wherein the comparison unit scans the photoconductor corresponding to the rotation of each surface of the rotary polygon mirror. A value obtained by moving and averaging the time period is detected as a time interval between the first synchronization signal and the second synchronization signal.

  A pixel clock generation device according to a sixteenth aspect is the pixel clock generation device according to any one of the tenth to fifteenth aspects, wherein the first division ratio and the second division ratio. And the third division ratio is determined by the writing resolution of the image forming apparatus, the linear velocity determined by the rotational speeds of the first and second photoconductors, and the rotational speed of the rotary polygon mirror, respectively. It is characterized by being set.

  A pixel clock generation device according to a seventeenth aspect is the pixel clock generation device according to any one of the twelfth to sixteenth aspects, wherein the target value is a write resolution of the image forming apparatus, and It is set based on the linear velocity determined by the rotational speed of the first photosensitive member.

  A pixel clock generation device according to an eighteenth aspect is the pixel clock generation device according to any one of the tenth to seventeenth aspects, wherein the second and third division ratios are decimal values. It is characterized by being.

  An image forming apparatus according to a nineteenth aspect includes the pixel clock generation device according to any one of the first to eighteenth aspects.

1, 1A, 1B, 1C, 1D, 1E ... Image forming apparatus,
2 ... High frequency clock generator,
3A, 3B, 3Aa, 3Ab, 3Ac, 3Ad ... Image clock generator,
4A, 4B ... Light beam generator,
5 ... Rotating polygon mirror,
6A, 6B ... scanning lens,
7A, 7B ... photosensitive member,
8A, 8B, 8C, 8D ... scanning beam detector,
9: Image processing unit,
10 ... control unit,
11, 11A, 11B ... light beam driving unit,
12A, 12Aa, 12Ab, 12Ac, 12B, 13, 13A ... synchronization signal generator,
20, 20A, 20B, 20C, 20E ... image clock generator,
30, 30A, 30B ... comparison part,
31, 31A, 31B, 31C ... frequency calculation unit,
32, 32A, 32B, 32C ... frequency dividers 40, 40A, 40B, 40C ... scanning optical device 50 ... paper.

JP 2006-305780 A

Claims (10)

A light beam generating unit that emits a light beam modulated based on image data, a photoconductor that scans the light beam according to the rotation of a polygon mirror, and forms an image; and detects the scanned light beam A pixel clock generator for an image forming apparatus comprising a scanning beam detector
A first synchronization signal generation unit that generates and outputs a first synchronization signal indicating a writing start position of the light beam on the photoconductor based on the detected light beam;
A high-frequency clock that multiplies a predetermined reference clock to generate a first high-frequency clock, divides the first high-frequency clock by a predetermined first division ratio, and generates and outputs a second high-frequency clock. A generator,
A pixel clock generation unit that divides the second high-frequency clock by a predetermined second division ratio to generate and output a pixel clock;
A light beam driving unit that modulates the image data based on the pixel clock and drives the light beam generation unit to emit a modulated light beam;
The pixel clock generation device, wherein the frequency of the reference clock is set to be higher than the frequency of the pixel clock.   2. The pixel clock generation according to claim 1, wherein the first frequency division ratio and the second frequency division ratio are set so that a position where the light beam is written on the photoconductor is constant. apparatus. The pixel clock generation unit
The time interval of the first synchronization signal is detected, the detected time interval is compared with a predetermined target value, and error data corresponding to the difference between the detected time interval and the predetermined target value is generated. A comparison unit that outputs
A frequency that calculates a set value of the pixel clock frequency based on the error data from the comparison unit, and that specifies a set value of the pixel clock frequency based on the calculated set value of the pixel clock frequency A frequency calculator that generates and outputs a specified signal;
A frequency divider that divides the second high-frequency clock by the second frequency division ratio based on the frequency designation signal to generate and output the pixel clock;
The pixel clock generation unit
3. The pixel clock generation apparatus according to claim 1, wherein the pixel clock is generated so that the value of the error data becomes zero. A second synchronization signal generating unit that generates and outputs a second synchronization signal indicating a write end position of the light beam on the photoconductor based on the detected light beam;
The pixel clock generation unit
The time interval between the first synchronization signal and the second synchronization signal is detected, the detected time interval is compared with a predetermined target value, and the detected time interval and the predetermined target value are compared. A comparator that generates and outputs error data corresponding to the difference;
A frequency that calculates a set value of the pixel clock frequency based on the error data from the comparison unit, and that specifies a set value of the pixel clock frequency based on the calculated set value of the pixel clock frequency A frequency calculator that generates and outputs a specified signal;
A frequency divider that divides the second high-frequency clock by the second frequency division ratio based on the frequency designation signal to generate and output the pixel clock;
The pixel clock generation unit
3. The pixel clock generation apparatus according to claim 1, wherein the pixel clock is generated so that the value of the error data becomes zero.   The comparison unit is configured to calculate a time period for scanning the photosensitive member or a value obtained by moving and averaging the time period for scanning the photosensitive member corresponding to the rotation of one surface of the rotary polygon mirror, 5. The pixel clock generation device according to claim 4, wherein the pixel clock generation device detects the time interval between the synchronization signal and the second synchronization signal.   The first frequency division ratio and the second frequency division ratio are set according to the writing resolution of the image forming apparatus, the linear velocity determined by the rotation speed of the photosensitive member, and the rotation speed of the rotary polygon mirror. The pixel clock generation device according to claim 1, wherein the pixel clock generation device is a pixel clock generation device.   7. The target value is set based on a writing resolution of the image forming apparatus and a linear speed determined by a rotational speed of the photoconductor. The pixel clock generation device described in 1.   The pixel clock generation device according to claim 1, wherein the second frequency division ratio is a decimal value. First and second light beam generators for emitting first and second light beams modulated based on the first and second image data, respectively, and rotating the first and second light beams First and second photoconductors that scan and form images according to the rotation of the polygon mirror, and first and second scanning beam detectors that detect the scanned first and second light beams, respectively. A pixel clock generator for an image forming apparatus comprising:
Based on the detected first and second light beams, first and second synchronization signals indicating the writing start positions of the first and second light beams to the first and second photosensitive members. Are respectively generated and output, and a second synchronization signal generator,
A high-frequency clock that multiplies a predetermined reference clock to generate a first high-frequency clock, divides the first high-frequency clock by a predetermined first division ratio, and generates and outputs a second high-frequency clock. A generator,
First and second pixel clock generators that divide the second high-frequency clock by a predetermined second and third dividing ratios to generate and output first and second pixel clocks, respectively;
Based on the first and second pixel clocks, the first and second light beams are modulated in accordance with the first and second image data, and the modulated first and second light beams are emitted. First and second light beam driving units for driving the light beam generating units, respectively,
The pixel clock generation device, wherein the frequency of the reference clock is set to be higher than the frequencies of the first and second pixel clocks.   An image forming apparatus comprising the pixel clock generation device according to claim 1.

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