JP2015126122A - Method of manufacturing light-receiving device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a light-receiving device that allows reducing a leakage current.SOLUTION: A method of manufacturing a light-receiving device includes: a first step of forming a light-receiving layer 4 on a semiconductor substrate 2; a second step of forming a cap layer 5 on the light-receiving layer 4; a third step of forming a passivation layer 6 on the cap layer 5; a fourth step of forming a mask pattern 21 on the passivation layer 6; a fifth step of forming a first opening in the passivation layer 6 by etching using the mask pattern 21 and exposing a part of a surface of the cap layer 5 via the first opening; and a sixth step of forming a contact layer 7 in the first opening. The cap layer 5 contains As, and the contact layer 7 is in contact with the cap layer 5.

Description

  The present invention relates to a method for manufacturing a light receiving device.

  Patent Document 1 discloses a photodiode array element for the purpose of eliminating the influence of scattered light from the back surface of the InP substrate in the light receiving section. In Patent Document 1, an InGaAs scattering light prevention layer is inserted between an InP substrate and an InGaAs light absorption layer. The InGaAs scattered light prevention layer is sandwiched between a pair of InP buffer layers. Therefore, the scattered light generated on the back surface of the InP substrate is absorbed, and the scattered light is prevented from reaching the light receiving part adjacent to the light receiving part on which the light is incident. The InGaAs scattered light prevention layer is lattice-matched with the InP substrate.

  Non-Patent Document 1 discloses an optical sensor using a GaIIAs and GaAsSb type II quantum well structure (MQW: Multi Quantum Well) formed on an InP substrate. Non-Patent Document 1 proposes a mesa type optical sensor.

JP 2002-319696 A

R. Sidhu, N .; Duan, J .; C. Campbell, and A.M. L. Holmes, Jr. , “A 2.3 μm CUTOFF WAVELENGTH PHOTODIODE ON InP USING LATTICE-MATCHED GaInAs-GaAsSb TYPE-II QUANTUM WELLS”, 2005 International Conference P

  The mesa sensor shown in Non-Patent Document 1 forms a pn junction by an epitaxial growth method. Therefore, the position of the pn junction can be formed with high accuracy. However, in such a mesa sensor, since the pn junction is exposed on the wall surface of the groove having the mesa structure, current leakage tends to occur on the wall surface of the groove. Therefore, a mesa sensor using selective growth is manufactured. By producing a mesa sensor using selective growth, the pn junction is not exposed, so that leakage current at the wall surface of the groove can be suppressed.

  When manufacturing a type II mesa sensor using this selective growth, for example, (1) a step of growing a type II light-receiving layer composed of an InGaAs layer and a GaAsSb layer on an InP substrate, and (2) impurity diffusion. A step of growing an undoped InGaAs layer as a cap layer for preventing, and (3) a step of forming a SiN film as an insulating film on the cap layer. When a type II mesa sensor is manufactured including these steps, there is a problem that leakage current increases between the cap layer and the insulating film.

  Further, when the GaAsSb layer exceeds 550 ° C., spinodal decomposition occurs. In order to suppress damage to the light receiving layer, it is necessary to perform all the steps at a relatively low temperature of 500 ° C. or lower. However, when a film is formed by a total organometallic vapor phase epitaxy method (hereinafter referred to as OMVPE method) at a low temperature, the diffusion length of the organometallic raw material on the film forming surface is shortened. Therefore, the deposit generated on the selective growth mask is increased. Deposits on the selective growth mask cause leakage between pixels.

  Accordingly, an object of the present invention has been made in view of the above circumstances, and an object thereof is to provide a method of manufacturing a light receiving device that can reduce leakage current.

  The method for manufacturing a light receiving device according to the present invention includes a first step of forming a light receiving layer on a semiconductor substrate, a second step of forming a cap layer on the light receiving layer, and a third step of forming a passivation layer on the cap layer. A step, a fourth step of forming a mask pattern on the passivation layer, a first opening is formed in the passivation layer by etching using the mask pattern, and a part of the surface of the cap layer is formed through the first opening. A fifth step of exposing and a sixth step of forming a contact layer in the first opening, wherein the cap layer contains As, and the contact layer contacts the cap layer.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the light-receiving device which can reduce a leakage current can be provided.

It is sectional drawing which shows the light-receiving device which concerns on 1st Embodiment of this invention. It is sectional drawing which shows the manufacturing method of the light-receiving device which concerns on 1st Embodiment of this invention. It is sectional drawing which shows the manufacturing method of the light-receiving device which concerns on 1st Embodiment of this invention. It is sectional drawing which shows the manufacturing method of the light-receiving device which concerns on 1st Embodiment of this invention. It is an expanded sectional view showing the contact layer circumference at the time of the 6th process of a 1st embodiment. It is sectional drawing which shows the manufacturing method of the light-receiving device which concerns on 2nd Embodiment of this invention. It is the top view and sectional drawing which show the manufacturing method of the light-receiving device which concerns on 2nd Embodiment of this invention. It is the top view and sectional drawing which show the manufacturing method of the light-receiving device which concerns on 2nd Embodiment of this invention. It is the top view and sectional drawing which show the manufacturing method of the light-receiving device which concerns on 2nd Embodiment of this invention. It is the top view and sectional drawing which show the manufacturing method of the light-receiving device which concerns on 2nd Embodiment of this invention. It is sectional drawing which shows the manufacturing method of the light-receiving device which concerns on 2nd Embodiment of this invention.

[Description of Embodiment of Present Invention]
First, the contents of the embodiments of the present invention will be listed and described.

  The present invention includes a first step of forming a light receiving layer on a semiconductor substrate, a second step of forming a cap layer on the light receiving layer, a third step of forming a passivation layer on the cap layer, and a passivation layer. A fourth step of forming a mask pattern, a fifth step of forming a first opening in the passivation layer by etching using the mask pattern, and exposing a part of the surface of the cap layer through the first opening; A sixth step of forming a contact layer in the first opening, the cap layer containing As, and the contact layer is in contact with the cap layer.

  In such a method of manufacturing a light receiving device, the cap layer is covered with the passivation layer. That is, the cap layer can be prevented from being exposed to the outside air. Therefore, the formation of As oxide contained in the cap layer can be suppressed. That is, the leakage current from the cap layer surface caused by the oxide of As can be reduced.

  The present invention also includes a first step of forming a light receiving layer on a semiconductor substrate, a second step of forming a cap layer on the light receiving layer, a third step of forming a passivation layer on the cap layer, and a passivation layer. A fourth step of forming a mask pattern thereon, and a fifth step of forming a first opening in the passivation layer by etching using the mask pattern and exposing a part of the surface of the cap layer through the first opening. A sixth step of enlarging the opening of the second opening of the mask pattern by isotropically etching the mask pattern; a seventh step of forming a contact layer in the first opening and the second opening; The cap layer contains As, the second opening is provided on the first opening and is continuous with the first opening, and the inner wall of the second opening is the surface of the passivation layer. It extends, the contact layer is in contact with the cap layer.

  In such a method of manufacturing a light receiving device, the cap layer is covered with the passivation layer. That is, the cap layer can be prevented from being exposed to the outside air. Therefore, the formation of As oxide contained in the cap layer can be suppressed. That is, the generation of leakage current due to the oxide of As can be reduced. Therefore, leakage current from the cap layer surface can be reduced. Further, in such a method of manufacturing a light receiving device, the opening of the second opening is enlarged so that the inner wall of the second opening of the mask pattern extends on the surface of the passivation layer. That is, when the contact layer is formed in the first opening and the second opening, the contact layer is formed not only on the cap layer overlapping the first opening but also on the surface of the passivation layer. Therefore, it is possible to prevent a gap from being formed between the contact layer and the passivation layer. That is, it is possible to prevent the chemical solution used in the subsequent process from remaining in the gap between the contact layer and the passivation layer. Thus, leakage current due to the gap between the contact layer and the passivation layer can be reduced.

The contact layer may be a semiconductor layer containing a dopant, and the dopant source gas may be CBr ₄ . CBr ₄ not only serves as a dopant gas for the contact layer, but also serves as an etching gas for deposits on the mask pattern. By removing the deposit on the mask pattern by CBr ₄ , it is possible to reduce the leakage current caused by the deposit.

  Further, the passivation layer may be a semiconductor layer having a conductivity type different from that of the contact layer. Since the contact layer and the passivation layer are semiconductor layers having different conductivity types, a depletion layer is formed by a pn junction at and around the contact portion between the contact layer and the passivation layer. By forming the depletion layer, the leakage current flowing in the passivation layer is reduced. The contact layer may be a p-type semiconductor layer, and the passivation layer may be an n-type semiconductor layer.

[Details of the embodiment of the present invention]
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. In the description of the drawings, if possible, the same elements are denoted by the same reference numerals, and redundant description is omitted.

(First embodiment)
First, the configuration of the light receiving device 1 according to this embodiment will be described with reference to FIG. The light receiving device 1 is connected to the substrate S. The light receiving device 1 receives and senses incident light. The light to be sensed is infrared light in this embodiment. The light receiving device 1 includes a semiconductor substrate 102, a buffer layer 103, a light receiving layer 104, a cap layer 105, a passivation layer 106, a contact layer 107, a protective film 108, an electrode 109, an electrode 110, and an antireflection film 111. The light receiving device 1 includes a plurality of pixels P. Each of the plurality of pixels P includes at least a semiconductor substrate 102, a buffer layer 103, a light receiving layer 104, a cap layer 105, a passivation layer 106, a contact layer 107, a protective film 108, and an electrode 109.

As the semiconductor substrate 102, an InP substrate wafer is used. The semiconductor substrate 102 may be doped with Fe in order to improve the transmittance in the near infrared region. Further, the semiconductor substrate 102 may be doped with an impurity for improving conductivity. A buffer layer 103 having a thickness of about 0.5 μm is provided on the surface 102 a of the semiconductor substrate 102. The buffer layer 103 is made of InP. The buffer layer 103 is doped with 1 × 10 ¹⁷ / cm ³ or more of Si, which is an n-type impurity.

  The light receiving layer 104 is provided on the buffer layer 103. The light receiving layer 104 has a III-V group semiconductor stacked structure. In the present embodiment, the light receiving layer 104 has a type II multiple quantum well structure of an InGaAs layer 104a and a GaAsSb layer 104b. When the InGaAs layer 104a and the GaAsSb layer 104b are paired, the light receiving layer 104 includes a plurality of pairs. Specifically, the light receiving layer 104 includes about 100 to 350 pairs. Each thickness of the InGaAs layer 104a and the GaAsSb layer 104b is about 2 nm to 6 nm. The light receiving layer 104 has a thickness of about 2 μm to 5 μm. In FIG. 1, the semiconductor substrate 102 and the InGaAs layer 104a are in contact with each other.

The cap layer 105 is a semiconductor layer provided on the light receiving layer 104. The cap layer 105 is a layer for suppressing impurities contained in the contact layer 107 described later from diffusing into the light receiving layer 104. In the present embodiment, the cap layer 105 is an undoped InGaAs layer. The thickness of the cap layer 105 is about 0.2 μm. The passivation layer 106 is a semiconductor layer formed on the cap layer 105. The passivation layer 106 is an undoped InP layer or an n-type InP layer. The n-type InP layer is formed by doping Si, which is an n-type impurity, into the InP layer by 5 × 10 ¹⁶ / cm ³ or more. Considering the relationship with the contact layer 107 described later, the passivation layer 106 is an n-type InP layer. The thickness of the passivation layer 106 is about 0.2 μm.

The contact layer 107 is a semiconductor layer provided in the opening of the passivation layer 106. The contact layer 107 is electrically connected to the light receiving layer 104 through the cap layer 105. In the present embodiment, the contact layer 107 is a semiconductor layer containing a dopant. Specifically, the contact layer 107 is a p-type InGaAs layer doped with 1 × 10 ¹⁹ / cm ³ or more of CBr ₄ that is a p-type impurity. In this embodiment, the contact layer 107 is a p-type semiconductor layer, and the passivation layer 106 is an n-type semiconductor layer. That is, the passivation layer 106 and the contact layer 107 are semiconductor layers having opposite conductivity types. Here, a reverse bias is applied to each pixel P when the light receiving device 1 is driven. Therefore, the light receiving layer 104 is depleted. At this time, a depletion layer is formed in and around the contact portion between the passivation layer 106 and the contact layer 107. As described above, since the impurity concentration of the contact layer 107 is higher than the impurity concentration of the passivation layer 106, the depletion layer extends toward the passivation layer 106. Further, as shown in FIG. 1, adjacent pixels P sandwich the passivation layer 106. That is, the contact layer 107 included in the pixel P, the contact layer 107 included in the adjacent pixel P, and the passivation layer 106 sandwiched between these contact layers 107 have a pnp relationship. As described above, since a depletion layer is formed in the contact portion between the contact layer 107 and the passivation layer 106 and in the vicinity of the contact portion, a leakage current generated between adjacent pixels during driving of the light receiving device 1 is suppressed. Is done.

  The protective film 108 is an insulating film provided on the passivation layer 106. In the present embodiment, the protective film 108 is a SiN film. The electrode 109 is provided in an opening formed in the SiN film. The electrode 109 is used as a pixel electrode of the pixel P. The electrode 109 is electrically connected to the contact layer 107. The electrode 109 and the contact layer 107 are in ohmic contact.

  The electrode 110 is provided on the surface of the semiconductor substrate 102 opposite to the surface 102a on which the light-receiving layer 104 is formed (hereinafter, the back surface 102b of the semiconductor substrate 102). That is, the electrode 110 functions as a back electrode of the light receiving device 1. When the pixels P are two-dimensionally arranged, the back surface 102b of the semiconductor substrate 102 is a light incident surface. In order to increase the light receiving sensitivity of the light receiving device 1, an antireflection film 111 is provided on the back surface 102 b of the semiconductor substrate 102. In the present embodiment, the antireflection film 111 is a SiON film.

  Next, a method for manufacturing the light receiving device 1 according to the present embodiment will be described with reference to FIGS. First, the first step will be described. As shown in FIG. 2A, the buffer layer 3 and the light receiving layer 4 are formed on the semiconductor substrate 2. The buffer layer 3 is an InP layer. The buffer layer 3 is formed on the surface 2a of the semiconductor substrate 2 by an epitaxial growth method. The light receiving layer 4 includes a plurality of InGaAs layers 4a and a plurality of GaAsSb layers 4b. InGaAs layers 4a and GaAsSb layers 4b are alternately stacked. Both the InGaAs layer 4a and the GaAsSb layer 4b are formed by an epitaxial growth method. As the epitaxial growth method, for example, the OMVPE method is used. By using the OMVPE method, the light receiving layer 4 can be formed at a low temperature. In the OMVPE method, an organic metal material is also used as a p-type impurity material. For example, organic metal DEZn (diethyl zinc) or the like is used as a raw material for Zn. The growth temperature of the light receiving layer 4 is preferably 500 ° C. or lower. Thus, by setting the upper limit of the growth temperature, it is possible to prevent the deterioration of crystallinity of type II (InGaAs / GaAsSb) MQW.

  The second step is a step of forming a cap layer 5 on the light receiving layer 4 as shown in FIG. 2B. An undoped InGaAs layer is formed as the cap layer 5 by epitaxial growth. The third step is a step of forming a passivation layer 6 on the cap layer 5 as shown in FIG. 2C. An n-type InP layer is formed as the passivation layer 6 by an epitaxial growth method. The passivation layer 6 may be doped with an n-type impurity after the formation of the passivation layer 6, or may be doped when the passivation layer 6 is formed.

Next, the fourth step will be described. As shown in FIG. 3A, a mask pattern 21 is formed on the passivation layer 6. The mask pattern 21 has a first opening 21a. The thickness of the mask pattern 21 may be about 0.2 μm to 0.4 μm. The mask pattern 21 is made of, for example, SiO ₂ . For example, the mask pattern 21 is formed by a CVD method or the like. Specifically, after the SiO ₂ film is formed on the passivation layer 6, the mask pattern 21 is formed by performing photolithography. The opening width of the first opening 21a is about 25 μm. The pitch of the first openings 21a is about 30 μm.

Next, the fifth step will be described. The fifth step is a step in which the second opening 6a is formed in the passivation layer 6 by etching using the mask pattern 21, and a part of the surface of the cap layer 5 is exposed through the second opening 6a. Specifically, the passivation layer 6 is isotropically etched using the mask pattern 21. The isotropic etching is performed using, for example, a hydrochloric acid-based etchant (HCl: H ₂ O = 1: 1 (volume ratio)). Then, as shown in FIG. 3B, the second opening 6 a is formed in the passivation layer 6. The second opening 6a overlaps with the first opening 21a. The isotropic etching is performed until a part of the surface of the cap layer 5 is exposed through the second opening 6a (hereinafter, the exposed portion of the cap layer 5 is referred to as a first exposed portion 5a). .

Next, the sixth step will be described. As shown in FIG. 3C, the contact layer 7 is formed in the second opening 6a. The contact layer 7 is formed so as to be in contact with the first exposed portion 5a. Further, the contact layer 7 is formed in contact with the side surface of the passivation layer 6 in the second opening 6a. The contact layer 7 is formed by an epitaxial growth method. After the contact layer 7 is formed, the contact layer 7 is doped. CBr ₄ is used as a dopant source gas for the contact layer 7. By doping with CBr ₄ , the contact layer 7 becomes a p-type semiconductor layer. Further, when doping of CBr _4, to remove the deposit CBr ₄ was deposited on the mask pattern 21. This is because CBr ₄ serves as a dopant gas for the contact layer 7 and also serves as an etching gas for the deposit.

  Next, the seventh step will be described. As shown in FIG. 4A, the mask pattern 21 is removed. The mask pattern 21 may be removed by a known method. After removing the mask pattern 21, the eighth step is performed. The eighth step is a step of forming a protective film 8 on the passivation layer 6 and the contact layer 7 as shown in FIG. 4B. After forming the protective film 8, the third opening 8a is formed so that at least the upper surface of the contact layer 7 is exposed. The third opening 8a is formed by, for example, photolithography. Next, the ninth step is performed. In the ninth step, the electrode 9 is formed in the third opening 8a. The electrode 9 is formed so as to be in contact with the contact layer 7. In addition, the electrode 10 and the antireflection film 11 are formed on the back surface 2 b of the semiconductor substrate 2.

  The pixel P is formed on the semiconductor substrate 2 by the first to ninth steps described above. Further, after the semiconductor substrate 2 is divided, the electrode 9 is attached so as to be connected to the substrate S. Thereby, the light receiving device 1 is manufactured.

  In the method for manufacturing the light receiving device according to the present embodiment, the cap layer 5 is covered with the passivation layer 6. That is, even after the mask pattern 21 is removed, the cap layer 5 can be prevented from being exposed to the outside air. Therefore, the formation of As oxide contained in the cap layer 5 can be suppressed. That is, the leakage current from the surface of the cap layer 5 due to the oxide of As can be reduced.

  Further, since the passivation layer 6 and the contact layer 7 are semiconductor layers having opposite conductivity types, a depletion layer due to a pn junction is formed in the contact portion between the passivation layer 6 and the contact layer 7 and in the vicinity of the contact portion. It is formed. By forming the depletion layer, the leakage current flowing in the passivation layer 6 is reduced.

Further, CBr ₄ is used as a dopant gas for the contact layer 7. CBr ₄ not only acts as a dopant gas for the contact layer 7 but also acts as an etching gas for deposits on the mask pattern 21. As described above, the light receiving layer 4 includes the InGaAs layer 4a and the GaAsSb layer 4b. The GaAsSb layer 4b is formed at a relatively low temperature so that spinodal decomposition does not occur. Therefore, as shown in FIG. 5, when the contact layer 7 is formed, the deposit 7a is easily formed on the mask pattern 21. There is a possibility that the deposit 7a becomes a path of a current flowing between the adjacent pixels P. Further, the deposit 7a becomes a mask for the mask pattern 21, and a portion where the mask pattern 21 is not removed may occur. Therefore, by doping the contact layer 7 using CBr ₄ and removing the deposit 7a on the mask pattern 21, the leak current between pixels caused by the deposit 7a is suppressed.

(Second Embodiment)
In the present embodiment, a method of manufacturing a light receiving device different from the first embodiment will be described. In addition, description etc. are abbreviate | omitted about the description which overlaps with 1st Embodiment.

  As shown in FIG. 6, the fourth step is performed. Specifically, a mask pattern 22 is formed on the passivation layer 6. The mask pattern 22 has a first opening 22a. The mask pattern 22 is formed thicker than the mask pattern 21 of the first embodiment. The thickness of the mask pattern 22 may be 0.5 μm to 1.0 μm. In the present embodiment, the thickness of the mask pattern 22 is about 0.6 μm.

  Next, the fifth step will be described. The fifth step is a step of forming the second opening 6a in the passivation layer 6 by etching using the mask pattern 22 and exposing a part of the surface of the cap layer 5 through the second opening 6a. That is, the first opening 22a is provided on the second opening 6a and is continuous with the second opening 6a. In the fifth step, as shown in FIGS. 7A and 7B, the passivation layer 6 may be excessively etched (side etching). That is, the diameter of the second opening 6a may be larger than the diameter of the first opening 22a. In this case, a part of the mask pattern 22 becomes a ridge 22 b with respect to the passivation layer 6.

  When the contact layer 7 is formed while the ridge 22b of the mask pattern 22 is formed, a region where the contact layer 7 grows and a region where the contact layer 7 does not grow are formed immediately below the ridge 22b, as shown in FIGS. 8A and 8B. Is done. That is, a gap A is formed between the passivation layer 6 and the contact layer 7. Specifically, a region (gap A) in which the contact layer 7 does not grow is formed on the first exposed portion 5a on the first exposed portion 5a immediately below the ridge 22b because the gas for epitaxial growth does not reach sufficiently. The And there exists a possibility that the chemical | medical solution used by a post process may remain in the clearance gap A. FIG. Alternatively, the protective film 8 may be interrupted on the gap A. Therefore, forming the contact layer 7 with the ridges 22b formed causes a leakage current. Furthermore, it causes other characteristic defects of the light receiving device 1.

  In order to avoid the above problem, the following sixth step is performed. The sixth step is a step of enlarging the opening of the first opening 22a of the mask pattern 22 by isotropically etching the mask pattern 22 as shown in FIGS. 9A and 9B. Isotropic etching is performed using buffered oxalic acid. The isotropic etching is performed so that the film thickness of the mask pattern 22 is about 0.2 μm, for example. By performing isotropic etching, the inner side wall 22 c of the first opening 22 a extends on the surface of the passivation layer 6. That is, the diameter of the first opening 22a is larger than the diameter of the second opening 6a. Thereby, a part of the surface (upper surface) of the passivation layer 6 is exposed (hereinafter, this portion is referred to as a second exposed portion 6b).

  After the sixth step, the seventh step is performed. The seventh step is a step of forming the contact layer 7 in the first opening 22a and the second opening 6a. As shown in FIGS. 10A and 10B, the contact layer 7 is formed so as to be in contact with the first exposed portion 5a and the second exposed portion 6b. Thus, by enlarging the opening of the first opening 22 a of the mask pattern 22, it is possible to prevent the gap A from being formed between the passivation layer 6 and the contact layer 7.

  After the seventh step, as in the first embodiment, the mask pattern 22 is removed as shown in FIG. 11A. Next, a protective film 8 is formed on the passivation layer 6 and the contact layer 7 (see FIG. 11B). Thereafter, the electrode 9, the electrode 10, and the antireflection film 11 are formed (see FIG. 11C).

  As described above, the method for manufacturing the light receiving device 1 according to this embodiment has at least the effects of the first embodiment. Further, in the present embodiment, the opening of the first opening 22 a is enlarged so that the inner wall 22 c of the first opening 22 a of the mask pattern 22 extends on the surface of the passivation layer 6. That is, when the contact layer 7 is formed in the first opening 22 a and the second opening 6 a, the contact layer 7 is not only on the first exposed portion 5 a of the cap layer 5 but also the second exposed portion 6 b of the passivation layer 6. Also formed on top. Therefore, even when the passivation layer 6 is excessively etched, it is possible to prevent the gap A from being generated between the passivation layer 6 and the contact layer 7 as shown in FIG. 8B. That is, it is possible to prevent the chemical solution used in the subsequent process from remaining in the gap A between the contact layer 7 and the passivation layer 6. Therefore, the leakage current due to the gap A between the contact layer 7 and the passivation layer 6 can be reduced.

  While the principles of the invention have been illustrated and described in the preferred embodiments, it will be appreciated by those skilled in the art that the invention can be modified in arrangement and detail without departing from such principles. We therefore claim all modifications and changes that come within the scope and spirit of the following claims.

  Further, the present invention is not limited to the specific configuration disclosed in the present embodiment. For example, the light receiving layer 4 may be formed directly on the surface 2 a of the semiconductor substrate 2 without forming the buffer layer 3. In addition, before the electrode 10 and the antireflection film 11 are formed, the back surface of the semiconductor substrate 2 may be ground so as to be a mirror surface.

  Further, the light receiving layer 4 is not limited to the pair of the InGaAs layer 4a and the GaAsSb layer 4b, and a pair forming a type II multiple quantum well structure may be provided as appropriate. Moreover, the material which comprises the mask patterns 21 and 22, the protective film 8, and the antireflection film 11 can be selected suitably.

  The present invention is applied to a method of manufacturing a light receiving device that can reduce leakage current.

  DESCRIPTION OF SYMBOLS 1 ... Light receiving device 2,102 ... Semiconductor substrate, 2a, 102a ... Front surface, 2b, 102b ... Back surface, 3,103 ... Buffer layer, 4,104 ... Light receiving layer, 4a, 104a ... InGaAs layer, 4b, 104b ... GaAsSb 5, 105 ... cap layer, 5a ... first exposed portion, 6, 106 ... passivation layer, 6a ... second opening, 6b ... second exposed portion, 7, 107 ... contact layer, 7a ... deposit, 8 108a protective film 8a third opening 9, 10, 109, 110 electrode 11, 111 antireflection film 21, 22 mask pattern 21a 22a first opening 22b 22c ... inner side wall, A ... gap, P ... pixel, S ... substrate.

Claims (5)

A first step of forming a light receiving layer on a semiconductor substrate;
A second step of forming a cap layer on the light receiving layer;
A third step of forming a passivation layer on the cap layer;
A fourth step of forming a mask pattern on the passivation layer;
A fifth step of forming a first opening in the passivation layer by etching using the mask pattern and exposing a portion of the surface of the cap layer through the first opening;
A sixth step of forming a contact layer in the first opening;
With
The cap layer contains As,
The contact layer contacts the cap layer;
Manufacturing method of light receiving device. A first step of forming a light receiving layer on a semiconductor substrate;
A second step of forming a cap layer on the light receiving layer;
A third step of forming a passivation layer on the cap layer;
A fourth step of forming a mask pattern on the passivation layer;
A fifth step of forming a first opening in the passivation layer by etching using the mask pattern and exposing a portion of the surface of the cap layer through the first opening;
A sixth step of enlarging the opening of the second opening of the mask pattern by isotropically etching the mask pattern;
A seventh step of forming a contact layer in the first opening and the second opening;
With
The cap layer contains As,
The second opening is provided on the first opening and continues to the first opening.
An inner wall of the second opening extends on a surface of the passivation layer;
The contact layer contacts the cap layer;
Manufacturing method of light receiving device. The contact layer is a semiconductor layer containing a dopant,
The method for manufacturing a light receiving device according to claim 1, wherein the dopant source gas is CBr ₄ .   The light-receiving device manufacturing method according to claim 1, wherein the passivation layer is a semiconductor layer having a conductivity type different from that of the contact layer. The contact layer is a p-type semiconductor layer;
The method for manufacturing a light receiving device according to claim 1, wherein the passivation layer is an n-type semiconductor layer.

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