JP2015122399A - Semiconductor manufacturing apparatus and semiconductor device manufacturing method - Google Patents

Semiconductor manufacturing apparatus and semiconductor device manufacturing method Download PDF

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JP2015122399A
JP2015122399A JP2013265100A JP2013265100A JP2015122399A JP 2015122399 A JP2015122399 A JP 2015122399A JP 2013265100 A JP2013265100 A JP 2013265100A JP 2013265100 A JP2013265100 A JP 2013265100A JP 2015122399 A JP2015122399 A JP 2015122399A
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wafer
chamber
manufacturing apparatus
microwave
substrate
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山 知 憲 青
Tomonori Aoyama
山 知 憲 青
黒 恭 一 須
Kyoichi Suguro
黒 恭 一 須
貝 達 典 磯
Tatsunori Isogai
貝 達 典 磯
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Toshiba Corp
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Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor manufacturing apparatus and a semiconductor device manufacturing method, which can efficiently supply power to a reaction acceleration region in a wafer by a microwave.SOLUTION: According to one embodiment, a semiconductor manufacturing apparatus includes a substrate and a processed layer formed on the substrate, and a support part for supporting a wafer having a first surface on the processed layer side and a second surface on the substrate side. The semiconductor manufacturing apparatus further includes: a chamber for housing the support part; and a microwave generator for generating a microwave. The semiconductor manufacturing apparatus further includes a waveguide arranged on an upper surface side or a lower surface side of the chamber, for irradiating the second surface of the wafer with a microwave. The semiconductor manufacturing apparatus further includes a thermometer arranged on the upper surface side or the lower surface side of the chamber and on the same side of the waveguide, for measuring a temperature of the wafer on the second surface side.

Description

本発明の実施形態は、半導体製造装置および半導体装置の製造方法に関する。   FIELD Embodiments described herein relate generally to a semiconductor manufacturing apparatus and a semiconductor device manufacturing method.

マイクロ波は、電磁波の一種であり、電場の変動で双極子を回転振動させたり、磁場の変動で導体に電流を流したりすることができる。そのため、マイクロ波アニールは、赤外線アニールや炉アニールに比べ、不純物の活性化やアモルファス層の結晶化などの反応を低温で実現することが可能である。しかし、電極層や配線層などの金属層が形成されたウエハにマイクロ波を照射する場合、マイクロ波で反応を促進したい領域（反応促進対象領域）に十分なパワーが供給されない可能性がある。理由は、マイクロ波の一部が金属層により吸収または反射されてしまうからである。そのため、不純物の活性化やアモルファス層の結晶化が不十分になる可能性がある。金属層が形成されたウエハにマイクロ波を照射する場合には、マイクロ波のパワーや照射時間を増加させることで、反応促進対象領域に十分なパワーを供給することが可能である。しかし、マイクロ波のパワーや照射時間の増加は、マイクロ波アニールのための消費電力を増大させ、半導体装置の製造コストを増加させてしまう。   Microwaves are a type of electromagnetic wave that can rotate and vibrate a dipole due to fluctuations in the electric field, or can cause a current to flow through a conductor due to fluctuations in the magnetic field. Therefore, microwave annealing can realize reactions such as impurity activation and crystallization of an amorphous layer at a lower temperature than infrared annealing and furnace annealing. However, when microwaves are applied to a wafer on which a metal layer such as an electrode layer or a wiring layer is formed, there is a possibility that sufficient power may not be supplied to a region (reaction promotion target region) where the reaction is desired to be promoted by microwaves. The reason is that part of the microwave is absorbed or reflected by the metal layer. Therefore, the activation of impurities and the crystallization of the amorphous layer may be insufficient. In the case of irradiating the wafer on which the metal layer is formed with microwaves, it is possible to supply sufficient power to the reaction promotion target region by increasing the microwave power and irradiation time. However, an increase in microwave power and irradiation time increases power consumption for microwave annealing and increases the manufacturing cost of the semiconductor device.

特開２０１２−１８６１８９号公報JP 2012-186189 A

ウエハ内の反応促進対象領域へマイクロ波で効率的にパワーを供給することが可能な半導体製造装置および半導体装置の製造方法を提供する。   Provided are a semiconductor manufacturing apparatus and a semiconductor device manufacturing method capable of efficiently supplying power to a reaction promotion target region in a wafer with microwaves.

一の実施形態によれば、半導体製造装置は、基板と、前記基板に形成された被加工層とを含み、前記被加工層側の第１の面と、前記基板側の第２の面とを有するウエハ、を支持するための支持部を備える。さらに、前記装置は、前記支持部を収容するチャンバと、マイクロ波を発生させるマイクロ波発生器とを備える。さらに、前記装置は、前記チャンバの上面側または下面側に配置されており、前記マイクロ波を前記ウエハの前記第２の面に照射する導波管を備える。さらに、前記装置は、前記チャンバの上面側および下面側のうち前記導波管と同じ側に配置されており、前記ウエハの前記第２の面側の温度を測定する温度計を備える。   According to one embodiment, a semiconductor manufacturing apparatus includes a substrate and a processing layer formed on the substrate, the first surface on the processing layer side, the second surface on the substrate side, And a support portion for supporting the wafer having the structure. Furthermore, the apparatus includes a chamber that accommodates the support portion and a microwave generator that generates microwaves. Furthermore, the apparatus is provided on the upper surface side or the lower surface side of the chamber, and includes a waveguide that irradiates the second surface of the wafer with the microwave. Furthermore, the apparatus includes a thermometer that is disposed on the same side as the waveguide among the upper surface side and the lower surface side of the chamber and measures the temperature of the second surface side of the wafer.

第１実施形態の半導体製造装置の構造を概略的に示す断面図である。It is sectional drawing which shows roughly the structure of the semiconductor manufacturing apparatus of 1st Embodiment. 第１実施形態のウエハ搬送装置の構造を概略的に示す上面図である。It is a top view which shows roughly the structure of the wafer conveyance apparatus of 1st Embodiment. 一般的な表面照射と第１実施形態の裏面照射とを比較した断面図である。It is sectional drawing which compared the general surface irradiation and the back surface irradiation of 1st Embodiment. 第２実施形態の半導体製造装置の構造を概略的に示す断面図である。It is sectional drawing which shows roughly the structure of the semiconductor manufacturing apparatus of 2nd Embodiment. 第３実施形態の半導体装置の製造方法を示す断面図(1/2)である。It is sectional drawing (1/2) which shows the manufacturing method of the semiconductor device of 3rd Embodiment. 第３実施形態の半導体装置の製造方法を示す断面図(2/2)である。It is sectional drawing (2/2) which shows the manufacturing method of the semiconductor device of 3rd Embodiment. 第４実施形態の半導体装置の製造方法を示す断面図(1/3)である。It is sectional drawing (1/3) which shows the manufacturing method of the semiconductor device of 4th Embodiment. 第４実施形態の半導体装置の製造方法を示す断面図(2/3)である。It is sectional drawing (2/3) which shows the manufacturing method of the semiconductor device of 4th Embodiment. 第４実施形態の半導体装置の製造方法を示す断面図(3/3)である。It is sectional drawing (3/3) which shows the manufacturing method of the semiconductor device of 4th Embodiment.

以下、本発明の実施形態を、図面を参照して説明する。   Embodiments of the present invention will be described below with reference to the drawings.

（第１実施形態）
図１は、第１実施形態の半導体製造装置の構造を概略的に示す断面図である。
図１の半導体製造装置は、支持部１１と、チャンバ１２と、１台以上のマイクロ波発生器１３と、１本以上の導波管１４と、１台以上の温度計１５と、１本以上のガスノズル１６と、ウエハカセット１７と、ウエハ搬送装置１８とを備えている。ウエハカセット１７およびウエハ搬送装置１８はそれぞれ、収容部および搬送部の例である。図１の半導体製造装置は、マイクロ波を用いてウエハ１０をアニールするためのマイクロ波アニール装置である。 (First embodiment)
FIG. 1 is a cross-sectional view schematically showing the structure of the semiconductor manufacturing apparatus according to the first embodiment.
1 includes a support unit 11, a chamber 12, one or more microwave generators 13, one or more waveguides 14, one or more thermometers 15, and one or more. Gas nozzle 16, wafer cassette 17, and wafer transfer device 18. The wafer cassette 17 and the wafer transfer device 18 are examples of a storage unit and a transfer unit, respectively. The semiconductor manufacturing apparatus in FIG. 1 is a microwave annealing apparatus for annealing a wafer 10 using microwaves.

［支持部１１］
支持部１１は、ウエハ１０を支持するための機構であり、サセプタ１１ａと、エッジグリップ１１ｂと、回転シャフト１１ｃとを備えている。サセプタ１１ａは、石英などの透明部材で形成されている。エッジグリップ１１ｂは、サセプタ１１ａの端部に取り付けられており、ウエハ１０のエッジを水平方向から把持することでウエハ１０を支持することができる。回転シャフト１１ｃは、サセプタ１１ａの裏面に取り付けられており、ウエハ１０を水平面内で回転させることができる。 [Supporting part 11]
The support part 11 is a mechanism for supporting the wafer 10, and includes a susceptor 11a, an edge grip 11b, and a rotating shaft 11c. The susceptor 11a is formed of a transparent member such as quartz. The edge grip 11b is attached to the end of the susceptor 11a, and can support the wafer 10 by gripping the edge of the wafer 10 from the horizontal direction. The rotating shaft 11c is attached to the back surface of the susceptor 11a, and can rotate the wafer 10 in a horizontal plane.

図１のウエハ１０は、基板１と、基板１に形成された１層以上の被加工層２とを備えている。基板１の例は、シリコン基板などの半導体基板である。被加工層２の例は、層間絶縁膜、素子分離領域、電極層、配線層などである。本実施形態の被加工層２は、１層以上の金属層を含んでいる。金属層の例は、金属電極を含む電極層や、金属配線を含む配線層などである。   A wafer 10 in FIG. 1 includes a substrate 1 and one or more layers to be processed 2 formed on the substrate 1. An example of the substrate 1 is a semiconductor substrate such as a silicon substrate. Examples of the layer 2 to be processed include an interlayer insulating film, an element isolation region, an electrode layer, and a wiring layer. The layer 2 to be processed according to this embodiment includes one or more metal layers. Examples of the metal layer include an electrode layer including a metal electrode and a wiring layer including a metal wiring.

符号Ｓ1は、ウエハ１０の表面、すなわち、ウエハ１０の被加工層２側の面を示す。符号Ｓ2は、ウエハ１０の裏面、すなわち、ウエハ１０の基板１側の面を示す。ウエハ１０の表面Ｓ1と裏面Ｓ2は、第１および第２の面の例である。本実施形態のウエハ１０は、表面Ｓ1が下向き、裏面Ｓ2が上向きの状態で、支持部１１により支持されている。 Reference numeral S 1 denotes the surface of the wafer 10, that is, the surface of the wafer 10 on the processed layer 2 side. Reference numeral S 2 indicates the back surface of the wafer 10, that is, the surface of the wafer 10 on the substrate 1 side. The front surface S 1 and the back surface S 2 of the wafer 10 are examples of first and second surfaces. The wafer 10 of this embodiment is supported by the support unit 11 with the front surface S 1 facing downward and the back surface S 2 facing upward.

図１は、ウエハ１０の表面Ｓ1および裏面Ｓ2に平行で、互いに垂直なＸ方向およびＹ方向と、ウエハ１０の表面Ｓ1および裏面Ｓ2に垂直なＺ方向とを示している。本明細書においては、＋Ｚ方向を上方向として取り扱い、−Ｚ方向を下方向として取り扱う。例えば、基板１と被加工層２との位置関係は、被加工層２が基板１の下方に位置していると表現される。 Figure 1 is parallel to the surface S 1 and the rear surface S 2 of the wafer 10 shows the X and Y directions perpendicular to each other, and a Z-direction perpendicular to the surface S 1 and the rear surface S 2 of the wafer 10. In the present specification, the + Z direction is treated as the upward direction, and the −Z direction is treated as the downward direction. For example, the positional relationship between the substrate 1 and the layer to be processed 2 is expressed as that the layer to be processed 2 is positioned below the substrate 1.

［チャンバ１２］
チャンバ１２は、支持部１１を収容している。図１においては、チャンバ１２内に搬入されたウエハ１０が、支持部１１により支持されている。符号σ1、σ2、σ3はそれぞれ、チャンバ１２の上面、下面、側面を示す。チャンバ１２の上面σ1と下面σ2は、互いに平行でも非平行でもよい。また、チャンバ１２の上面σ1と下面σ2の形状は、円形でも楕円形でも多角形でもよい。 [Chamber 12]
The chamber 12 accommodates the support part 11. In FIG. 1, the wafer 10 carried into the chamber 12 is supported by the support portion 11. Symbols σ 1 , σ 2 , and σ 3 indicate the upper surface, the lower surface, and the side surface of the chamber 12, respectively. The upper surface σ 1 and the lower surface σ 2 of the chamber 12 may be parallel or non-parallel to each other. Further, the shape of the upper surface σ 1 and the lower surface σ 2 of the chamber 12 may be circular, elliptical, or polygonal.

［マイクロ波発生器１３］
マイクロ波発生器１３は、マイクロ波を発生させる。マイクロ波の周波数は、どのような値でもよい。本実施形態のマイクロ波発生器１３は、２．４０〜２４．２５ＧＨｚの周波数帯のマイクロ波を発生させる。例えば、マイクロ波発生器１３の製造コストや信頼性の観点から、マイクロ波の周波数は、ＩＳＭ（Industry-Science-Medical）バンド（産業科学医療用バンド）である２．４５ＧＨｚ帯、５．８０ＧＨｚ帯、２４．１２５ＧＨｚ帯とすることが望ましい。マイクロ波発生器１３の例は、マグネトロンである。 [Microwave generator 13]
The microwave generator 13 generates a microwave. The microwave frequency may be any value. The microwave generator 13 of this embodiment generates microwaves in the frequency band of 2.40 to 24.25 GHz. For example, from the viewpoint of manufacturing cost and reliability of the microwave generator 13, the microwave frequency is an ISM (Industry-Science-Medical) band (band for industrial science and medical use) 2.45 GHz band, 5.80 GHz band. 24.125 GHz band is desirable. An example of the microwave generator 13 is a magnetron.

［導波管１４］
導波管１４は、チャンバ１２とマイクロ波発生器１３とを接続しており、マイクロ波発生器１３からのマイクロ波をチャンバ１２内に出射する。本実施形態の導波管１４は、チャンバ１２の上面σ1側に配置されている。よって、本実施形態の導波管１４は、裏面Ｓ2が上向きの状態でウエハ１０が支持されている場合に、ウエハ１０の裏面Ｓ2にマイクロ波を照射することができる。 [Waveguide 14]
The waveguide 14 connects the chamber 12 and the microwave generator 13, and emits the microwave from the microwave generator 13 into the chamber 12. The waveguide 14 of the present embodiment is disposed on the upper surface σ 1 side of the chamber 12. Therefore, the waveguide 14 of the present embodiment can irradiate the back surface S 2 of the wafer 10 with microwaves when the wafer 10 is supported with the back surface S 2 facing upward.

なお、本実施形態の半導体製造装置は、ウエハ１０に均一なマイクロ波のパワーを供給するため、ウエハ１０を回転シャフト１１ｃにより回転させながら、ウエハ１０の裏面Ｓ2にマイクロ波を照射してもよい。 Note that the semiconductor manufacturing apparatus of the present embodiment supplies even microwave power to the wafer 10, so that the back surface S 2 of the wafer 10 is irradiated with microwaves while the wafer 10 is rotated by the rotating shaft 11 c. Good.

［温度計１５］
温度計１５は、ウエハ１０の温度を測定し、温度の測定結果を出力する。温度計１５の例は、パイロメータである。この場合、温度計１５は、ウエハ１０から放射された電磁波をチャンバ１２の窓部を介して測定することで、ウエハ１０の温度を測定する。温度計１５による温度の測定結果は、例えば、回転シャフト１１ｃ、マイクロ波発生器１３、ガスノズル１６の動作の制御用にも利用することができる。 [Thermometer 15]
The thermometer 15 measures the temperature of the wafer 10 and outputs a temperature measurement result. An example of the thermometer 15 is a pyrometer. In this case, the thermometer 15 measures the temperature of the wafer 10 by measuring the electromagnetic wave radiated from the wafer 10 through the window portion of the chamber 12. The temperature measurement result by the thermometer 15 can be used for controlling the operation of the rotating shaft 11c, the microwave generator 13, and the gas nozzle 16, for example.

本実施形態の温度計１５は、チャンバ１２の上面σ1側および下面σ2側のうち、導波管１４と同じ側に配置されている。すなわち、本実施形態の温度計１５は、チャンバ１２の上面σ1側に配置されている。よって、本実施形態の温度計１５は、裏面Ｓ2が上向きの状態でウエハ１０が支持されている場合に、ウエハ１０の裏面Ｓ2側の温度を測定することができる。理由は、ウエハ１０の表面Ｓ1側には種々のパターンが形成されており、ウエハ１０の表面Ｓ1側の温度を正確に測定することが難しいためである。この詳細については、後述する。 The thermometer 15 of the present embodiment is disposed on the same side as the waveguide 14 on the upper surface σ 1 side and the lower surface σ 2 side of the chamber 12. That is, the thermometer 15 of the present embodiment is disposed on the upper surface σ 1 side of the chamber 12. Therefore, the thermometer 15 of the present embodiment can measure the temperature on the back surface S 2 side of the wafer 10 when the wafer 10 is supported with the back surface S 2 facing upward. Reason, on the surface S 1 side of the wafer 10 and various patterns are formed, because it is difficult to accurately measure the temperature of the surface S 1 side of the wafer 10. Details of this will be described later.

［ガスノズル１６］
ガスノズル１６は、ウエハ１０に冷却ガスを吹き付けるために使用される。本実施形態の半導体製造装置は、ウエハ１０に冷却ガスを吹き付けることで、ウエハ１０の温度を制御することができる。冷却ガスの例は、不活性ガスである。 [Gas nozzle 16]
The gas nozzle 16 is used to spray a cooling gas onto the wafer 10. The semiconductor manufacturing apparatus of this embodiment can control the temperature of the wafer 10 by spraying a cooling gas onto the wafer 10. An example of the cooling gas is an inert gas.

本実施形態の半導体製造装置は、チャンバ１２の上面σ1側に配置され、ウエハ１０の裏面Ｓ2に冷却ガスを吹き付ける第１のガスノズル１６と、チャンバ１２の下面σ2側に配置され、ウエハ１０の表面Ｓ1に冷却ガスを吹き付ける第２のガスノズル１６とを備えている。しかし、本実施形態の半導体製造装置は、第１および第２のガスノズル１６のうちのいずれか一方のみを備えていてもよい。この場合、本実施形態の半導体製造装置は、ウエハ１０の裏面Ｓ2にマイクロ波を照射することから、ウエハ１０を裏面Ｓ2側から冷却可能な第１のガスノズル１６を備えていることが望ましい。 The semiconductor manufacturing apparatus of this embodiment is disposed on the upper surface sigma 1 side of the chamber 12, the first gas nozzle 16 on the rear surface S 2 of the wafer 10 blowing a cooling gas, disposed on the lower surface sigma 2 side of the chamber 12, the wafer And a second gas nozzle 16 for spraying a cooling gas on the surface S 1 . However, the semiconductor manufacturing apparatus of the present embodiment may include only one of the first and second gas nozzles 16. In this case, since the semiconductor manufacturing apparatus of this embodiment irradiates the back surface S 2 of the wafer 10 with microwaves, it is desirable to include the first gas nozzle 16 that can cool the wafer 10 from the back surface S 2 side. .

［ウエハカセット１７］
ウエハカセット１７は、ウエハ１０を収容するために使用される。本実施形態のウエハカセット１７は、表面Ｓ1が上向き、裏面Ｓ2が下向きの状態で、ウエハ１０を収容可能である。 [Wafer cassette 17]
The wafer cassette 17 is used to store the wafer 10. The wafer cassette 17 of this embodiment can accommodate the wafer 10 with the front surface S 1 facing upward and the back surface S 2 facing downward.

［ウエハ搬送装置１８］
ウエハ搬送装置１８は、ウエハ１０をウエハカセット１７から搬出し、ウエハ１０をチャンバ１２内に搬入する装置である。チャンバ１２内に搬入されたウエハ１０は、支持部１１により支持される。 [Wafer transfer device 18]
The wafer transfer device 18 is a device that unloads the wafer 10 from the wafer cassette 17 and loads the wafer 10 into the chamber 12. The wafer 10 carried into the chamber 12 is supported by the support unit 11.

本実施形態の半導体製造装置は、ウエハ１０の裏面Ｓ2が上向きの状態で、ウエハ１０の裏面Ｓ2にマイクロ波を照射する。そのため、本実施形態の支持部１１は、裏面Ｓ2が上向きの状態でウエハ１０を支持する。一方、本実施形態のウエハカセット１７は、表面Ｓ1が上向きの状態でウエハ１０を収容する。 The semiconductor manufacturing apparatus of this embodiment, the rear surface S 2 of the wafer 10 is in an upward state, a microwave is irradiated to the rear surface S 2 of the wafer 10. Therefore, the supporting portion 11 of the present embodiment, the rear surface S 2 to support the wafer 10 in an upward state. On the other hand, the wafer cassette 17 of the present embodiment accommodates the wafer 10 with the surface S 1 facing upward.

よって、本実施形態のウエハ搬送装置１８は、ウエハカセット１７からチャンバ１２へとウエハ１０を搬送する間に、ウエハ１０の表面Ｓ1と裏面Ｓ2とを反転させる。これにより、ウエハ１０の状態を、表面Ｓ1が上向きの状態から、裏面Ｓ2が上向きの状態に変化させることができる。 Therefore, the wafer transfer device 18 of this embodiment reverses the front surface S 1 and the back surface S 2 of the wafer 10 while transferring the wafer 10 from the wafer cassette 17 to the chamber 12. As a result, the state of the wafer 10 can be changed from a state in which the front surface S 1 is upward to a state in which the rear surface S 2 is upward.

図２は、第１実施形態のウエハ搬送装置１８の構造を概略的に示す上面図である。
本実施形態のウエハ搬送装置１８は、図２に示すように、把持部１８ａと、第１回転部１８ｂと、伸縮部１８ｃと、第２回転部１８ｄとを備えている。 FIG. 2 is a top view schematically showing the structure of the wafer transfer device 18 of the first embodiment.
As shown in FIG. 2, the wafer transfer apparatus 18 of the present embodiment includes a gripping part 18a, a first rotating part 18b, a telescopic part 18c, and a second rotating part 18d.

把持部１８ａは、ウエハ１０を把持するための機構である。第１回転部１８ｂは、矢印Ａのように回転可能な機構である。伸縮部１８ｃは、矢印Ｂのように伸縮可能な機構である。第２回転部１８ｄは、矢印Ｃのように回転可能な機構である。   The gripping part 18 a is a mechanism for gripping the wafer 10. The first rotating portion 18b is a mechanism that can rotate as indicated by an arrow A. The expansion / contraction part 18c is a mechanism that can expand and contract as indicated by an arrow B. The second rotating portion 18d is a mechanism that can rotate as indicated by an arrow C.

ウエハ搬送装置１８は、以下のように動作する。まず、ウエハカセット１７内のウエハ１０を、把持部１８ａにより把持する。次に、伸縮部１８ｃを縮めることで、ウエハカセット１７からウエハ１０を搬出する。次に、第１回転部１８ｂを回転させることで、ウエハ１０の表面Ｓ1と裏面Ｓ2とを反転させる。次に、第２回転部１８ｄを回転させることで、ウエハ１０をチャンバ１２付近に移動させる。次に、伸縮部１８ｃを伸ばすことで、ウエハ１０をチャンバ１２内に搬入する。 The wafer transfer device 18 operates as follows. First, the wafer 10 in the wafer cassette 17 is gripped by the gripping portion 18a. Next, the wafer 10 is unloaded from the wafer cassette 17 by shrinking the extendable portion 18c. Next, the front surface S 1 and the back surface S 2 of the wafer 10 are reversed by rotating the first rotating portion 18b. Next, the wafer 10 is moved to the vicinity of the chamber 12 by rotating the second rotating unit 18d. Next, the wafer 10 is carried into the chamber 12 by extending the stretchable portion 18c.

なお、第１回転部１８ｂの回転によりウエハ１０の表面Ｓ1と裏面Ｓ2とを反転させる動作と、第２回転部１８ｄの回転によりウエハ１０をチャンバ１２付近に移動させる動作を行う順番は、逆にしてもよい。 The order of performing the operation of inverting the front surface S 1 and the back surface S 2 of the wafer 10 by the rotation of the first rotation unit 18b and the operation of moving the wafer 10 to the vicinity of the chamber 12 by the rotation of the second rotation unit 18d is as follows. It may be reversed.

また、本実施形態のウエハ搬送装置１８は、ウエハ１０の表面Ｓ1と裏面Ｓ2とを反転させることが可能であれば、図２と異なる構造を有していてもよい。 Further, the wafer transfer device 18 of the present embodiment may have a structure different from that shown in FIG. 2 as long as the front surface S 1 and the back surface S 2 of the wafer 10 can be reversed.

（１）第１実施形態の半導体製造装置の詳細
次に、再び図１を参照し、第１実施形態の半導体製造装置の詳細を説明する。
本実施形態の半導体製造装置は、ウエハ１０の裏面Ｓ2にマイクロ波を照射することにより、ウエハ１０をアニールする。本実施形態の半導体製造装置は、ウエハ１０の裏面Ｓ2にマイクロ波を照射するために、以下のような構造を採用している。 (1) Details of Semiconductor Manufacturing Apparatus of First Embodiment Next, with reference to FIG. 1 again, details of the semiconductor manufacturing apparatus of the first embodiment will be described.
The semiconductor manufacturing apparatus of this embodiment anneals the wafer 10 by irradiating the back surface S 2 of the wafer 10 with microwaves. The semiconductor manufacturing apparatus of the present embodiment employs the following structure in order to irradiate the back surface S 2 of the wafer 10 with microwaves.

第１に、本実施形態の支持部１１は、ウエハ１０をエッジグリップ１１ｂにより把持することでウエハ１０を支持する。よって、本実施形態の支持部１１は、ウエハ１０の表面Ｓ1および裏面Ｓ2にほぼ触れずに、ウエハ１０を支持することができる。よって、本実施形態によれば、裏面Ｓ2が上向きの状態のウエハ１０を支持する場合に、支持部１１がウエハ１０の表面Ｓ1に触れて、ウエハ１０の表面Ｓ1のパターンを損傷することを回避することができる。 First, the support unit 11 of the present embodiment supports the wafer 10 by holding the wafer 10 with the edge grip 11b. Therefore, the support part 11 of this embodiment can support the wafer 10 without substantially touching the front surface S 1 and the back surface S 2 of the wafer 10. Therefore, according to the present embodiment, when supporting the wafer 10 with the back surface S 2 facing upward, the support unit 11 touches the surface S 1 of the wafer 10 and damages the pattern of the surface S 1 of the wafer 10. You can avoid that.

第２に、本実施形態の導波管１４は、チャンバ１２の上面σ1側に配置されている。よって、本実施形態の導波管１４は、裏面Ｓ2が上向きの状態でウエハ１０が支持されている場合に、ウエハ１０の裏面Ｓ2にマイクロ波を照射することができる。 Secondly, the waveguide 14 of the present embodiment is disposed on the upper surface σ 1 side of the chamber 12. Therefore, the waveguide 14 of the present embodiment can irradiate the back surface S 2 of the wafer 10 with microwaves when the wafer 10 is supported with the back surface S 2 facing upward.

第３に、本実施形態の温度計１５は、チャンバ１２の上面σ1側に配置されている。よって、本実施形態の温度計１５は、裏面Ｓ2が上向きの状態でウエハ１０が支持されている場合に、ウエハ１０の裏面Ｓ2側の温度を測定することができる。 Thirdly, the thermometer 15 of the present embodiment is disposed on the upper surface σ 1 side of the chamber 12. Therefore, the thermometer 15 of the present embodiment can measure the temperature on the back surface S 2 side of the wafer 10 when the wafer 10 is supported with the back surface S 2 facing upward.

ここで、温度計１５の配置について補足する。マイクロ波アニール時のウエハ１０の温度を測定する際、ウエハ１０の温度は裏面Ｓ2側から測定することが望ましい。理由は、ウエハ１０の表面Ｓ1側には種々のパターンが形成されているため、温度計１５の補正が難しく、ウエハ１０の温度を表面Ｓ1側からの温度測定により正確に測定することが難しいからである。よって、温度計１５は、本実施形態のように、ウエハ１０の裏面Ｓ2側の温度を測定可能な位置に配置することが望ましい。 Here, it supplements about arrangement | positioning of the thermometer 15. FIG. When measuring the temperature of the wafer 10 during the microwave annealing, it is desirable to measure the temperature of the wafer 10 from the back surface S 2 side. The reason is that since various patterns are formed on the surface S 1 side of the wafer 10, it is difficult to correct the thermometer 15, and the temperature of the wafer 10 can be accurately measured by measuring the temperature from the surface S 1 side. It is difficult. Therefore, it is desirable that the thermometer 15 is disposed at a position where the temperature on the back surface S 2 side of the wafer 10 can be measured as in the present embodiment.

なお、本実施形態の半導体製造装置は、チャンバ１２の上面σ1側に配置された導波管１４を備えているものの、チャンバ１２の下面σ2側に配置された導波管１４は備えていない。よって、本実施形態の半導体製造装置は、ウエハ１０の裏面Ｓ2にマイクロ波を照射する導波管１４を備えているが、ウエハ１０の表面Ｓ1にマイクロ波を照射する導波管１４は備えていない。 The semiconductor manufacturing apparatus according to this embodiment includes the waveguide 14 disposed on the upper surface σ 1 side of the chamber 12, but includes the waveguide 14 disposed on the lower surface σ 2 side of the chamber 12. Absent. Therefore, the semiconductor manufacturing apparatus according to the present embodiment includes the waveguide 14 that irradiates the back surface S 2 of the wafer 10 with the microwave, but the waveguide 14 that irradiates the front surface S 1 of the wafer 10 with the microwave Not prepared.

同様に、本実施形態の半導体製造装置は、チャンバ１２の上面σ1側に配置された温度計１５を備えているものの、チャンバ１２の下面σ2側に配置された温度計１５は備えていない。よって、本実施形態の半導体製造装置は、ウエハ１０の裏面Ｓ2側の温度を測定する温度計１５を備えているが、ウエハ１０の表面Ｓ1側の温度を測定する温度計１５は備えていない。 Similarly, the semiconductor manufacturing apparatus of this embodiment includes the thermometer 15 disposed on the upper surface σ 1 side of the chamber 12, but does not include the thermometer 15 disposed on the lower surface σ 2 side of the chamber 12. . Therefore, the semiconductor manufacturing apparatus according to the present embodiment includes the thermometer 15 that measures the temperature on the back surface S 2 side of the wafer 10, but includes the thermometer 15 that measures the temperature on the front surface S 1 side of the wafer 10. Absent.

（２）表面照射と裏面照射との比較
図３は、一般的な表面照射と第１実施形態の裏面照射とを比較した断面図である。
図３(ａ)と図３(ｂ)において、符号Ｍ1は、被加工層２に入射したマイクロ波を示す。符号Ｍ2は、被加工層２で反射されたマイクロ波を示す。符号Ｍ3は、被加工層２を透過中のマイクロ波を示す。符号Ｍ4は、被加工層２を透過したマイクロ波を示す。符号Ｍ1〜Ｍ4の矢印の太さは、マイクロ波のパワーの大きさを模式的に示している。 (2) Comparison between front surface irradiation and back surface irradiation FIG. 3 is a cross-sectional view comparing general front surface irradiation and back surface irradiation of the first embodiment.
In FIG. 3A and FIG. 3B, the symbol M 1 indicates the microwave incident on the layer 2 to be processed. A symbol M 2 indicates the microwave reflected by the layer 2 to be processed. A symbol M 3 indicates a microwave that is transmitted through the workpiece layer 2. A symbol M 4 indicates a microwave transmitted through the layer to be processed 2. The thicknesses of arrows M 1 to M 4 schematically indicate the magnitude of the microwave power.

図３(ａ)は、ウエハ１０の表面Ｓ1にマイクロ波を照射する一般的な表面照射を示す。この場合、被加工層２に入射したマイクロ波Ｍ1の多くが、被加工層２内の金属層により吸収または反射されてしまう。そのため、基板１に十分なマイクロ波が到達しない。具体的には、基板１にはマイクロ波Ｍ4しか到達しない。 FIG. 3A shows general surface irradiation in which the surface S 1 of the wafer 10 is irradiated with microwaves. In this case, much of the microwave M 1 incident on the work layer 2 is absorbed or reflected by the metal layer in the work layer 2. Therefore, sufficient microwaves do not reach the substrate 1. Specifically, only the microwave M 4 reaches the substrate 1.

一方、図３(ｂ)は、ウエハ１０の裏面Ｓ2にマイクロ波を照射する第１実施形態の裏面照射を示す。この場合、マイクロ波Ｍ1は、被加工層２に入射する前に基板１に到達する。そのため、本実施形態においては、十分なパワーを持つマイクロ波Ｍ1が、基板１内の反応促進対象領域に到達できる。よって、本実施形態によれば、基板１内の反応促進対象領域への低パワーのマイクロ波の短時間の照射で、十分に反応を促進させることができる。また、本実施形態によれば、入射波であるマイクロ波Ｍ1と反射波であるマイクロ波Ｍ2とにより基板１にパワーを供給することができるため、基板１内の反応促進対象領域においてさらに効率的に反応を促進させることができる。 On the other hand, FIG. 3B shows the back surface irradiation of the first embodiment in which the back surface S 2 of the wafer 10 is irradiated with microwaves. In this case, the microwave M 1 reaches the substrate 1 before entering the workpiece layer 2. Therefore, in this embodiment, the microwave M 1 having sufficient power can reach the reaction promotion target region in the substrate 1. Therefore, according to this embodiment, the reaction can be sufficiently promoted by short-time irradiation of the low-power microwave to the reaction promotion target region in the substrate 1. Further, according to the present embodiment, power can be supplied to the substrate 1 by the microwave M 1 that is the incident wave and the microwave M 2 that is the reflected wave. The reaction can be promoted efficiently.

なお、図３(ａ)と図３(ｂ)の被加工層２は、マイクロ波Ｍ3の磁場の変動によりジュール加熱される。マイクロ波Ｍ3のエネルギーとマイクロ波Ｍ4のエネルギーとの差が、被加工層２の加熱に寄与した熱量に相当する。 Incidentally, the work layer 2 in FIGS. 3 (a) and FIG. 3 (b), is Joule heated by the variation of the magnetic field of the microwave M 3. The difference between the energy of the microwave M 3 and the energy of the microwave M 4 corresponds to the amount of heat that contributes to the heating of the workpiece layer 2.

なお、本実施形態のマイクロ波発生器１３は、マイクロ波やミリ波の波長の電磁波を発生させてもよい。   Note that the microwave generator 13 of this embodiment may generate an electromagnetic wave having a wavelength of microwave or millimeter wave.

以上のように、本実施形態の導波管１４と温度計１５は、共にチャンバ１２の上面σ1側に配置されている。よって、本実施形態によれば、ウエハ１０の裏面Ｓ2にマイクロ波を照射してウエハ１０に十分なパワーを供給すると共に、この際にウエハ１０の温度を裏面Ｓ2側で正確に測定する半導体製造装置を実現できる。よって、本実施形態によれば、ウエハ１０における反応をマイクロ波で促進させる場合において、このような半導体製造装置によりウエハ１０の裏面Ｓ2にマイクロ波を照射することで、ウエハ１０内の反応促進対象領域へ効率的にパワーを供給することができる。その結果、本実施形態によれば、マイクロ波アニールのための消費電力を低減し、半導体装置の製造コストを削減することが可能となる。 As described above, the waveguide 14 and the thermometer 15 of this embodiment are both disposed on the upper surface σ 1 side of the chamber 12. Therefore, according to this embodiment, the back surface S 2 of the wafer 10 is irradiated with microwaves to supply sufficient power to the wafer 10, and at this time, the temperature of the wafer 10 is accurately measured on the back surface S 2 side. A semiconductor manufacturing apparatus can be realized. Therefore, according to the present embodiment, when the reaction in the wafer 10 is promoted by the microwave, the reaction in the wafer 10 is accelerated by irradiating the back surface S 2 of the wafer 10 with the microwave by such a semiconductor manufacturing apparatus. Power can be efficiently supplied to the target area. As a result, according to the present embodiment, it is possible to reduce the power consumption for microwave annealing and reduce the manufacturing cost of the semiconductor device.

（第２実施形態）
図４は、第２実施形態の半導体製造装置の構造を概略的に示す断面図である。
本実施形態のウエハ１０は、表面Ｓ1が上向き、裏面Ｓ2が下向きの状態で、支持部１１により支持されている。さらに、本実施形態の導波管１４と温度計１５は、共にチャンバ１２の下面σ2側に配置されている。よって、本実施形態の導波管１４は、ウエハ１０の裏面Ｓ2にマイクロ波を照射することができ、本実施形態の温度計１５は、ウエハ１０の裏面Ｓ2側の温度を測定することができる。 (Second Embodiment)
FIG. 4 is a cross-sectional view schematically showing the structure of the semiconductor manufacturing apparatus according to the second embodiment.
The wafer 10 of the present embodiment is supported by the support unit 11 with the front surface S 1 facing upward and the back surface S 2 facing downward. Furthermore, the waveguide 14 and the thermometer 15 of this embodiment are both arranged on the lower surface σ 2 side of the chamber 12. Therefore, the waveguide 14 of the present embodiment can irradiate the back surface S 2 of the wafer 10 with microwaves, and the thermometer 15 of the present embodiment measures the temperature on the back surface S 2 side of the wafer 10. Can do.

本実施形態の半導体製造装置は、チャンバ１２の上面σ1側に配置され、ウエハ１０の表面Ｓ1に冷却ガスを吹き付ける第１のガスノズル１６と、チャンバ１２の下面σ2側に配置され、ウエハ１０の裏面Ｓ2に冷却ガスを吹き付ける第２のガスノズル１６とを備えている。しかし、本実施形態の半導体製造装置は、第１および第２のガスノズル１６のうちのいずれか一方のみを備えていてもよい。この場合、本実施形態の半導体製造装置は、ウエハ１０の裏面Ｓ2にマイクロ波を照射することから、ウエハ１０を裏面Ｓ2側から冷却可能な第２のガスノズル１６を備えていることが望ましい。 The semiconductor manufacturing apparatus of the present embodiment is disposed on the upper surface σ 1 side of the chamber 12, is disposed on the lower surface σ 2 side of the chamber 12, and is disposed on the lower surface σ 2 side of the chamber 12 with the first gas nozzle 16 that blows the cooling gas onto the surface S 1 of the wafer 10. And a second gas nozzle 16 that blows the cooling gas onto the back surface S 2 of 10. However, the semiconductor manufacturing apparatus of the present embodiment may include only one of the first and second gas nozzles 16. In this case, since the semiconductor manufacturing apparatus of this embodiment irradiates the back surface S 2 of the wafer 10 with microwaves, it is desirable to include the second gas nozzle 16 that can cool the wafer 10 from the back surface S 2 side. .

なお、本実施形態の半導体製造装置は、チャンバ１２の下面σ2側に配置された導波管１４を備えているものの、チャンバ１２の上面σ1側に配置された導波管１４は備えていない。よって、本実施形態の半導体製造装置は、ウエハ１０の表面Ｓ1にマイクロ波を照射する導波管１４を備えているが、ウエハ１０の裏面Ｓ2にマイクロ波を照射する導波管１４は備えていない。 The semiconductor manufacturing apparatus of the present embodiment includes the waveguide 14 disposed on the lower surface σ 2 side of the chamber 12, but includes the waveguide 14 disposed on the upper surface σ 1 side of the chamber 12. Absent. Therefore, the semiconductor manufacturing apparatus of the present embodiment includes the waveguide 14 that irradiates the front surface S 1 of the wafer 10 with microwaves, but the waveguide 14 that irradiates the rear surface S 2 of the wafer 10 with microwaves Not prepared.

同様に、本実施形態の半導体製造装置は、チャンバ１２の下面σ2側に配置された温度計１５を備えているものの、チャンバ１２の上面σ1側に配置された温度計１５は備えていない。よって、本実施形態の半導体製造装置は、ウエハ１０の表面Ｓ1側の温度を測定する温度計１５を備えているが、ウエハ１０の裏面Ｓ2側の温度を測定する温度計１５は備えていない。 Similarly, the semiconductor manufacturing apparatus of this embodiment includes the thermometer 15 disposed on the lower surface σ 2 side of the chamber 12, but does not include the thermometer 15 disposed on the upper surface σ 1 side of the chamber 12. . Therefore, the semiconductor manufacturing apparatus of the present embodiment includes the thermometer 15 that measures the temperature on the front surface S 1 side of the wafer 10, but includes the thermometer 15 that measures the temperature on the back surface S 2 side of the wafer 10. Absent.

以上のように、本実施形態の導波管１４と温度計１５は、共にチャンバ１２の下面σ2側に配置されている。よって、本実施形態によれば、第１実施形態と同様、ウエハ１０の裏面Ｓ2にマイクロ波を照射してウエハ１０に十分なパワーを供給すると共に、この際にウエハ１０の温度を裏面Ｓ2側で正確に測定する半導体製造装置を実現できる。よって、本実施形態によれば、ウエハ１０における反応をマイクロ波で促進させる場合において、このような半導体製造装置によりウエハ１０の裏面Ｓ2にマイクロ波を照射することで、ウエハ１０内の反応促進対象領域へ効率的にパワーを供給することができる。 As described above, the waveguide 14 and the thermometer 15 of this embodiment are both disposed on the lower surface σ 2 side of the chamber 12. Therefore, according to the present embodiment, as in the first embodiment, the back surface S 2 of the wafer 10 is irradiated with microwaves to supply sufficient power to the wafer 10, and at this time, the temperature of the wafer 10 is set to the back surface S. It is possible to realize a semiconductor manufacturing device that measures accurately on the two sides. Therefore, according to the present embodiment, when the reaction in the wafer 10 is promoted by the microwave, the reaction in the wafer 10 is accelerated by irradiating the back surface S 2 of the wafer 10 with the microwave by such a semiconductor manufacturing apparatus. Power can be efficiently supplied to the target area.

また、本実施形態の支持部１１は、表面Ｓ1が上向きの状態でウエハ１０を支持し、本実施形態のウエハカセット１７は、表面Ｓ1が上向きの状態でウエハ１０を収容する。よって、本実施形態のウエハ搬送装置１８は、ウエハ１０の表面Ｓ1と裏面Ｓ2とを反転させる機能を有していなくてもよい。また、本実施形態の支持部１１は、ウエハ１０の裏面Ｓ2に触れてウエハ１０を支持してもよい。例えば、本実施形態の支持部１１は、ウエハ１０のエッジに触れるエッジグリップ１１ｂの代わりに、ウエハ１０の裏面Ｓ2に触れるピンや支持面でウエハ１０を支持してもよい。 The support portion 11 of the present embodiment, the surface S 1 is to support the wafer 10 in an upward state, the wafer cassette 17 of the present embodiment, the surface S 1 is to accommodate a wafer 10 in an upward state. Therefore, the wafer conveyance device 18 of this embodiment may not have the function of inverting the front surface S 1 and the back surface S 2 of the wafer 10. Further, the support unit 11 of the present embodiment may support the wafer 10 by touching the back surface S 2 of the wafer 10. For example, instead of the edge grip 11 b that touches the edge of the wafer 10, the support unit 11 of this embodiment may support the wafer 10 with pins or a support surface that touch the back surface S 2 of the wafer 10.

一方、第１実施形態の半導体製造装置は、配置された機器が少なく、スペースに余裕のあるチャンバ１２の上面σ1側に導波管１４および温度計１５を配置できるという利点を有する。 On the other hand, the semiconductor manufacturing apparatus according to the first embodiment has an advantage that the waveguide 14 and the thermometer 15 can be arranged on the upper surface σ 1 side of the chamber 12 having a small space and a sufficient space.

（第３実施形態）
図５と図６は、第３実施形態の半導体装置の製造方法を示す断面図である。
まず、図５(ａ)に示すように、基板１上に１層以上の被加工層２を形成する。図５(ａ)の被加工層２は、基板１上に形成された１層以上の層間絶縁膜２ａと、基板１上に層間絶縁膜２ａで覆われるように形成された１層以上の金属層２ｂとを含んでいる。符号Ｓ1は、ウエハ１０の表面、すなわち、ウエハ１０の被加工層２側の面を示す。符号Ｓ2は、ウエハ１０の裏面、すなわち、ウエハ１０の基板１側の面を示す。 (Third embodiment)
5 and 6 are cross-sectional views illustrating a method for manufacturing a semiconductor device according to the third embodiment.
First, as shown in FIG. 5A, one or more layers to be processed 2 are formed on a substrate 1. The processed layer 2 in FIG. 5A includes one or more interlayer insulating films 2a formed on the substrate 1 and one or more layers of metal formed on the substrate 1 so as to be covered with the interlayer insulating film 2a. Layer 2b. Reference numeral S 1 denotes the surface of the wafer 10, that is, the surface of the wafer 10 on the processed layer 2 side. Reference numeral S 2 indicates the back surface of the wafer 10, that is, the surface of the wafer 10 on the substrate 1 side.

次に、図５(ｂ)に示すように、リソグラフィおよび反応性イオンエッチングにより、層間絶縁膜２ａにコンタクトホール３を形成する。コンタクトホール３は、その底面が基板１に到達するように形成される。   Next, as shown in FIG. 5B, contact holes 3 are formed in the interlayer insulating film 2a by lithography and reactive ion etching. The contact hole 3 is formed so that its bottom surface reaches the substrate 1.

次に、図５(ｃ)に示すように、イオン注入またはプラズマドーピングにより、コンタクトホール３の底面の基板１内にｎ型不純物またはｐ型不純物を導入する。その結果、基板１内にアモルファス層１ａが形成される。不純物のドーズ量は、例えば、１．０×１０１５ｃｍ−２以上に設定される。 Next, as shown in FIG. 5C, an n-type impurity or a p-type impurity is introduced into the substrate 1 on the bottom surface of the contact hole 3 by ion implantation or plasma doping. As a result, an amorphous layer 1 a is formed in the substrate 1. The impurity dose is set to, for example, 1.0 × 10 15 cm −2 or more.

次に、図６(ａ)に示すように、第１または第２実施形態の半導体製造装置によりウエハ１０の裏面Ｓ2にマイクロ波を照射して、アモルファス層１ａを加熱する。これにより、アモルファス層１ａが結晶化されて単結晶になると共に、アモルファス層１ａ内の不純物が活性化される。その結果、アモルファス層１ａから拡散層１ｂが形成される。 Next, as shown in FIG. 6 (a), using microwave radiation by the semiconductor manufacturing apparatus of the first or second embodiment on the back S 2 of the wafer 10, to heat the amorphous layer 1a. As a result, the amorphous layer 1a is crystallized into a single crystal, and impurities in the amorphous layer 1a are activated. As a result, the diffusion layer 1b is formed from the amorphous layer 1a.

次に、図６(ｂ)に示すように、基板１上の全面に金属層２ｃを形成し、コンタクトホール３内に金属層２ｃを埋める。金属層２ｃは例えば、Ｔｉ（チタン）層、ＴｉＮ（チタンナイトライド）層、およびＷ（タングステン）層を含む積層膜である。   Next, as shown in FIG. 6B, a metal layer 2 c is formed on the entire surface of the substrate 1, and the metal layer 2 c is embedded in the contact hole 3. The metal layer 2c is, for example, a laminated film including a Ti (titanium) layer, a TiN (titanium nitride) layer, and a W (tungsten) layer.

次に、図６(ｃ)に示すように、ＣＭＰ（Chemical Mechanical Polishing）により金属層２ｃの表面を平坦化して、コンタクトホール３外の金属層２ｃを除去する。その結果、コンタクトホール３内に、金属層２ｃを含み、拡散層１ｂに電気的に接続されたコンタクトプラグが形成される。   Next, as shown in FIG. 6C, the surface of the metal layer 2c is planarized by CMP (Chemical Mechanical Polishing), and the metal layer 2c outside the contact hole 3 is removed. As a result, a contact plug including the metal layer 2c and electrically connected to the diffusion layer 1b is formed in the contact hole 3.

本実施形態の半導体装置の製造方法において、図６(ａ)の裏面照射を、次の条件で実際に行った。導波管１４からのマイクロ波のパワーの合計を３ｋＷに設定し、導波管１４からのマイクロ波の照射時間を４０秒に設定した。また、温度計１５により測定されるウエハ１０の温度が６００℃に固定されるように、各ガスノズル１６からの冷却ガスの流量を設定した。冷却ガスとしては、Ｎ２（窒素）ガスを使用した。その結果、各ガスノズル１６からの冷却ガスの流量は、４０ｓｌｍに設定された。 In the manufacturing method of the semiconductor device of this embodiment, the back surface irradiation of FIG. 6A was actually performed under the following conditions. The total power of the microwaves from the waveguide 14 was set to 3 kW, and the irradiation time of the microwaves from the waveguide 14 was set to 40 seconds. The flow rate of the cooling gas from each gas nozzle 16 was set so that the temperature of the wafer 10 measured by the thermometer 15 was fixed at 600 ° C. As the cooling gas, N 2 (nitrogen) gas was used. As a result, the flow rate of the cooling gas from each gas nozzle 16 was set to 40 slm.

一方、比較のために、本実施形態の半導体装置の製造方法において、図６(ａ)の裏面照射を表面照射に置き換えて、表面照射を次の条件で行った。導波管１４からのマイクロ波のパワーの合計を３ｋＷに設定し、導波管１４からのマイクロ波の照射時間を４０秒に設定した。また、温度計１５により測定されるウエハ１０の温度が６００℃に固定されるように、各ガスノズル１６からの冷却ガスの流量を設定した。冷却ガスとしては、Ｎ２ガスを使用した。その結果、各ガスノズル１６からの冷却ガスの流量は、２０ｓｌｍに設定された。 On the other hand, for comparison, in the method for manufacturing a semiconductor device of this embodiment, the backside irradiation in FIG. 6A was replaced with frontside irradiation, and the frontside irradiation was performed under the following conditions. The total power of the microwaves from the waveguide 14 was set to 3 kW, and the irradiation time of the microwaves from the waveguide 14 was set to 40 seconds. The flow rate of the cooling gas from each gas nozzle 16 was set so that the temperature of the wafer 10 measured by the thermometer 15 was fixed at 600 ° C. N 2 gas was used as the cooling gas. As a result, the flow rate of the cooling gas from each gas nozzle 16 was set to 20 slm.

以上のように、ウエハ１０の温度を６００℃に固定する場合において、裏面照射時の冷却ガスの流量は、表面照射時の冷却ガスの流量よりも大きく設定された。これは、裏面照射によるウエハ１０の加熱効率が、表面照射によるウエハ１０の加熱効率よりも高かったことを意味する。すなわち、裏面照射によりウエハ１０がより多くのパワーを吸収したため、ウエハ１０を十分に冷却するために多くの冷却ガスが使用されたものである。   As described above, in the case where the temperature of the wafer 10 is fixed at 600 ° C., the flow rate of the cooling gas at the time of back surface irradiation is set to be larger than the flow rate of the cooling gas at the time of surface irradiation. This means that the heating efficiency of the wafer 10 by backside irradiation is higher than the heating efficiency of the wafer 10 by frontside irradiation. That is, since the wafer 10 absorbed more power by the backside irradiation, a large amount of cooling gas was used to sufficiently cool the wafer 10.

なお、本実施形態で採用したマイクロ波のパワーと冷却ガスの流量は、ウエハサイズやチャンバ構造に依存するものであり、適宜変更することができる。   Note that the power of the microwave and the flow rate of the cooling gas employed in this embodiment depend on the wafer size and the chamber structure, and can be changed as appropriate.

これらの表面照射および裏面照射の直後のウエハ１０の断面を観察した。表面照射直後のウエハ１０を観察したところ、アモルファス層１ａが一部残存しており、不純物の活性化が不十分であることが分かった。一方、裏面照射直後のウエハ１０を観察したところ、アモルファス層１ａが完全に単結晶に変化していることが分かった。   The cross section of the wafer 10 immediately after these front surface irradiation and back surface irradiation was observed. When the wafer 10 immediately after the surface irradiation was observed, it was found that a part of the amorphous layer 1a remained and the activation of impurities was insufficient. On the other hand, when the wafer 10 immediately after the backside irradiation was observed, it was found that the amorphous layer 1a was completely changed to a single crystal.

以上のように、本実施形態によれば、ウエハ１０内の反応促進対象領域へマイクロ波の裏面照射により効率的にパワーを供給することで、反応促進対象領域における反応を促進させることが可能となる。   As described above, according to the present embodiment, it is possible to promote the reaction in the reaction promotion target region by efficiently supplying power to the reaction promotion target region in the wafer 10 by backside irradiation of microwaves. Become.

（第４実施形態）
図７〜図９は、第４実施形態の半導体装置の製造方法を示す断面図である。
まず、図７(ａ)に示すように、基板１上に１層以上の被加工層２を形成する。図７(ａ)の被加工層２は、基板１上に形成された１層以上の層間絶縁膜２ａと、基板１上に層間絶縁膜２ａで覆われるように形成された１層以上の金属層２ｂと、基板１上に層間絶縁膜２ａで覆われるように形成された複数の素子分離領域２ｄとを含んでいる。素子分離領域２ｄは、基板１の表面に複数の素子分離溝を形成し、素子分離溝内に絶縁膜を埋め込むことで形成される。 (Fourth embodiment)
7 to 9 are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the fourth embodiment.
First, as shown in FIG. 7A, one or more layers to be processed 2 are formed on a substrate 1. The processed layer 2 in FIG. 7A includes one or more interlayer insulating films 2a formed on the substrate 1 and one or more layers of metal formed on the substrate 1 so as to be covered with the interlayer insulating film 2a. It includes a layer 2b and a plurality of element isolation regions 2d formed on the substrate 1 so as to be covered with an interlayer insulating film 2a. The element isolation region 2d is formed by forming a plurality of element isolation grooves on the surface of the substrate 1 and embedding an insulating film in the element isolation grooves.

次に、図７(ｂ)に示すように、リソグラフィおよび反応性イオンエッチングにより、層間絶縁膜２ａに溝４を形成する。溝４は、その底面が基板１に到達するように形成される。符号Ｗ1は、互いに隣接する素子分離領域２ｄ間の距離を示し、符号Ｗ2は、溝４の幅を示す。本実施形態の距離Ｗ1は、２０ｎｍ以下に設定され、本実施形態の幅Ｗ2は、距離Ｗ1よりも長く設定される。 Next, as shown in FIG. 7B, a groove 4 is formed in the interlayer insulating film 2a by lithography and reactive ion etching. The groove 4 is formed so that its bottom surface reaches the substrate 1. Symbol W 1 indicates the distance between the element isolation regions 2 d adjacent to each other, and symbol W 2 indicates the width of the groove 4. The distance W 1 of this embodiment is set to 20 nm or less, and the width W 2 of this embodiment is set to be longer than the distance W 1 .

次に、図７(ｃ)に示すように、イオン注入またはプラズマドーピングにより、溝４の底面の基板１内にｎ型不純物またはｐ型不純物を導入する。その結果、基板１内の素子分離領域２ｄ間にアモルファス層１ａが形成される。不純物のドーズ量は、例えば、１．０×１０１５ｃｍ−２以上に設定される。 Next, as shown in FIG. 7C, an n-type impurity or a p-type impurity is introduced into the substrate 1 at the bottom of the groove 4 by ion implantation or plasma doping. As a result, an amorphous layer 1 a is formed between the element isolation regions 2 d in the substrate 1. The impurity dose is set to, for example, 1.0 × 10 15 cm −2 or more.

次に、図８(ａ)に示すように、第１または第２実施形態の半導体製造装置によりウエハ１０の裏面Ｓ2にマイクロ波を照射する。これにより、アモルファス層１ａが結晶化されて単結晶になると共に、アモルファス層１ａ内の不純物が活性化される。その結果、アモルファス層１ａから拡散層１ｂが形成される。 Next, as shown in FIG. 8A, the back surface S 2 of the wafer 10 is irradiated with microwaves by the semiconductor manufacturing apparatus of the first or second embodiment. As a result, the amorphous layer 1a is crystallized into a single crystal, and impurities in the amorphous layer 1a are activated. As a result, the diffusion layer 1b is formed from the amorphous layer 1a.

次に、図８(ｂ)に示すように、基板１上の全面に層間絶縁膜２ｅを形成し、ＣＭＰにより層間絶縁膜２ｅの表面を平坦化する。その結果、溝４の内部に層間絶縁膜２ｅが埋め込まれる。   Next, as shown in FIG. 8B, an interlayer insulating film 2e is formed on the entire surface of the substrate 1, and the surface of the interlayer insulating film 2e is planarized by CMP. As a result, the interlayer insulating film 2 e is embedded in the trench 4.

次に、図８(ｃ)に示すように、リソグラフィおよび反応性イオンエッチングにより、層間絶縁膜２ｅにコンタクトホール５を形成する。コンタクトホール５は、その底面が拡散層１ｂに到達するように形成される。符号Ｗ3は、コンタクトホール５の幅を示す。本実施形態の幅Ｗ3は、距離Ｗ1よりも短くても長くてもよい。 Next, as shown in FIG. 8C, a contact hole 5 is formed in the interlayer insulating film 2e by lithography and reactive ion etching. The contact hole 5 is formed so that the bottom surface thereof reaches the diffusion layer 1b. A symbol W 3 indicates the width of the contact hole 5. The width W 3 of this embodiment may be shorter or longer than the distance W 1 .

次に、図９(ａ)に示すように、基板１上の全面に金属層２ｆを形成し、コンタクトホール５内に金属層２ｆを埋める。金属層２ｆは例えば、Ｔｉ層、ＴｉＮ層、およびＷ層を含む積層膜である。   Next, as shown in FIG. 9A, a metal layer 2 f is formed on the entire surface of the substrate 1, and the metal layer 2 f is embedded in the contact hole 5. The metal layer 2f is a laminated film including, for example, a Ti layer, a TiN layer, and a W layer.

次に、図９(ｂ)に示すように、ＣＭＰにより金属層２ｆの表面を平坦化して、コンタクトホール５外の金属層２ｆを除去する。その結果、コンタクトホール５内に、金属層２ｆを含み、拡散層１ｂに電気的に接続されたコンタクトプラグが形成される。   Next, as shown in FIG. 9B, the surface of the metal layer 2f is planarized by CMP, and the metal layer 2f outside the contact hole 5 is removed. As a result, a contact plug including the metal layer 2f and electrically connected to the diffusion layer 1b is formed in the contact hole 5.

本実施形態の半導体装置の製造方法において、図８(ａ)の裏面照射を、次の条件で実際に行った。導波管１４からのマイクロ波のパワーの合計を５ｋＷに設定し、導波管１４からのマイクロ波の照射時間を１８０秒に設定した。また、温度計１５により測定されるウエハ１０の温度が７００℃に固定されるように、各ガスノズル１６からの冷却ガスの流量を設定した。冷却ガスとしては、Ｎ２ガスを使用した。その結果、各ガスノズル１６からの冷却ガスの流量は、６０ｓｌｍに設定された。 In the manufacturing method of the semiconductor device of this embodiment, the back surface irradiation of FIG. 8A was actually performed under the following conditions. The total power of the microwave from the waveguide 14 was set to 5 kW, and the irradiation time of the microwave from the waveguide 14 was set to 180 seconds. Further, the flow rate of the cooling gas from each gas nozzle 16 was set so that the temperature of the wafer 10 measured by the thermometer 15 was fixed at 700 ° C. N 2 gas was used as the cooling gas. As a result, the flow rate of the cooling gas from each gas nozzle 16 was set to 60 slm.

一方、比較のために、本実施形態の半導体装置の製造方法において、図８(ａ)の裏面照射を表面照射に置き換えて、表面照射を次の条件で行った。導波管１４からのマイクロ波のパワーの合計を５ｋＷに設定し、導波管１４からのマイクロ波の照射時間を１８０秒に設定した。また、温度計１５により測定されるウエハ１０の温度が７００℃に固定されるように、各ガスノズル１６からの冷却ガスの流量を設定した。冷却ガスとしては、Ｎ２ガスを使用した。その結果、各ガスノズル１６からの冷却ガスの流量は、２０ｓｌｍに設定された。 On the other hand, for comparison, in the method for manufacturing a semiconductor device of this embodiment, the backside irradiation in FIG. 8A was replaced with frontside irradiation, and surface irradiation was performed under the following conditions. The total power of the microwave from the waveguide 14 was set to 5 kW, and the irradiation time of the microwave from the waveguide 14 was set to 180 seconds. Further, the flow rate of the cooling gas from each gas nozzle 16 was set so that the temperature of the wafer 10 measured by the thermometer 15 was fixed at 700 ° C. N 2 gas was used as the cooling gas. As a result, the flow rate of the cooling gas from each gas nozzle 16 was set to 20 slm.

以上のように、ウエハ１０の温度を７００℃に固定する場合において、裏面照射時の冷却ガスの流量は、表面照射時の冷却ガスの流量よりも大きく設定された。これは、裏面照射によるウエハ１０の加熱効率が、表面照射によるウエハ１０の加熱効率よりも高かったことを意味する。すなわち、裏面照射によりウエハ１０がより多くのパワーを吸収したため、ウエハ１０を十分に冷却するために多くの冷却ガスが使用されたものである。   As described above, when the temperature of the wafer 10 is fixed at 700 ° C., the flow rate of the cooling gas at the time of backside irradiation is set to be larger than the flow rate of the cooling gas at the time of surface irradiation. This means that the heating efficiency of the wafer 10 by backside irradiation is higher than the heating efficiency of the wafer 10 by frontside irradiation. That is, since the wafer 10 absorbed more power by the backside irradiation, a large amount of cooling gas was used to sufficiently cool the wafer 10.

これらの表面照射および裏面照射の直後のウエハ１０の断面を観察した。表面照射直後のウエハ１０を観察したところ、アモルファス層１ａの結晶化はほとんど起こらないことが分かった。理由は、アモルファス層１ａは、距離Ｗ1が２０ｎｍ以下と小さい素子分離領域２ｄ間に形成されているため、距離Ｗ1が大きい場合に比べてアモルファス層１ａが固相成長する速度が極端に遅く、大きなマイクロ波パワーを必要とするにもかかわらず、表面照射ではアモルファス層１ａに十分なマイクロ波パワーが供給されないためと考えられる。一方、裏面照射直後のウエハ１０を観察したところ、アモルファス層１ａが完全に単結晶に変化していることが分かった。理由は、距離Ｗ1が小さくても、裏面照射ではアモルファス層１ａに十分なマイクロ波パワーが供給されるためと考えられる。 The cross section of the wafer 10 immediately after these front surface irradiation and back surface irradiation was observed. When the wafer 10 immediately after the surface irradiation was observed, it was found that the crystallization of the amorphous layer 1a hardly occurred. Reason, amorphous layer 1a is the distance W 1 is formed between 20nm or less and a small device isolation region 2d, the rate of growing the amorphous layers 1a solid phase as compared to when the distance W 1 is large extremely slow This is considered to be because sufficient microwave power is not supplied to the amorphous layer 1a by surface irradiation, although a large microwave power is required. On the other hand, when the wafer 10 immediately after the backside irradiation was observed, it was found that the amorphous layer 1a was completely changed to a single crystal. The reason is considered that even if the distance W 1 is small, sufficient microwave power is supplied to the amorphous layer 1a by backside illumination.

以上のように、本実施形態によれば、ウエハ１０内の反応促進対象領域へマイクロ波の裏面照射により効率的にパワーを供給することで、反応促進対象領域における反応を促進させることが可能となる。   As described above, according to the present embodiment, it is possible to promote the reaction in the reaction promotion target region by efficiently supplying power to the reaction promotion target region in the wafer 10 by backside irradiation of microwaves. Become.

以上、いくつかの実施形態を説明したが、これらの実施形態は、例としてのみ提示したものであり、発明の範囲を限定することを意図したものではない。本明細書で説明した新規な装置および方法は、その他の様々な形態で実施することができる。また、本明細書で説明した装置および方法の形態に対し、発明の要旨を逸脱しない範囲内で、種々の省略、置換、変更を行うことができる。添付の特許請求の範囲およびこれに均等な範囲は、発明の範囲や要旨に含まれるこのような形態や変形例を含むように意図されている。   Although several embodiments have been described above, these embodiments are presented as examples only and are not intended to limit the scope of the invention. The novel apparatus and methods described herein can be implemented in a variety of other forms. In addition, various omissions, substitutions, and changes can be made to the forms of the apparatus and method described in the present specification without departing from the spirit of the invention. The appended claims and their equivalents are intended to include such forms and modifications as fall within the scope and spirit of the invention.

１：基板、１ａ：アモルファス層、１ｂ：拡散層、
２：被加工層、２ａ：層間絶縁膜、２ｂ：金属層、２ｃ：金属層、
２ｄ：素子分離領域、２ｅ：層間絶縁膜、２ｆ：金属層、３：コンタクトホール、
４：溝、５：コンタクトホール、１０：ウエハ、１１：支持部、
１１ａ：サセプタ、１１ｂ：エッジグリップ、１１ｃ：回転シャフト、
１２：チャンバ、１３：マイクロ波発生器、１４：導波管、１５：温度計、
１６：ガスノズル、１７：ウエハカセット、１８：ウエハ搬送装置、
１８ａ：把持部、１８ｂ：第１回転部、１８ｃ：伸縮部、１８ｄ：第２回転部 1: substrate, 1a: amorphous layer, 1b: diffusion layer,
2: layer to be processed, 2a: interlayer insulating film, 2b: metal layer, 2c: metal layer,
2d: element isolation region, 2e: interlayer insulating film, 2f: metal layer, 3: contact hole,
4: groove, 5: contact hole, 10: wafer, 11: support part,
11a: susceptor, 11b: edge grip, 11c: rotating shaft,
12: chamber, 13: microwave generator, 14: waveguide, 15: thermometer,
16: Gas nozzle, 17: Wafer cassette, 18: Wafer transfer device,
18a: gripping part, 18b: first rotating part, 18c: telescopic part, 18d: second rotating part

Claims (9)

基板と、前記基板に形成された被加工層とを含み、前記被加工層側の第１の面と、前記基板側の第２の面とを有するウエハ、を支持するための支持部と、
前記支持部を収容するチャンバと、
マイクロ波を発生させるマイクロ波発生器と、
前記チャンバの上面側または下面側に配置されており、前記マイクロ波を前記ウエハの前記第２の面に照射する導波管と、
前記チャンバの上面側および下面側のうち前記導波管と同じ側に配置されており、前記ウエハの前記第２の面側の温度を測定する温度計と、
を備える半導体製造装置。 A support unit for supporting a wafer including a substrate and a layer to be processed formed on the substrate, the wafer having a first surface on the workpiece layer side and a second surface on the substrate side;
A chamber for housing the support;
A microwave generator for generating microwaves;
A waveguide disposed on the upper surface side or lower surface side of the chamber and irradiating the second surface of the wafer with the microwave;
A thermometer disposed on the same side as the waveguide among the upper surface side and the lower surface side of the chamber, and measuring the temperature of the second surface side of the wafer;
A semiconductor manufacturing apparatus comprising: 前記導波管と前記温度計は、前記チャンバの上面側に配置されている、請求項１に記載の半導体製造装置。   The semiconductor manufacturing apparatus according to claim 1, wherein the waveguide and the thermometer are arranged on an upper surface side of the chamber. 前記支持部は、前記第２の面が上向きの状態で前記ウエハを支持する、請求項２に記載の半導体製造装置。   The semiconductor manufacturing apparatus according to claim 2, wherein the support portion supports the wafer with the second surface facing upward. さらに、
前記ウエハを収容するための収容部と、
前記ウエハを前記収容部から搬出し、前記ウエハの前記第１の面と前記第２の面とを反転させ、前記ウエハを前記チャンバ内に搬入する搬送部と、
を備える請求項２または３に記載の半導体製造装置。 further,
An accommodating portion for accommodating the wafer;
A transfer unit for unloading the wafer from the housing unit, inverting the first surface and the second surface of the wafer, and loading the wafer into the chamber;
The semiconductor manufacturing apparatus of Claim 2 or 3 provided with these. 前記導波管と前記温度計は、前記チャンバの下面側に配置されている、請求項１に記載の半導体製造装置。   The semiconductor manufacturing apparatus according to claim 1, wherein the waveguide and the thermometer are arranged on a lower surface side of the chamber. 前記支持部は、前記第２の面が下向きの状態で前記ウエハを支持する、請求項５に記載の半導体製造装置。   The semiconductor manufacturing apparatus according to claim 5, wherein the support portion supports the wafer with the second surface facing downward. 前記半導体製造装置は、前記マイクロ波を前記ウエハの前記第１の面に照射する導波管を備えていない、請求項１から６のいずれか１項に記載の半導体製造装置。   The semiconductor manufacturing apparatus according to claim 1, wherein the semiconductor manufacturing apparatus does not include a waveguide that irradiates the first surface of the wafer with the microwave. 基板と、前記基板に形成された被加工層とを含み、前記被加工層側の第１の面と、前記基板側の第２の面とを有するウエハ、をチャンバ内に搬入し、
前記チャンバ内の支持部が、前記ウエハを支持し、
マイクロ波発生器からマイクロ波を発生させ、
前記チャンバの上面側または下面側に配置された導波管が、前記ウエハの前記第２の面に前記マイクロ波を照射し、
前記チャンバの上面側および下面側のうち前記導波管と同じ側に配置された温度計が、前記ウエハの前記第２の面側の温度を測定する、
ことを含む半導体装置の製造方法。 A wafer including a substrate and a processing layer formed on the substrate, the wafer having a first surface on the processing layer side and a second surface on the substrate side;
A support in the chamber supports the wafer;
Generate microwaves from a microwave generator,
A waveguide disposed on an upper surface side or a lower surface side of the chamber irradiates the second surface of the wafer with the microwave;
A thermometer disposed on the same side as the waveguide among the upper surface side and the lower surface side of the chamber measures the temperature of the second surface side of the wafer,
A method of manufacturing a semiconductor device. 前記ウエハは、前記基板に形成された複数の素子分離領域と、前記基板内の前記素子分離領域間に形成されたアモルファス層とを含み、
前記ウエハの前記第２の面に前記マイクロ波を照射して、前記アモルファス層を結晶化することを含む、請求項８に記載の半導体装置の製造方法。 The wafer includes a plurality of element isolation regions formed on the substrate, and an amorphous layer formed between the element isolation regions in the substrate,
The method of manufacturing a semiconductor device according to claim 8, comprising irradiating the second surface of the wafer with the microwave to crystallize the amorphous layer.
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