JP2015115743A - Photoelectric conversion device and photoelectric conversion array - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a photoelectric conversion device capable of securing the simultaneity of data with high sensitivity.SOLUTION: A photoelectric conversion device includes: a phototransistor for detecting light intensity, and for outputting currents in accordance with the light intensity; a first charge accumulation part for accumulating currents as electric charge; a first switch element for controlling the connection of the phototransistor with the first charge accumulation part by opening/closing; a second charge accumulation part to which the electric charge is transferred from the first charge accumulation part; a second switch element for controlling the connection of the first charge accumulation part with the second charge accumulation part by opening/closing; a source follower for buffering the potential of the second charge accumulation part; a third switch element for resetting the potential of the first charge accumulation part; a fourth switch element for resetting the potential of the second charge accumulation part; an output line for outputting the potential of the source follower; and a fifth switch element for controlling the connection of the source follower with the output line by opening/closing.

Description

  The present invention relates to a photoelectric conversion device and a photoelectric conversion array.

  2. Description of the Related Art Conventionally, a CCD (Charge Coupled Device) image sensor employs a global shutter system, and a CMOS (Complementary Metal Oxide Semiconductor) image sensor employs a rolling shutter system.

  A photoelectric conversion cell and a two-dimensional array are disclosed in which a photoelectric conversion cell is composed of an amplification type photoelectric conversion element and a selection element, and the delay due to external noise and mirror effect is reduced, thereby achieving high sensitivity. For example, see Patent Document 1).

  There has been disclosed a CMOS image sensor using a photodiode as a photoelectric conversion element to reduce noise and afterimages by initializing signal charges and reading accumulated charges all at once (for example, Patent Documents). 2).

  An image sensor using a phototransistor having an amplification function as a photoelectric conversion element has higher sensitivity than a CMOS image sensor or a CCD image sensor. Usually, in the image sensor, since only one charge storage portion (a base node of a phototransistor) is provided in a pixel cell (see FIG. 1), a rolling shutter system is employed.

  However, the rolling shutter system causes distortion in the image when imaging a subject that operates at high speed.

  The photoelectric conversion array described in Patent Document 1 cannot be operated by the global shutter method.

  Although the image sensor described in Patent Document 2 can be operated by a global shutter system, it is difficult to achieve high sensitivity because a photodiode is used as a photoelectric conversion element.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a photoelectric conversion device that is highly sensitive and can ensure data simultaneity.

  The photoelectric conversion device of this embodiment includes a phototransistor that detects light intensity and outputs a current according to the light intensity, a first charge accumulation unit that accumulates current as a charge, a phototransistor, and a first transistor A first switch element for controlling connection with the charge accumulation unit by opening and closing; a second charge accumulation unit to which charges are transferred from the first charge accumulation unit; the first charge accumulation unit and the second charge accumulation A second switch element that controls the connection with the first and second sections by opening and closing; a source follower that buffers the potential of the second charge storage section; a third switch element that resets the potential of the first charge storage section; And a fourth switch element that resets the potential of the charge storage unit, an output line that outputs the potential of the source follower, and a fifth switch element that controls connection between the source follower and the output line by opening and closing. Need it To.

  According to this embodiment, it is possible to provide a photoelectric conversion device that has high sensitivity and can ensure data simultaneity.

It is a schematic diagram which illustrates the pixel cell using the conventional phototransistor. It is a figure which illustrates the photoelectric conversion apparatus which concerns on this Embodiment. It is a figure which illustrates the electric charge storage part of the photoelectric conversion apparatus which concerns on this Embodiment. It is a figure which illustrates the photoelectric conversion array which concerns on this Embodiment. It is an example of the timing chart of the photoelectric conversion apparatus which concerns on this Embodiment.

  Hereinafter, embodiments for carrying out the invention will be described with reference to the drawings and tables. In the drawings, the same components are denoted by the same reference numerals, and redundant description may be omitted.

<Configuration of photoelectric conversion device>
An example of the configuration of the photoelectric conversion device (pixel cell) 100 according to this embodiment will be described with reference to FIG. The photoelectric conversion device 100 uses a phototransistor as a photoelectric conversion element.

  As shown in FIG. 2, the photoelectric conversion device 100 includes a phototransistor 101, a charge storage unit 102, a charge storage unit 103, a source follower 104, a switch element 111, a switch element 112, a switch element 113, a switch element 114, and a switch element 115. , Control line 121, control line 122, control line 123, control line 124, control line 125, power supply line 131, power supply line 132, and output line 141. The charge storage unit 102 includes a node A, and the charge storage unit 103 includes a node B.

  The node A is a terminal that connects the switch element 111, the switch element 112, and the switch element 113. The node B is a terminal that connects the switch element 112, the switch element 114, and the source follower 104.

  The power supply line 131 is supplied with a high power supply potential (eg, 3.3 V), and the power supply line 132 is supplied with a low power supply potential (eg, 0 V).

  The phototransistor 101 is a photoelectric conversion element that detects the intensity of light 200 (arrow in the figure), amplifies a current (photocurrent) according to the light intensity, and outputs the amplified current. Generally, a phototransistor has an amplification function of about 50 to 500 times.

  The output current of the phototransistor 101 may change with a linear function with respect to the light intensity, or may change with a certain function (for example, exponential function, power function, etc.) with respect to the light intensity. For example, when the light intensity changes in a 7-digit range, if the output current changes in a 4-digit range, 7-digit light intensity information is handled even if the subsequent dynamic range is only 4 digits. It becomes possible.

  The amplification function (about 50 to 500 times) of the phototransistor is about 50 times larger than the amplification function (about one digit to 10 times) of the photodiode. Therefore, an image sensor using a phototransistor as a photoelectric conversion element has higher sensitivity than an image sensor using a photodiode as a photoelectric conversion element (for example, a normal CMOS image sensor and a CCD image sensor).

  Note that although FIG. 2 shows a single phototransistor configuration as the photoelectric conversion element, the configuration of the photoelectric conversion element is not particularly limited. For example, a bipolar transistor, a photo field effect transistor, a field effect transistor, a diode, or the like may be combined with the phototransistor to form a plurality of photoelectric conversion elements. In any case, it is possible to increase the sensitivity of the photoelectric conversion device 100 by including an element having an amplification function in the photoelectric conversion element.

  The charge storage unit 102 stores the current output from the phototransistor 101 via the switch element 111 as a charge. The charge storage unit 103 stores the charge transferred from the charge storage unit 102 via the switch element 112. The photoelectric conversion device 100 is provided with a plurality of charge storage units (a charge storage unit 102 and a charge storage unit 103).

  Here, the reason why charges can be stored in the charge storage unit 102 including the node A and the charge storage unit 103 including the node B will be described. FIG. 3 is a diagram schematically showing parasitic capacitances existing in each switch element and source follower transistor.

  As shown in FIG. 3A, a parasitic capacitance α1 is formed between the source and back gate of the transistor. This is a parasitic capacitance present in the PN junction (see FIG. 3B).

  As shown in FIG. 3A, a parasitic capacitance α2 is formed between the drain and back gate of the transistor. This is a parasitic capacitance present in the PN junction (see FIG. 3B).

  As shown in FIG. 3A, a parasitic capacitance α3 is formed between the gate and the back gate of the transistor (see FIG. 3B).

  As shown in FIG. 3A, a parasitic capacitance α4 is formed between the source and gate of the transistor. This is a parasitic capacitance that exists in a portion where the source and the gate overlap (see FIG. 3B).

  As shown in FIG. 3A, a parasitic capacitance α5 is formed between the drain and gate of the transistor. This is a parasitic capacitance that exists in a portion where the drain and the gate overlap (see FIG. 3B).

  As apparent from FIG. 3, the parasitic capacitances α1 to α5 exist in the transistor. Furthermore, wiring capacitance and the like are added as parasitic capacitance. Accordingly, all of these parasitic capacitances hang from the node A and the node B, and charges are accumulated in these parasitic capacitances.

  For this reason, charges can be stored in the charge storage unit 102 including the node A and the charge storage unit 103 including the node B (the node A (B) is equivalent to the charge storage unit 102 (103)). .

  Note that in this specification, the case where parasitic capacitance exists in the node A and the node B has been described, but a capacitor may be added to the node A and the node B intentionally.

  As described above, the photoelectric conversion device 100 is provided with a plurality of charge storage units. That is, the photoelectric conversion device 100 is provided with a portion for storing the exposure charge (charge storage portion 102) and a portion for holding the readout charge (charge storage portion 103) separately. For this reason, even when the output signal is being read, the exposure operation can be performed in parallel with the read operation. Therefore, the photoelectric conversion array in which the photoelectric conversion devices 100 are arranged in a two-dimensional array can be operated by the global shutter method as in a normal CCD image sensor.

  The source follower 104 suppresses the potential fluctuation of the charge storage unit 103. The original information is retained by suppressing the potential fluctuation of the charge storage unit 103. Further, by connecting the source follower 104 to the charge storage unit 103, the output line 141 (with a large load) can be driven with a low impedance.

  The switch element 111 controls connection / disconnection between the phototransistor 101 and the charge storage unit 102 by opening and closing. If the switch element 111 is on, the current output from the phototransistor 101 is stored as a charge in the charge storage unit 102. On the other hand, if the switch element 111 is off, the current output from the phototransistor 101 does not reach the charge storage unit 102.

  The switch element 112 controls connection / disconnection between the charge storage unit 102 and the charge storage unit 103 by opening and closing. If the switch element 112 is on, the charge accumulated in the charge accumulation unit 102 is transferred to the charge accumulation unit 103. On the other hand, if the switch element 112 is off, the charge accumulated in the charge accumulation unit 102 is not transferred to the charge accumulation unit 103.

  That is, by controlling the opening and closing of the switch element 112, the charge transferred from the charge accumulation unit 102 to the charge accumulation unit 103 can be appropriately controlled.

  The switch element 113 controls connection / disconnection between the control line 122 and the power supply line 132 and the charge storage unit 102 by opening and closing. If the switch element 113 is on, the potential of the power supply line 132 is supplied to the charge storage unit 102. On the other hand, if the switch element 113 is off, the potential of the power supply line 132 is not supplied to the charge storage unit 102. For example, when the control signal of the control line 122 is at a high level and the potential of the power supply line 132 is 0 V, the potential of the charge storage unit 102 (node A) is reset.

  The switch element 114 controls connection / disconnection between the control line 123 and the power supply line 132 and the charge storage unit 103 by opening and closing. If the switch element 114 is on, the potential of the power supply line 132 is supplied to the charge storage unit 103. On the other hand, if the switch element 114 is off, the potential of the power supply line 132 is not supplied to the charge storage unit 103. For example, when the control signal of the control line 123 is at a high level and the potential of the power supply line 132 is 0 V, the potential of the charge storage unit 103 (node B) is reset.

  The switch element 115 controls connection / disconnection between the source follower 104 and the output line 141 by opening and closing. If the switch element 115 is on, the output signal (potential) output from the source follower 104 is input to the output line 141. On the other hand, if the switch element 115 is off, the output signal output from the source follower 104 is not input to the output line 141.

  Since the photoelectric conversion device 100 according to this embodiment has the above-described configuration, the effect of the amplification function of the phototransistor can be used, and further, the operation can be performed in the global shutter system. That is, it is possible to realize a photoelectric conversion device that is highly sensitive and can ensure data synchronism.

<Configuration of photoelectric conversion array>
An example of the configuration of the photoelectric conversion array according to this embodiment will be described with reference to FIG. The photoelectric conversion devices (pixel cells) 100 can be arranged in a two-dimensional array (for example, a matrix of M rows × N columns). All the pixel cells arranged in the photoelectric conversion array 200 are expressed as pixel cells P (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ N).

  Switch elements included in all pixel cells are switch elements 111 (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ N), switch elements 112 (m, n) (1 ≦ m ≦ M) ( 1 ≦ n ≦ N), switch element 113 (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ N), switch element 114 (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ M) N) and switch element 115 (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ N). In addition, the phototransistor included in all the pixel cells is expressed as a phototransistor 101 (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ N). In addition, the charge storage unit included in all the pixel cells is a charge storage unit 102 (m, n) (node A (m, n)) (1 ≦ m ≦ M) (1 ≦ n ≦ N), a charge storage unit. 103 (m, n) (node B (m, n)) (1 ≦ m ≦ M) (1 ≦ n ≦ N). A source follower included in all pixel cells is represented as a source follower 104 (1 ≦ m ≦ M) (1 ≦ n ≦ N).

  FIG. 4 is a block diagram illustrating an example of the configuration of the photoelectric conversion array 200. 4 includes a plurality of pixel cells (pixel cells P (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ N)) arranged in a two-dimensional array, and each row. A plurality of row control lines, that is, a control line 121 (121_1 to 121_M), a control line 122 (122_1 to 122_M), a control line 123 (123_1 to 123_M), a control line 124 (124_1 to 124_M), and a control line 125 (125_1 to 125_M), a plurality of power supply lines provided for each row, that is, a power supply line 131 (131_1 to 131_M), a power supply line 132 (132_1 to 132_M), and a plurality of column output lines provided for each column ( Output signal), that is, output line 141 (141_1-141_M), pixel control block 210, load current source 220, noise cancel & AD And a conversion array 230.

  The control lines 121_m, 122_m, 123_m, 124_m, 125_m, the power supply line 131_m, and the power supply line 132_m (1 ≦ m ≦ M) have N pixel cells P (m, 1) to P (m, N) (1 ≦ m ≦ M) are connected.

  M pixel cells P (1, n) to P (M, n) (1 ≦ n ≦ N) are connected to the output line 141_n (1 ≦ n ≦ N).

  The pixel cell control block 210 includes a control line 121 (121_1 to 121_M), a control line 122 (122_1 to 122_M), a control line 123 (123_1 to 123_M), a control line 124 (124_1 to 124_M), and a control line 125 (125_1 to 125_M). ) Operates as a control device. The pixel cell control block 210 inputs a control signal to the pixel cells P (m, 1) to P (m, N) (1 ≦ m ≦ M) via each control line, and each switch element 111 (m, 1 ) To 111 (m, N) (1 ≦ m ≦ M), switch elements 112 (m, 1) to 112 (m, N) (1 ≦ m ≦ M), switch elements 113 (m, 1) to 113 ( m, N) (1 ≦ m ≦ M), switch elements 114 (m, 1) to 114 (m, N) (1 ≦ m ≦ M), switch elements 115 (m, 1) to 115 (m, N) ON / OFF of (1 ≦ m ≦ M) is controlled.

  The pixel cell control block 210 controls the opening and closing of the switch element 115 (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ N) via the control line 121 (121_1 to 121_M), thereby outputting An output signal of a pixel cell in a desired row is output from the line. For example, the pixel cell control block 210 sets the control line 121_3 in the third row so that the switch element 115 (3, n) (1 ≦ n ≦ N) connected to the control line 121_3 in the third row is turned on. If controlled, the output signals of the pixel cells P (3, n) (1 ≦ n ≦ N) in the third row are simultaneously output from all the output lines 141 (141_1 to 141_N). That is, output signals of pixel cells in a desired row can be output in parallel from all the output lines 141 (141_1 to 141_N).

  In addition, the pixel cell control block 210 includes a switch element via a control line 122 (122_1 to 122_M), a control line 123 (123_1 to 123_M), a control line 124 (124_1 to 124_M), and a control line 125 (125_1 to 125_M). 111 (m, 1) to 111 (m, N) (1 ≦ m ≦ M), switch element 112 (m, 1) to 112 (m, N) (1 ≦ m ≦ M), switch element 113 (m, 1) to 113 (m, N) (1 ≦ m ≦ M) and switch elements 114 (m, 1) to 114 (m, N) (1 ≦ m ≦ M) are controlled to open and close each pixel. A plurality of charge storage units (charge storage units 102 (m, 1) to 102 (m, N) (1 ≦ m ≦ M), charge storage units 103 (m, 1) to 103 (m, N ) (1 ≦ m ≦ M)) can be adjusted arbitrarily Also it is possible to perform appropriate charge transfer.

  That is, by appropriately controlling each row control line and column output line by the pixel cell control block 210, the photoelectric conversion array 200 can be operated in a global shutter system.

  The load current source 220 is connected to each pixel cell P (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ N) via the output line 141 (141_1 to 141_N). Supply the load current.

  In FIG. 4, a configuration in which a single load current source 220 is provided for the output lines 141 (141_1 to 141_N) in each column is shown as an example, but the number of load current sources is not particularly limited. For example, one load current source 220 (220_1 to 220_N) may be provided for each output line 141 (141_1 to 141_N) in each column.

  When a single load current source is provided, a plurality of bias transistors (not shown) included in the load current source are shared. When a plurality of load current sources 220 are provided, the plurality of bias transistors are shared among the load current sources.

  The noise cancellation & AD conversion array 230 outputs an output signal (141_1 to 141_N) output from an output line 141 (141_1 to 141_N) connected to each pixel cell P (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ N). Analog signal), and the output signal is converted into a digital image signal and output. For example, the noise cancellation & AD conversion array 230 outputs an output signal (analog signal) output from the output line 141 (141_1 to 141_N) connected to the pixel cells P (3, 1) to P (3, N) in the third row. ) At the same time, and the converted digital image signal in the third row can be output simultaneously.

  FIG. 4 shows an example in which a single noise cancellation & AD conversion array 230 is provided for the output lines 141 (141_1 to 141_N) in each column, but the number of noise cancellation & AD conversion arrays 230 is not particularly limited. . For example, one noise cancellation & AD conversion array 230 may be provided for each output line 141 (141_1 to 141_N) in each column.

  When a single noise cancellation & AD conversion array 230 is provided, a function for selecting a column in the noise cancellation & AD conversion array 230 can be added.

  As described above, in the photoelectric conversion array 200 in which a plurality of pixel cells are arranged in a matrix of M rows × N columns, each pixel cell has a portion for storing exposure charge and a portion for storing readout charge separately. (A plurality of charge storage portions are formed in each pixel cell), and a configuration in which exposure can be performed in parallel even while an output signal is being read out enables global shutter operation. Further, since exposure can be performed at the same time in all the pixel cells, in the photoelectric conversion array 200, simultaneity of image data can be ensured. That is, it is possible to provide a photoelectric conversion array that can ensure high sensitivity and data simultaneity.

<Operation of photoelectric conversion device (global shutter operation)>
FIG. 5 shows an example of a timing chart showing the control timing of the photoelectric conversion array 200 according to this embodiment. When the pixel cells P (m, 1) to P (m, N) (1 ≦ m ≦ M) are sequentially selected and the pixel cell P (m, n) is further selected, the control line 121_m and the control line 123_m are selected. , A timing chart of the control line 125_m and the output line 141_n is shown.

  For example, the high power supply potential 3.3V is supplied to the power supply line 131 (131_1 to 131_M), and the low power supply potential 0V is supplied to the power supply line 132 (132_1 to 132_M), for example.

  In the following description, the control line 122 (122_1 to 122_M) is the control line 122, the control line 124 (124_1 to 124_M) is the control line 124, the power line 131 (131_1 to 131_M) is the power line 131, The power line 132 (132_1 to 132_M) is the power line 132, the switch element 111 (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ N) is the switch element 111, and the switch element 113 (m, n) (1.ltoreq.m.ltoreq.M) (1.ltoreq.n.ltoreq.N) is the switch element 113, phototransistor 101 (m, n) (1.ltoreq.m.ltoreq.M) (1.ltoreq.n.ltoreq.N) is the phototransistor 101, and source follower. 104 (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ N) is the source follower 104 and node A (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ N) is the node A And node B (m, n) And 1 ≦ m ≦ M) (1 ≦ n ≦ N) to a Node B, denoted. The m-th control line 121 is output as a control line 121_m, the m-th control line 123 is output as a control line 123_m, the m-th control line 125 is output as a control line 125_m, and the n-th column output line 141 is output. This is represented as a line 141_n.

  In the timing chart shown in FIG. 5, each switch element is turned on when the signal waveform is at a high level, and each switch element is turned off when the signal waveform is at a low level.

(1) Start of reset operation First, at time t1, the control line 124 is set to the high level, and the switch element 111 is turned on. Further, the control line 122 is set to the high level, and the switch element 113 is turned on. When the switch element 111 and the switch element 113 are opened, the potential of the emitter of the phototransistor 101 and the potential of the node A become the potential of the power supply line 132, that is, the low power supply potential 0V. As a result, the base potential of the phototransistor 101 and the potential of the node A are reset (start of the reset operation).

(2) End of Reset Operation Next, at time t2, the control line 124 is set to low level, and the switch element 111 is turned off. Further, the control line 122 is set to a low level, and the switch element 113 is turned off. When the switch element 111 and the switch element 113 are closed, the reset operation of the base potential of the phototransistor 101 and the potential of the node A ends (end of the reset operation).

(3) Charge Accumulation of Phototransistor 101 Immediately after the end of the above operation (2), charges generated based on the intensity of light 200 applied to the phototransistor 101 are accumulated in the base of the phototransistor 101 (charge accumulation). period). In the charge accumulation period, the light intensity irradiated to the phototransistor 101 included in each pixel cell P (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ N) is a signal that the photoelectric conversion array 200 wants to acquire. Information.

(4) Charge Transfer Next, at time t3, the control line 124 is set to the high level, and the switch element 111 is turned on. By opening the switch element 111, the emitter of the phototransistor 101 is connected to the node A reset to the low power supply potential 0V.

  The charge accumulated at the base of the phototransistor 101 flows to the emitter of the phototransistor 101, and the amplified current amplified by the amplification function of the phototransistor 101 flows to the node A. As a result, the charge accumulated in the base of the phototransistor 101 is transferred to the charge accumulation unit 102 (node A).

(5) Charge Accumulation at Node A Next, at time t4, the control line 124 is set to a low level, and the switch element 111 is turned off. When the switch element 111 is closed, a charge having a correlation with the charge (light intensity) accumulated in the base of the phototransistor 101 is accumulated in the charge accumulation unit 102 (node A).

  Since the operations from (1) to (5) are simultaneously performed on all the pixel cells P (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ N), they are included in each pixel cell. In the node A, charges (signal information) based on the light intensity at the same time corresponding to the place where each pixel cell is arranged are accumulated.

  Next, an individual operation at the time of reading in the pixel cell P (m, n) in the m-th row and the n-th column will be described. Note that pixel cells P (m, 1) to P (m, N) (1 ≦ m ≦ M) arranged in each row other than the pixel cell P (m, n) at the time of reading are also from (6) below ( The operation is sequentially performed in the same flow up to 13).

(6) Start of Reset Operation First, at time tα1, the control line 123_m is set to a high level, and the switch element 114 (m, n) is turned on. When the switch element 114 (m, n) is opened, the potential of the node B (m, n) becomes the potential of the power supply line 132, that is, the low power supply potential 0V. Thereby, the potential of the node B (m, n) is reset (start of the reset operation).

(7) Connection between Source Follower and Output Line Next, at time tα2, the control line 121_n is set to the high level, and the switch element 115 (m, n) is turned on. When the switch element 115 (m, n) is opened, the source follower 104 (m, n) and the output line 141_n are connected. Thereby, the signal information of the pixel cell P (m, n) can be read out.

  The output lines 141 (141_1 to 141_N) are connected to the switch elements 115 (1, n) to the pixel cells P (1, n) to P (M, n) (1 ≦ n ≦ N) arranged in each column. 115 (M, n) (1 ≦ n ≦ N). Therefore, when the switching element 115 included in one pixel cell is controlled to be in a conductive state, the switching element 115 included in another pixel cell in the same column is controlled to be in a non-conductive state. For example, when the pixel cell P (3, n) is selected and the switching element 115 (3, n) included in the pixel cell P (3, n) is controlled to be in a conductive state, The switch elements 115 (1, n) to 115 (2, n) and the switch elements 115 (4, n) to 115 (M, n) included in the pixel cell are controlled so as to be in a non-conductive state.

(8) End of Reset Operation Next, at time tα3, the control line 123_m is set to a low level, and the switch element 114 (m, n) is turned off. When the switch element 114 (m, n) is closed, the reset operation of the potential of the node B (m, n) is completed (end of the reset operation). Note that the potential of the node B (m, n) is the sum of the potential reset by the operation of the above (6) and the potential generated by the effect of making the switch element 114 (m, n) nonconductive. It has become.

(9) Capture of output signal Next, after the operation of (8), the potential (output signal) is captured and held by the AD converter at a timing when the potential of the output line 141_n is stabilized. A part of the image signal of the pixel cell P (m, n) can be formed by capturing the output signal at the timing of resetting the potential of the node B (m, n).

(10) Charge Transfer Next, at time tα4, the control line 125_n is set to the high level, and the switch element 112 (m, n) is turned on. When the switch element 112 (m, n) is opened, the charge storage unit 102 (m, n) (node A (m, n)) and the charge storage unit 103 (m, n) (node B (m, n)) ) And are connected. Thereby, the electric charge accumulated in the node A (m, n) is transferred to the node B (m, n).

(11) Charge Accumulation at Node B Next, at time tα5, the control line 125_n is set to low level, and the switch element 112 (m, n) is turned off. By closing the switch element 112 (m, n), a charge having a correlation with the charge (light intensity) accumulated in the base of the phototransistor 101 (m, n) is accumulated in the node B (m, n). The

  This is because the node A (m, n) stores a charge correlated with the charge (light intensity) stored in the base of the phototransistor 101 (m, n). ), The charge having a correlation with the charge (light intensity) accumulated in the base of the phototransistor 101 (m, n) is also accumulated in the node B (m, n) to which the charge is transferred from the transistor. is there.

  That is, the potential of the node B (m, n) is the sum of the potential generated by the operation of (11) above and the potential generated by the effect of making the switch element 112 (m, n) nonconductive. It has become.

(12) Capture of output signal Next, after the operation of (11), the potential (output signal) is captured again by the AD converter and held at the timing when the potential of the output line 141_n is stabilized. A part of the image signal of the pixel cell P (m, n) can be formed by capturing the output signal at the timing when the electric charge is accumulated in the node B (m, n).

(13) Generation of Image Signal Next, the difference between the output signal captured by the operation (9) and the output signal captured by the operation (12) is obtained. The difference signal is an image signal of the pixel cell P (m, n).

  The photoelectric conversion array 200 is operated by operating all the pixel cells P (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ N) at the time of reading in the flow from (6) to (13). Obtains image signals of all the pixel cells P (m, n) (1 ≦ m ≦ M) (1 ≦ n ≦ N), and obtains a desired image signal. That is, a plurality of charge storage units are provided in each pixel cell, the charge stored in each charge storage unit is adjusted as appropriate, and appropriate charge transfer is performed, thereby causing the photoelectric conversion array 200 to operate in a global shutter system. be able to.

  As a result, it is possible to realize a high-sensitivity photoelectric conversion array that does not cause distortion in an image even when a subject operating at high speed is imaged.

  The preferred embodiment of the present invention has been described in detail above, but the present invention is not limited to the specific embodiment, and within the scope of the gist of the embodiment of the present invention described in the claims, Various modifications and changes are possible.

100 Photoelectric conversion device 101 Phototransistor 102 Charge storage unit (first charge storage unit)
103 Charge storage unit (second charge storage unit)
104 Source follower 111 1st switch element 112 2nd switch element 113 3rd switch element 114 4th switch element 115 5th switch element 141 Output line 200 Photoelectric conversion array

JP 2012-28975 A JP 2004-266597 A

Claims (4)

A phototransistor that detects light intensity and outputs a current according to the light intensity;
A first charge storage section for storing the current as a charge;
A first switch element for controlling connection between the phototransistor and the first charge storage unit by opening and closing;
A second charge storage unit to which the charge is transferred from the first charge storage unit;
A second switch element for controlling the connection between the first charge storage unit and the second charge storage unit by opening and closing;
A source follower for buffering the potential of the second charge storage unit;
A third switch element for resetting the potential of the first charge storage section;
A fourth switch element for resetting the potential of the second charge storage unit;
An output line for outputting the potential of the source follower;
A photoelectric conversion device comprising: a fifth switch element that controls connection between the source follower and the output line by opening and closing.   2. The photoelectric conversion device according to claim 1, wherein an output current of the phototransistor changes with an exponential function with respect to the light intensity.   2. The photoelectric conversion device according to claim 1, wherein an output current of the phototransistor changes with a power function with respect to the light intensity.   The photoelectric conversion array according to any one of claims 1 to 3, wherein the photoelectric conversion devices are arranged in a two-dimensional array.