JP2015111153A - Voltage detection circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce voltage detection time in a voltage detection circuit of a secondary battery with a flying capacitor.SOLUTION: A secondary battery is composed of a plurality of battery blocks B1-B3, and connected to a flying capacitor C1 via input-side sampling switches SW1-SW3. The flying capacitor C1 is connected to a differential amplifier circuit 10 via output-side sampling switches SWa, SWb. A feedback capacitor C2 is connected to an inverting input terminal of the differential amplifier circuit 10 to form an integration circuit, thereby reducing a capacity of the flying capacitor C1.

Description

  The present invention relates to a voltage detection circuit.

  An electric vehicle such as an electric vehicle or a hybrid vehicle that obtains a vehicle driving force by an electric motor is equipped with a secondary battery, and the electric motor is driven by electric power stored in the secondary battery. The electric vehicle has a function of braking by causing the motor to function as a generator during regenerative braking, that is, braking the vehicle, and converting the kinetic energy of the vehicle into electric energy. The converted electric energy is returned to the secondary battery and reused when acceleration is performed.

  If the secondary battery is overdischarged or overcharged, the battery performance deteriorates. Therefore, it is necessary to grasp the state of charge (SOC) of the secondary battery and control the charging or discharging. For example, in a hybrid vehicle, the charge state is set to a fully charged state (SOC = 100) so that the secondary battery can accept the regenerative power and can supply power to the motor immediately upon request. %) And the state in which no electricity is stored (SOC = 0%), and the vicinity of the middle (SOC = 50% to 60%). Therefore, it is necessary to detect the SOC of the secondary battery with high accuracy. For this purpose, it is necessary to accurately detect the voltage of the secondary battery.

  The voltage of the secondary battery can be detected using a flying capacitor. That is, a flying capacitor is connected to both ends of the secondary battery via an input side sampling switch, and a differential amplifier circuit is connected to the flying capacitor via an output side sampling switch. First, the input side sampling switch is turned on to hold the voltage of the secondary battery in the flying capacitor. Next, the input side sampling switch is turned off, the output side sampling switch is turned on, and the voltage stored in the flying capacitor is supplied to the non-inverting input terminal and the inverting input terminal of the differential amplifier circuit. By detecting the potential difference between the two input terminals, the voltage of the flying capacitor, that is, the voltage of the secondary battery is detected. Specifically, an output voltage from the differential amplifier circuit is supplied to an arithmetic circuit or a CPU (microcomputer), and the output voltage is read by the microcomputer.

Japanese Patent No. 3791767 JP 2009-63511 A JP 2007-205853 A

  In the voltage detection circuit using the flying capacitor, the storage voltage of the flying capacitor is detected. Therefore, when the capacity of the flying capacitor is increased, it takes time for the storage, and as a result, the voltage measurement time is also required. Therefore, in order to shorten the voltage measurement time, it is necessary to reduce the capacitance of the flying capacitor, but when the voltage is detected by the differential amplifier circuit (op amp), the charge accumulated in the flying capacitor is consumed quantitatively. Therefore, the capacitance of the flying capacitor cannot simply be reduced in consideration of the voltage detection accuracy.

  Further, when the secondary battery is configured by connecting a plurality of battery blocks in series, a plurality of input side sampling switches are connected between the secondary battery and the flying capacitor, and the plurality of input side sampling switches (multiplexers) are connected. ) Are selectively turned on and the battery blocks are sequentially connected to the flying capacitors. However, if an abnormality occurs in the input side sampling switch, the voltage of the secondary battery cannot be accurately detected.

  An object of the present invention is to reduce the capacitance of a capacitor while ensuring the voltage detection accuracy in a voltage detection circuit using the capacitor, thereby shortening the voltage measurement time.

  Another object of the present invention is to easily and quickly detect the occurrence of an abnormality when an abnormality occurs in the input side sampling switch (multiplexer).

  The present invention is a voltage detection circuit for a secondary battery, which is connected to both terminals of the secondary battery via an input-side sampling switch, and is charged by the secondary battery, and output to the main capacitor A differential amplifier circuit connected via a side sampling switch, the output terminal and the inverting input terminal of the differential amplifier circuit are connected by a sub-capacitor, and the main capacitor is connected to each other in series. 2 main capacitors, the differential amplifier circuit includes first and second differential amplifier circuits, and a connection node between the first main capacitor and the second main capacitor is set to a reference potential, and the first and second main capacitors are set. 2 is connected to the non-inverting input terminal of the differential amplifier circuit, and the terminal opposite to the connection node of the first main capacitor The second main capacitor is connected to an inverting input terminal of the second differential amplifier circuit, and is connected to the inverting input terminal of the second differential amplifier circuit. A circuit for calculating a difference between outputs of a dynamic amplifier circuit, a signal source for superimposing a frequency component on the first differential amplifier circuit and the second differential amplifier circuit, wherein the frequency component is superimposed A closed failure of the input side sampling switch is detected using a difference between outputs of the first differential amplifier circuit and the second differential amplifier circuit.

  In one embodiment of the present invention, the signal source is connected between the secondary battery and the input side sampling switch.

  In another embodiment of the present invention, the signal source is connected between the first and second main capacitors and the first and second differential amplifier circuits.

  In still another embodiment of the present invention, the signal source is a signal source of a leakage detection circuit.

  According to the present invention, the capacity of the main capacitor can be reduced by causing the differential amplifier circuit that detects the voltage of the main capacitor to function as an integration circuit, thereby shortening the voltage detection time.

  Further, according to the present invention, it is possible to detect an abnormality of the input side sampling switch with a simple configuration by supplying a frequency signal.

It is a basic circuit block diagram of an embodiment. It is a circuit block diagram of 1st Embodiment. It is a circuit block diagram of 2nd Embodiment. It is a circuit block diagram of 3rd Embodiment. It is a circuit block diagram of 4th Embodiment. It is a circuit block diagram of a modification. It is a circuit block diagram of the other modification. It is a circuit block diagram of the other modification.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

1. Basic Configuration FIG. 1 shows a basic circuit configuration of a flying capacitor type voltage detection circuit in this embodiment. The secondary battery is an assembled battery, and is configured by connecting a plurality of battery blocks in series. In the figure, battery blocks B1, B2, and B3 are exemplarily shown, but the number of battery blocks is not limited to this. Each battery block is configured by connecting a plurality of battery modules in series, and each battery module is configured by further connecting one or a plurality of single cells (cells) in series. The secondary battery is mounted on an electric vehicle such as an electric vehicle or a hybrid vehicle. The secondary battery is, for example, a nickel metal hydride battery or a lithium ion battery. In the present invention, the secondary battery is not limited to an assembled battery, and may be a single battery.

  Input side sampling switches SW1, SW2, SW3, and SW4 are connected to the battery blocks B1, B2, and B3 through buses, respectively. That is, the input side sampling switch SW1 is connected to the negative terminal of the battery block B1 via a bus, and the input side sampling switch SW2 is connected to the positive terminal of the battery block B1 and the negative terminal of the battery block B2 via the bus. The The input side sampling switch SW3 is connected to the positive terminal of the battery block B2 and the negative terminal of the battery block B3 via a bus. The input side sampling switch SW4 is connected to the positive terminal of the battery block B3 via a bus.

  The input side sampling switches SW1 and SW3 are both connected to one terminal of a flying capacitor C1 as a main capacitor, and the input side sampling switches SW2 and SW4 are both connected to the other terminal of the flying capacitor C1 via a resistor R. The The input side sampling switches SW1 to SW4 are constituted by multiplexers.

  One terminal of the flying capacitor C1 is connected to the non-inverting input terminal (+) of the differential amplifier circuit (op-amp) 10 via the output side sampling switch SWa, and the other terminal of the flying capacitor C1 is the output side sampling switch. It is connected to the inverting input terminal (−) of the differential amplifier circuit 10 through SWb and the resistor R. A reference power supply Vcc is connected to the non-inverting input terminal of the differential amplifier circuit 10. A feedback capacitor C2 as a sub capacitor is connected to the inverting input terminal of the differential amplifier circuit 10. A configuration in which a feedback capacitor is connected to the inverting input terminal of the differential amplifier circuit 10 is known as an integrating circuit. The output of the differential amplifier circuit 10 is supplied to an arithmetic circuit (or CPU) 12 having an analog / digital converter A / D.

  In such a configuration, the voltages of the battery blocks B1 to B3 are sequentially detected. That is, first, when detecting the voltage of the battery block B1, SW1 and SW2 are turned on, and the other switches are turned off. Thereby, the flying capacitor C1 is charged by the voltage of the battery block B1, and the voltage of the battery block B1 is held. After charging the flying capacitor C1, the flying capacitor C1 and the differential amplifier circuit 10 are connected by turning off the SW1 and SW2 and turning on the output side sampling switches SWa and SWb. The voltage of the battery block B1 is detected in a state where 10 is electrically disconnected. That is, a known reference power supply voltage is input to the non-inverting input terminal of the differential amplifier circuit 10, and a voltage obtained by integrating the voltage of the flying capacitor C1 is input to the inverting input terminal of the differential amplifier circuit 10. The voltage is supplied to the circuit 12 and the voltage of the battery block B1 is detected.

  When the voltage of the battery block B2 is detected, SW2 and SW3 are turned on to charge the flying capacitor C1, and then SW2 and SW3 are turned off and SWa and SWb are turned on. To detect the voltage of the battery block B2. When the voltage of the battery block B1 is detected, the voltage of the flying capacitor C1 is integrated by an integrating circuit. Therefore, the flying capacitor C1 is discharged in this process, and prior to detecting the voltage of the next battery block B2, It is not necessary to discharge the flying capacitor C1 separately. This is one of the advantages of using an integration circuit. When the voltage of the battery block B3 is detected, SW3 and SW4 are turned on to charge the flying capacitor C1, and then SW3 and SW4 are turned off and SWa and SWb are turned on. The voltage of block B3 is detected.

  As described above, the flying capacitor type voltage detection circuit of the present embodiment has a configuration in which the differential amplifier circuit 10 that detects the storage voltage of the flying capacitor C1 functions as a part of the integration circuit. It is possible to reduce the consumption of charges accumulated in C1. Therefore, in the past, it was difficult from the viewpoint of detection accuracy to reduce the capacitance of the flying capacitor C1 due to charge consumption in the differential amplifier circuit 10, but in this embodiment, the flying capacitor is maintained while maintaining the detection accuracy. The capacity of C1 can be reduced, and as a result, the voltage detection time is shortened compared to the conventional case. In addition, since the storage voltage of the flying capacitor C1 is detected by the integrating circuit, the process of discharging the flying capacitor C1 in advance for the next charging of the flying capacitor C1 becomes unnecessary.

  A feature of the present embodiment is that a differential amplifier circuit for detecting the voltage of the flying capacitor C1 functions as a part of the integrating circuit, and the number of flying capacitors C1 is arbitrary and a plurality of them connected in series with each other. The flying capacitor may be provided. Further, when a plurality of flying capacitors are provided, a plurality of differential amplifier circuits that detect the respective voltages corresponding to the respective flying capacitors may be provided. In this case, the plurality of differential amplifier circuits are respectively integrated. It functions as a part of the circuit. The advantage of having multiple differential amplifier circuits is that even if common noise peculiar to the system on which the voltage detection circuit is mounted is mixed in the voltage detection circuit, the common noise is similarly applied to each output of the multiple differential amplifier circuits. Therefore, the common noise can be removed by calculating these differences, and the voltage detection accuracy is improved.

  Next, the configuration of the present embodiment will be described in more detail.

2. First Embodiment FIG. 2 shows a circuit configuration diagram of a flying capacitor type voltage detection circuit according to a first embodiment. The assembled battery is configured by connecting a plurality of battery blocks B1, B2,. The resistor R1 and the input side sampling switch SW1 are connected to the negative terminal of the battery block B1 via the bus VB1, and the resistor R2 and the input side sampling switch SW2 are connected to the positive terminal of the battery block B1 via the bus VB2. . The resistor R2 and the input side sampling switch SW2 are connected to the negative terminal of the battery block B2 via the bus VB2, and the resistor R3 and the input side sampling switch SW3 are connected to the positive terminal of the battery block B2 via the bus VB3. . The same applies to the following. The resistor R14 and the input side sampling switch SW14 are connected to the negative terminal of the battery block B14 via the bus VB14. The resistor R15 and the input side sampling switch are connected to the positive terminal of the battery block B14 via the bus VB15. SW15 is connected. The resistors R1 to R15 function as current limiting resistors that limit the energization current.

  Of the input side sampling switches SW1 to SW15, the even-numbered switches SW2, SW4, SW6,..., SW14 are commonly connected to one terminal of the flying capacitor C1. The odd-numbered switches SW1, SW3, SW5,... SW15 are commonly connected to the other terminal of the flying capacitor C1.

  One terminal of the flying capacitor C1 is connected to the non-inverting input terminal of the differential amplifier circuit 10 via the output side sampling switch SWa, and the other terminal of the flying capacitor C1 is connected to the differential amplifier circuit 10 via the resistor R19. Connected to the inverting input terminal. A reference power supply Vcc is connected to the non-inverting input terminal of the differential amplifier circuit 10, and a feedback capacitor C2 is connected to the inverting input terminal of the differential amplifier circuit 10 to constitute an integrating circuit. Further, the resistor R21 and the switch SWc are connected in parallel with the feedback capacitor C2, and the integration circuit can be selectively operated by turning on / off the switch SWc. The output of the differential amplifier circuit 10 is connected to the arithmetic circuit 12 including A / D.

  In such a configuration, when detecting the voltage of the battery block B1, the SW1 and SW2 are turned on, the other input side sampling switches are turned off, and the flying capacitor C1 is charged with the voltage of the battery block B1. Hold the voltage of B1. Next, SW1 and SW2 are turned off, SWa and SWb are turned on, SWc is turned off, and the voltage of the flying capacitor C1 is detected by the differential amplifier circuit 10 and output to the arithmetic circuit 12. Thereafter, the voltages of the battery blocks B1 to B14 are sequentially detected in the same manner.

  Since the voltage is detected using the integration circuit, the quantitative current consumption is reduced, and the capacitance of the flying capacitor C1 can be reduced. The applicant of the present application is that the capacity of the flying capacitor C1 of this embodiment can be reduced to about 1/20 of the capacity of the conventional flying capacitor C1, and the voltage detection time per battery block can be reduced to about 1/4 of the conventional capacity. I have confirmed.

3. Second Embodiment FIG. 3 shows a circuit configuration diagram of the present embodiment. The difference from FIG. 2 is that flying capacitors C11 and C12 are provided as flying capacitors which are main capacitors, and differential amplifier circuits 10a, 10b and 10c are provided as differential amplifier circuits.

  Among the input side sampling switches SW1 to SW15, odd-numbered switches SW1, SW3,... SW15 are commonly connected to one terminal of the flying capacitor C11. The other terminal of the flying capacitor C11 is connected to one terminal of the flying capacitor C12. The even-numbered switches SW2, sW4,... SW14 are commonly connected to the other terminal of the flying capacitor C12.

  The flying capacitors C11 and C12 are connected in series, and the connection nodes of the flying capacitors C11 and C12 are connected to the non-inverting input terminal of the differential amplifier circuit 10a and the non-inverting input terminal of the differential amplifier circuit 10b via the output side sampling switch SWa. Connected. The terminal opposite to the connection node of the flying capacitor C11 is connected to the inverting input terminal of the differential amplifier circuit 10a. Further, the terminal opposite to the connection node of the flying capacitor C12 is connected to the inverting input terminal of the differential amplifier circuit 10b.

  Both the non-inverting input terminal of the differential amplifier circuit 10a and the non-inverting input terminal of the differential amplifier circuit 10b are connected to the reference power supply Vcc, and further connected to the non-inverting input terminal of the differential amplifier circuit 10c via the resistor R21. . Further, a feedback capacitor C21 as a sub-capacitor is connected to the inverting input terminal of the differential amplifier circuit 10a to constitute an integrating circuit, and a feedback capacitor C22 is also connected to the inverting input terminal of the differential amplifier circuit 10b. Configure. The feedback capacitor C21 and the feedback capacitor C22 are respectively connected in parallel with a resistor 18 and a switch SWd, and a resistor R19 and a switch SWe, and each integrating circuit is configured to be selectively operable. The output of the differential amplifier circuit 10a is connected to the inverting input terminal of the differential amplifier circuit 10c via the resistor R20, and the output of the differential amplifier circuit 10b is connected to the non-inverting input terminal of the differential amplifier circuit 10c via the resistor R22. Connected. The output of the differential amplifier circuit 10c is connected to the arithmetic circuit 12 including A / D.

  In such a configuration, when detecting the voltage of the battery block B1, SW1 and SW2 are turned on, the other input side sampling switches are turned off, and the flying capacitors C11 and C12 are charged by the voltage of the battery block B1.

  Next, SW1 and SW2 are turned off, and the output side sampling switches SWa, SWb, and SWc are turned on. Then, the stored voltage of the flying capacitor C11 is detected by the differential amplifier circuit 10a and supplied to the inverting input terminal of the differential amplifier circuit 10c. The stored voltage of the flying capacitor C12 is detected by the differential amplifier circuit 10b and supplied to the non-inverting input circuit of the differential amplifier circuit 10c. If the capacitances of the flying capacitors C11 and C12 are the same, the output voltage from the differential amplifier circuit 10a and the output voltage from the differential amplifier circuit 10b are substantially the same (signs are inverted), and the detection system has a common mode. When noise exists, common mode noise is mixed in both the output of the differential amplifier circuit 10a and the output of the differential amplifier circuit 10b, but the differential amplifier circuit 10c calculates the difference between both signals. Therefore, common mode noise is removed. As described above, the sum of the storage voltage of the flying capacitor C11 and the storage voltage of the flying capacitor C12, that is, the voltage of the battery block B1 is detected and supplied to the arithmetic circuit 12. The same applies to other battery blocks.

4). Third Embodiment In the second embodiment described above, the difference between two signals is calculated by the differential amplifier circuit 10c, but this part can also be processed by the arithmetic circuit 12 in software. FIG. 4 shows a circuit configuration in this case. The difference from FIG. 3 is that the differential amplifier circuit 10c does not exist, and the arithmetic circuit 12 executes the difference calculation of the two signals. According to this embodiment, it is possible to reduce the number of parts while removing common mode noise and improving detection accuracy.

5. Fourth Embodiment In each of the above embodiments, the input side sampling switches SW1, SW2,... Are sequentially switched on and off to detect the voltages of the battery blocks B1, B2,. When an abnormality occurs in the side sampling switches SW1, SW2,..., For example, when a failure that closes, that is, continues in an on state, occurs, a current limiting resistor connected in series to the input side sampling switch The sampling switch constitutes a short circuit, the current limiting resistor and the input side sampling switch are heated or destroyed, and the voltage of the battery block cannot be detected normally. As a result, the state of the battery block and the battery pack May be misjudged.

  Therefore, in the present embodiment, a configuration for detecting a closed failure of the input side sampling switches SW1, SW2,.

  FIG. 5 shows a circuit configuration diagram of the present embodiment. The basic configuration is the configuration of FIG. 4, which is shown in a simplified manner.

  That is, the battery blocks B1, B2, B3 are connected in series with each other, the negative terminal of the battery block B1 is connected to the input side sampling switch SW1 via the bus, and the positive terminal of the battery block B1 and the negative terminal of the battery block B2 Is connected to the input side sampling switch SW2 via a bus. The input side sampling switch SW3 is connected to the positive terminal of the battery block B2 and the negative terminal of the battery block B3 via a bus, and the input side sampling switch SW4 is connected to the positive terminal of the battery block B3 via the bus. Both SW2 and SW4 are commonly connected to one terminal of the flying capacitor C11, and the other terminal of the flying capacitor C11 is connected to one terminal of the flying capacitor C12. Flying capacitors C11 and C12 are connected in series with each other. Both SW1 and SW3 are commonly connected to the other terminal of the flying capacitor C12.

  A connection node between the flying capacitors C11 and C12 is connected to a reference power supply Vcc via an output side sampling switch SWa, and further connected to non-inverting input terminals of the differential amplifier circuits 10a and 10b. One terminal of the flying capacitor C11 is connected to the inverting input terminal of the differential amplifier circuit 10a via the output side sampling switch SWb and the resistor R1. The other terminal of the flying capacitor C12 is connected to the inverting input terminal of the differential amplifier circuit 10b via the output side sampling switch SWc and the resistor R2. A feedback capacitor C21 is connected to the inverting input terminal of the differential amplifier circuit 10a to configure an integrating circuit, and a feedback capacitor C22 is also connected to the inverting input terminal of the differential amplifier circuit 10b to configure an integrating circuit. The outputs of the differential amplifier circuits 10a and 10b are connected to the arithmetic circuit 12. The arithmetic circuit 12 includes an A / D that converts the outputs of the differential amplifier circuits 10a and 10b into digital signals, respectively, and removes common mode noise by calculating the difference between the two signals.

  On the other hand, apart from such a flying capacitor type voltage detection circuit, a leakage detection circuit 14 is provided in the system to detect leakage in the system. The leakage detection circuit includes a transmitter 14a that transmits a frequency signal and a receiver 14b that receives the frequency signal. When there is no leakage, the receiver receives a frequency signal of a certain strength, but if any leakage occurs in the system, the received strength changes, and by detecting this strength change, Detect the presence or absence.

  In the present embodiment, this leakage detection circuit 14 is used to connect the leakage detection circuit 14 to the flying capacitor type voltage detection circuit. That is, the transmitter 14a of the leakage detecting circuit 14 is connected between the negative terminal of the battery block B1 and the input side sampling switch SW1 via the resistor R3 and the capacitor C5, and the frequency signal from the transmitter 14a is connected to the voltage detecting circuit. Supply.

  In the normal state where the input side sampling switches SW1 to SW4 are not closed, as described above, the output of the differential amplifier circuit 10a and the output of the differential amplifier circuit 10b are substantially the same (the sign is inverted). However, when any of the input side sampling switches SW1 to SW4 is closed, the impedance of the voltage detection circuit changes, and the output of the differential amplifier circuits 10a and 10b differs depending on the frequency signal from the transmitter 14a. Specifically, when all of the input side sampling switches SW1 to SW4 are operating normally, when the SW1 and SW2 are turned on to detect the voltage of the battery block B1, the capacitances of the flying capacitors C11 and C12 are Although the differential amplifier circuits 10a and 10b are symmetrical with each other and have the same impedance as the same, for example, when SW3 is closed, the impedance of the circuit to which SW3 is connected changes, and the differential amplifier circuit The symmetry of 10a and 10b is broken and the output voltage is different. The arithmetic circuit 12 detects a closed failure of the input side sampling switches SW1 to SW4 by detecting a difference in the outputs of the differential amplifier circuits 10a and 10b.

  The transmitter 14a can transmit any signal as long as it has a frequency component. For example, any of a rectangular wave, a sine wave, a triangular wave, and a pulse wave can be used.

  Note that Japanese Patent Application Laid-Open No. 2009-42080 discloses a signal generator that applies common mode noise to a flying capacitor circuit, and focuses on the deterioration of the filter characteristics when a differential amplifier circuit fails. Thus, it is disclosed that the output voltage of the differential amplifier circuit is not sufficiently attenuated to detect a failure of the differential amplifier circuit. However, as in the present embodiment, the input side sampling switches SW1, SW2, It is not disclosed at all about the closed fault of... And it is not that the fault is detected by paying attention to the difference between the output voltages of the two differential amplifier circuits 10a and 10b as in this embodiment. Keep it.

6). Other Modifications In the configuration shown in FIG. 5, the leakage detection circuit 14 provided in the system is used to detect the closed failure of the input side sampling switches SW1, SW2,. Instead of the circuit 14, another signal source may be connected to the voltage detection circuit.

  FIG. 6 shows a modification of FIG. Instead of the leakage detection circuit 14, a transmitter 16 is provided and connected between the battery block B1 and the input side sampling switch SW1 via the capacitor C5. The transmitter 16 supplies a frequency signal in the same manner as the transmitter 14a. The frequency signal may be a rectangular wave, a sine wave, a triangular wave, or a pulse wave.

  FIG. 7 shows another modification of FIG. A transmitter 18 is provided in place of the leakage detection circuit 14 and is connected between the output side sampling switch SWb and the resistor R1 via the capacitor C5, and between the output side sampling switch SWc and the resistor R2 via the capacitor C6. It is the structure connected to. The transmitter 18 supplies a frequency signal similarly to the transmitter 14a.

  FIG. 8 shows still another modification of FIG. In this configuration, a transmitter 20 is provided instead of the leakage detection circuit 14 and connected between the connection node of the flying capacitors C11 and C12 and the output side sampling switch SWa via the capacitor C5. The transmitter 20 supplies a frequency signal similarly to the transmitter 14a.

  As mentioned above, although embodiment of this invention was described, this invention is not limited to these, Furthermore, another modification is also possible.

  For example, in FIGS. 6 to 8, frequency signals are supplied from the transmitters 16, 18, and 20, but the signals to be supplied are not necessarily periodic, and are signals having frequency components other than DC signals. Any configuration may be used as long as common mode noise is supplied.

  In the configuration of FIG. 5, the leakage detection circuit 14 may be connected between the output side sampling switches SWb and SWc and the differential amplifier circuits 10a and 10b as shown in FIG. 6 to 8, the transmitters 16, 18, and 20 are not provided, but the frequency component is superimposed on the reference power supply Vcc connected to the non-inverting input terminals of the differential amplifier circuits 10a and 10b. It is good.

Further, the connection location of the transmitter is not limited to the above embodiment, and the frequency component can be superimposed on the differential amplifier circuits 10a and 10b when all of the input side sampling switches SW1 to SW4 are operating normally. If it is.

In the above embodiment, the equivalent frequency components are superimposed on the differential amplifier circuits 10a and 10b. However, different values may be superimposed. In that case, voltage measurement and closed fault detection may be performed in consideration of the influence of the superimposed frequency.

  10, 10a, 10b, 10c Differential amplification circuit, 12 arithmetic circuit, 14 leakage detection circuit, 16, 18, 20 Transmitter. C1, C2, C11, C12 Flying capacitor (main capacitor), C2, C21, C22 Feedback capacitor (sub capacitor).

Claims (4)

A voltage detection circuit for a secondary battery,
A main capacitor connected to both terminals of the secondary battery via an input-side sampling switch and charged by the secondary battery;
A differential amplifier circuit connected to the main capacitor via an output side sampling switch;
With
The output terminal and the inverting input terminal of the differential amplifier circuit are connected by a sub capacitor,
The main capacitor includes first and second main capacitors connected in series to each other,
The differential amplifier circuit includes first and second differential amplifier circuits,
A connection node between the first main capacitor and the second main capacitor is set to a reference potential and is connected to a non-inverting input terminal of the first and second differential amplifier circuits.
The terminal opposite to the connection node of the first main capacitor is connected to the inverting input terminal of the first differential amplifier circuit,
A terminal opposite to the connection node of the second main capacitor is connected to an inverting input terminal of the second differential amplifier circuit, and
A circuit for calculating a difference between outputs of the first differential amplifier circuit and the second differential amplifier circuit;
A signal source for superimposing a frequency component on the first differential amplifier circuit and the second differential amplifier circuit;
With
A voltage detection circuit that detects a closed failure of the input side sampling switch using a difference between outputs of the first differential amplifier circuit and the second differential amplifier circuit when the frequency component is superimposed. The voltage detection circuit according to claim 1, wherein
The voltage detection circuit, wherein the signal source is connected between the secondary battery and the input side sampling switch. The voltage detection circuit according to claim 1, wherein
The voltage detection circuit, wherein the signal source is connected between the first and second main capacitors and the first and second differential amplifier circuits. In the voltage detection circuit in any one of Claims 1-3,
The voltage detection circuit, wherein the signal source is a signal source of a leakage detection circuit.

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