JP2015100099A - Imaging apparatus and fixed pattern noise cancellation method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-luminance video signal by cancelling light-time FPN from a video signal.SOLUTION: During dark-time FPN acquisition processing, a frame memory circuit 21 performs addition averaging upon signal values of video signals in light shielding and stores the signal value for each pixel. During light-time FPN acquisition processing, a frame memory circuit 24 performs addition averaging on results subtracting the signal values in light shielding from video signals of uniform light and stores a result for each pixel as a signal value of the uniform light, and a control part performs addition averaging upon the stored signal values of the uniform light over an entire image and stores a signal value of a signal level sin a memory 25. During FPN cancellation processing, a multiplier 27 multiplies a result of subtracting the signal value in light shielding from a signal value of the video signal in an input video image and a result of dividing the signal value of the signal level swith the signal value of the uniform light. Thus, a true signal value (s) can be obtained by cancelling both dark-time FPN and light-time from the video signal, and light-time FPN depending on the signal level of the video signal can be cancelled from the video signal.

Description

  The present invention relates to an imaging technique, and more particularly to an imaging apparatus and method for removing multiplicative fixed pattern noise depending on a video signal level included in a video signal.

  In general, there are two types of noise included in a video signal output from an image sensor: random noise that varies with time and fixed pattern noise that does not vary with time (hereinafter referred to as “FPN”). These noises are generated in the image sensor. A general FPN is constant regardless of the amount of light incident on the image sensor. However, in an actual image sensor, an FPN (hereinafter referred to as “light-time FPN”) generated by the incidence of light and the light. There is an FPN that does not depend on the amount of incident light and is present even when the light is blocked (hereinafter referred to as “dark FPN”).

  Since the former random noise has no regularity, it is difficult to suppress the noise on the video signal in a state where the resolution and image quality are not deteriorated. To improve this, it is necessary to improve the performance of the image sensor itself. It becomes.

  On the other hand, since the latter FPN has regularity, noise can be removed or suppressed by signal processing based on the regularity. As for general dark FPN, as disclosed in Patent Document 1, a plurality of frames of a video signal at the time of shading are averaged and stored in a frame memory, and the noise is obtained by subtracting the average value from the video signal. Can be removed or suppressed. In this case, since the random noise component is suppressed by calculating the addition average value, only the dark-time FPN component is stored in the frame memory.

  Since the bright FPN depends on the incidence of light on the image sensor, a video signal in a state where uniform light is irradiated onto the imaging surface of the image sensor is stored in the frame memory as in Patent Document 2, and the video signal The noise can be suppressed by subtracting from (hereinafter referred to as the first bright-time FPN removal method). Similar to the dark time FPN, the random noise component is suppressed by calculating the addition average value when stored in the frame memory.

  As described above, in the FPN removal process of the conventional imaging apparatus, the FPN is removed by subtracting the dark FPN and the bright FPN from the video signal. In other words, the FPN removal circuit provided in the conventional imaging device adds and averages a plurality of frames of the video signal at the time of light shielding, and stores the added average value in the frame memory as the dark FPN and uniformly on the imaging surface of the imaging device. A plurality of frames of the video signal are added and averaged in a state where the light is irradiated, and the added average value is stored in the frame memory as a bright FPN. Then, the FPN removal circuit subtracts the dark FPN and the bright FPN stored in the frame memory from the video signal.

  In addition, as in Patent Document 3, a method of storing bright FPN that changes depending on luminance in a plurality of frame memories and selecting an appropriate frame memory according to a signal value from an image sensor to suppress the bright FPN is also available. It has been proposed (hereinafter referred to as a second bright-time FPN removal method). Specifically, the plurality of frames of the video signal are first averaged and stored in the first frame memory in a state where the low-brightness uniform light is irradiated on the imaging surface of the imaging device, and then the imaging surface of the imaging device. A plurality of frames of the video signal are added and averaged and stored in the second frame memory in a state in which high-luminance uniform light is irradiated on the frame, and one of the frame memories is selected according to the signal value of the video signal, The value stored in the memory is subtracted from the video signal.

JP-A-11-177891 JP-A-5-30350 JP 2006-60292 A

ｓはオフセットを含まない真の信号値、ｎ₁は暗時ＦＰＮ成分、ｄ₁は黒のオフセットレベル、Ｎ₂（ｓ）は明時ＦＰＮ成分である。 Here, the signal value I (s) of the video signal including the dark-time FPN component and the bright-time FPN component for the video signal output by the imaging device of the imaging device is expressed by the following equation. Here, random noise is not considered.

s is a true signal value including no offset, n ₁ is a dark FPN component, d ₁ is a black offset level, and N ₂ (s) is a light FPN component.

That is, the bright-time FPN component to be removed from the video signal is the fourth term N ₂ (s) on the right side of the equation (1), which is a function depending on the value of the true signal level s of the video signal. .

When the formula (1) is modified, the following formula is obtained.

In the conventional imaging apparatus, in the first bright-time FPN removal method (the method of Patent Document 2) described above, the addition average value in a state where the imaging surface of the imaging element is irradiated with uniform light of the signal level s ₂ is obtained. I decided to consider it as FPN. However, since the bright time FPN changes according to the signal level s of the video signal, if the difference between the true signal level s of the video signal and the signal level s ₂ of the uniform light increases, There is a problem that the effect of removal is weakened and FPN is added to the black offset level.

  In the second bright-time FPN removal method (the method of Patent Document 3) described above, a plurality of frame memories corresponding to two types of brightness uniform light are prepared. An appropriate frame memory is selected according to the value I (s) to correct the bright FPN. However, with this method, only two types of brightness can be supported, and a large number of frame memories must be prepared in order to support various brightnesses. The bright FPN changes according to the true signal level s for each pixel of the video signal. If the bright FPN is included in the signal value I (s) of the video signal itself, the bright FPN is true. Since the signal level s is unknown, the correct bright-time FPN corresponding to the true signal level s cannot be obtained. On the contrary, this correction processing can cause noise.

  As described above, the bright FPN depends on the true signal level s of the video signal. However, the conventional imaging apparatus can remove the bright FPN depending on the true signal level s of the video signal. Therefore, the signal value of the video signal with high accuracy could not be calculated.

  Accordingly, the present invention has been made to solve the above-described problems, and an object of the present invention is to provide an imaging apparatus and a fixed pattern that can obtain a video signal with high accuracy when removing bright FPN from the video signal. It is to provide a noise removal method.

  In order to achieve the above object, an imaging apparatus according to the present invention includes an imaging device that converts the amount of incident light into an electrical video signal, and a fixed pattern noise that is removed from the video signal output by the imaging device. In the image pickup apparatus including the pattern noise removal circuit, the fixed pattern noise removal circuit includes a first memory that accumulates a signal value of the image signal at the time of light shielding for each pixel of the image pickup device, and a uniform light image signal. A second memory for storing, for each pixel, a signal value of a subtraction result obtained by subtracting a signal value of the video signal at the time of shading from a signal value; and a signal value of uniform light for all pixels in the signal value of uniform light A third memory that accumulates the average value as a signal value of the signal level of uniform light in all pixels, and a video signal at the time of shading that is accumulated in the first memory from the signal value of the video signal of the input video A subtractor for subtracting a signal value; a divider for dividing the signal value of the uniform light signal level stored in the third memory by the signal value of the uniform light stored in the second memory; A multiplier that multiplies the result of subtraction by the result of subtraction by the divider and outputs the result of the multiplication as a signal obtained by removing fixed pattern noise from the video signal of the input video. And

  In addition, an imaging apparatus according to the present invention includes an imaging device that converts the amount of incident light into an electrical video signal, and a fixed pattern noise removal circuit that removes fixed pattern noise from the video signal output by the imaging device. In the imaging apparatus, the fixed pattern noise removing circuit includes a first memory for storing the signal value of the image signal at the time of light shielding for each pixel of the image sensor, and the signal value of the image signal of uniform light from the signal value at the time of light shielding. A second memory for storing the signal value of the subtraction result obtained by subtracting the signal value of the video signal for each pixel as a signal value of uniform light, and the average value of all pixels in the signal value of uniform light, A third memory for storing the signal value of the uniform light signal level in the second memory, wherein the second memory further stores the signal value of the uniform light signal level stored in the third memory in advance. The result of dividing by the signal value of uniform light is accumulated for each pixel, and the fixed pattern noise removal circuit further stores the video signal at the time of shading stored in the first memory from the signal value of the video signal of the input video. A subtractor for subtracting the signal value of the input signal, and the result of subtraction by the subtracter is multiplied by the result of division accumulated in the second memory, and the result of the multiplication is calculated from the video signal of the input video as a fixed pattern noise. And a multiplier that outputs the signal as a removed signal.

  In addition, an imaging apparatus according to the present invention includes an imaging device that converts the amount of incident light into an electrical video signal, and a fixed pattern noise removal circuit that removes fixed pattern noise from the video signal output by the imaging device. In the imaging apparatus, the fixed pattern noise removing circuit includes a first memory for storing the signal value of the image signal at the time of light shielding for each pixel of the image sensor, and the signal value of the image signal of uniform light from the signal value at the time of light shielding. The signal value of the subtraction result obtained by subtracting the signal value of the video signal is the signal value of uniform light for each pixel, and the average value of all pixels in the signal value of uniform light is the signal level of uniform light in all pixels. As a signal value, a result of dividing the signal value of the uniform light signal level by the signal value of the uniform light is stored in a fourth memory for each pixel, and the signal value of the video signal of the input video is used for the first signal. A subtractor for subtracting the signal value of the video signal stored in memory at the time of shading, and the result of subtraction by the subtracter is multiplied by the division result stored in the fourth memory, and the result of the multiplication is And a multiplier that outputs a signal obtained by removing fixed pattern noise from the video signal of the input video.

  In the imaging apparatus according to the present invention, the third memory may uniformly calculate an average value of the signal values of the uniform light accumulated in the second memory for a predetermined area centered on the pixel for each pixel. It accumulates as a signal value of the signal level of light.

  In the image pickup apparatus according to the present invention, the third memory may be an average of the divided areas in the signal value of the uniform light accumulated in the second memory for each predetermined divided area obtained by dividing the area of all pixels. The value is stored as a signal value of a uniform light signal level.

  In the image pickup apparatus according to the present invention, the third memory may be an average of the divided areas in the signal value of the uniform light accumulated in the second memory for each predetermined divided area obtained by dividing the area of all pixels. A value is calculated, and for each pixel, a signal value obtained by linearly interpolating an average value of a predetermined number of adjacent divided regions is accumulated as a signal value of a uniform light signal level.

  Furthermore, the fixed pattern noise removal method according to the present invention includes an image sensor that converts the amount of incident light into an electrical video signal, and a fixed pattern noise removal that removes the fixed pattern noise from the video signal output by the image sensor. In a fixed pattern noise removal method in an image pickup apparatus including a circuit, a first step of storing a signal value of a video signal at the time of shading in a first memory for each pixel of the image sensor, and a uniform light video signal A second step of subtracting a signal value of the video signal at the time of shading from a signal value and storing the signal value of the subtraction result in a second memory as a uniform light signal value for each pixel; and the uniform light A third step of accumulating the average value of all the pixels in the signal value in the third memory as a signal value of the uniform light signal level in all the pixels, and a signal of the video signal of the input video The fourth step of subtracting the signal value of the image signal at the time of shading accumulated in the first memory from the second step, and the signal value of the signal level of the uniform light accumulated in the third memory as the second value. A fifth step of dividing by the signal value of the uniform light accumulated in the memory; and a subtraction result obtained by the fourth step is multiplied by a division result obtained by the fifth step, and the result of the multiplication is obtained by the input video. And a sixth step of outputting as a signal obtained by removing fixed pattern noise from the video signal.

  As described above, according to the present invention, the dark FPN can be removed from the video signal, and the bright FPN depending on the level of the video signal can be removed. Therefore, a highly accurate video signal can be obtained, and the image quality of the video signal can be improved in the imaging apparatus.

It is the schematic which shows the structure of the imaging device by embodiment of this invention. 3 is a block diagram illustrating a configuration of an FPN removal circuit according to Embodiment 1. FIG. 6 is a flowchart illustrating processing of an FPN removal circuit according to the first embodiment. It is a flowchart which shows the detail of dark time FPN acquisition process (step S301). It is a flowchart which shows the detail of a light time FPN acquisition process (step S302). It is a flowchart which shows the detail of a FPN removal process (step S303). It is a figure which shows the data flow of a dark time FPN acquisition process (step S301). It is a figure which shows the data flow of a light time FPN acquisition process (step S302). It is a figure which shows the data flow of a FPN removal process (step S303). FIG. 6 is a block diagram illustrating a configuration of an FPN removal circuit according to a second embodiment. FIG. 10 is a diagram illustrating a process of calculating a signal value s ₂ for each divided region in the bright-time FPN acquisition process (step S302) of the fourth embodiment. FIG. 10 is a diagram illustrating a process of calculating a signal value s ₂ linearly interpolated for each pixel in the bright-time FPN acquisition process (step S302) of the fifth embodiment.

これを前記式（１）に代入して、真の信号レベルｓについて解くと、以下の式を導出することができる。

前述のとおり、Ｉ（ｓ）は、暗時ＦＰＮ成分及び明時ＦＰＮ成分を含む映像信号の信号値であり、ｓはオフセットを含まない真の信号値、ｎ₁は暗時ＦＰＮ成分、ｄ₁は黒のオフセットレベル、ｎ₂は信号レベルｓ₂のときの明時ＦＰＮ成分である。 Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the drawings.
[Outline of the Invention]
First, an outline of the present invention will be described. In the equation (1) showing the process of removing the FPN in the image sensor of a general imaging device, it is assumed that the bright FPN is proportional to the signal value, and the bright FPN when the uniform light signal value is s _2. the putting and n _{2, n 2} (s) is a bright-field FPN is expressed by the following equation.

By substituting this into the equation (1) and solving for the true signal level s, the following equation can be derived.

As described above, I (s) is a signal value of a video signal including a dark FPN component and a bright FPN component, s is a true signal value including no offset, n ₁ is a dark FPN component, and d _1. Is the black offset level, and n ₂ is the bright FPN component at the signal level s ₂ .

  Therefore, the imaging apparatus includes a two-stage FPN removal circuit based on the equation (4). The first-stage FPN removal circuit corresponds to the expression {} in the expression (4), and removes the dark FPN component and the black offset level from the signal value I (s) of the video signal. is there. The second-stage FPN removal circuit corresponds to an expression other than {} in the expression (4), and is a circuit that removes the light-time FPN component.

  The first-stage FPN removal circuit is the same as the conventional FPN removal circuit that removes the dark FPN and the like, and accumulates an average value of a plurality of frames of the video signal at the time of light shielding in a frame memory in advance. Then, the first stage FPN removal circuit subtracts the signal value accumulated in the frame memory from the signal value of the video signal of the input video, and outputs the result to the second stage FPN removal circuit.

The second-stage FPN removal circuit subtracts the signal value accumulated in the first-stage FPN removal circuit from the signal value of the video signal in a state where the imaging element is irradiated with uniform light, and the subtraction result is obtained in a plurality of frames. The average value is accumulated in advance in the frame memory as the signal level s ₂ and the bright-time FPN component n ₂ , and the average value of the entire image in the signal value accumulated in the frame memory is calculated. ₂ is stored in advance in the memory. Then, the second stage FPN elimination circuit uses a divider and a multiplier to perform an operation corresponding to an expression other than {} in the expression (4).

  Thereby, it is possible to obtain a true signal value from which both the dark FPN and the bright FPN are removed from the video signal. In the FPN removal circuit provided in the conventional image pickup apparatus, the dark FPN and the bright FPN are subtracted from the signal value of the video signal, so that the bright FPN depending on the signal level of the video signal can be removed from the video signal. There wasn't. In the present invention, since the multiplication process and the division process based on the formula (4) are performed instead of performing the bright FPN subtraction process, the bright FPN depending on the signal level of the video signal is converted into the video signal. As a result, a highly accurate video signal can be obtained.

[Imaging device]
First, an imaging apparatus according to an embodiment of the present invention will be described. FIG. 1 is a schematic diagram illustrating a configuration of an imaging apparatus. The image pickup apparatus 1 includes an optical system 10 composed of a plurality of lenses, an image pickup element 11 that converts the amount of light incident through the optical system 10 into an electric signal, and an electric signal output by the image pickup element 11. Amplifier 12, an A / D converter 13 that converts an analog signal of the electric signal amplified by the amplifier 12 into a digital signal, and an FPN that removes FPN from the digital video signal output by the A / D converter 13. A removal circuit 14 is provided.

  The FPN removal circuit 14 is a circuit that performs the calculation of the equation (4). As described above, the dark signal FPN is acquired in advance by inputting the image signal at the time of shading, and the dark signal FPN is removed from the image signal 1. A stage FPN removal circuit and a second stage FPN removal circuit that obtains a bright FPN in advance by inputting a uniform light video signal and removes a bright FPN from a dark FPN removed video signal. Composed.

  Note that the configuration of the imaging apparatus 1 shown in FIG. 1 shows only portions that are directly related to the present invention. For example, an adjustment unit that performs video signal interpolation, gradation conversion, edge enhancement, and the like is included in the optical system 10. Components that are not directly related to the present invention, such as an exposure control unit that controls the exposure amount by the aperture provided, a timing control unit that controls the operation timing of the image sensor 11 and the A / D converter 13, are omitted. . FIG. 1 shows a configuration example when the image pickup device 11 is a CCD. For example, when the image pickup device 11 is a CMOS image pickup device, the image pickup apparatus 1 includes an amplifier 12 and an A / D converter 13. Absent.

[Example 1]
First, the FPN removal circuit 14 according to the first embodiment will be described. FIG. 2 is a block diagram illustrating a configuration of the FPN removal circuit 14 according to the first embodiment. The FPN removal circuit 14-1 includes switches 20 and 23, frame memory circuits 21 and 24, a subtracter 22, a memory 25, a divider 26 and a multiplier 27. The switch 20, the frame memory circuit 21 and the subtractor 22 constitute a first stage FPN elimination circuit, and the switch 23, the frame memory circuit 24, the memory 25, the divider 26 and the multiplier 27 constitute a second stage FPN elimination circuit. Composed.

(Dark FPN acquisition process)
FIG. 3 is a flowchart showing processing of the FPN removal circuit 14-1 shown in FIG. The FPN removal circuit 14-1 performs dark-time FPN acquisition processing by the switch 20 and the frame memory circuit 21 in the first-stage FPN removal circuit (step S301). As a result, the signal value (n ₁ + d ₁ ) of the video signal at the time of shading including the dark-time FPN component n ₁ and the black offset level d ₁ is accumulated in the frame memory circuit 21.

  4 is a flowchart showing details of the dark-time FPN acquisition process (step S301) shown in FIG. 3, and FIG. 7 shows the dark-time FPN acquisition process (step S301) in the FPN removal circuit 14-1 shown in FIG. It is a figure which shows the flow of data.

  First, the control unit (not shown) of the FPN removal circuit 14-1 makes the connection point a1 and the connection point a3 of the switch 20 conductive so that the input signal of the switch 20 is output to the frame memory circuit 21 (see FIG. 7). (See), the switch 20 is set by outputting to the switch 20 a control signal for turning off the connection point a1 and the connection point a2 (step S401).

When the FPN removal circuit 14-1 receives the video signal at the time of light shielding (step S402), the frame memory circuit 21 inputs the video signal at the time of light shielding through the switch 20, and the video signal at the time of light shielding is inputted for each pixel. The signal values (I (s) = n ₁ + d ₁ ) are added and averaged over a plurality of frames and stored (step S403).

As a result, as shown in FIG. 7, the signal value (n ₁ + d ₁ ) of the video signal at the time of shading is added and averaged for each pixel in a plurality of frames. Is stored in the frame memory circuit 21 for each pixel of the image sensor 11. The signal value of the video signal at the time of shading accumulated in the frame memory circuit 21 includes a dark-time FPN component n ₁ and a black offset level d ₁ .

The control unit (not shown) of the FPN removal circuit 14-1 adds and averages the signal value (n ₁ + d ₁ ) of the video signal stored in the frame memory circuit 21 when the light is blocked over the entire image (all pixels). The black offset level d ₁ can be obtained.

(Tomorrow's FPN acquisition process)
2 and 3, the FPN removal circuit 14-1 includes switches 20 and 23, a frame memory circuit 21, a subtractor 22, a frame memory circuit 24, and a memory among the first and second stage FPN removal circuits. 25, a light-time FPN acquisition process is performed (step S302). As a result, the frame memory circuit 24 stores the signal value (n ₂ + s ₂ ) composed of the light-time FPN component n ₂ and the signal level s ₂ at the signal level s ₂ in the uniform light, and the memory 25 stores The signal value of signal level s ₂ is accumulated.

  FIG. 5 is a flowchart showing details of the bright-time FPN acquisition process (step S302) shown in FIG. 3, and FIG. 8 shows the bright-time FPN acquisition process (step S302) in the FPN removal circuit 14-1 shown in FIG. It is a figure which shows the flow of data.

  First, the control unit (not shown) of the FPN removal circuit 14-1 turns on the connection point a1 and the connection point a2 of the switch 20 so as to output the input signal of the switch 20 to the subtractor 22 (see FIG. 8). ), By outputting to the switch 20 a control signal for turning off the connection point a1 and the connection point a3, so that the switch 20 is set and the input signal of the switch 23 is output to the frame memory circuit 24. The switch 23 is set by outputting to the switch 23 a control signal that makes the connection point b1 and the connection point b2 of the switch 23 conductive and makes the connection point b1 and connection point b3 non-conductive (step S501). .

When the FPN removal circuit 14-1 receives the uniform light video signal (step S502), the subtractor 22 inputs the uniform light video signal via the switch 20 and also shields the image from the frame memory circuit 21. The signal value (n ₁ + d ₁ ) of the signal is read (step S503). Then, the subtracter 22 subtracts the signal value (n ₁ + d ₁ ) of the video signal at the time of light shielding from the signal value (I (s) = n ₁ + d ₁ + n ₂ + s ₂ ) of the uniform light video signal (Step ₁ ). S504).

As a result, a signal value (n ₂ + s ₂ ) composed of the light-time FPN component n ₂ and the signal level s ₂ at the signal level s ₂ in uniform light is obtained. The signal value of the uniform light video signal is I (s) = n ₁ + d ₁ + n ₂ + s _{2 because} s = s ₂ in the above equation (1).

The frame memory circuit 24 inputs the subtraction result from the subtractor 22 via the switch 23, and accumulates the signal value (n ₂ + s ₂ ) of the subtraction result from the subtracter 22 by averaging for a plurality of frames (step S505). ).

The control unit (not shown) of the FPN removal circuit 14-1 calculates and averages the signal value (n ₂ + s ₂ ) accumulated in the frame memory circuit 24 over the entire image (all pixels) to obtain the signal level s ₂ (step S506). ), The signal value of the signal level s ₂ is stored in the memory 25 (step S507).

Thereby, as shown in FIG. 8, the signal value (n ₂ + s ₂ ) composed of the light-time FPN component n ₂ and the signal level s ₂ at the signal level s ₂ in the uniform light is added for each pixel in a plurality of frames. The averaged value is averaged and stored in the frame memory circuit 24 for each pixel of the image sensor 11. Further, the signal value of the signal level s ₂ in uniform light is accumulated in the memory 25. In this case, the signal value of the signal level s ₂ in uniform light is a value common to the entire image (all pixels).

Note that the signal value of the signal level s ₂ in the uniform light accumulated in the memory 25 is a common value in the entire image (all pixels) in the second embodiment described later, but in the fourth embodiment described later, for each predetermined region. In the third and fifth embodiments to be described later, this is a value for each pixel.

(FPN removal process)
2 and 3, the FPN removal circuit 14-1 performs an FPN removal process for removing the dark FPN and the bright FPN from the video signal of the input video (step S303). As a result, the true signal value s in the video signal of the input video is output from the FPN removal circuit 14-1.

  6 is a flowchart showing details of the FPN removal process (step S303) shown in FIG. 3, and FIG. 9 shows data of the FPN removal process (step S303) in the FPN removal circuit 14-1 shown in FIG. It is a figure which shows a flow.

  First, the control unit (not shown) of the FPN removal circuit 14-1 makes the connection point a1 and connection point a2 of the switch 20 conductive so that the input signal of the switch 20 is output to the subtractor 22 (see FIG. 9). The switch 20 is set so that the switch 20 is set and the input signal of the switch 23 is output to the multiplier 27 by outputting a control signal for turning off the connection point a1 and the connection point a3 to the switch 20. The switch 23 is set by outputting to the switch 23 a control signal for setting the connection point b1 and the connection point b3 of 23 to the conductive state and setting the connection point b1 and the connection point b2 to the non-conductive state (step S601).

When the FPN removal circuit 14-1 receives the video signal (step S602), the subtractor 22 inputs the video signal via the switch 20 and also the signal value (n ₁₎ of the video signal when the light is blocked from the frame memory circuit 21. + D ₁ ) is read (step S603). Then, the subtracter 22 subtracts the signal value (n ₁ + d ₁ ) of the video signal at the time of shading from the signal value I (s) of the video signal (step S604).

As a result, a signal value (n ₁ + d ₁ ) obtained by subtracting the signal value (n ₁ + d ₁ ) at the time of shading composed of the dark FPN component n ₁ and the black offset level d ₁ from the signal value I (s) of the video signal ( I (s)-(n ₁ + d ₁ )) is obtained (see FIG. 9).

The divider 26 reads the signal value (n ₂ + s ₂ ) from the frame memory circuit 24 (step S605) and reads the signal value of the signal level s ₂ from the memory 25 (step S606). Then, the divider 26 divides the signal value of the signal level s ₂ by the signal value (n ₂ + s ₂ ) (step S607).

The multiplier 27 inputs the signal value (I (s) − (n ₁ + d ₁ )) from the subtractor 22 via the switch 23, and the signal value (s ₂ / (n ₂ ) of the division result from the divider 26. + S ₂ )) is input and the signal value (I (s) − (n ₁ + d ₁ )) is multiplied by the signal value (s ₂ / (n ₂ + s ₂ )) obtained as a result of division (step S608). Then, the multiplier 27 outputs the multiplication result as the true signal value s of the video signal (step S609).

  As a result, as shown in FIG. 9, the video signal shown on the right side of the equation (4) is obtained by the first-stage FPN removal circuit that removes the dark-time FPN and the second-stage FPN removal circuit that removes the bright-time FPN. True signal value s is calculated and output from the FPN removal circuit 14-1.

As described above, according to the FPN removal circuit 14-1 of the first embodiment, during the dark FPN acquisition process in step S <b> 301, the frame memory circuit 21 performs the dark FPN component n ₁ that is a video signal during light shielding and black The signal value (n ₁ + d ₁ ) consisting of the offset level d ₁ is accumulated for each pixel.

Then, during the bright-time FPN acquisition processing in step S302, the subtractor 22 is stored in the frame memory circuit 21 from the signal value (I (s) = n ₁ + d ₁ + n ₂ + s ₂ ) of the uniform light video signal. The signal value (n ₁ + d ₁ ) is subtracted, and the frame memory circuit 24 obtains a signal value (the light value FPN component n ₂ and the signal level s ₂ when the signal level s ₂ in the uniform light is the subtraction result) n ₂ + s ₂ ) is accumulated for each pixel. The control unit (not shown) adds and averages the signal value (n ₂ + s ₂ ) accumulated in the frame memory circuit 24 over the entire image (all pixels), and is common to the entire image (all pixels) that is the addition average result. The signal value of the signal level s ₂ is stored in the memory 25.

At the time of the FPN removal process in step S303, the subtracter 22 subtracts the signal value (n ₁ + d ₁ ) accumulated in the frame memory circuit 21 from the signal value I (s) of the video signal of the input video, and a divider 26 divides the signal value of the signal level s ₂ common to the entire image stored in the memory 25 by the signal value (n ₂ + s ₂ ) stored in the frame memory circuit 24, and the multiplier 27 is a subtractor The signal value (I (s) − (n ₁ + d ₁ )) of the subtraction result by 22 is multiplied by the signal value (s ₂ / (n ₂ + s ₂ )) of the division result by the divider 26.

  Thereby, the true signal value s from which both the dark FPN and the bright FPN are removed from the video signal can be obtained. That is, instead of performing the subtraction process of the bright FPN, the multiplication process and the division process as shown on the right side of the equation (4) are performed, so that the bright FPN depending on the signal level of the video signal is converted into the video. It can be removed from the signal. Therefore, a highly accurate video signal can be obtained, and the image quality of the video signal can be improved in the imaging apparatus 1.

[Example 2]
Next, the FPN removal circuit 14 according to the second embodiment will be described. The FPN removal circuit 14 of the second embodiment uses the signal value of the signal level s ₂ as the signal value (n) in the bright-time FPN acquisition process (step S302), which is a part of the FPN removal process (step S303) of the first embodiment. ₂ + s ₂ ), and the division result is stored in a new frame memory.

  FIG. 10 is a block diagram illustrating a configuration of the FPN removal circuit 14 according to the second embodiment. The FPN removal circuit 14-2 includes switches 20, 23, 28, and 29, frame memory circuits 21 and 24, a subtractor 22, a memory 25, a divider 26, and a multiplier 27. The switch 20, the frame memory circuit 21 and the subtractor 22 constitute the first stage FPN elimination circuit, and the switches 23, 28 and 29, the frame memory circuit 24, the memory 25, the divider 26 and the multiplier 27 constitute the second stage. An FPN removal circuit is configured.

  Comparing the FPN removal circuit 14-1 of the first embodiment shown in FIG. 2 with the FPN removal circuit 14-2 of the second embodiment shown in FIG. 23, the frame memory circuits 21 and 24, the subtractor 22, the memory 25, the divider 26, and the multiplier 27 are the same, but the FPN removal circuit 14-2 is the configuration of the FPN removal circuit 14-1. In addition, the difference is that switches 28 and 29 are further provided.

(Dark FPN acquisition process)
The dark-time FPN acquisition process (step S301) by the FPN removal circuit 14-2 is the same as the FPN removal circuit 14-1, and the process shown in FIG. 4 is applied as it is.

(Tomorrow's FPN acquisition process)
The bright-time FPN acquisition process (step S302) by the FPN removal circuit 14-2 includes a division process by the divider 26 and an accumulation process by the frame memory circuit 24 in addition to the process shown in FIG. In this case, the control unit (not shown) of the FPN removal circuit 14-2 connects the connection point c2 and the connection point of the switch 28 so that the input signals from the subtracter 22 and the switch 23 are output to the frame memory circuit 24 in step S501. The switch 28 is set by outputting to the switch 28 a control signal for bringing the connection point c3 into a conductive state and bringing the connection point c3 and the connection point c1 into a non-conductive state.

After the FPN removal circuit 14-2 performs the processing shown in FIG. 5, the divider 26 reads out the signal value of the signal level s ₂ common to the entire image from the memory 25 and also outputs the signal value ( n ₂ + s ₂ ) is read, and the signal value of the signal level s ₂ is divided by the signal value (n ₂ + s ₂ ). In this case, the control unit (not shown) of the FPN removal circuit 14-2 makes the connection point e1 and the connection point e2 of the switch 29 conductive so that the input signal from the frame memory circuit 24 is output to the divider 26. The switch 29 is set by outputting to the switch 29 a control signal for turning off the connection point e1 and the connection point e3.

The frame memory circuit 24 stores the signal value (s ₂ / (n ₂ + s ₂ )) obtained as a result of division by the divider 26. In this case, the control unit (not shown) of the FPN removal circuit 14-2 makes the connection point c3 and the connection point c1 of the switch 28 conductive so that the input signal from the divider 26 is output to the frame memory circuit 24. The switch 28 is set by outputting to the switch 28 a control signal for turning off the connection point c2 and the connection point c1.

Frame Thus, the result of division by the signal level s ₂ the signal level s ₂ of light at FPN component n ₂ and the signal value and a signal level s ₂ in the homogeneous light (n ₂ + s ₂₎ in uniform light, for each pixel Accumulated in the memory circuit 24.

  In the bright-time FPN acquisition process (step S302), the division process by the divider 26 may be realized by software instead of hardware.

(FPN removal process)
In the FPN removal process (step S303) by the FPN removal circuit 14-2, a process of reading the signal value (s ₂ / (n ₂ + s ₂ )) from the frame memory circuit 24 instead of steps S605 to S607 shown in FIG. Is done.

After the FPN removal circuit 14-2 performs the processing of step S601 to step S604 shown in FIG. 6, the multiplier 27 passes the signal value (I (s) − (n ₁ + d) from the subtractor 22 via the switch 23. ₁ )) and the signal value (s ₂ / (n ₂ + s ₂ )) are read from the frame memory circuit 24. In step S608, the multiplier 27 multiplies the signal value (I (s)-(n ₁ + d ₁ )) by the signal value (s ₂ / (n ₂ + s ₂ )), and in step S609. The multiplication result is output as the true signal value s of the video signal. In this case, the control unit (not shown) of the FPN removal circuit 14-2 makes the connection point e1 and the connection point e3 of the switch 29 conductive so that the input signal from the frame memory circuit 24 is output to the multiplier 27. The switch 29 is set by outputting to the switch 29 a control signal for turning off the connection point e1 and the connection point e2.

  Thus, the true signal value s of the video signal shown on the right side of the equation (4) is obtained by the first-stage FPN removal circuit that removes the dark-time FPN and the second-stage FPN removal circuit that removes the bright-time FPN. Calculated and output from the FPN removal circuit 14-2.

As described above, according to the FPN removal circuit 14-2 of the second embodiment, the subtracter 22, the frame memory circuit 24, and a control unit (not shown) perform the FPN removal of the first embodiment during the bright-time FPN acquisition process in step S302. Processing similar to that of the circuit 14-1 is performed, and the divider 26 converts the signal value of the signal level s ₂ common to the entire image stored in the memory 25 into the signal value (n ₂ + s) stored in the frame memory circuit 24. ₂ ), the frame memory circuit 24 accumulates the signal value (s ₂ / (n ₂ + s ₂ )) resulting from the division by the divider 26 for each pixel.

At the time of the FPN removal process in step S303, the subtractor 22 performs the same process as the FPN removal circuit 14-1 of the first embodiment, and the multiplier 27 outputs the signal value (I (s ) − (N ₁ + d ₁ )) is multiplied by the signal value (s ₂ / (n ₂ + s ₂ )) stored in the frame memory circuit 24.

  Thereby, similarly to the FPN removal circuit 14-1 of the first embodiment, a highly accurate video signal can be obtained, and the image quality of the video signal can be improved in the imaging device 1. Further, during the FPN removal process in step S303, the division process by the divider 26 is not required, so that the processing load can be reduced and the real-time process can be realized only by the subtractor 22 and the multiplier 27. , The divider 26 can be saved.

Example 3
Next, the FPN removal circuit 14 of Example 3 will be described. In the first and second embodiments, when uniform light for light-time FPN removal has shading, the uniform light signal level s ₂ obtained as a common value for the entire image and the local uniform light signal level s The difference between ₂ (average value of local uniform light) can be a noise source. Therefore, the FPN removal circuit 14 according to the third embodiment obtains the local average value around the pixel (target pixel) as the uniform light signal level s ₂ for each pixel in the bright-time FPN acquisition process (step S302). Thus, the signal value of the signal level s ₂ corrected for the shading of uniform light is accumulated.

  The configuration of the FPN removal circuit 14-3 according to the third embodiment is the same as the configuration of the first embodiment shown in FIG. 2 or the configuration of the second embodiment shown in FIG.

The FPN removal circuit 14-1 of the first embodiment shown in FIG. 2 and the FPN removal circuit 14-2 of the second embodiment shown in FIG. 10 and the FPN removal circuit 14-3 of the third embodiment are compared. Although the configuration is the same, the control unit of the FPN removal circuit 14-3 is different in that the signal level s ₂ is obtained by a method different from the control unit of the FPN removal circuits 14-1 and 14-2.

(Dark FPN acquisition process)
The dark-time FPN acquisition process (step S301) by the FPN removal circuit 14-3 is the same as the FPN removal circuits 14-1 and 14-2, and the processes of the first and second embodiments shown in FIG. .

(Tomorrow's FPN acquisition process)
In the bright-time FPN acquisition process (step S302) by the FPN removal circuit 14-3, instead of step S506 shown in FIG. 5, a local average value is calculated to obtain the signal level s ₂ for each pixel. Is done.

After the FPN removal circuit 14-3 performs the processing from step S501 to step S505 shown in FIG. 5, the control unit of the FPN removal circuit 14-3 uses a moving average filter or the like, so that each pixel The average value of the signal values (n ₂ + s ₂ ) accumulated in the frame memory circuit 24 for a predetermined area centered on is calculated, and the calculated average value is obtained as the signal level s ₂ (step S506).

Then, the control unit of the FPN removal circuit 14-3 accumulates the signal value of the signal level s ₂ in the memory 25 (step S507).

Thus, the local average value of the peripheral centering on the target pixel, is stored in the memory 25 for each pixel as a signal value of the signal level s _2. In this case, the signal value of the signal level s ₂ in the uniform light is a value for each pixel.

(FPN removal process)
In the FPN removal process (step S303) by the FPN removal circuit 14-3, a process of reading the signal value of the signal level s ₂ accumulated for each pixel from the memory 25 is performed instead of step S606 shown in FIG.

After the FPN removal circuit 14-3 performs the processing from step S601 to step S605 shown in FIG. 6, the divider 26 outputs the video from the signal value of the signal level s ₂ accumulated for each pixel from the memory 25. The signal value of the signal level s ₂ corresponding to the pixel of the signal value I (s) of the signal is read (step S606). Then, the FPN removal circuit 14-3 performs the processing from step S607 to step S609 shown in FIG.

When the FPN removal circuit 14-3 has the same configuration as that of the second embodiment shown in FIG. 10, the signal of the signal level s ₂ corresponding to the pixel of the signal value I (s) of the video signal by the divider 26 is used. The process of reading the value is performed in the bright-time FPN acquisition process.

As described above, according to the FPN removal circuit 14-3 of the third embodiment, during the bright-time FPN acquisition process in step S302, the control unit performs frame memory circuit 24 for a predetermined area centered on the pixel for each pixel. The average value of the signal values (n ₂ + s ₂ ) stored in the signal level s ₂ is obtained as the signal level s ₂ , and the signal value of the signal level s ₂ is stored in the memory 25.

Accordingly, even when shading is present in the uniform light video signal input in the bright-time FPN acquisition process, the shading can be corrected and the signal value s ₂ can be prevented from becoming a noise source. Can do. Therefore, it is possible to obtain a video signal with higher accuracy than in the first and second embodiments, and in the imaging apparatus 1, it is possible to further improve the image quality of the video signal.

Example 4
Next, the FPN removal circuit 14 of Example 4 is demonstrated. In the third embodiment, a uniform light signal level s ₂ is obtained for each pixel. In contrast, the FPN removal circuit 14 according to the fourth embodiment obtains the uniform light signal level s ₂ for each predetermined divided region in the bright-time FPN acquisition process (step S302).

  The configuration of the FPN removal circuit 14-3 according to the fourth embodiment is the same as the configuration of the first embodiment shown in FIG. 2 or the configuration of the second embodiment shown in FIG.

The FPN removal circuit 14-1 of the first embodiment shown in FIG. 2 and the FPN removal circuit 14-2 of the second embodiment shown in FIG. 10 and the FPN removal circuit 14-4 of the fourth embodiment are compared. Although the configuration is the same, the control unit of the FPN removal circuit 14-4 is different in that the signal level s ₂ is obtained by a method different from the control units of the FPN removal circuits 14-1 and 14-2.

(Dark FPN acquisition process)
The dark-time FPN acquisition process (step S301) by the FPN removal circuit 14-4 is the same as the FPN removal circuits 14-1 and 14-2, and the processes of the first and second embodiments shown in FIG. .

(Tomorrow's FPN acquisition process)
In the bright-time FPN acquisition process (step S302) by the FPN removal circuit 14-4, instead of step S506 shown in FIG. 5, an average value is calculated for each predetermined divided area, and the signal level s ₂ is calculated for each divided area. Is obtained.

After the FPN removal circuit 14-4 performs the processing from step S501 to step S505 shown in FIG. 5, the control unit of the FPN removal circuit 14-4 performs frame memory circuit 24 for each divided region for each predetermined divided region. The average value of the signal values (n ₂ + s ₂ ) accumulated in the signal is calculated, and the calculated average value is obtained as the signal level s ₂ (step S506).

FIG. 11 is a diagram illustrating processing for calculating the signal value s ₂ for each divided region in the bright-time FPN acquisition processing (step S302) of the fourth embodiment. As shown in FIG. 11, the entire screen of the input video is divided in advance into N × M areas. The signal level s ₂ is obtained for every N × M divided regions. N and M are positive integers.

Then, the control unit of the FPN removal circuit 14-4 accumulates the signal value of the signal level s ₂ in the memory 25 (step S507).

Thus, the average value of each divided region is stored in the memory 25 as a signal value of the signal level s _2. In this case, the signal value of the signal level s ₂ in the uniform light is a value for each divided region.

(FPN removal process)
In the FPN removal process (step S303) by the FPN removal circuit 14-4, a process of reading the signal value of the signal level s ₂ accumulated for each divided area from the memory 25 is performed instead of step S606 shown in FIG. .

After the FPN removal circuit 14-4 performs the processing of step S601 to step S605 shown in FIG. 6, the divider 26, from the memory 25, among the signal values of the signal level s ₂ accumulated for each divided region, The signal value of the signal level s ₂ corresponding to the pixel of the signal value I (s) of the video signal is read (step S606). Then, the FPN removal circuit 14-4 performs the processing from step S607 to step S609 shown in FIG.

When the FPN removal circuit 14-4 has the same configuration as that of the second embodiment shown in FIG. 10, the signal of the signal level s ₂ corresponding to the pixel of the signal value I (s) of the video signal by the divider 26 is used. The process of reading the value is performed in the bright-time FPN acquisition process.

As described above, according to the FPN removal circuit 14-4 of the fourth embodiment, during the bright-time FPN acquisition process in step S302, the control unit stores the signal value (n an average value of ₂ + s ₂₎ as a signal level s _2, and the signal value of the signal level s ₂ to be stored in the memory 25.

  Thus, the processing is performed for each pixel in the third embodiment, but the processing for each pixel is not necessary in the fourth embodiment, so that the processing load can be reduced as compared with the third embodiment. That is, even when shading is present in the uniform light video signal input in the bright-time FPN acquisition process, the shading can be corrected for each divided region with a low load. Therefore, a video signal with higher accuracy than those of the first and second embodiments can be obtained by processing with a lower load than that of the third embodiment, and the image quality of the video signal can be further improved in the imaging apparatus 1.

Example 5
Next, the FPN removal circuit 14 of Example 5 is demonstrated. In the fourth embodiment, since the average value of the divided areas is obtained as the uniform light signal level s ₂ for each divided area, the uniform light signal level s ₂ of the divided areas is obtained as the value of the center coordinates of the divided areas. Can be handled. The difference between this reason, a daily domain signal level s ₂ uniform light (average value that can be handled as a value of the center coordinates) and the signal level s ₂ of a pixel in a position deviated from the center coordinates Can be a source of noise. Therefore, the FPN removal circuit 14 according to the fifth embodiment linearly interpolates the central coordinate values (average values of the divided areas) in the four neighboring divided areas for each pixel in the bright-time FPN acquisition process (step S302). The signal level s ₂ of uniform light is obtained.

  The configuration of the FPN removal circuit 14-5 according to the fifth embodiment is similar to the configuration of the first embodiment shown in FIG. 2 or the configuration of the second embodiment shown in FIG. 10 in the same manner as the FPN removal circuit 14-4 of the fourth embodiment. It is the same.

The configuration of the FPN removal circuit 14-5 is the same as that of the FPN removal circuit 14-4. The FPN removal circuit 14-1 of the first embodiment shown in FIG. 2 and the FPN removal circuit 14- of the second embodiment shown in FIG. 2 is different from the control unit of the FPN removal circuit 14-4 in that the signal level s ₂ is obtained by a method different from that of the control unit of the FPN removal circuit 14-4.

(Dark FPN acquisition process)
As in the FPN removal circuit 14-4, the processing of the first and second embodiments illustrated in FIG. 4 is applied as it is to the dark-time FPN acquisition processing (step S301) by the FPN removal circuit 14-5.

(Tomorrow's FPN acquisition process)
In the bright-time FPN acquisition process (step S302) by the FPN removal circuit 14-5, instead of step S506 shown in FIG. 5, the average value of the four neighboring divided regions is linearly interpolated, and the signal level s _{2 for} each pixel. Is obtained.

After the FPN removal circuit 14-5 performs the processing from step S501 to step S505 shown in FIG. 5, the control unit of the FPN removal circuit 14-5 performs frame memory circuit 24 for each divided region for each divided region. The average value of the signal values (n ₂ + s ₂ ) accumulated in the sub-region is calculated, and the average value is set as the signal level s ₂ of the pixel at the central coordinate in the sub-region, and the average value of four adjacent sub-regions in the vicinity is calculated. By performing linear interpolation, a signal level s ₂ of a pixel other than the center coordinate is obtained for each pixel (step S506).

FIG. 12 is a diagram illustrating a process of calculating a signal value s ₂ that is linearly interpolated for each pixel in the bright-time FPN acquisition process (step S302) of the fifth embodiment. As in FIG. 11, the entire screen of the input video is divided into N × M areas in advance, the size of one divided area is K × L pixels, and the center coordinates of the four divided areas are A, B, Let C, D. It is assumed that a coordinate P surrounded by the coordinates A, B, C, and D exists at a position of x pixels horizontally from the coordinate A and y pixels vertically.

The control unit of the FPN removal circuit 14-5 calculates an average value of the signal values (n ₂ + s ₂ ) accumulated in the frame memory circuit 24 for each of the N × M divided regions. And a control part performs a process for every four divided areas of the vicinity. Specifically, assuming that the average values of the divided areas are s _A , s _B , s _C , and s _D , the control unit uses the following equation using linear interpolation to determine the signal level s _P of the pixel at the coordinate _P. Ask for.

Of the N × M divided areas, for the divided areas that are in contact with the four sides of the screen of the input video, the control unit calculates the coordinates P by using an equation using linear interpolation for each adjacent two divided areas. The pixel signal level s _P is obtained.

Then, the control unit of the FPN removal circuit 14-5 accumulates the signal value of the signal level s ₂ in the memory 25 (step S507).

As a result, the value linearly interpolated for each of the four neighboring divided regions is stored in the memory 25 as the signal value of the signal level s ₂ . In this case, the signal value of the signal level s ₂ in the uniform light is a value for each pixel.

(FPN removal process)
In the FPN removal process (step S303) by the FPN removal circuit 14-5, instead of step S606 shown in FIG. 6, the signal of the signal level s ₂ that is linearly interpolated for each of the four neighboring divided regions and accumulated for each pixel. A process of reading the value from the memory 25 is performed.

After the FPN removal circuit 14-5 performs the processing from step S601 to step S605 shown in FIG. 6, the divider 26 linearly interpolates from the memory 25 for each of the four adjacent divided regions and accumulates the pixels. Among the signal values of the signal level s _2, the signal value of the signal level s ₂ corresponding to the pixel of the signal value I (s) of the video signal is read (step S606). Then, the FPN removal circuit 14-5 performs the processing from step S607 to step S609 shown in FIG.

When the FPN removal circuit 14-5 has the same configuration as that of the second embodiment shown in FIG. 6, the signal of the signal level s ₂ corresponding to the pixel of the signal value I (s) of the video signal by the divider 26 is used. The process of reading the value is performed in the bright-time FPN acquisition process.

As described above, according to the FPN removal circuit 14-5 of the fifth embodiment, during the bright-time FPN acquisition process in step S302, the control unit performs frame memory for each of the N × M divided regions. An average value of the signal values (n ₂ + s ₂ ) accumulated in the circuit 24 is calculated, and the signal level s ₂ of the pixel at the coordinate P is calculated for each pixel by an equation using linear interpolation for each of the four neighboring divided regions. And the signal value of the signal level s ₂ is stored in the memory 25.

  Thereby, it is possible to obtain a video signal with higher accuracy than in the fourth embodiment in which processing is performed for each divided region, and in the imaging device 1, it is possible to further improve the image quality of the video signal.

Although the present invention has been described with reference to the first to fifth embodiments, the present invention is not limited to the first to fifth embodiments, and various modifications can be made without departing from the technical idea thereof. For example, in the first to fifth embodiments, the signal value (n ₁ + d ₁ ) of the video signal at the time of shading is converted into the frame memory circuit by the dark-time FPN acquisition process (step S301) of the FPN removal circuit 14 included in the imaging device 1. 21. Similarly, the signal value (n ₂ + s ₂ ) of uniform light is accumulated in the frame memory circuit 24 by the bright FPN acquisition process (step S302) of the FPN removal circuit 14 included in the imaging device 1, The signal value of the signal level s ₂ is accumulated in the memory 25. On the other hand, the dark-time FPN acquisition process (step S301) and the bright-time FPN acquisition process (step S302) are performed by another device, and the signal value (n ₁ + d) of the video signal at the time of shading calculated by the other device. ₁ ), the signal value of uniform light (n ₂ + s ₂ ) and the signal value of the signal level s ₂ may be stored in the frame memory circuit 21, the frame memory circuit 24, and the memory 25 of the imaging device 1, respectively. In this case, the FPN removal circuit 14 of the imaging device 1 performs only the FPN removal process (step S303). In the case of the second embodiment, the other device divides the signal value of the signal level s ₂ by the signal value (n ₂ + s ₂ ) of the uniform light, and the signal value (s ₂ / (n ₂ + s ₂ ) as a result of the division. )) Is stored in the frame memory circuit 24 of the imaging apparatus 1 for each pixel.

  In the fifth embodiment, the control unit of the FPN removal circuit 14-5 performs linear interpolation for each of the four adjacent divided areas. However, the present invention limits the processing unit to four divided areas. The processing may be performed for each of a predetermined number of divided regions in the vicinity instead of the above.

DESCRIPTION OF SYMBOLS 1 Image pick-up device 10 Optical system 11 Image pick-up element 12 Amplifier 13 A / D converter 14 FPN removal circuit 20, 23, 28, 29 Switch 21, 24 Frame memory circuit 22 Subtractor 25 Memory 26 Divider 27 Multiplier

Claims (7)

In an imaging device comprising an imaging device that converts the amount of incident light into an electrical video signal, and a fixed pattern noise removal circuit that removes fixed pattern noise from the video signal output by the imaging device,
The fixed pattern noise removing circuit is
A first memory for storing a signal value of a video signal at the time of shading for each pixel of the image sensor;
A second memory that accumulates a signal value of a subtraction result obtained by subtracting the signal value of the video signal at the time of light shielding from the signal value of the uniform light video signal for each pixel as a uniform light signal value;
A third memory for storing an average value of all pixels in the uniform light signal value as a signal value of a uniform light signal level in all pixels;
A subtractor for subtracting the signal value of the video signal at the time of shading accumulated in the first memory from the signal value of the video signal of the input video;
A divider for dividing the signal value of the uniform light signal level stored in the third memory by the signal value of the uniform light stored in the second memory;
A multiplier that multiplies the result of subtraction by the result of division by the divider, and outputs the result of the multiplication as a signal obtained by removing fixed pattern noise from the video signal of the input video. An imaging device that is characterized. In an imaging device comprising an imaging device that converts the amount of incident light into an electrical video signal, and a fixed pattern noise removal circuit that removes fixed pattern noise from the video signal output by the imaging device,
The fixed pattern noise removing circuit is
A first memory for storing a signal value of a video signal at the time of shading for each pixel of the image sensor;
A second memory that accumulates a signal value of a subtraction result obtained by subtracting the signal value of the video signal at the time of light shielding from the signal value of the uniform light video signal for each pixel as a uniform light signal value;
A third memory for storing an average value of all pixels in the uniform light signal value as a signal value of the uniform light signal level in all pixels; and
The second memory further accumulates, for each pixel, a result obtained by dividing the signal value of the uniform light signal level accumulated in the third memory by the signal value of the uniform light,
The fixed pattern noise removing circuit further includes a subtracter for subtracting the signal value of the video signal at the time of shading accumulated in the first memory from the signal value of the video signal of the input video,
A multiplier that multiplies the subtraction result by the subtracter with the division result accumulated in the second memory, and outputs the result of the multiplication as a signal obtained by removing fixed pattern noise from the video signal of the input video; An imaging apparatus comprising: In an imaging device comprising an imaging device that converts the amount of incident light into an electrical video signal, and a fixed pattern noise removal circuit that removes fixed pattern noise from the video signal output by the imaging device,
The fixed pattern noise removing circuit is
A first memory for storing a signal value of a video signal at the time of shading for each pixel of the image sensor;
The signal value of the subtraction result obtained by subtracting the signal value of the video signal at the time of shading from the signal value of the uniform light video signal is defined as the uniform light signal value for each pixel, and the average of all pixels in the uniform light signal value A value obtained by dividing the signal value of the uniform light signal level by the signal value of the uniform light as a signal value of the uniform light signal level in all pixels, and a fourth memory for storing the result for each pixel;
A subtractor for subtracting the signal value of the video signal at the time of shading accumulated in the first memory from the signal value of the video signal of the input video;
A multiplier that multiplies a subtraction result by the subtracter by a division result accumulated in the fourth memory, and outputs the result of the multiplication as a signal obtained by removing fixed pattern noise from the video signal of the input video; An imaging apparatus comprising: The imaging device according to claim 1 or 2,
The third memory is
For each pixel, an average value of signal values of uniform light accumulated in the second memory for a predetermined area centered on the pixel is accumulated as a signal value of the signal level of uniform light. Imaging device. The imaging device according to claim 1 or 2,
The third memory is
For each predetermined divided area obtained by dividing the area of all pixels, an average value of the divided areas in the uniform light signal value accumulated in the second memory is accumulated as a signal value of the uniform light signal level. An imaging apparatus characterized by the above. The imaging device according to claim 1 or 2,
The third memory is
For each predetermined divided area obtained by dividing the area of all pixels, an average value of the divided areas in the signal value of the uniform light accumulated in the second memory is calculated, and a predetermined number of adjacent divisions for each pixel are calculated. An image pickup apparatus characterized in that a signal value obtained by linearly interpolating an average value of a region is accumulated as a signal value of a uniform light signal level. An image pickup device for converting the amount of incident light into an electric video signal, and a fixed pattern noise removal method in an image pickup apparatus including a fixed pattern noise removal circuit for removing fixed pattern noise from the video signal output by the image pickup device In
A first step of storing a signal value of a video signal at the time of shading in a first memory for each pixel of the image sensor;
A signal value of the video signal at the time of shading is subtracted from a signal value of the uniform light video signal, and a signal value as a result of the subtraction is stored in a second memory as a uniform light signal value for each pixel. Steps,
A third step of storing an average value of all pixels in the uniform light signal value in a third memory as a signal value of a uniform light signal level in all pixels;
A fourth step of subtracting the signal value of the video signal at the time of shading accumulated in the first memory from the signal value of the video signal of the input video;
A fifth step of dividing the signal value of the uniform light signal level stored in the third memory by the signal value of the uniform light stored in the second memory;
A sixth step of multiplying the subtraction result of the fourth step by the division result of the fifth step, and outputting the result of the multiplication as a signal obtained by removing fixed pattern noise from the video signal of the input video; And a fixed pattern noise removing method.

Images