JP2015075719A - Electrophoresis apparatus, driving method of electrophoresis apparatus, control circuit of electrophoresis apparatus, and electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a driving method of an electrophoresis apparatus that enables high-quality display.SOLUTION: An electrophoresis apparatus 150 includes a selection transistor 21, an N-type first transistor 26N connected to a first line 551, a P-type second transistor 26P connected to a second line 552, an N-type third transistor 27N connected to a third line 553, a P-type fourth transistor 27P connected to a fourth line 554, a ring oscillator element 28, a pixel electrode 22, a common electrode 23, and an electrophoretic material 24. Since first particles and second particles are efficiently separated from each other, an electrophoresis apparatus 150 having a high contrast ratio and showing high image quality can be achieved.

Description

  The present invention relates to an electrophoresis apparatus, a method for driving the electrophoresis apparatus, a control circuit for the electrophoresis apparatus, and an electronic apparatus.

  In the electrophoretic device, as described in Patent Document 1, a voltage is applied between the pixel electrode and the common electrode facing each other with the electrophoretic material interposed therebetween, and electrophoretic particles such as black charged particles and white charged particles are applied. By moving it, an image is formed on the display unit. As a driving method of such an electrophoretic device, a plurality of frame periods are provided to form one image, a common potential is supplied to the common electrode in each frame period, and a first potential (VH) is supplied to the pixel electrode. ) Or a second potential (VL) lower than the first potential. At this time, the common potential is fixed to the third potential (VH) or the fourth potential (VL) lower than the third potential within one frame period.

JP 2009-175492 A

  However, the conventional method for driving an electrophoresis apparatus has a problem that the contrast ratio is low. Specifically, in the conventional electrophoresis apparatus, the reflectance (white reflectance) when performing white display is about 42%, and the reflectance (black reflectance) when performing black display is about 7%. The contrast ratio, which is the ratio between the white reflectance and the black reflectance, was as low as about 6. In other words, the conventional method for driving an electrophoresis apparatus has a problem that it is difficult to realize an electrophoresis apparatus having a high contrast ratio and high image quality.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.

Application Example 1 An electrophoretic device according to this application example includes a selection transistor disposed at an intersection of a scanning line and a signal line, a first transistor having a source electrically connected to a first wiring, and a second transistor. A second transistor whose source is electrically connected to the wiring, a third transistor whose source is electrically connected to the third wiring, a fourth transistor whose source is electrically connected to the fourth wiring, and a ring An oscillator element, a pixel electrode, a common electrode, and an electrophoretic material to which an electric field generated between the pixel electrode and the common electrode is applied. One of the source and the drain of the selection transistor is electrically connected to the signal line. The other of the source and drain of the selection transistor is connected to the gate of the first transistor, the gate of the second transistor, the gate of the third transistor, and the fourth transistor. It is electrically connected to the gate of the transistor (this connection point is called the first node), the gate of the selection transistor is electrically connected to the scanning line, and the drain of the first transistor and the drain of the second transistor are The drain of the third transistor and the drain of the fourth transistor are electrically connected to the negative power supply of the ring oscillator element, and the pixel electrode is the output of the ring oscillator element. The first transistor and the third transistor are N-type transistors, and the second transistor and the fourth transistor are P-type transistors.
According to this configuration, since the first particles and the second particles contained in the electrophoretic material are efficiently separated, it is possible to realize an electrophoretic device that exhibits high image quality with a high contrast ratio and suppressed afterimages. .

Application Example 2 The driving method of the electrophoresis apparatus according to this application example is the driving method of the electrophoresis apparatus according to Application Example 1, in which a second low potential is supplied to the first wiring, The first high potential is supplied to the wiring, the first low potential is supplied to the third wiring, the second high potential is supplied to the fourth wiring, the common potential is supplied to the common electrode, and the first low potential is supplied. The second low potential is higher than the first potential, the second high potential is lower than the first high potential, and the average potential (high average potential) between the first high potential and the second high potential is The potential is higher than the average potential (low average potential) of the first low potential and the second low potential, and the common potential is a potential value between the high average potential and the low average potential.
According to this method, since the first particles and the second particles contained in the electrophoretic material are efficiently separated, an electrophoretic device having a high contrast ratio and high image quality can be realized.

Application Example 3 In the method for driving an electrophoresis apparatus according to Application Example 2, the second low potential is higher than the common potential, and the second high potential is lower than the common potential. Is preferred.
According to this method, since the first particles and the second particles contained in the electrophoretic material are more efficiently separated, an electrophoretic apparatus having a higher contrast ratio and higher image quality can be realized.

Application Example 4 In the method for driving an electrophoretic device according to Application Example 2 or 3, high potential data and low potential data are supplied to the signal line, and the high potential data is equal to or higher than the first high potential. It is preferable that the low potential data is a value equal to or lower than the first low potential.
The first transistor and the third transistor are N-type, and the second transistor and the fourth transistor are P-type. The highest potential supplied to the sources of the second transistor and the fourth transistor is the first high potential. Accordingly, when the high potential data is a value equal to or higher than the first high potential, the N-type first transistor and the third transistor are turned on, and the P-type second transistor and the fourth transistor have a gate potential of the source potential. It becomes higher and becomes an OFF state. As a result, the second low potential is supplied to the positive power supply portion of the ring oscillator element, and the first low potential is supplied to the negative power supply portion. That is, the ring oscillator element outputs an alternating potential that oscillates between the first low potential and the second low potential (referred to as the first alternating potential). Since the output portion of the ring oscillator element is electrically connected to the pixel electrode, according to this method, the potential of the pixel electrode (pixel potential) can be set to the first alternating potential.
The lowest potential supplied to the sources of the N-type first transistor and the third transistor is the first low potential. Therefore, by setting the low potential data to a value equal to or lower than the first low potential, the first transistor and the third transistor have the gate potential lower than the source potential and are turned off. On the other hand, the P-type second transistor and the fourth transistor are turned on. As a result, the first high potential is supplied to the positive power supply portion of the ring oscillator element, and the second high potential is supplied to the negative power supply portion. That is, the ring oscillator element outputs an alternating potential that oscillates between the second high potential and the first high potential (referred to as a second alternating potential). Since the output portion of the ring oscillator element is electrically connected to the pixel electrode, the pixel potential can be set to the second alternating potential.

Application Example 5 In the method for driving an electrophoretic device according to any one of Application Examples 2 to 4, the scanning line is supplied with a high scanning potential and a low scanning potential, and the high scanning potential is high. The value is more than the potential data, and the low scanning potential is preferably less than the lower potential data.
The scanning line is selected when the scanning potential is high, and is not selected when the scanning potential is low. Therefore, according to this method, since the high scanning potential is equal to or higher than the high potential data, the potential of the first node can be changed to high potential data or low potential data in the selected state. That is, in the selected state, the potential supplied to the signal line can be written to the first node. Further, since the low scanning potential is equal to or lower than the low potential data, it can be maintained regardless of whether the potential of the first node is low potential data or high potential data in the non-selected state.

Application Example 6 In the method for driving an electrophoresis apparatus according to any one of Application Examples 2 to 5, the average value of the high average potential and the low potential average substantially coincide with the common potential, and the second It is preferable that the difference between the low potential and the first low potential is substantially equal to the difference between the first high potential and the second high potential.
The electrophoretic material includes first particles that contribute to the first color display and second particles that contribute to the second color display. According to this method, the electric field with respect to the first particles and the electric field with respect to the second particles are symmetric, so that a beautiful display can be realized and the lifetime of the electrophoretic material can be kept long.

Application Example 7 In the method of driving an electrophoretic device according to any one of Application Examples 2 to 6, when the period for forming one frame image is a frame period, the ring oscillator element The oscillation period is preferably shorter than the frame period.
According to this method, the first particles and the second particles contained in the electrophoretic material are efficiently separated, and the oscillation cycle of the ring oscillator element is short, so that screen flicker is not likely to occur. . That is, it is possible to realize an electrophoresis apparatus that displays a high-quality image with a high contrast ratio.

Application Example 8 A control circuit for an electrophoretic device, wherein the driving method according to any one of Application Examples 2 to 7 is performed.
According to this configuration, it is possible to provide a control circuit that displays a high-quality image with a high contrast ratio on the electrophoresis apparatus.

Application Example 9 An electrophoretic device including the control circuit according to Application Example 8.
According to this configuration, it is possible to provide an electrophoresis apparatus that displays a high-quality image with a high contrast ratio.

Application Example 10 An electronic apparatus comprising the electrophoresis apparatus according to Application Example 9.
According to this configuration, it is possible to provide an electronic apparatus including an electrophoresis device that displays a high-quality image with a high contrast ratio.

The perspective view of the electronic device in this invention. The block diagram showing the electronic device which concerns on this embodiment for every functional block. The circuit diagram of the electrophoresis device concerning this embodiment. FIG. 3 is a circuit diagram of a pixel of the electrophoresis apparatus according to the embodiment. FIG. 9 illustrates a cross-sectional structure of a pixel. The figure explaining an example of the drive method of an electrophoresis apparatus. The perspective view which shows the structure of electronic paper. The perspective view which shows the structure of an electronic notebook. FIG. 6 is an equivalent circuit diagram illustrating an electrical configuration of a pixel of the electrophoresis apparatus according to the second embodiment. FIG. 6 is a diagram illustrating an example of a method for driving an electrophoresis apparatus according to a second embodiment. FIG. 6 is an equivalent circuit diagram illustrating an electrical configuration of a pixel of the electrophoresis apparatus according to the third embodiment. FIG. 10 is a diagram illustrating an example of a method for driving an electrophoresis apparatus according to a third embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following drawings, the scale of each layer and each member is made different from the actual scale so that each layer and each member can be recognized.

(Embodiment 1)
"Outline of electronic equipment"
FIG. 1 is a perspective view of an electronic apparatus according to the present invention. First, the overall configuration (outline) of the electronic apparatus according to the first embodiment will be described with reference to FIG.

  The electronic device 100 according to the present invention includes an electrophoresis apparatus 150 (see FIG. 2) and an interface for operating the electronic device 100. Specifically, the interface is the operation unit 120 and includes a switch and the like. The electrophoretic device 150 is a display module having the display unit 10. The display unit 10 includes a plurality of pixels 20 (see FIG. 3), and an image is displayed on the display unit 10 by electrically controlling these pixels 20. In the electrophoretic device 150, display is performed using the electrophoretic material 24 (see FIG. 4).

"Basic configuration of electronic equipment"
FIG. 2 is a block diagram illustrating the electronic apparatus according to the present embodiment for each functional block. Next, a basic configuration of the electronic device will be described with reference to FIG.

  The electronic device 100 includes an electrophoresis device 150 and an operation unit 120. In some cases, the electronic device 100 may further include an image signal supply circuit 130. The operation unit 120 is a part where the user operates the electronic device 100. The electrophoresis device 150 includes the display unit 10 and a control circuit 140. Furthermore, the electrophoretic device 150 may include the operation unit 120 and the like. As a preferred example, the control circuit 140 includes a drive circuit 70, a control unit 60, a storage unit 90, an image signal processing unit 80, and a frame memory 110. The drive circuit 70 supplies various signals such as scanning signals and image signals to the display unit 10. The storage unit 90 stores image data to be displayed on the display unit. The image signal processing unit 80 supplies various signals such as an image signal to the drive circuit 70. The control unit 60 controls these. The basic configuration of the electronic device according to the present embodiment is not limited to the above-described configuration, and may be a circuit configuration that can realize the driving method according to the present embodiment.

  The control unit 60 is a CPU (Central Processing Unit) and controls the operation of each unit. The control unit 60 is accompanied by a storage unit 90. The storage unit 90 is configured by a nonvolatile storage device such as a flash memory, for example. The storage unit 90 stores various image data to be displayed on the display unit 10, various programs or lookup tables that determine the operation of the electronic device 100, and the like. These data are input from the external image signal supply circuit 130 and are exchanged as necessary. The image signal supply circuit 130 is named in this way because mainly the data to be replaced is an image signal. However, the above-described various programs and lookup tables are also replaced through the image signal supply circuit 130. Things are possible. The image signal supply circuit 130 is provided in a personal computer or a mobile phone connected to the Internet, a USB memory, an SD card, or the like, and supplies new data to the electronic device 100. As described above, the electronic device 100 includes the image signal supply circuit 130, and the electronic device 100 alone may be connected to the Internet, a mobile phone network, or the like.

  The image signal processing unit 80 is accompanied by a frame memory 110, generates an image signal according to the image data extracted from the storage unit 90, and supplies the image signal to the drive circuit 70. Specifically, an image signal corresponding to the first image (currently displayed image) stored in the frame memory 110 and the second image (next displayed image) stored in the storage unit 90. ), The image signal processing unit 80 and the control unit 60 generate an image signal corresponding to the second image. The image signal processing unit 80 supplies the image signal thus obtained to the drive circuit 70 and displays the second image on the display unit 10. The frame memory 110 is a VRAM (Video Random Access Memory) having a memory capacity capable of storing image data of at least one frame of the display unit 10. The memory capacity is preferably more than 2 frames.

  The operation unit 120 includes a plurality of operation buttons (see FIG. 1), and the user gives a trigger signal for switching the display to the electronic device 100 by the operation buttons.

"Circuit, structure"
FIG. 3 is a circuit diagram of the electrophoresis apparatus according to the present embodiment. FIG. 4 is a circuit diagram of a pixel of the electrophoresis apparatus according to this embodiment. FIG. 5 is a diagram for explaining a cross-sectional structure of a pixel. Next, a circuit configuration and a cross-sectional structure of the display unit and the drive circuit of the electrophoresis apparatus according to the present embodiment will be described with reference to FIGS. For ease of explanation, FIG. 4 shows examples of various potentials with specific numerical values. However, if the potential relation described below is satisfied, it is needless to say that other potentials are used. It doesn't matter.

  As shown in FIG. 3, the display unit 10 includes m rows × n columns of pixels 20 arranged in a matrix (two-dimensional plane). The display unit 10 includes m scanning lines 30 (that is, scanning lines Y1, Y2,..., Ym) and n signal lines 40 (that is, signal lines X1, X2,..., Xn). It is provided so as to cross each other. Specifically, m scanning lines 30 extend in the row direction (that is, the X direction), and n signal lines 40 extend in the column direction (that is, the Y direction). Pixels 20 are arranged corresponding to the intersections of m scanning lines 30 and n signal lines 40.

  A drive circuit 70 is attached to the display unit 10. The drive circuit 70 includes a controller 71, a scanning line drive circuit 72, a signal line drive circuit 73, a potential supply circuit 74, and the like. The controller 71 controls the operations of the scanning line driving circuit 72, the signal line driving circuit 73, and the potential supply circuit 74, and supplies various signals such as a clock signal and a timing signal to these circuits.

Based on the timing signal supplied from the controller 71, the scanning line driving circuit 72 supplies a scanning signal to each of the scanning lines Y1, Y2,. The scanning signal supplied to the scanning line 30 includes a high scanning potential SH (for example, SH = 36V) and a low scanning potential SL (for example, SL = 0V). The scanning line 30 is selected when the scanning potential is high, and is not selected when the scanning potential is low. The signal line driving circuit 73 supplies an image signal to the signal lines X1, X2,..., Xn based on the timing signal supplied from the controller 71. The image signal supplied to the signal line is either high potential data DH (for example, DH = 35V) or low potential data DL (for example, DL = 1V). In response to this, the potential of the pixel electrode 22 (pixel potential V _px ) of each pixel 20 is either the first alternating potential or the second alternating potential. Although details will be described later regarding the first alternating potential and the second alternating potential, in the present embodiment, as an example, the pixel potential V _px of the pixel 20 displaying the first color (for example, white) is the first alternating potential ( For example, the pixel potential V _px of the pixel 20 that displays the second color (for example, black) is the second alternating potential (for example, a potential that oscillates between 16 V and 34 V). )

The first alternating potential has a first alternating period T ₁ , and a first low potential L ₁ (for example, L ₁ = 2V) and a second low potential L ₂ (for example, L ₁ ) within a frame period for forming one frame image. ₂ = 20V). In the first low potential L ₁ and the second low potential L ₂ , the second low potential L ₂ is higher than the first low potential L ₁ . The second alternating potential has a second alternating period T ₂ , and the first high potential H ₁ (for example, H ₁ = 34V) and the second high potential H ₂ (for example, H ₂ ) within a frame period for forming one frame image. ₂ = 16V). In the first high potential H ₁ and the second high potential H ₂ , the second high potential H ₂ is lower than the first high potential H ₁ . The average potential of the first high potential H ₁ and the second high potential H ₂ (referred to as the high average potential HM, in this example, HM = 25V) is the first low potential L ₁ , the second low potential L ₂ , Higher than the average potential (referred to as the low average potential LM, in this example, LM = 11 V). The first alternating cycle T ₁ and the second alternating cycle T ₂ may be different, but are the same in this embodiment. As will be described later, the first alternating potential and the second alternating potential are formed by a ring oscillator element 28 (see FIG. 4) provided in the pixel 20. Therefore, the first alternating cycle T ₁ and the second alternating cycle T ₂ are determined according to the power supply voltage (difference between the positive power supply potential and the negative power supply potential) supplied to the ring oscillator element 28. In the present embodiment, the power supply voltage supplied to the ring oscillator element 28 when the first alternating potential is formed is the same as the power supply voltage supplied to the ring oscillator element 28 when the second alternating potential is formed. Therefore, the first alternating cycle T ₁ and the second alternating cycle T ₂ have the same value. That is, the difference between the second low potential L ₂ and the first low potential L ₁ is made substantially equal to the difference between the first high potential H ₁ and the second high potential H ₂ (| L ₂ −L ₁ │ = │H ₁ -H ₂ │). Accordingly, the first alternating cycle T ₁ and the second alternating cycle T ₂ have the same value. Later, particularly if the first alternating cycle T ₁ is not necessary to distinguish between the second alternating period T _2, these will be called the alternating period T _A.

The potential supply circuit 74 supplies the common potential V _com to the common potential line 50, and the common potential line 50 is electrically connected to the common electrode 23. Accordingly, the potential supply circuit 74 supplies the common potential V _com to the common electrode 23. The common potential V _com supplied to the common electrode 23 is a potential value between the high average potential HM and the low average potential LM (for example, V _com = 18V). Further, various potential lines 55 are wired from the potential supply circuit 74 to each pixel 20. The various potential lines 55 include a first wiring 551 (see FIG. 4), a second wiring 552 (see FIG. 4), a third wiring 553 (see FIG. 4), a fourth wiring 554 (see FIG. 4), a fixed potential line. 55F (see FIG. 4) and the like are included. In FIG. 3, these are collectively drawn as various potential lines 55. The second low potential L ₂ is supplied to the first wiring 551, the first high potential H ₁ is supplied to the second wiring 552, the first low potential L ₁ is supplied to the third wiring 553, and the fourth A second high potential H ₂ is supplied to the wiring 554, and an appropriate fixed potential V _F is supplied to the fixed potential line 55F (for example, V _F = 0V). As shown in FIG. 4, the fixed potential line 55F is electrically connected to the second electrode 252 of the capacitor 25D. As will be described later, a configuration in which the fixed potential line 55F is not used is also possible. Various signals are input / output to / from the controller 71, the scanning line driving circuit 72, the signal line driving circuit 73, and the potential supply circuit 74, but descriptions of those that are not particularly related to the present embodiment are omitted. Yes.

  As shown in the pixel circuit diagram of FIG. 4, the pixel 20 arranged at the intersection of the scanning line and the signal line includes a selection transistor 21, a first transistor 26N, a second transistor 26P, a third transistor 27N, and a fourth transistor. 27P, a ring oscillator element, a pixel electrode 22, a common electrode 23, an electrophoretic material 24, and a capacitive element 25D. The electrophoretic material 24 is disposed between the pixel electrode 22 and the common electrode 23, and the pixel electrode 22, the common electrode 23, and the electrophoretic material 24 form a capacitance. In this way, an electric field generated between the pixel electrode 22 and the common electrode 23 is applied to the electrophoretic material 24.

  The first transistor 26N and the second transistor 26P are complementary, and if one is a first conductivity type, the other is a second conductivity type different from the first conductivity type. The third transistor 27N and the fourth transistor 27P are complementary, and if one is a first conductivity type, the other is a second conductivity type different from the first conductivity type. Further, the first transistor 26N and the third transistor 27N have the same conductivity type, and the second transistor 26P and the fourth transistor 27P have the same conductivity type. In the present embodiment, the first transistor 26N is N-type, the second transistor 26P is P-type, the third transistor 27N is N-type, and the fourth transistor 27P is P-type.

The source of the first transistor 26N is electrically connected to the first wiring 551, the source of the second transistor 26P is electrically connected to the second wiring 552, and the source of the third transistor 27N is the third wiring. The source of the fourth transistor 27 </ b> P is electrically connected to the fourth wiring 554. The drain of the first transistor 26N and the drain of the second transistor 26P are electrically connected to the positive power supply portion ROVDD of the ring oscillator element 28, and the drain of the third transistor 27N and the drain of the fourth transistor 27P are connected to the ring oscillator element 28. The negative power supply unit ROVSS is electrically connected. As described above, the first wiring 551 is supplied the second low potential L _2, the second wiring 552 is supplied first high potential H _1, second low potential L ₂ first high potential H ₁ than Since this has a higher potential, the drain of the first transistor 26N and the drain of the second transistor 26P are electrically connected to the positive power supply portion ROVDD of the ring oscillator element 28. Similarly, the first low potential L ₁ is supplied to the third wiring 553, the second high potential H ₂ is supplied to the fourth wiring 554, and the first low potential L ₁ is higher than the second high potential H ₂ . Since the potential is lower, the drain of the third transistor 27N and the drain of the fourth transistor 27P are electrically connected to the negative power supply portion ROVSS of the ring oscillator element 28.

The selection transistor 21 is composed of, for example, an N-type transistor. One of the source and drain of the selection transistor 21 is electrically connected to the signal line 40, and the other of the source and drain is the gate of the first transistor 26N, the gate of the second transistor 26P, and the third transistor 27N. , The gate of the fourth transistor 27P, and the first electrode 251 of the capacitive element 25D. This connection point is referred to as a first node n1. The gate of the selection transistor 21 is electrically connected to the scanning line 30. The selection transistor 21 supplies the image signal supplied from the signal line driving circuit 73 via the signal line 40 to the first node n1 in accordance with the scanning signal supplied from the scanning line driving circuit 72 via the scanning line 30. Output. As shown in FIG. 5, in this embodiment, the selection transistor 21, the first transistor 26N (not shown), the second transistor 26P (not shown), the third transistor 27N (not shown), and the fourth transistor 27P (not shown). The transistors constituting the ring oscillator element 28 are upper gate type thin film transistors, but these transistors may be lower gate type thin film transistors. In order to ensure the circuit operation, all of these transistors are normally off type (enhancement type) which is turned off when the gate voltage (gate potential V _{gs based} on the source potential) is 0V. Transistor) is preferable.

  In the ring oscillator element 28, an odd number of inverter circuits are electrically connected in series. In the present embodiment, as an example, three inverter circuits of a ring oscillator (hereinafter also referred to as RO) first inverter circuit 281, a second RO inverter circuit 282, and a third RO inverter circuit 283 are used. . Hereinafter, when it is not necessary to distinguish between them, they are collectively referred to as an RO inverter circuit. In the RO inverter circuit, the P-type transistor is connected to the positive power source ROVDD, the N-type transistor is connected to the negative power source ROVSS, and the gate of the P-type transistor and the gate of the N-type transistor are connected to the RO inverter circuit. The drain of the P-type transistor and the drain of the N-type transistor are the output section of the RO inverter circuit. The output part of a certain RO inverter circuit is electrically connected to the input part of the next-stage RO inverter circuit, and the output part of the final-stage RO inverter circuit (in this embodiment, the third RO inverter circuit 283). Is electrically connected to the input of the first-stage RO inverter circuit (in this embodiment, the first RO inverter circuit 281). The output part of the RO inverter circuit at the final stage is the output part ROOUT of the ring oscillator element 28, and the output part ROOUT of the ring oscillator element 28 is electrically connected to the pixel electrode.

And the number of ring oscillators element 28 in RO for inverter circuits, the size of the transistor constituting the inverter circuit for these RO defines an alternating period T _A of the ring oscillator element 28. Since the alternating period T _A as described below is the preferred range, and the number of inverter circuits for RO as suitable for this range defines the size of the transistor constituting the inverter circuit for these RO. Further, a load capacity may be connected to the output part of the RO inverter circuit constituting the ring oscillator element 28 so as to be suitable for this range. In this embodiment, the CMOS type inverter circuit is used for the RO inverter circuit, but the RO inverter circuit may be a single channel type.

The logical conversion potential V _TRRO of the inverter circuit for RO is set to about the average value of the positive power supply potential and the negative power supply potential. That is, the transistors that constitute the RO inverter circuit so that the logical conversion potential V _TRRO of the RO inverter circuit is approximately equal to the average value of the positive power supply potential and the negative power supply potential supplied to the RO inverter circuit. Determine the size of the. Specifically, when the gate voltage V _gs and the drain voltage V _ds are half of the power supply voltage, the absolute value of the drain current of the P-type transistor constituting the RO inverter circuit and the N-type transistor constituting the RO inverter circuit The transistor sizes are determined so that the absolute values of the drain currents of the transistors are equal. Note that the logic conversion potential V _TR of the inverter circuit is an input potential at which the output logic of the inverter circuit is inverted, and is the sum of the negative power supply potential and the logic conversion voltage (the potential at which the logic conversion occurs when the negative power supply potential is 0V). .

The capacitive element 25D has a pair of electrodes, that is, a first electrode 251 and a second electrode 252 that are arranged to face each other with a dielectric film interposed therebetween. The first electrode 251 is electrically connected to the first node n1, and the second electrode 252 is electrically connected to the fixed potential line 55F as described above. A fixed potential V _F (for example, 0 V) is supplied to the fixed potential line 55F. The potential of the second electrode 252 may be any potential as long as it is a fixed potential. Therefore, the second electrode 252 may be electrically connected to another wiring by omitting the fixed potential line 55F. For example, the second electrode 252 can be electrically connected to the first wiring 551, the second wiring 552, the third wiring 553, the fourth wiring 554, and the like.

  In this specification, that the terminal 1 and the terminal 2 are electrically connected means that the terminal 1 and the terminal 2 can be in the same logic state. Specifically, in addition to the case where the terminal 1 and the terminal 2 are directly connected by wiring, the case where they are connected via a resistance element, a switching element, a capacitive element, a buffer circuit, or the like is included. That is, even if the potential at the terminal 1 and the potential at the terminal 2 are slightly different, if the same logic is given on the circuit, the terminal 1 and the terminal 2 are electrically connected. Therefore, for example, as shown in FIG. 4, even when the selection transistor 21 for blocking or passing the image signal of the signal line 40 is provided between the signal line 40 and the first node n1, the selection transistor When 21 is in the on state, the image signal of the signal line 40 is supplied to the first node n1, so that both are electrically connected.

An image signal is supplied to the first node n1 from the signal line driving circuit 73 through the signal line 40 and the selection transistor 21, and the first transistor 26N, the second transistor 26P, the third transistor 27N, and the fourth transistor 27P Is controlled. Specifically, when the image signal is the high potential data DH, the first transistor 26N and the third transistor 27N are turned on, and the second low potential L ₂ is supplied to the ring oscillator element 28 as a positive power supply potential. Then, the first low potential L ₁ is supplied as the negative power supply potential. As a result, the ring oscillator element 28 supplies the pixel electrode 22 with the first alternating potential that oscillates between the first low potential L ₁ and the second low potential L ₂ . When the image signal is the low potential data DL, the second transistor 26P and the fourth transistor 27P are turned on, and the first high potential H ₁ is supplied to the ring oscillator element 28 as a positive power supply potential. A second high potential H ₂ is supplied as a power supply potential. As a result, the ring oscillator element 28 supplies the pixel electrode 22 with a second alternating potential that oscillates between the second high potential H ₂ and the first high potential H ₁ . Thus, the pixel potential V _px is either the first alternating potential or the second alternating potential according to the image signal. As shown in FIG. 5, the pixel electrode 22 is disposed so as to face the common electrode 23 with the electrophoretic material 24 interposed therebetween. The common electrode 23 is electrically connected to a common potential line 50 to which a common potential V _com is supplied. In the present embodiment, the common electrode 23 is provided on a substrate facing the substrate on which the pixel electrode 22 is formed, and the electrophoretic particles are electrophoresed in the vertical direction of the cross-sectional view shown in FIG. Note that the common electrode 23 may be provided on the substrate on which the pixel electrode 22 is formed, and the electrophoretic particles may be electrophoresed in the horizontal direction (the left-right direction in FIG. 5) of the cross-sectional view of FIG.

  The electrophoretic material 24 includes first particles exhibiting a first color and second particles exhibiting a second color. The first particles and the second particles are referred to as electrophoretic particles, and these electrophoretic particles are confined in a state of being dispersed in a dispersion liquid in microcells or microcells partitioned by partition walls. At least one of the first particles and the second particles is charged positively or negatively, and performs electrophoresis according to an electric field generated between the pixel electrode 22 and the common electrode 23. In this embodiment, as an example, the first color is white, the second color is black, and the first particles are more negatively charged than the second particles. The first particles are more negatively charged than the second particles. The first particles are strongly negatively charged and the second particles are weakly negatively charged. And the second particles are neutral, the first particles are negatively charged and the second particles are positively charged, the first particles are neutral and the second particles Is positively charged, and the first particle is weakly positively charged and the second particle is strongly positively charged.

  Furthermore, the fact that the electrophoretic particles are strongly charged means that the electrophoretic particles are electrophoresed earlier in the dispersion under a certain electric field strength. On the contrary, the fact that the electrophoretic particles are weakly charged means that the electrophoretic particles are electrophoresed more slowly in the dispersion under a certain electric field strength. Therefore, even if the first and second particles have the same polarity, such as positive polarity or negative polarity, a difference in electrophoretic velocity occurs due to different charging strengths, and the distribution state of the electrophoretic particles You can change the display. As specific numerical values representing the strength of charging, for example, indices such as zeta potential and electrophoretic mobility can be referred to. The zeta potential and the electrophoretic mobility are theoretically proportional.

In the present embodiment, the white first particles are negatively charged, the black second particles are positively charged, and the user views the display from the common electrode 23 side. Consider the case where the first alternating potential is supplied. Since the central potential of the first alternating potential, that is, the low average potential LM (for example, LM = 11V) is lower than the common potential V _com (for example, V _com = 18V) which is a fixed potential, FIG. As shown, the positively charged black second particles are attracted near the pixel electrode 22, and the negatively charged white first particles are attracted near the common electrode 23. Therefore, when the electrophoretic device 150 is viewed from the common electrode 23 side (from the upper side of FIG. 5), the pixel 20 displays white. In this way, the electrophoresis apparatus 150 can display at least the first color and the second color. Note that the first color and the second color are not limited to black and white, and may be a combination of colors (complementary colors) in the opposite positions in the color circle. For example, a combination of red fine particles and green fine particles, a combination of yellow fine particles and purple fine particles, a combination of blue fine particles and orange fine particles, or the like may be used. In addition, an appropriate two colors may be combined from the three primary colors of additive color mixture of red, green and blue, or an appropriate two colors may be combined from the three primary colors of subtractive color mixture of cyan, magenta and yellow. It is also possible to combine two colors from these six colors. Further, the electrophoretic particles do not need to be confined in the microcapsule, and for example, a partition wall may be provided and housed therein.

"Driving method of electrophoresis device"
FIG. 6 is a diagram for explaining an example of a method for driving the electrophoresis apparatus, in which the horizontal axis represents time and the vertical axis represents potential. Hereinafter, a control circuit according to the present embodiment and a method for driving the electrophoresis apparatus will be described.

In the following description, as an example, the first color is white display and the second color is black display. FIG. 6 shows the common potential V _com , the pixel potential V _px (W) of the first color display pixel (white display pixel), and the pixel potential V _px (B) of the second color display pixel (black display pixel). , The relationship is drawn. A period during which one image is formed is a frame period (Frame). The first direction is the direction from the common electrode 23 toward the pixel electrode 22 (indicated by a downward arrow in FIG. 6), and the second direction opposite to the first direction is the pixel electrode 22 to the common electrode 23. The direction is indicated (indicated by an upward arrow in FIG. 6). The direction of the electric field is negative when the electric field is in the first direction, and the direction of the electric field is positive when the electric field is in the second direction. Furthermore, in FIG. 6, the strength of the electric field is represented by the length of the arrow.

In the first color display pixel (white display pixel), the first particles are distributed closer to the common electrode 23 than the second particles (the first particles are distributed closer to the common electrode 23 than the second particles). ), As depicted by V _px (W) in FIG. 6 (solid line in FIG. 6), the electric field generated between the pixel electrode 22 and the common electrode 23 has a strong first in the first direction. And the second electric field weaker than the first strong electric field FSF (hereinafter referred to as the second strong electric field FSF for the sake of clarity). referred to as a weak electric field SWF), but the alternating electric field to be repeated alternately at alternating periods T _a. Similarly, in the second color display pixel (black display pixel), the second particles are distributed closer to the common electrode 23 than the first particles (the second particles are distributed closer to the common electrode 23 than the first particles). 6), the electric field generated between the pixel electrode 22 and the common electrode 23 is opposite to the first direction, as depicted in V _px (B) in FIG. 6 (broken line in FIG. 6). A strong third electric field (hereinafter referred to as a second strong electric field SSF for the sake of clarity) and a fourth electric field weaker than the second strong electric field SSF (hereinafter referred to as the second strong electric field SSF). for clarity, the this electric field is referred to as a first weak electric field FWF), but the alternating electric field to be repeated alternately at alternating periods T _a.

The first strong electric field FSF and the second weak electric field SWF constituting the alternating electric field supply the first alternating electric potential to the pixel electrode 22 by setting the electric potential of the second electrode 252 of the capacitive element 25D to a fixed electric potential V _F (for example, 0 V). Form by doing. The second strong electric field SSF and the first weak electric field FWF constituting the alternating electric field have a fixed potential V _F (for example, 0 V) as the potential of the second electrode 252 of the capacitive element 25D, and the second alternating electric potential is applied to the pixel electrode 22. Form by supplying. The first alternating potential has a first amplitude V _A1 with respect to the low average potential LM. The second alternating potential has a second amplitude V _A2 with respect to the high average potential HM. The first amplitude V _A1 and the second amplitude V _A2 may be different values, but are the same in this embodiment. The first amplitude V _A1 and the second amplitude V _A2 are determined according to the power supply voltage (difference between the positive power supply potential and the negative power supply potential) supplied to the ring oscillator element 28. In the present embodiment, the power supply voltage (L ₂ -L ₁ , 18 V in this example) supplied to the ring oscillator element 28 when forming the first alternating potential and the ring oscillator when forming the second alternating potential. Since the power supply voltage (H ₁ −H ₂ , 18 V in this example) supplied to the element 28 is the same, the first amplitude V _A1 and the second amplitude V _A2 have the same value. Hereinafter, when it is not necessary to particularly distinguish the first amplitude V _A1 and the second amplitude V _A2 , these are simply referred to as the amplitude V _A. As will be described in detail later, since the alternating electric field is applied to the electrophoretic material 24 a plurality of times within each frame period, the electrophoretic particles are in accordance with the average electric field of the alternating electric field in the order of longer time than the frame period. Perform electrophoresis. Specifically, the electrophoretic particles perform electrophoresis according to the electric field defined by the potential difference between the common potential V _com and the central potential of the pixel potential V _px and display the first color or the second color. Is possible.

  The first particle and the second particle tend to be coupled to each other by Coulomb force, van der Waals force, etc., but by applying an alternating electric field to the electrophoretic material 24, the first particle and the second particle are Efficiently separated. According to the earnest study by the present inventor, the contrast ratio was low in the conventional electrophoresis apparatus because the separation between the first particles and the second particles was insufficient. On the other hand, in this embodiment, since the separation between the first particles and the second particles is promoted by an alternating electric field, an electrophoretic device having a high contrast ratio and excellent image quality is realized. Depending on the alternating electric field, the electrophoretic particles receive a strong force, a weak force, or in some cases, the weak force is swung in the opposite direction to the strong force. It is thought that separation from As a result, the afterimage is suppressed and the contrast ratio is improved.

Next, the period of the alternating electric field (alternating period T _A ) will be described. As shown in FIG. 6, when the period for forming one frame image is a frame period T _F , the alternating period T _A , that is, the oscillation period of the ring oscillator element, may be shorter than the frame period T _F. preferable. The frame period T _F of the electrophoresis apparatus 150 is about 30 milliseconds (30 ms) to about 1 second (1 s), and the response time of the electrophoretic material 24 is shorter than the frame period according to the frame period T _F. It is about milliseconds (ms) to about 500 milliseconds (ms). Roughly speaking, the response time of the electrophoretic material 24 is designed to be about 1/5 to 1 times the frame period _TF . The response time of the electrophoretic material 24 is the time spent for the electrophoretic particles to move between the pixel electrode 22 and the common electrode 23 when an electric field at the time of driving is applied to the electrophoretic material 24.

The purpose of applying an alternating electric field to the electrophoretic material 24 is to promote separation of the first and second particles. If the first particles and the second particles actually move between the pixel electrode 22 and the common electrode 23 due to an alternating electric field, screen flicker may occur. In addition, since the user sees the display of the first color and the display of the second color in a time-sharing manner, the first color and the second color are mixed and the contrast ratio is lowered. I feel it. For these reasons, the alternating period T _A, although the first particles and the second particles separated by the alternating electric field is promoted, preferably in the period which can not move between the pixel electrode 22 and the common electrode 23 . On the other hand, if the alternating period T _A is too short, the first particles and the second particles are difficult to be separated. Therefore, the alternating period T _A ranges from about 1/10 to about 1 time the response time of the electrophoretic material 24. It is preferable to enter. In this case, since the first strong electric field FSF is stronger than the second weak electric field SWF and the second strong electric field SSF is stronger than the first weak electric field FWF, the movement distance between the first particle and the second particle is at most the pixel electrode. The distance between the common electrode 23 and the common electrode 23 is about 1/10 to about 1 time, and flickering of the screen is suppressed. As mentioned above, since the response time of the electrophoretic material 24 is 1/5 of about 1 times the frame period T _F, the alternating period T _A is a 1 times from 1/50 of the frame period T _F Preferably it is done. In other words, when an alternating electric field of about 1 to 50 times is applied to the electrophoretic material 24 during one frame period T _F , flicker is suppressed and a high-quality image with a high contrast ratio is displayed. It will be.

In this embodiment, the size of the display unit 10 is 15.24 cm × 11.43 cm, the number of pixels is 2400 (number n of signal lines 40) × 1800 (number m of scanning lines 30), and the resolution is 400 dot per inch. (Dpi). The signal line driving circuit 73 employs 8-phase development driving in which image signals are introduced into the eight signal lines 40 with one selection signal. The selection time per pixel 20 is 1 microsecond (μs). Therefore, the horizontal scanning period is 300 microseconds (μs), and the frame period _TF is 0.54 seconds (s). As shown in FIG. 6, in this embodiment, the alternating period T _A of 108 milliseconds (108 ms) extent, the electrophoretic material 24, such that 5 times about the alternating electric field to one frame period T _F is applied The ring oscillator element 28 is designed. Since the response time of the electrophoretic material 24 is about 300 milliseconds (ms), the alternating period T _A is set to 0.36 times the response time of the electrophoretic material 24. As will be described later, the direction of the second weak electric field SWF is opposite to the direction of the first strong electric field FSF, and its strength is 1/8 of the strength of the first strong electric field FSF. The distance moved in the direction opposite to the display direction due to the electric field is 4.5% of the distance between the pixel electrode 22 and the common electrode 23 (= 0.36 × 1/8, 2 in this embodiment). .25 micrometers (μm)). Accordingly, the first particles and the second particles are efficiently separated without generating flicker. That is, the electrophoresis apparatus 150 that displays a high-quality image with a high contrast ratio is realized. In general, when the direction of the second weak electric field SWF is opposite to the direction of the first strong electric field FSF, the distance that the electrophoretic particles can move by the second weak electric field SWF is 10% of the distance between the pixel electrode 22 and the common electrode 23. The alternating period and the intensity of the second weak electric field SWF are set so as to be less than about. Similarly, when the direction of the first weak electric field FWF is opposite to the direction of the second strong electric field SSF, the distance that the electrophoretic particles can move by the first weak electric field FWF is 10 as the distance between the pixel electrode 22 and the common electrode 23. The alternating period and the strength of the first weak electric field FWF are set so as to be less than about%. By doing so, a high-quality image with a high contrast ratio and no flicker is displayed.

"Potential relationship"
Next, the relationship between the common potential V _com and the pixel potential V _px will be described with reference to FIG. For ease of explanation, FIG. 6 shows examples of various potentials with specific numerical values. However, if the potential relation described below is satisfied, it is needless to say that the potentials are other numerical values. It doesn't matter.

As described above, in this embodiment, various potential relationships will be described using an example in which the first particles are more negatively charged than the second particles. As shown in FIG. 6, the pixel potential V _px (W) of the pixel 20 displaying the first color (white) is the first alternating potential, and is drawn with a solid line in FIG. Further, the pixel potential V _px (B) of the pixel 20 displaying the second color (black) is a second alternating potential, which is depicted by a broken line in FIG. In FIG. 6, the common potential V _com is drawn with a one-dot chain line. In the present embodiment, the potential V _H being higher than the potential V _L means that V _H is larger in the positive direction than V _L. That is, a high potential means a large potential in the positive direction, and a low potential means a large potential in the negative direction.

As indicated by V _px (W) in FIG. 6, the lowest value of the first alternating potential is the first low potential L ₁ (L ₁ ≡LM−V _A , for example, L ₁ = 2V). The maximum value of the first alternating potential is the second low potential L ₂ (L ₂ ≡LM + V _A , for example, L ₂ = 20 V). Further, as shown by V _px (B) in FIG. 6, the highest value of the second alternating potential is the first high potential H ₁ (H ₁ ≡HM + V _A , for example, H ₁ = 34 V). The lowest value of the second alternating potential is the second high potential H ₂ (H ₂ ≡HM−V _A , for example, H ₂ = 16 V). The common potential V _com is higher than the low average potential LM and lower than the high average potential HM (LM <V _com <HM). Also, the difference between the common potential V _com and the first low potential L ₁ is greater than the difference between the second low potential L ₂ and the common potential _{V com (│V com -L 1 │} > │L 2 -V com │). In this case, the first strong electric field FSF is stronger than the second weak electric field SWF, so that the first color (white) can be displayed. Similarly, the difference between the first high potential H ₁ and the common potential V _com is larger than the difference between the common potential V _com and the second high potential H ₂ (| H ₁ −V _com |> | V _com −H ₂ │). In this case, the second strong electric field SSF is stronger than the first weak electric field FWF, so that the second color (black) can be displayed.

The first alternating potential oscillates between the first low potential L ₁ and the second low potential L _2, and the second low potential L ₂ is higher than the common potential V _com (L ₂ ≡LM + V _A > V _com ). Thus, in the pixel 20 displaying the first color (white), the second weak electric field SWF having the electric field strength weaker than the first strong electric field FSF and having the opposite electric field direction is generated. Similarly, the second alternating potential oscillates between the first high potential H ₁ and the second high potential H _2, and the second high potential H ₂ is lower than the common potential V _com (H ₂ ≡HM). −V _A <V _com ). In this case, in the pixel 20 displaying the first color (white), the second weak electric field SWF having the electric field strength weaker than the first strong electric field FSF and having the opposite electric field direction is generated, and the second color (black) is generated. In the pixel 20 to be displayed, a first weak electric field FWF having a field strength weaker than the second strong electric field SSF and having an opposite electric field direction is generated, so that the first particles and the second particles contained in the electrophoretic material are efficiently used. Separated. Therefore, the electrophoresis apparatus 150 having a high contrast ratio and high image quality is realized. The second low potential L ₂ may be lower than the common potential V _com (L ₂ ≡LM + V _A <V _com ), and the second high potential H ₂ may be higher than the common potential V _com (H ₂ ≡HM−V _A > V _com ). In this case, the direction of the second weak electric field SWF is the same as the direction of the first strong electric field FSF, and the direction of the first weak electric field FWF is the same as the direction of the second strong electric field SSF. Particle separation cannot be promoted, but it still leads to improved contrast ratio. In addition, since the opposite electric field disappears in this way, it is possible to shorten the time until the white display or the black display is saturated. That is, display switching can be performed at high speed.

Next, referring to FIG. 4, conditions for setting the pixel potential V _px to the first alternating potential or the second alternating potential are shown. In order to set the pixel potential V _px of the pixel 20 displaying the first color (white) to the first alternating potential, the first transistor 26N and the third transistor 27N are turned on, and the second transistor 26P and the fourth transistor 27P are turned on. Are turned off. In order to turn off the second transistor 26P and the fourth transistor 27P, the potential of the first node n1 is set to the high potential data DH (for example, DH = 35V), and this value is set to the second transistor 26P and the fourth transistor. The maximum potential supplied to the source of 27P, that is, a value equal to or higher than the first high potential H ₁ (for example, H ₁ = 34 V) (DH ≧ H ₁ ). By setting the high potential data DH to a value equal to or higher than the first high potential H ₁ , the first transistor 26N and the third transistor 27N are turned on, and the gate potential of the second transistor 26P and the fourth transistor 27P is the source It becomes higher than the potential, and it is turned off. As a result, the second low potential L ₂ is supplied to the positive power supply portion ROVDD of the ring oscillator element 28 and the first low potential L ₁ is supplied to the negative power supply portion ROVSS. That is, the ring oscillator element 28 outputs a first alternating potential that oscillates between the first low potential L ₁ and the second low potential L ₂ . Since the output portion ROOUT of the ring oscillator element 28 is electrically connected to the pixel electrode 22, the pixel potential V _px can be set to the first alternating potential.

In order to set the pixel potential V _px of the pixel 20 displaying the second color (black) to the second alternating potential, the second transistor 26P and the fourth transistor 27P are turned on, and the first transistor 26N, the third transistor 27N, Is turned off. In order to turn off the first transistor 26N and the third transistor 27N, the potential of the first node n1 is set to the low potential data DL (for example, DL = 1V), and this value is set to the first transistor 26N and the third transistor. The minimum potential supplied to the source of 27N, that is, a value equal to or lower than the first low potential L ₁ (for example, L ₁ = 2V) (L ₁ ≧ DL). By setting the low potential data DL to a value equal to or lower than the first low potential L ₁ , the second transistor 26P and the fourth transistor 27P are turned on, and the gate potential of the first transistor 26N and the third transistor 27N is the source potential. Becomes lower and becomes an off state. As a result, the first high potential H ₁ is supplied to the positive power supply portion ROVDD of the ring oscillator element 28 and the second high potential H ₂ is supplied to the negative power supply portion ROVSS. That is, the ring oscillator element 28 outputs a second alternating potential that oscillates between the second high potential H ₂ and the first high potential H ₁ . Since the output portion ROOUT of the ring oscillator element 28 is electrically connected to the pixel electrode 22, the pixel potential V _px can be set to the second alternating potential.

Next, conditions for setting the first node n1 to the low potential data DL and the high potential data DH or maintaining these data are shown. First, in order to set the first node n1 to the low potential data DL and the high potential data DH, when the high scanning potential SH is supplied to the scanning line 30 and the selection transistor 21 is turned on, the first node n1 The potential must be set to the high potential data DH or the low potential data DL. For this purpose, the high scanning potential SH (for example, SH = 36V) is set to a potential value higher than the high potential data DH (for example, DH = 35V) (SH ≧ DH). Thus, even when the potential supplied to the signal line 40 is the high potential data DH in the selected state, the high potential data DH can be written to the first node n1. In order to write an image signal to the first node n1 at high speed, the high scanning potential SH is set to a potential value equal to or higher than the sum of the high potential data DH and the threshold voltage Vth ₂₁ of the selection transistor 21 (SH ≧ DH + Vth ₂₁ ). In this case, even if the image signal is the high potential data DH, the selection transistor 21 is turned on, so that the image signal can be written to the first node n1 in a short time.

  In order to maintain the image signal (low potential data DL or high potential data DH) at the first node n1, the low scanning potential SL (for example, SL = 0V) is set to a potential equal to or lower than the low potential data DL (for example, DL = 1V). A value is preferable (SL ≦ DL). Since the low scanning potential SL is a value equal to or lower than the low potential data DL, the selection transistor 21 is in the non-selected state regardless of whether the potential of the first node n1 is the low potential data DL or the high potential data DH. Turns off. Thus, the image signal can be maintained at the first node n1.

As shown in FIG. 6, the average value of the high average potential HM and the low potential average LM is substantially matched with the common potential V _com (V _com = (HM + LM) / 2), and the first amplitude V _A1 of the first alternating potential is set. And the second amplitude V _A2 of the second alternating potential are preferably substantially equal (V _A1 = V _A2 = V _A ). Actually, in the present embodiment, as an example, HM = 25V, LM = 11V, _Vcom = 18V, and V _A1 = V _A2 = V _A = 9V, which satisfy these relationships. Thus, the strength of the first strong electric field FSF and the strength of the second strong electric field SSF are equal, and at the same time, the strength of the second weak electric field SWF and the strength of the first weak electric field FWF are equal. That is, since the electric field with respect to the first particles and the electric field with respect to the second particles are symmetric, a beautiful display can be realized and the lifetime of the electrophoretic material can be kept long. In the present specification, when “A and B are substantially equal” or “A and B are substantially equal”, this means that they are equal in terms of design concept, and some errors are present. It may be different. In other words, except that A and B are intentionally different from each other in design concept, “A and B are substantially equal” or “A and B are substantially identical” in other cases. It can be said. Specifically, when the significant figures of the potential and voltage are the same, it can be said that “A and B are substantially equal” or “A and B are substantially identical”. For example, in the above example, the significant number is one digit, and it can be said that V _A1 = 8.5V and V _A2 = 9.4V are both V _A1 = V _A2 = 9V.

"Electronics"
Next, electronic devices to which the above-described electrophoresis apparatus is applied will be described with reference to FIGS. Hereinafter, a case where the above-described electrophoresis apparatus is applied to electronic paper and an electronic notebook is taken as an example.

  FIG. 7 is a perspective view illustrating a configuration of electronic paper. As shown in FIG. 7, the electronic paper 400 includes the electrophoresis apparatus according to the present embodiment as the display unit 10. The electronic paper 400 has flexibility, and includes a main body 410 made of a rewritable sheet having the same texture and flexibility as conventional paper.

  FIG. 8 is a perspective view showing the configuration of the electronic notebook. As shown in FIG. 8, the electronic notebook 500 is one in which a plurality of electronic papers 400 shown in FIG. 7 are bundled and sandwiched between covers 501. The cover 501 includes display data input means (image signal supply circuit 130) for inputting display data sent from an external device, for example. Thereby, according to the display data, the display content can be changed or updated while the electronic paper is bundled.

  Since the electronic paper 400 and the electronic notebook 500 described above include the electrophoresis device according to the present embodiment, high-quality image display can be performed. In addition to these, the electrophoretic device according to the present embodiment can be applied to a display unit of an electronic device such as a wristwatch, a mobile phone, or a portable audio device.

  In the present embodiment, a capacitive element 25D is provided at the first node n1. As a result, the image signal is maintained at the first node n1 during the non-selection period of the scanning line 30, but the capacitive element 25D can be omitted. If the gate leakage current of the first transistor 26N and the gate leakage current of the second transistor 26P are small and the off-leakage current of the selection transistor 21 is small, the gate capacitance of the first transistor 26N and the second transistor 26P The image signal can be maintained by the gate capacitance. In such a case, the capacitive element 25D may be omitted.

  In this embodiment, the electrophoretic material 24 in which electrophoretic particles are dispersed in a liquid is used as an example of the electrophoretic device 150. However, the electrophoretic device 150 using other electrophoretic materials can be applied. is there. In other words, this embodiment can be applied to the entire electrophoretic device 150 that changes the distribution state of charged electrophoretic particles by applying a voltage between the pixel electrode 22 and the counter electrode. Specifically, the present invention can be applied to an electric powder flow display device that moves charged fine powder in a gas phase.

As described above, according to the electronic device 100 (driving method) according to the present embodiment, the following effects can be obtained.
According to the driving method of the present embodiment, it is possible to display a high-quality image with a high contrast ratio and no flicker. In addition, the control circuit 140, the electrophoresis apparatus 150, and the electronic device that can obtain a high-quality image can be provided.

(Embodiment 2)
“Mode 1 having a memory circuit instead of a capacitor”
FIG. 9 is an equivalent circuit diagram illustrating an electrical configuration of a pixel of the electrophoresis apparatus according to the second embodiment. FIG. 10 is a diagram for explaining an example of the driving method of the electrophoresis apparatus according to the second embodiment. The horizontal axis represents time, and the vertical axis represents potential. Hereinafter, the pixel configuration and driving method of the electrophoresis apparatus according to the second embodiment will be described. In addition, about the component same as Embodiment 1, the same number is attached | subjected and the overlapping description is abbreviate | omitted.

  This embodiment (FIG. 9) differs from the first embodiment (FIG. 4) in pixel configuration. Accordingly, as shown in FIG. 10, the potential relation slightly differs from that of the first embodiment (FIG. 6). Other configurations are almost the same as those of the first embodiment. In the first embodiment, the capacitive element 25 </ b> D is provided in the pixel 20, whereby the image signal is maintained in the non-selection period of the scanning line 30 at the first node n <b> 1. In the present embodiment, as shown in FIG. 9, a storage circuit 25S is provided at the first node n1. The memory circuit 25S maintains the image signal at the first node n1 during the non-selection period of the scanning line 30.

  The memory circuit 25S includes a first inverter circuit 253 for MC and a second inverter circuit 254 for MC. The output of the MC first inverter circuit 253 is electrically connected to the input of the MC second inverter circuit 254, and the output of the MC second inverter circuit 254 and the input of the first MC inverter circuit 253 are electrically connected. Connected. The input of the first inverter circuit for MC 253 is the first node n1. Thus, the image signal can be stably maintained at the first node n1 even during the non-selection period of the scanning line 30.

  As shown in FIG. 9, a memory controller 255 may be provided between the output of the MC second inverter circuit 254 and the input of the MC first inverter circuit 253. The memory controller 255 is set to perform a complementary operation with the selection transistor 21. As an example, the memory controller 255 is a transistor having a conductivity type different from that of the selection transistor, and the same signal is supplied to the gate of the memory controller 255 and the gate of the selection transistor. In this embodiment, since the selection transistor 21 is N-type, the memory controller 255 is P-type, and the gates of both transistors are electrically connected to the scanning line 30. As a result, the memory controller 255 can easily rewrite data in the storage circuit 25S and reliably maintain data in accordance with the scanning signal. Specifically, when the high scanning potential SH is supplied to the scanning line 30, the memory controller 255 cuts off the output of the MC second inverter circuit 254, so that the rewriting of the image signal at the first node n1 is performed. It becomes easy. Further, when the low scanning potential SL is supplied to the scanning line 30, the memory controller 255 is turned on, so that the MC first inverter circuit 253 and the MC second inverter circuit 254 are static memories. Functions as a device.

A fifth wiring 555 and a sixth wiring 556 are wired from the potential supply circuit 74 to the pixel 20. Therefore, in the present embodiment, the various potential lines 55 include the fifth wiring 555 and the sixth wiring 556. The MC first inverter circuit 253 and the MC second inverter circuit 254 are electrically connected to the fifth wiring 555 and the sixth wiring 556. The fifth wiring 555 is supplied with a fixed third low potential L ₃ , and the sixth wiring 556 is supplied with a fixed third potential H ₃ . Therefore, the third low potential L ₃ is supplied as the negative power source potential and the third high potential H ₃ is supplied as the positive power source potential to the first inverter circuit 253 for MC and the second inverter circuit 254 for MC. In order to rewrite the image signal at the first node n1, the high potential data DH is set to a potential value larger than the logic conversion potential V _TR253 of the first inverter circuit 253 for MC (DH> V _TR253 ), and the low potential data DL is MC The potential value is smaller than the logic conversion potential V _TR253 of the first inverter circuit 253 (DL <V _TR253 ). The logic conversion potential V _TR is an input potential at which the output logic of the inverter is inverted, and is the sum of a negative power supply potential and a logic conversion voltage (a potential that undergoes logic conversion when the negative power supply potential is 0V). The logic conversion potential V _TR is generally a potential value that is about the average value of the positive power supply potential and the negative power supply potential supplied to the inverter. In this embodiment, the logic conversion potential V _TR254 logical conversion potential V _TR253 and MC for the second inverter circuit 254 of the first inverter circuit 253 for MC is almost the same as the common potential V _com, as an example, is approximately 18V _{(V TR253 = V TR254 = V} com = 18V). In the case the logical transformation potential V _TR254 logical conversion potential V _TR253 and MC for the second inverter circuit 254 of the first inverter circuit 253 for MC are equal, referred to these as MC for inverter circuit logic conversion potential V _TRMC. The high potential data DH is DH = 23V as an example, and the low potential data DL is DL = 13V as an example. Since the pixel 20 includes the memory circuit 25S having the memory controller 255, the potential of the high potential data DH can be lowered and the potential of the low potential data DL can be raised as compared with the first embodiment. Become.

Even if the potential of the high potential data DH is lowered and the potential of the low potential data DL is increased and the image signal is written to the first node n1 as compared with the first embodiment, if the scanning line 30 enters the non-selection period, the memory controller 255 is turned on, and the first inverter circuit for MC 253 and the second inverter circuit for MC 254 function as static storage devices. As a result, the potential of the first node n1 becomes the third high potential H ₃ during the non-selection period when the high potential data DH is written. Similarly, when the low potential data DL is written, the potential of the first node n1 becomes the third low potential L ₃ during the non-selection period. On the contrary, even if data having a higher potential than the third high potential H ₃ is written as the high potential data DH to the first node n1, the potential of the first node n1 during the non-selection period is The potential is H ₃ . Therefore, even if the high potential data DH is set to a potential value larger than the third high potential H ₃ , the effect cannot be obtained. Similarly, even than the third low potential L ₃ as a low-potential data DL as data in the low potential is written to the first node n1, the potential of the first node n1 to the non-selection period, the third low arrows tension The potential is L ₃ . Therefore, even if the low potential data DL is set to a potential value smaller than the third low potential L ₃ , the effect cannot be obtained. In this way, in the present embodiment, the high potential data DH is set to a potential value that is greater than the logic conversion potential V _TR253 of the first inverter circuit 253 for MC and equal to or less than the third high potential H ₃ (V _TR253 < DH ≦ H ₃ ). The low potential data DL is smaller than the logic conversion potential V _TR253 of the first inverter circuit 253 for MC and is set to a potential value equal to or higher than the third low potential L ₃ (L ₃ ≦ DL <V _TR253 ).

In order to set the pixel potential V _px of the pixel 20 displaying the first color (white) to the first alternating potential, the first transistor 26N and the third transistor 27N are turned on, and the second transistor 26P and the fourth transistor 27P are turned on. Are turned off. In order to turn off the second transistor 26P and the fourth transistor 27P, the potential of the first node n1 is set to the third high potential H ₃ (for example, H ₃ = 36V), and this value is set to the second transistor 26P. The highest potential of the source supplied to the fourth transistor 27P, that is, a value equal to or higher than the first high potential H ₁ (for example, H ₁ = 34 V) (H ₃ ≧ H ₁ ). By setting the third high potential H ₃ to a value equal to or higher than the first high potential H ₁ , the first transistor 26N and the third transistor 27N are turned on, and the gate potentials of the second transistor 26P and the fourth transistor 27P are It becomes higher than the source potential and is turned off.

In order to set the pixel potential V _px of the pixel 20 displaying the second color (black) to the second alternating potential, the second transistor 26P and the fourth transistor 27P are turned on, and the first transistor 26N and the third transistor 27N are turned on. Is turned off. In order to turn off the first transistor 26N and the third transistor 27N, the potential of the first node n1 is set to the third low potential L ₃ (for example, L ₃ = 0V), and this value is set to the first transistor 26N and the third transistor 27N. The lowest potential supplied to the sources of the three transistors 27N, that is, the first low potential L ₁ (for example, L ₁ = 2V) or less (L ₁ ≧ L ₃ ). By setting the third low potential L ₃ to a value equal to or lower than the first low potential L ₁ , the second transistor 26P and the fourth transistor 27P are turned on, and the gate potentials of the first transistor 26N and the third transistor 27N are It becomes lower than the source potential and is turned off.

The relationship between the potential of the scanning signal and the potential of the image signal is the same as in the first embodiment, but from the viewpoint of reducing the number of power supplies, the high scanning potential SH and the third high potential H ₃ are made the same (SH). = H ₃ ), the low scanning potential SL and the third low potential L ₃ may be the same (SL = L ₃ ).

  As shown in FIG. 10, the same driving as in the first embodiment is realized even with the above-described potential relationship. In the present embodiment, in addition to the effects obtained in the first embodiment, the potential of the high potential data DH can be lowered as compared with the first embodiment. Therefore, if the high scanning potential SH is the same as that in the first embodiment, It becomes possible to rewrite the image signal of the first node n1 faster than in the first embodiment. That is, a higher speed operation than that of the first embodiment is realized. Furthermore, since the image signal is maintained by the static storage circuit 25S, data can be maintained for a longer time than in the first embodiment.

(Embodiment 3)
“Mode 2 having a memory circuit instead of a capacitor”
FIG. 11 is an equivalent circuit diagram illustrating an electrical configuration of a pixel of the electrophoresis apparatus according to the third embodiment. FIG. 12 is a diagram for explaining an example of a method for driving the electrophoresis apparatus according to the third embodiment. The horizontal axis represents time and the vertical axis represents potential. Hereinafter, the pixel configuration and driving method of the electrophoresis apparatus according to the third embodiment will be described. In addition, about the same component as Embodiment 2, the same number is attached | subjected and the overlapping description is abbreviate | omitted.

  This embodiment (FIG. 11) differs from the second embodiment (FIG. 9) in pixel configuration. Accordingly, as shown in FIG. 12, the potential relation slightly differs from that of the second embodiment (FIG. 10). Other configurations are almost the same as those of the second embodiment. In the second embodiment, six wires from the first wire 551 to the sixth wire 556 are used. On the other hand, in the present embodiment, as shown in FIG. 11, the same effect as in the second embodiment can be exhibited by four wirings from the first wiring 551 to the fourth wiring 554.

Four wires from the first wire 551 to the fourth wire 554 are provided from the potential supply circuit 74 to the pixel 20. The second wiring 552 also serves as the sixth wiring 556 of the second embodiment, and the first high potential H ₁ and the third high potential H ₃ are the same (for example, H ₁ = H ₃ = 32 V). The third wiring 553 also serves as the fifth wiring 555 of the second embodiment, and the first low potential L ₁ and the third low potential L ₃ are the same (for example, L ₁ = L ₃ = 0V). That is, the MC first inverter circuit 253 and the MC second inverter circuit 254 constituting the memory circuit 25S are electrically connected to the third wiring 553 and the second wiring 552, and the MC first inverter circuit 253 The first low potential L ₁ is supplied as a negative power supply potential and the first high potential H ₁ is supplied as a positive power supply potential to the second inverter circuit 254 for MC.

As shown in FIG. 12, when the high potential data DH (for example, DH = 21V) is written to the first node n1, the storage circuit 25S changes the potential of the first node n1 to the first high potential H. ₁ (for example, H ₁ = 32V). When the gate potential is's first high potential H _1, it turned on without problems and the first transistor 26N and the third transistor 27N. On the other hand, in the fourth transistor 27P, the gate potential (in this example, H ₁ = 32V) is higher than the source potential (in this example, H ₂ = 14V) (in this example, V _gs = + 18V), the fourth transistor 27P is turned off. In the second transistor 26P, the source potential (H ₁ = 32V in this example) is equal to the gate potential (H ₁ = 32V in this example) (in this example, V _gs = 0V), Since the fourth transistor 27P is an enhancement type, the arrow is turned off. Thus, the ring oscillator element 28 oscillates between the first low potential L ₁ (for example, L ₁ = 0 V) and the second low potential L ₂ (for example, L ₂ = 18 V) at the pixel electrode 22. An alternating potential will be supplied.

When the low potential data DL (for example, DL = 11V) is written to the first node n1, the memory circuit 25S maintains the potential of the first node n1 at the first low potential L ₁ (for example, L ₁ = 0V). To do. When the gate potential is's first low potential L _1, it turned on without problems and the second transistor 26P and the fourth transistor 27P. On the other hand, in the first transistor 26N, the gate potential (L ₁ = 0V in this example) is lower than the source potential (L ₂ = 18V in this example) (in this example). , V _gs = −18 V), the first transistor 26N is turned off. In the third transistor 27N, the source potential (L ₁ = 0V in this example) and the gate potential (L ₁ = 0V in this example) are equal (in this example, V _gs = 0V), Since the third transistor 27N is an enhancement type, it is turned off. Thus, the ring oscillator element 28 oscillates between the second high potential H ₂ (eg, H ₂ = 14V) and the first high potential H ₁ (eg, H ₁ = 32V) at the pixel electrode 22. An alternating potential will be supplied. Other configurations are the same as those of the second embodiment.

The relationship between the potential of the scanning signal and the potential of the image signal is the same as that in the second embodiment. However, from the viewpoint of reducing the number of power supplies, the high scanning potential SH and the third high potential H ₃ are the same (SH). = H ₃ ), the low scanning potential SL and the third low potential L ₃ may be the same (SL = L ₃ ).

As shown in FIG. 12, the same driving as in the second embodiment is realized even with the above-described potential relationship. In the present embodiment, in addition to the effects obtained in the second embodiment, the number of wirings can be reduced, and the maximum potential is changed from H ₃ = 36 V (see FIG. 10) in the second embodiment to H in the present embodiment. ₁ = Can be lowered to 32V.

  The present invention is not limited to the above-described embodiment, and various changes and improvements can be added to the above-described embodiment. A modification will be described below.

(Modification 1)
"Equipped with buffer circuit"
This modification is different from the first to third embodiments in that a buffer circuit is provided in the pixel 20. Other configurations are almost the same as those of the first and third embodiments. In the first to third embodiments, the output portion ROOUT of the ring oscillator element 28 is directly connected to the pixel electrode 22. The oscillation waveform from the ring oscillator element 28 is not always a rectangular wave, and the amplitude thereof does not always match the power supply voltage (difference between the positive power supply potential and the negative power supply potential). For example, the oscillation waveform can be a trapezoidal wave, a sine wave, a triangular wave, a sawtooth wave, or the like. These alternating electric fields may be supplied to the pixel electrode 22 as they are. In such a case, a buffer circuit may be provided between the output portion ROOUT of the ring oscillator element 28 and the pixel electrode 22. The positive power supply unit of the buffer circuit is electrically connected to the positive power supply unit ROVDD of the ring oscillator element 28, and the negative power supply unit of the buffer circuit is electrically connected to the negative power supply unit ROVSS of the ring oscillator element 28. As an example of the buffer circuit, an even number of inverter circuits are connected in series. When the oscillation waveform from the ring oscillator element 28 is a sine wave, a triangular wave, a sawtooth wave, or the like, the amplitude may be smaller than the power supply voltage. By providing the buffer circuit between the output portion ROOUT of the ring oscillator element 28 and the pixel electrode 22, the amplitude of the pixel potential V _px matches the power supply voltage, and the effects of the above-described embodiments can be obtained.

  FSF ... first strong electric field, FWF ... first weak electric field, SSF ... second strong electric field, SWF ... second weak electric field, 10 ... display unit, 20 ... pixel, 21 ... select transistor, 22 ... pixel electrode, 23 ... common Electrode, 24 ... electrophoretic material, 25D ... capacitance element, 25S ... memory circuit, 26N ... first transistor, 26P ... second transistor, 27N ... third transistor, 27P ... fourth transistor, 28 ... ring oscillator element, 30 ... Scanning line, 40 ... signal line, 50 ... common potential line, 55 ... various potential lines, 55F ... fixed potential line, 60 ... control unit, 70 ... drive circuit, 71 ... controller, 72 ... scan line drive circuit, 73 ... signal Line drive circuit, 74 ... potential supply circuit, 80 ... image signal processing unit, 90 ... storage unit, 100 ... electronic device, 110 ... frame memory, 120 ... operation unit, 130 ... Image signal supply circuit, 140 ... control circuit, 150 ... electrophoresis device, 251 ... first electrode, 252 ... second electrode, 253 ... MC first inverter circuit, 254 ... MC second inverter circuit, 255 ... memory controller 281 ... RO first inverter circuit, 282 ... RO second inverter circuit, 283 ... RO third inverter circuit, 400 ... electronic paper, 410 ... main body, 500 ... electronic notebook, 501 ... cover, 551 ... first One wiring, 552... Second wiring, 553. Third wiring, 554. Fourth wiring, 555. Fifth wiring, 556.

Claims (10)

A selection transistor disposed at the intersection of the scanning line and the signal line, a first transistor whose source is electrically connected to the first wiring, and a second transistor whose source is electrically connected to the second wiring; A third transistor having a source electrically connected to a third wiring; a fourth transistor having a source electrically connected to a fourth wiring; a ring oscillator element; a pixel electrode; a common electrode; and the pixel electrode. And an electrophoretic material to which an electric field generated between the common electrode and the common electrode is applied,
One of the source and the drain of the selection transistor is electrically connected to the signal line,
The other of the source and drain of the selection transistor is electrically connected to the gate of the first transistor, the gate of the second transistor, the gate of the third transistor, and the gate of the fourth transistor,
A gate of the selection transistor is electrically connected to the scanning line;
The drain of the first transistor and the drain of the second transistor are electrically connected to a positive power supply unit of the ring oscillator element,
The drain of the third transistor and the drain of the fourth transistor are electrically connected to the negative power source of the ring oscillator element,
The pixel electrode is electrically connected to an output of the ring oscillator element;
The first transistor and the third transistor are N-type transistors,
The electrophoretic device, wherein the second transistor and the fourth transistor are P-type transistors. A method for driving an electrophoretic device according to claim 1,
A second low potential is supplied to the first wiring,
A first high potential is supplied to the second wiring,
A first low potential is supplied to the third wiring,
A second high potential is supplied to the fourth wiring,
A common potential is supplied to the common electrode,
The second low potential is higher than the first low potential,
The second high potential is lower than the first high potential,
The average potential of the first high potential and the second high potential (high average potential) is higher than the average potential of the first low potential and the second low potential (low average potential),
The method of driving an electrophoresis apparatus, wherein the common potential is a potential value between the high average potential and the low average potential. The second low potential is higher than the common potential;
The method for driving an electrophoresis apparatus according to claim 2, wherein the second high potential is lower than the common potential. High potential data and low potential data are supplied to the signal line,
The high potential data is a value equal to or higher than the first high potential,
4. The method for driving an electrophoresis apparatus according to claim 2, wherein the low potential data is a value equal to or lower than the first low potential. The scanning line is supplied with a high scanning potential and a low scanning potential,
The high scanning potential is a value equal to or higher than the high potential data.
5. The method for driving an electrophoretic device according to claim 2, wherein the low scanning potential is a value equal to or lower than the low potential data. The average value of the high average potential and the low potential average substantially coincides with the common potential,
6. The difference between the second low potential and the first low potential and the difference between the first high potential and the second high potential are substantially equal. 6. A driving method of the electrophoresis apparatus according to claim 1.   7. The electricity according to claim 2, wherein an oscillation period of the ring oscillator element is shorter than the frame period when a period for forming one frame image is a frame period. Driving method of electrophoresis apparatus.   A control circuit for an electrophoretic device, wherein the driving method according to claim 2 is performed.   An electrophoresis apparatus comprising the control circuit according to claim 8.   An electronic apparatus comprising the electrophoresis apparatus according to claim 9.

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