JP2015043659A - Power converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To avoid unstable control caused by power supply voltage fluctuation, without increasing a switching frequency of an inverter.SOLUTION: A subtracter 41 receives a voltage control rate k and correction amount Δk as input, and generates a corrected voltage control rate k'. A third block 403 generates a switching signal S from the corrected voltage control rate k' and voltage command values Vd*, Vq*. A first block 401 and a second block 402 generate the voltage command values Vd*, Vq* from currents Iu, Iv, Iw and a command value ω*. The upper limit value and lower limit value of the correction amount Δk are determined by a correction amount Δk in the case that power supply impedance and power supply voltage have no distortion.

Description

  The present invention relates to a power converter, and more particularly to a full-wave rectifier that outputs a DC voltage by full-wave rectifying a first AC voltage, a choke input type LC filter, and a second output by switching the output of the LC filter. It is related with an apparatus provided with the inverter which converts into the alternating voltage of.

  Non-Patent Document 1 listed below introduces a power converter that eliminates a smoothing circuit such as an electrolytic capacitor from a DC link. In such a configuration, an AC filter composed of an inductor and a capacitor is provided on the AC power supply side in order to improve the waveform of the input current.

  Patent Document 1 listed below discloses a configuration in which a choke input type LC filter is provided in a DC link portion between a diode bridge and an inverter.

Japanese Patent No. 4067021 Japanese Patent No. 4750553 JP 2010-252410 A

Iimori, Shinohara, Muroya, Kitanaka, "Converter current control method and operation characteristics of voltage source inverter without smoothing circuit for driving induction motor", IEEJ Transactions D, February 1999, Vol. 119, No. 2, p. 133-141

  When the power supply voltage is distorted or fluctuated, it becomes an excitation source, and the voltage of the DC link unit vibrates at a frequency equal to or higher than the resonance frequency determined by the LC filter.

  Patent Document 1 discloses a technique for controlling the inverter based on the voltage across the inductance element constituting the LC filter, thereby suppressing the distortion of the input current while suppressing the vibration of the DC voltage. In Patent Document 2, an inverter is controlled based on a DC link voltage.

  When such a control band is narrow (for example, when the switching frequency of the inverter is low), if the operation amount used for the control vibrates at a high frequency, the stability as the control system decreases. When the stability of the control system is lowered, an oscillation phenomenon is caused.

  In order to maintain stability as such a control system, it is conceivable to feed back only the voltage across the inductance element or the resonance frequency component of the DC link voltage to the control. This may be realized by using a band pass filter or the like and extracting only the frequency component to be compensated.

  However, in order to extract such a specific frequency component, it is necessary to consider variations in the inductors and capacitances of the elements constituting the LC filter, and also in the power supply impedance. Such variation leads to variation in resonance frequency, and it is not easy to extract a specific frequency component.

  It is also conceivable to remove high-order frequencies using a low-pass filter. However, if the resonance frequency and the vibration component are not sufficiently separated, there is a possibility that even a necessary component is removed. In addition, an increase in phase delay causes instability of the control system.

  In Patent Document 3, it is considered that by restricting the operation amount used for the control, the operation amount does not become excessive, and the stability of the control is prevented. However, there is no specific guideline regarding the limitation of the operation amount. Further, Patent Document 3 is a technique for dealing with load fluctuations and does not deal with distortion or fluctuations in the power supply voltage.

  In view of the above circumstances, an object of the present invention is to avoid control instability due to power supply voltage fluctuation without increasing the switching frequency of an inverter.

  The power converter according to the present invention includes a full-wave rectifier (1) that outputs a DC voltage by full-wave rectifying a first AC voltage input from a power supply (E1), an inductor (L1), and a capacitor (C1). A choke input type LC filter (2) that attenuates and outputs the high-frequency side of the DC voltage, and an inverter that switches the output of the LC filter to convert it to a second AC voltage ( 3) and a control unit (4) that controls the ratio of the amplitude of the second AC voltage to the output of the LC filter to cause the inverter to perform the switching.

  Then, the control unit calculates the ratio with a correction amount (Δk) based on at least one of the voltage across the inductor (VL), the current input to the inductor (iL), and the voltage across the capacitor (Vdc). A correction unit (41) to be corrected, and a correction value determination unit that determines the correction amount with an upper limit of a predetermined value that is equal to or greater than the maximum value of the correction amount when there is no distortion of the power supply impedance and the first AC voltage ( 42).

  Preferably, the correction value determining unit (42) determines a lower limit value of the correction amount with a predetermined value that is equal to or less than a minimum value of the correction amount when there is no distortion of the power source impedance and the first AC voltage. .

  Control instability due to power supply voltage fluctuations can be avoided without increasing the switching frequency of the inverter.

It is a circuit diagram which illustrates the composition of the power converter concerning an embodiment. It is a block diagram which shows the structure of a control part. It is a graph which shows the time change of the operation amount. It is a graph which shows various amounts at the time of setting correction amount based on a reactor voltage. It is a graph which shows various amounts at the time of setting correction amount based on a reactor voltage.

  FIG. 1 is a circuit diagram illustrating the configuration of the power conversion device according to this embodiment. The power conversion apparatus includes a full-wave rectifier 1 that performs full-wave rectification, an LC filter 2, an inverter 3, and a control unit 4.

  The full-wave rectifier 1 performs full-wave rectification on the N (N is a natural number) phase AC voltage input from the AC power supply E1, and outputs a DC voltage between the DC lines LH and LL. In FIG. 1, when N = 3, that is, the full-wave rectifier 1 is exemplified as a three-phase rectifier circuit that inputs a three-phase AC voltage. However, the number of phases of the AC voltage input to the full-wave rectifier 1, that is, the number of phases of the full-wave rectifier 1 is not limited to three phases, and may be set as appropriate.

  In FIG. 1, the full wave rectifier 1 is illustrated as a diode bridge. However, the full-wave rectifier 1 is not limited to a diode bridge. For example, a separately excited rectifier circuit or a self-excited rectifier circuit may be used. As the separately excited rectifier circuit, for example, a thyristor bridge rectifier circuit can be adopted, and as the self-excited rectifier circuit, for example, a PWM (Pulse-Width-Modulation) type AC-DC converter can be adopted.

  The LC filter 2 is a choke input type low-pass filter. The LC filter 2 includes a capacitor C1 and a reactor (inductor) L1.

  The capacitor C1 is provided between the DC lines LH and LL. The capacitor C1 is a film capacitor, for example. Such a capacitor C1 is less expensive than an electrolytic capacitor. On the other hand, the capacitance of the capacitor C1 is smaller than the capacitance of the electrolytic capacitor, and the DC voltage Vdc between the DC lines LH and LL is not sufficiently smoothed. In other words, the capacitor C1 allows pulsation of the rectified voltage that is full-wave rectified by the full-wave rectifier 1. Therefore, DC voltage Vdc has a pulsation component (that is, a pulsation component having a frequency 2N times the frequency of N-phase AC voltage) due to full-wave rectification of the N-phase AC voltage. In the illustration of FIG. 1, since the three-phase AC voltage is full-wave rectified, the DC voltage Vdc pulsates at a frequency six times the frequency of the three-phase AC voltage.

  The reactor L1 is provided on the DC line LH or the DC line LL (DC line LH in the illustration of FIG. 1) on the full-wave rectifier 1 side than the capacitor C1.

  In FIG. 1, the power source impedance between the AC power source E <b> 1 and the full-wave rectifier 1 is indicated by a series connection body 9 of a resistance and an inductance.

  Since the capacitance of the capacitor C1 is small as described above, the resonance frequency of this LC filter tends to be high. Similarly, the smaller the inductance of the reactor L1, the higher the resonance frequency tends to be. For example, in FIG. 1, when the capacitance of the capacitor C1 is 40 μF and the inductance of the reactor L1 is 0.5 mH, the resonance frequency is about 1.125 kHz.

  The inverter 3 inputs a DC voltage (DC voltage supported by the capacitor C1) Vdc between the DC lines LH and LL. Then, inverter 3 converts DC voltage Vdc into an AC voltage based on switching signal S from control unit 4, and outputs this AC voltage to inductive load M1.

  In FIG. 1, for example, the inverter 3 includes a pair of switching units connected in series between the DC lines LH and LL for three phases. In the example of FIG. 1, a pair of switching units Sup and Sun are connected in series, a pair of switching units Svp and Svn are connected in series, and a pair of switching units Swp and Swn are connected in series. A connection point between a pair of switching units Sxp, Sxn (x represents u, v, w, and so on) of each phase is connected to the inductive load M1 via the output line Px. When these switching units Sxp and Sxn are turned on / off based on an appropriate switching signal S, the inverter 3 converts the DC voltage Vdc into a three-phase AC voltage and outputs it to the inductive load M1.

  The inductive load M1 may be, for example, a rotating machine (for example, an induction machine or a synchronous machine). Moreover, although the three-phase inductive load M1 is illustrated in the illustration of FIG. 1, the number of phases is not limited to this. In other words, the inverter 3 is not limited to a three-phase power converter. Below, the alternating voltage which the inverter 3 outputs is also called output voltage.

  The inverter 3 is controlled based on the voltage control rate k via the switching signal S. The voltage control rate k is the ratio (= Vm / Vdc) of the amplitude Vm of the output voltage of the inverter 3 to the DC voltage Vdc (which can be grasped as the output of the LC filter 2). That is, the voltage control rate k is a value indicating how much AC voltage is output with respect to the DC voltage Vdc.

  The DC voltage Vdc is affected by power supply voltage distortion and fluctuation. Even in such a case, if control for maintaining the voltage control rate k is performed, the amplitude Vm is also affected by the distortion and fluctuation of the power supply voltage. Such fluctuations in amplitude lead to control instability.

  Of course, if the control can be performed at a frequency higher than the frequency of the fluctuation, in other words, if the control can be performed in a wide band, the control for avoiding the fluctuation may be performed in a timely manner. However, it is not easy to control in such a wide band, in other words, to increase the switching frequency of the inverter 3 in consideration of the high frequency of power supply fluctuation and distortion.

  Therefore, in order to avoid fluctuations in the amplitude Vm from such influences, the voltage control rate k is corrected. More specifically, the voltage control rate k is set with a correction amount Δk based on at least one of the voltage across the reactor L1 (reactor voltage) VL, the current iL input to the reactor L1, and the DC voltage Vdc as the voltage across the capacitor C1. Make corrections to reduce.

  The power converter is provided with a capacitor voltage detector 5 and a reactor voltage detector 6. The capacitor voltage detector 5 detects the voltage across the capacitor C1 (DC voltage Vdc), for example, performs analog / digital conversion on this, and outputs it to the controller 4.

  The reactor voltage detection unit 6 detects the reactor voltage VL, performs, for example, analog / digital conversion on this, and outputs it to the control unit 4. Here, as an example, the reactor voltage VL is a voltage based on the potential on the capacitor C1 side among the potentials at both ends of the reactor L1.

  The reactor current detection unit 7 detects a current (reactor current) iL of the reactor L1, for example, performs analog / digital conversion on this, and outputs it to the control unit 4. Here, as an example, the reactor current iL is a current having a positive direction from the full-wave rectifier 1 to the inverter 3.

  The input current detection unit 8 detects the current Ix given from the output line Px to the inductive load M1, and performs analog / digital conversion on the current Ix, for example, and outputs it to the control unit 4.

  The correction itself of the voltage control rate k using the correction amount Δk is known in, for example, the above-described Patent Documents 1 to 3 and the like. A brief description is given below.

  FIG. 2 is a block diagram showing the configuration of the control unit 4. The control unit 4 includes a first block 401, a second block 402, a third block 403, and a subtracter 14.

  The current Ix is input to the first block 401, and the operation information of the inductive load M1, for example, the rotation angular frequency ω of the rotating machine, and the currents Id and Iq in the rotation axis coordinate system, for example, are output. These outputs are input to the second block 402 together with the deviation Δω of the rotational angular frequency ω with respect to the command value ω *.

  For example, the second block 402 outputs voltage command values Vd * and Vq * in the rotation axis coordinate system to the third block 403. The third block 403 generates the switching signal S based on the voltage command values Vd * and Vq * and the corrected voltage control rate k ′.

  The voltage control rate k ′ is obtained by the subtractor 14 as the difference between the voltage control rate k and the correction amount Δk. That is, the subtractor 14 functions as a correction unit that corrects the voltage control rate k with the correction amount Δk.

  From the above, the control unit 4 has a function of controlling the voltage control rate k (or voltage control rate k ′) to cause the inverter 3 to perform switching.

  The control unit 4 has a correction value determination unit 42 that determines the correction amount Δk. The correction value determining unit 42 includes an amplifying unit 42a having a control gain Gk and a limiting unit 42b. The amplifying unit 42a receives at least one of the reactor voltage VL, the reactor current iL, and the DC voltage Vdc and multiplies it by a control gain Gk to output it. The limiting unit 42b determines an upper limit value and a lower limit value of the correction amount Δk. If the output of the amplifying unit 42a takes a value between the upper limit value and the lower limit value, the limiting unit 42b outputs this as the correction amount Δk. If the output of the amplifying unit 42a is equal to or greater than the upper limit value, the limiting unit 42b outputs the upper limit value as the correction amount Δk. If the output of the amplifying unit 42a is equal to or lower than the lower limit value, the limiting unit 42b outputs the lower limit value as the correction amount Δk.

  As the current input to the LC filter 2 changes abruptly, the resonance frequency components of the reactor voltage VL, the reactor current iL, and the DC voltage Vdc increase. Therefore, when there is no power source impedance, the amplitude of the resonance frequency component is the largest.

  Therefore, the upper limit value and the lower limit value are determined based on the operation amount of the resonance suppression control when there is no power source impedance, that is, the value of the correction amount Δk. Thereby, when there is no distortion or fluctuation in the power supply voltage, the operation amount of the resonance suppression control is not affected.

  Therefore, the upper limit of the correction amount Δk is set to a predetermined value equal to or greater than the maximum value of the correction amount Δk when the power supply voltage is not distorted and there is no power supply impedance. Similarly, the lower limit of the correction amount Δk is set to a predetermined value equal to or less than the minimum value of the correction amount Δk when the power supply voltage is not distorted and there is no power supply impedance.

  FIG. 3 is a graph showing temporal changes in the operation amount Δk. For each of the cases where the inductance component 1 of the power source impedance is 0.0 mH, 0.2 mH, and 0.4 mH, the temporal change of the operation amount Δk is shown. The operation amount Δk varies periodically with respect to time, and the variation amount increases as the inductance component decreases as described above.

  The maximum value QM and the minimum value Qm of the manipulated variable Δk in the case of l = 0.0 mH (this corresponds to the case where there is no power source impedance) are shown. The upper limit ΔkM of the operation amount Δk is set as (QM−Qm) × a + QM (a ≧ 0), and the lower limit Δkm is set as Qm− (QM−Qm) × b (b ≧ 0). For example, a = b = 0.1.

  Such upper limit ΔkM and lower limit Δkm can be obtained in advance by actual measurement or simulation, and can be stored in the limiting unit 42b.

  The controller 4 includes a microcomputer and a storage device, for example. The microcomputer executes each processing step (in other words, a procedure) described in the program. The storage device is composed of one or more of various storage devices such as a ROM (Read Only Memory), a RAM (Random Access Memory), a rewritable nonvolatile memory (EPROM (Erasable Programmable ROM), etc.), and a hard disk device, for example. Is possible. The storage device stores various information, data, and the like, stores a program executed by the microcomputer, and provides a work area for executing the program. It can be understood that the microcomputer functions as various means corresponding to each processing step described in the program, or can realize that various functions corresponding to each processing step are realized. The controller 4 is not limited to this, and various procedures executed by the controller 4 or various means or various functions implemented may be realized by hardware.

  4 and 5 are graphs showing various amounts when the correction amount Δk is set based on the reactor voltage VL. Each shows the behavior of various quantities when pulse-like distortion occurs in the three-phase power supply voltages Vr, Vs, and Vt. However, FIG. 4 shows the case where the upper limit ΔkM and the lower limit Δkm of the operation amount Δk are not set, and FIG. 5 shows the case where the upper limit ΔkM and the lower limit Δkm of the operation amount Δk are set (provided that a = b = 0.1 is set). did).

  As understood from comparison between FIG. 5 and FIG. 4, the amplitudes of the DC voltage Vdc and the reactor current iL are reduced by providing the upper limit ΔkM and the lower limit Δkm of the manipulated variable Δk. For easy comparison, FIG. 5 shows the maximum and minimum values of the DC voltage Vdc and the reactor current iL shown in FIG. 4 in addition to the broken lines indicating the maximum and minimum values of the DC voltage Vdc and the reactor current iL. A broken line is also added.

  It can be seen that the difference between the maximum value and the minimum value (indicated by a broken line) of the operation amount Δk shown in FIG. 5 is significantly reduced as compared with the operation amount Δk shown in FIG.

  As described above, by setting the upper limit ΔkM and the lower limit Δkm of the operation amount Δk as described above, control instability due to fluctuations in the power supply voltage is avoided without increasing the switching frequency of the inverter 3.

  In view of the known techniques shown in Patent Documents 1 to 3 and Non-Patent Document 1, even when the correction amount Δk is set based on the reactor current iL and the DC voltage Vdc, the upper limit ΔkM and the lower limit of the operation amount Δk. By setting Δkm as described above, it is obvious that the same effect as that obtained when the correction amount Δk is set based on the reactor voltage VL can be obtained. The same applies when the correction amount Δk is set by combining a plurality of reactor currents iL, DC voltage Vdc, and reactor voltage VL.

  Also, it is obvious that even if only one of the upper limit ΔkM and the lower limit Δkm of the operation amount Δk is set, a corresponding effect can be obtained.

DESCRIPTION OF SYMBOLS 1 Full wave rectifier 2 LC filter 3 Inverter 4 Control part 41 Correction part 42 Correction value determination part C1 Capacitor L1 Inductor

Claims (2)

A full-wave rectifier (1) for full-wave rectifying the first AC voltage input from the power supply (E1) and outputting a DC voltage;
A choke input type LC filter (2) having an inductor (L1) and a capacitor (C1), which attenuates and outputs the high frequency side of the DC voltage;
An inverter (3) for switching the output of the LC filter to convert it to a second AC voltage;
A control unit (4) for controlling the ratio of the amplitude of the second AC voltage to the output of the LC filter and causing the inverter to perform the switching;
The controller is
A correction unit (41) that corrects the ratio by a correction amount (Δk) based on at least one of the voltage across the inductor (VL), the current input to the inductor (iL), and the voltage across the capacitor (Vdc). )When,
A power conversion device comprising: a correction value determining unit (42) for determining the correction amount with an upper limit of a predetermined value equal to or greater than a maximum value of the correction amount when there is no distortion of the power source impedance and the first AC voltage .   The correction value determination unit (42) determines a lower limit value of the correction amount with a predetermined value equal to or less than a minimum value of the correction amount when there is no distortion of the power source impedance and the first AC voltage. 1. The power conversion device according to 1.

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