JP2015022172A - Liquid crystal display unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display unit with good display quality.SOLUTION: The liquid crystal display unit comprises a first substrate, a second substrate, and a liquid crystal layer. The first substrate includes: a source wire; a switching element electrically connected to the source wire; a first pixel electrode positioned on one side of the source wire, and having a first end opposite to the source wire; and a second pixel electrode positioned on the other side of the source wire, electrically connected to the switching element, and having a second end away from a position opposite to the source wire. The second substrate includes: a light-shielding layer positioned above the source wire on a side closer to the second pixel electrode than a position immediately above the first end, and covering a gap between the source wire and the second end; a first color filter positioned above the first pixel electrode; a second color filter positioned above the second pixel electrode and having a color different from the first color filter; and a common electrode opposite to the first pixel electrode and to the second pixel electrode. The liquid crystal layer is held between the first substrate and the second substrate.

Description

  Embodiments described herein relate generally to a liquid crystal display device.

  Liquid crystal display devices are used in various fields as display devices. In such a liquid crystal display device, when a driving method such as dot inversion driving in which a pixel potential written between adjacent pixels has a reverse polarity is applied, the alignment of liquid crystal molecules is caused by an electric field generated between adjacent pixel electrodes. There is a problem that the display quality is impaired. In response to such a problem, the overlap width of the pixel electrode and the gate signal line positioned in the alignment direction of the liquid crystal molecules is made larger than the overlap width of the pixel electrode and the gate signal line positioned in the opposite direction. By making the overlapping width of the pixel electrode and the source signal line positioned in the alignment direction larger than the overlapping width of the pixel electrode and the source signal line positioned in the reverse direction, a reverse tilt domain is generated by an electric field generated between adjacent pixel electrodes. A technique is disclosed in which the occurrence of the light is shielded by the overlapping portion of the gate signal line with the pixel electrode and the overlapping portion of the source signal line and the pixel electrode.

JP-A-10-104664

  An object of the present embodiment is to provide a liquid crystal display device with good display quality.

According to this embodiment,
A source line; a switching element electrically connected to the source line; and a first pixel electrode positioned on one side of the source line and having a first end facing the source line. One pixel electrode and a second pixel electrode that is located on the other side of the source wiring and is electrically connected to the switching element, and has a second end spaced from the position facing the source wiring A first substrate provided with a second pixel electrode; and positioned above the source wiring on the second pixel electrode side than a position immediately above the first end, and the source wiring and the second end A light-shielding layer covering a gap between the first pixel electrode, a first color filter located above the first pixel electrode, and a second color filter located above the second pixel electrode and having a color different from that of the first color filter And said A liquid crystal display device comprising: a second substrate comprising one pixel electrode and a common electrode facing the second pixel electrode; and a liquid crystal layer held between the first substrate and the second substrate. Is provided.

According to this embodiment,
A first source line and a second source line; a first switching element electrically connected to the first source line; a second switching element electrically connected to the second source line; A first pixel electrode that is spaced from a position facing the first source line between the source line and the second source line and is electrically connected to the first switching element, and is opposed to the second source line. A first pixel electrode having a first end that is electrically connected to the second switching element and spaced from a position facing the second source wiring between the first source wiring and the second source wiring. A second pixel electrode having a second pixel electrode having a second end facing the first source line, and located above the first source line and the first pixel line. 1 A first light-shielding layer that covers a gap between a source wiring and the first pixel electrode, and a first light shielding layer that is located above the second source wiring and covers a gap between the second source wiring and the second pixel electrode. A second substrate comprising: 2 light shielding layers; a color filter positioned above the first pixel electrode and the second pixel electrode; and a common electrode facing the first pixel electrode and the second pixel electrode; There is provided a liquid crystal display device comprising: a liquid crystal layer held between the first substrate and the second substrate.

According to this embodiment,
Between the first source line and the second source line, the first switching element and the second switching element electrically connected to the first source line, and the first source line and the second source line, respectively. A first pixel electrode spaced apart from a position facing the first source line and electrically connected to the first switching element, the first pixel electrode having a first end facing the second source line; A second pixel electrode electrically spaced apart from a position facing the first source line between the first source line and the second source line and electrically connected to the second switching element; A first pixel electrode including a second pixel electrode having a second end facing the source wiring; and the first substrate wiring, the first pixel electrode, and the first source wiring positioned above the first source wiring. A first light shielding layer covering a gap with the second pixel electrode; a second light shielding layer located above the second source line; and a color located above the first pixel electrode and the second pixel electrode. A second substrate comprising a filter, a common electrode facing the first pixel electrode and the second pixel electrode, and a liquid crystal layer held between the first substrate and the second substrate, A liquid crystal display device is provided.

FIG. 1 is a plan view schematically showing an example of a display panel PNL applicable to the liquid crystal display device of this embodiment. FIG. 2 is a diagram schematically showing a cross-sectional structure including the switching element SW in one pixel of the display panel PNL shown in FIG. FIG. 3 is a diagram for explaining dot inversion driving. FIG. 4 is a diagram illustrating an example of a pixel layout of the present embodiment. FIG. 5 is a cross-sectional view schematically showing a cross section taken along line AB of adjacent pixels across the source line S2 shown in FIG. FIG. 6 is a cross-sectional view schematically showing a cross section taken along line CD of an adjacent pixel across the source line S2 shown in FIG. FIG. 7 is a diagram illustrating an example of another pixel layout of the present embodiment.

  Hereinafter, the present embodiment will be described in detail with reference to the drawings. In each figure, the same reference numerals are given to components that exhibit the same or similar functions, and duplicate descriptions are omitted.

  FIG. 1 is a plan view schematically showing an example of a display panel PNL applicable to the liquid crystal display device of this embodiment.

  That is, the display panel PNL is an active matrix type liquid crystal display panel, and includes an array substrate AR, a counter substrate CT arranged to face the array substrate AR, and a liquid crystal held between the array substrate AR and the counter substrate CT. And a layer LQ. The array substrate AR and the counter substrate CT are bonded together with a sealant SE in a state where a predetermined cell gap is formed between them. In the illustrated example, the sealing material SE is formed to have a rectangular frame-like closed loop shape. The cell gap is formed by a columnar spacer (not shown) formed in the array substrate AR or the counter substrate CT. The liquid crystal layer LQ is held on the inner side surrounded by the sealing material SE in the cell gap between the array substrate AR and the counter substrate CT. The display panel PNL includes an active area ACT that displays an image on the inner side surrounded by the seal material SE. The active area ACT has, for example, a substantially rectangular shape and includes a plurality of pixels PX arranged in a matrix.

  The array substrate AR includes a gate line G extending along the first direction X, a source line S extending along the second direction Y that intersects the first direction X, a gate line G, and a source. A switching element SW connected to the wiring S, a pixel electrode PE connected to the switching element SW, and the like are provided. The common electrode CE facing each of the pixel electrodes PE via the liquid crystal layer LQ is provided, for example, on the counter substrate CT.

  The detailed configuration of the display panel PNL is not described, but in a mode that mainly uses a vertical electric field such as a TN (Twisted Nematic) mode, an OCB (Optically Compensated Bend) mode, and a VA (Vertical Aligned) mode, the pixel is used. The electrode PE is provided on the array substrate AR, while the common electrode CE is provided on the counter substrate CT.

  In the illustrated example, the array substrate AR has a mounting portion MT that extends outward from the substrate end portion of the counter substrate CT. A signal supply source for supplying signals necessary for driving the display panel PNL such as the driving IC chip 2 and the flexible printed circuit (FPC) substrate 3 is located in the peripheral area PRP outside the active area ACT and mounted. It is mounted on the part MT.

  FIG. 2 is a diagram schematically showing a cross-sectional structure including the switching element SW in one pixel of the display panel PNL shown in FIG.

  The array substrate AR is formed using a transparent first insulating substrate 10 such as a glass substrate or a resin substrate. The array substrate AR has a switching element SW, a pixel electrode PE, a first insulating film 11, a second insulating film 12, a third insulating film 13, and a first alignment film AL1 on the side of the first insulating substrate 10 facing the counter substrate CT. Etc.

  The switching element SW shown here is, for example, a thin film transistor (TFT). The switching element SW may be either a top gate type or a bottom gate type, but in the illustrated example, a top gate type is adopted. The switching element SW includes a semiconductor layer SC disposed on the first insulating substrate 10. The semiconductor layer SC can be formed of polysilicon, amorphous silicon, an oxide semiconductor, or the like. An undercoat layer that is an insulating film may be interposed between the first insulating substrate 10 and the semiconductor layer SC. The semiconductor layer SC is covered with the first insulating film 11. The first insulating film 11 is also disposed on the first insulating substrate 10.

  The gate electrode WG of the switching element SW is formed on the first insulating film 11 and is located immediately above the semiconductor layer SC. The gate electrode WG is electrically connected to the gate line G or formed integrally with the gate line G. The gate electrode WG and the gate wiring G are covered with the second insulating film 12. The second insulating film 12 is also disposed on the first insulating film 11.

  The source electrode WS and the drain electrode WD of the switching element SW are formed on the second insulating film 12. The source electrode WS is electrically connected to the source line S or formed integrally with the source line S. The drain electrode WD is separated from the source line S. The source electrode WS and the drain electrode WD are in contact with the semiconductor layer SC through contact holes that penetrate the first insulating film 11 and the second insulating film 12, respectively. The source electrode WS, the source line S, and the drain electrode WD are covered with the third insulating film 13. The third insulating film 13 is also disposed on the second insulating film 12. A contact hole CH penetrating to the drain electrode WD is formed in the third insulating film 13. The third insulating film 13 is made of, for example, a transparent resin material.

  The pixel electrode PE is formed on the third insulating film 13. The pixel electrode PE is in contact with the drain electrode WD through the contact hole CH. The pixel electrode PE is formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The pixel electrode PE is covered with the first alignment film AL1.

  On the other hand, the counter substrate CT is formed using a transparent second insulating substrate 30 such as a glass substrate or a resin substrate. The counter substrate CT has a light shielding layer (black matrix) 31 and a color filter (including a red color filter layer, a green color filter layer, and a blue color filter layer) on the side of the second insulating substrate 30 facing the array substrate AR. 32, an overcoat layer 33, a common electrode CE, a second alignment film AL2, and the like.

  The light shielding layer 31 is formed on the side of the second insulating substrate 30 facing the array substrate AR, partitions each pixel PX in the active area ACT, and forms an opening AP. The light shielding layer 31 is opposed to wiring portions such as the gate wiring G, the source wiring S, and the switching element SW provided on the array substrate AR.

  The color filter 32 is formed in the opening AP and extends also on the light shielding layer 31. The color filter 32 is formed of resin materials colored in a plurality of different colors, for example, three primary colors such as red, green, and blue. The red color filter layer is disposed in a red pixel that displays red, the green color filter layer is disposed in a green pixel that displays green, and the blue color filter layer is disposed in a blue pixel that displays blue. The boundary between the color filters of different colors overlaps the light shielding layer 31.

  The overcoat layer 33 covers the color filter 32. The overcoat layer 33 planarizes unevenness on the surface of the light shielding layer 31 and the color filter 32. The overcoat layer 33 is formed of a transparent resin material.

  The common electrode CE is formed on the side of the overcoat layer 33 that faces the array substrate AR, and faces the pixel electrode PE. The common electrode CE is formed of a transparent conductive material such as ITO or IZO. The common electrode CE is covered with the second alignment film AL2.

  The array substrate AR and the counter substrate CT as described above are arranged so that the first alignment film AL1 and the second alignment film AL2 face each other. At this time, a spacer is interposed between the array substrate AR and the counter substrate CT, and a predetermined cell gap is formed. The array substrate AR and the counter substrate CT are bonded together with a sealing material in a state where a cell gap is formed. The liquid crystal layer LQ is composed of a liquid crystal composition including liquid crystal molecules sealed in a cell gap formed between the first alignment film AL1 and the second alignment film AL2.

  A first optical element OD1 including a first polarizing plate PL1 is disposed on the outer surface 10B of the first insulating substrate 10. On the outer surface 30B of the second insulating substrate 30, the second optical element OD2 including the second polarizing plate PL2 is disposed.

  A backlight BL is disposed on the back side of the display panel PNL having such a configuration. Although various forms can be applied as the backlight BL, description of the detailed structure is omitted.

  FIG. 3 is a diagram for explaining dot inversion driving.

  That is, the horizontal direction in the figure, that is, the first direction X corresponds to the direction in which the gate wiring extends, and the vertical direction in the figure, that is, the second direction Y, corresponds to the direction in which the source wiring extends. In the dot inversion driving, the polarity of the pixel potential with respect to the potential of the common electrode is reversed between pixels adjacent in the first direction X, and the pixel potential with respect to the potential of the common electrode is also between pixels adjacent in the second direction Y. In this driving method, the polarity is reversed.

  FIG. 4 is a diagram illustrating an example of a pixel layout of the present embodiment. Here, only the configuration necessary for the description is illustrated, and the gate wiring and the switching element are illustrated in a simplified manner.

  The gate wirings G1 to G2 extend along the first direction X, respectively. The source wirings S1 to S3 extend along the second direction Y, respectively.

  In the odd-numbered pixel lines, the switching element SW11 is electrically connected to the gate line G1 and the source line S1. The pixel electrode PE11 is electrically connected to the switching element SW11. A video signal output from the source wiring S1 is written to the pixel electrode PE11 via the switching element SW11, and the pixel electrode PE11 has a predetermined pixel potential with respect to the potential of the common electrode. The switching element SW12 is electrically connected to the gate line G1 and the source line S2. The pixel electrode PE12 is electrically connected to the switching element SW12. The video signal output from the source line S2 is written to the pixel electrode PE12 via the switching element SW12, and the pixel electrode PE12 has a predetermined pixel potential with respect to the potential of the common electrode.

  In such an odd-numbered pixel line, in the illustrated example, the pixel electrode of each pixel is electrically connected to the source wiring located on one side (left side) of the own pixel, and the other side of the own pixel. It is arranged at a position shifted to the other side (right side) and has an end portion facing the source wiring located on the other side (right side) of the own pixel. For example, the pixel electrode PE11 has an end portion EL11 that is electrically connected to the source line S1 on the left side of the pixel, is spaced from a position facing the source line S1, and forms a gap between the source line S1. On the other hand, it has an end ER11 facing the source line S2 on the right side of the pixel. Similarly, the pixel electrode PE12 is spaced from a position facing the source line S2, has an end EL12 that forms a gap with the source line S2, and has an end ER12 facing the source line S3. Yes.

  In the even-numbered pixel lines, the switching element SW21 is electrically connected to the gate line G2 and the source line S2. The pixel electrode PE21 is electrically connected to the switching element SW21. A video signal output from the source line S2 is written to the pixel electrode PE21 via the switching element SW21, and the pixel electrode PE21 has a predetermined pixel potential with respect to the potential of the common electrode. The switching element SW22 is electrically connected to the gate line G2 and the source line S3. The pixel electrode PE22 is electrically connected to the switching element SW22. A video signal output from the source wiring S3 is written to the pixel electrode PE22 via the switching element SW22, and the pixel electrode PE22 has a predetermined pixel potential with respect to the potential of the common electrode.

  The pixel electrode of each pixel in the even-numbered pixel line is shifted to the opposite side to the pixel electrode of the odd-numbered pixel line, and the connection relationship with the source wiring is also opposite to that of the odd-numbered pixel line. In the illustrated example, in an even-numbered pixel line, the pixel electrode of each pixel is electrically connected to the source wiring located on the other side (right side) of the own pixel, and one side of the own pixel ( It is arranged at a position shifted to the left side) and has an end portion facing the source wiring located on one side (left side) of the own pixel. For example, the pixel electrode PE21 is electrically connected to the source wiring S2 on the right side of the pixel, is spaced from a position facing the source wiring S2, and has an end ER21 that forms a gap with the source wiring S2. On the other hand, it has an end EL21 that faces the source line S1 on the left side of the pixel. Similarly, the pixel electrode PE22 is separated from a position facing the source line S3, has an end ER22 that forms a gap with the source line S3, and has an end EL22 facing the source line S2. Yes.

  With respect to such a pixel layout, a portion extending along the second direction Y in the light shielding layer on the counter substrate side has a shape as indicated by the oblique lines in the drawing.

  That is, the light shielding layer 311 faces the source line S1 and covers the gap between the source line S1 and the pixel electrode PE11, but hardly overlaps the end portion EL21 of the pixel electrode PE21. The light shielding layer 312 faces the source line S2 and covers the gap between the source line S2 and the pixel electrode PE12 and the gap between the source line S2 and the pixel electrode PE21, while the end ER11 and the pixel of the pixel electrode PE11. Almost no overlap with the end EL22 of the electrode PE22. The light shielding layer 313 is opposed to the source line S3 and covers the gap between the source line S3 and the pixel electrode PE22, but hardly overlaps the end ER12 of the pixel electrode PE12. That is, each of the light shielding layers 311 to 313 is arranged at a position shifted to one side so as to cover the gap between the source wiring and the pixel electrode located on one side (right side) in the odd-numbered pixel lines. The even-numbered pixel lines are arranged at positions shifted to the other side so as to cover the gap between the source wiring and the pixel electrode located on the other side (left side).

  In such a configuration, the polarities of the video signals output from the adjacent source lines are opposite. That is, in one horizontal scanning period in which the video signal is written to the odd-numbered pixel lines, the polarity of the video signal output from the source wiring S1 is opposite to the polarity of the video signal output from the source wiring S2. The polarity of the video signal output from the source line S2 is opposite to the polarity of the video signal output from the source line S3. In the pixel layout described above, the polarity of the video signal output from each source wiring is the same as when the video signal is written to the even-numbered pixel lines and when the video signal is written to the odd-numbered pixel lines. Thereby, dot inversion driving can be realized.

  FIG. 5 is a cross-sectional view schematically showing a cross section taken along line AB of adjacent pixels across the source line S2 shown in FIG. Here, only the configuration necessary for the description is illustrated.

  The pixel electrode PE11 is located on one side (left side) with respect to the source line S2, and has an end ER11 facing the source line S2. That is, the end ER11 is located immediately above the source line S2 with the third insulating film 13 interposed therebetween. A coupling capacitor is formed between the source line S2 and the pixel electrode PE11. The pixel electrode PE12 is located on the other side (right side) with respect to the source line S2, is electrically connected to the source line S2 via a switching element (not shown), and is an end portion separated from a position facing the source line S2. It has EL12. That is, a gap is formed between the end portion EL12 and the position directly above the source wiring S2 via the third insulating film 13.

  The light shielding layer 312 is located above the source wiring S2 on the pixel electrode PE12 side from a position directly above the end ER11, and covers the gap between the source wiring S2 and the end EL12. The light shielding layer 312 may extend to a position immediately above the end ER11, but in this case, the width of the light shielding layer 312 increases. The width of the light shielding layer 312 is desirably as narrow as possible in order to prevent a decrease in the aperture ratio when considering a bonding deviation between the array substrate AR and the counter substrate CT. Further, when viewed from the front, since the region overlapping with the source line S2 (that is, the region facing the end ER11) does not contribute to the display, the light shielding layer 312 should not extend right above the end ER11. desirable.

  Pixels adjacent in the first direction X across the source line S2 display different colors. That is, the color filter 321 positioned above the pixel electrode PE11 is a color filter having a different color from the color filter 322 positioned above the pixel electrode PE12.

  Although the relationship between the pixel electrode PE11 and the pixel electrode PE12 has been described here, the relationship between the pixel electrodes adjacent to each other across the source wiring is the same as that in the illustrated example with respect to the odd-numbered pixel lines.

  In such a configuration, in the ON state in which an electric field is formed between each pixel electrode and the common electrode CE, the liquid crystal molecules in the region overlapping with the source wiring are affected by the electric field, and the initial alignment direction (the alignment in the OFF state) When the liquid crystal display device is observed from an oblique direction, light passing through a region overlapping with the source wiring may pass through adjacent color filters and cause color mixing.

  According to the present embodiment, even if the liquid crystal molecules in the region overlapping the source line S2 are aligned in a direction different from the initial alignment direction in the oblique visual field on the right side (the side where the pixel electrode PE12 is located) with respect to the normal line. The light traveling from the pixel on the left side of the source wiring S2 to the pixel on the right side is shielded by the light shielding layer 312 disposed at a position shifted to the right side. For this reason, it is possible to suppress color mixing without widening the light shielding layer 312. This makes it possible to obtain a good display quality without causing a reduction in aperture ratio or transmittance.

  FIG. 6 is a cross-sectional view schematically showing a cross section taken along line CD of an adjacent pixel across the source line S2 shown in FIG. Here, only the configuration necessary for the description is illustrated.

  The pixel electrode PE21 is located on one side (left side) with respect to the source line S2, is electrically connected to the source line S2 via a switching element (not shown), and is an end portion separated from a position facing the source line S2. It has ER21. That is, a gap is formed between the end ER21 and the position immediately above the source line S2 via the third insulating film 13. The pixel electrode PE22 is located on the other side (right side) with respect to the source line S2, and has an end EL22 facing the source line S2. That is, the end EL22 is located immediately above the source line S2 with the third insulating film 13 interposed therebetween. A coupling capacitor is formed between the source line S2 and the pixel electrode PE22.

  The light shielding layer 312 is positioned above the source wiring S2 on the pixel electrode PE21 side from a position directly above the end EL22, and covers the gap between the source wiring S2 and the end ER21. The color filter 321 located above the pixel electrode PE21 is a color filter having a different color from the color filter 322 located above the pixel electrode PE22.

  Although the relationship between the pixel electrode PE21 and the pixel electrode PE22 has been described here, the relationship between the pixel electrodes adjacent to each other across the source wiring is the same as that of the illustrated example with respect to the even-numbered pixel lines.

  According to the present embodiment, since the pixel electrode PE21 and the source line S2 are electrically connected, an electric field that adversely affects the alignment of liquid crystal molecules is not formed between them. Therefore, the liquid crystal molecules in the region overlapping with the source wiring S2 or in the vicinity thereof are not easily aligned in a direction different from the initial alignment direction, and the transmittance of the liquid crystal layer can be reduced. Therefore, in an oblique visual field on the right side (the side where the pixel electrode PE22 is located) with respect to the normal line, light traveling from the pixel on the left side of the source line S2 to the pixel on the right side hardly transmits the color filter 322. For this reason, it is possible to suppress color mixing without widening the light shielding layer 312. This makes it possible to obtain a good display quality without causing a reduction in aperture ratio or transmittance.

  In the oblique visual field on the left side (the side where the pixel electrode PE21 is located) with respect to the normal line, the liquid crystal molecules in the region overlapping the source line S2 are different from the initial alignment direction, as in the example shown in FIG. Even if the light is directed in the direction, the light traveling from the pixel on the right side to the pixel on the left side with respect to the source wiring S2 is shielded by the light shielding layer 312 disposed at a position shifted to the left side. It is possible to suppress color mixing.

  FIG. 7 is a diagram illustrating an example of another pixel layout of the present embodiment. Here, only the configuration necessary for the description is illustrated, and the gate wiring and the switching element are illustrated in a simplified manner.

  In the odd-numbered pixel lines, the switching element SW11 is electrically connected to the gate line G1 and the source line S1. The pixel electrode PE11 is electrically connected to the switching element SW11. The switching element SW12 is electrically connected to the gate line G1 and the source line S2. The pixel electrode PE12 is electrically connected to the switching element SW12.

  In such an odd-numbered pixel line, in the illustrated example, the pixel electrode of each pixel is electrically connected to the source wiring located on one side (left side) of the own pixel, and the other side of the own pixel. It is arranged at a position shifted to the other side (right side) and has an end portion facing the source wiring located on the other side (right side) of the own pixel. For example, the pixel electrode PE11 has an end portion EL11 that is electrically connected to the source line S1 on the left side of the pixel, is spaced from a position facing the source line S1, and forms a gap between the source line S1. On the other hand, it has an end ER11 facing the source line S2 on the right side of the pixel. Similarly, the pixel electrode PE12 is spaced from a position facing the source line S2, has an end EL12 that forms a gap with the source line S2, and has an end ER12 facing the source line S3. Yes.

  In even-numbered pixel lines, the switching element SW21 is electrically connected to the gate line G2 and the source line S1. The pixel electrode PE21 is electrically connected to the switching element SW21. The switching element SW22 is electrically connected to the gate line G2 and the source line S2. The pixel electrode PE22 is electrically connected to the switching element SW22.

  The pixel electrode of each pixel in the even-numbered pixel line is shifted to the same side as the pixel electrode of the odd-numbered pixel line, and the connection relationship with the source wiring is also the same as that of the odd-numbered pixel line.

  With respect to such a pixel layout, the portion extending along the second direction Y in the light shielding layer on the counter substrate side has a shape extending linearly as indicated by the oblique lines in the drawing. .

  That is, the light shielding layer 311 is opposed to the source line S1, and covers the gap between the source line S1 and the pixel electrode PE11 and the gap between the source line S1 and the pixel electrode PE21. The light shielding layer 312 faces the source line S2 and covers the gap between the source line S2 and the pixel electrode PE12 and the gap between the source line S2 and the pixel electrode PE22.

  In such a configuration, the polarities of the video signals output from the adjacent source lines are opposite. That is, in one horizontal scanning period in which the video signal is written to the odd-numbered pixel lines, the polarity of the video signal output from the source wiring S1 is opposite to the polarity of the video signal output from the source wiring S2. The polarity of the video signal output from the source line S2 is opposite to the polarity of the video signal output from the source line S3. In the pixel layout described above, the polarity of the video signal output from each source wiring is switched every horizontal scanning period, and when writing the video signal to the even-numbered pixel lines, the video signal is output to the odd-numbered pixel lines. It is different from the polarity when writing.

  In such a pixel layout as well, as in the example described with reference to FIGS. 4 to 6, it is possible to suppress color mixing in an oblique visual field, which is favorable without causing a reduction in aperture ratio or transmittance. Display quality can be obtained.

  As described above, according to this embodiment, it is possible to provide a liquid crystal display device with good display quality.

  In addition, this invention is not limited to the said embodiment itself, In the stage of implementation, it can change and implement a component within the range which does not deviate from the summary. Further, various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, you may combine suitably the component covering different embodiment.

PNL ... Display panel AR ... Array substrate CT ... Counter substrate LQ ... Liquid crystal layer G ... Gate wiring S ... Source wiring SW ... Switching element PE ... Pixel electrode CE ... Common electrode 31 ... Light shielding layer 32 ... Color filter

Claims (6)

A source line; a switching element electrically connected to the source line; and a first pixel electrode positioned on one side of the source line and having a first end facing the source line. One pixel electrode and a second pixel electrode that is located on the other side of the source wiring and is electrically connected to the switching element, and has a second end spaced from the position facing the source wiring A first substrate comprising a second pixel electrode;
A light-shielding layer that is positioned above the source line on the second pixel electrode side from a position directly above the first end and covers a gap between the source line and the second end; and the first pixel A first color filter located above the electrode; a second color filter located above the second pixel electrode and having a color different from the first color filter; the first pixel electrode and the second pixel electrode; A second substrate provided with an opposing common electrode;
A liquid crystal layer held between the first substrate and the second substrate;
A liquid crystal display device.   2. The liquid crystal display device according to claim 1, wherein the first pixel potential of the first pixel electrode is opposite in polarity to the second pixel potential of the second pixel electrode with respect to the potential of the common electrode. A first source line and a second source line; a first switching element electrically connected to the first source line; a second switching element electrically connected to the second source line; A first pixel electrode that is spaced from a position facing the first source line between the source line and the second source line and is electrically connected to the first switching element, and is opposed to the second source line. A first pixel electrode having a first end that is electrically connected to the second switching element and spaced from a position facing the second source wiring between the first source wiring and the second source wiring. A second pixel electrode, and a second pixel electrode having a second end facing the first source line, and a first substrate,
A first light-shielding layer located above the first source line and covering a gap between the first source line and the first pixel electrode; and located above the second source line and the second source line. A second light shielding layer that covers a gap between the first pixel electrode and the second pixel electrode, a color filter positioned above the first pixel electrode and the second pixel electrode, the first pixel electrode, and the second pixel electrode; A second substrate provided with an opposing common electrode;
A liquid crystal layer held between the first substrate and the second substrate;
A liquid crystal display device.   4. The liquid crystal display device according to claim 3, wherein the polarity of the first video signal output from the first source line is opposite to the polarity of the second video signal output from the second source line. Between the first source line and the second source line, the first switching element and the second switching element electrically connected to the first source line, and the first source line and the second source line, respectively. A first pixel electrode spaced apart from a position facing the first source line and electrically connected to the first switching element, the first pixel electrode having a first end facing the second source line; A second pixel electrode electrically spaced apart from a position facing the first source line between the first source line and the second source line and electrically connected to the second switching element; A first substrate having a second pixel electrode having a second end facing the source wiring;
A first light shielding layer that is located above the first source line and covers a gap between the first source line and the first and second pixel electrodes, and located above the second source line. A second substrate comprising: a second light-shielding layer; a color filter positioned above the first pixel electrode and the second pixel electrode; and a common electrode facing the first pixel electrode and the second pixel electrode When,
A liquid crystal layer held between the first substrate and the second substrate;
A liquid crystal display device.   The polarity of the first video signal output from the first source line is opposite to the polarity of the second video signal output from the second source line, and the polarity is switched every horizontal period. The liquid crystal display device according to claim 5.

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