JP2015015522A - Transmitter and receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a transmitter and a receiver capable of increasing frequency utilization efficiency, and having superior noise tolerance.SOLUTION: A transmitter 10 includes an error correction coding part 12 for concatenated coding of an LDPC code and a BCH code, a hybrid set partitioning mapping part 14 for converting a symbol configuration bit to a signal point series by a hybrid set partitioning method by which the minimum Euclidean distance among signal points is uniformly increased for a first bit and the minimum Euclidean distance is not increased but number of pairs of signal points of the minimum Euclidean distance is reduced for a second bit or after, an orthogonal modulation part 15 for orthogonally modulates the signal point series, and a coding rate setting part 13 for individually setting two kinds of LDPC coding rates, for the first bit and for the second bit or after, to the symbol configuration bits. A receiver 20 receives and decodes a modulated signal transmitted by the transmitter 10 according to the hybrid set partitioning method.

Description

  The present invention relates to the technical fields of satellite broadcasting and terrestrial broadcasting, fixed communication, and mobile communication, and more particularly, to a digital data transmitting apparatus and receiving apparatus.

  As a technique to improve transmission performance under white noise, it is possible to improve transmission performance by applying an error correction code with an appropriate correction capability to each bit constituting a symbol assigned to a signal point in digital modulation. Has been proposed (for example, see Non-Patent Document 1).

  The coded modulation technique described in Non-Patent Document 1 and the like is also adopted in the Japanese satellite digital broadcasting standard ISDB-S (for example, see Non-Patent Document 2), and has been proven as a technique that contributes to improving transmission performance. There is.

  The basic principle of the technique described in Non-Patent Document 1 is that the Euclidean distance among signal bits (hereinafter referred to as symbol configuration bits) constituting a symbol is considered in consideration of the Euclidean distance between signal points after mapping the symbol. Strong error correction is applied to bits whose 1/0 is inverted between signal points with a short distance, while weak error correction is applied to bits whose 1/0 is inverted between signal points with a long Euclidean distance. In other words, noise tolerance is improved while maintaining the overall information efficiency by applying or not performing the encoding process.

  Further, Non-Patent Document 1 proposes a method for assigning symbols to signal points called a set division method using 8PSK as an example. As an example, an example of a method of assigning symbols to 8PSK signal points by the set division method will be described with reference to FIG.

  In FIG. 7, symbols (000, 001,..., 111) composed of 3 bits to be assigned to each signal point of 8PSK are already described. This is performed by using the following division procedure. This is obtained as a result of assigning symbols to and has not yet been determined at the time of performing set partitioning.

  In the first division, the eight signal points are divided into two signal point groups composed of four signal points so that the Euclidean distance between adjacent signal points is maximized. Here, of the two signal point groups, one signal point group is assigned a1 = 0 to the first bit of the symbol configuration bits and a1 = 1 is assigned to the other.

  Next, the two signal point groups composed of the four signal points obtained in the first division are each divided into four signals composed of two signal points so that the Euclidean distance between adjacent signal points is maximized. Divide into point clouds. Here, when a signal point group composed of four signal points is divided into two signal point groups, one signal point group is assigned a2 = 0 to the second bit of the symbol constituent bits and the other is assigned to the other signal point group. Assigns a2 = 1.

  Furthermore, although omitted in FIG. 7, the four signal point groups formed by the two signal points obtained in the second division are each divided into eight signal point groups each consisting of one signal point. Here, when dividing a signal point group composed of two signal points into one signal point, one signal point group is assigned a3 = 0 to the third bit of the symbol configuration bits, and the other Assign a3 = 1.

  As a result of the above three-stage set division, a unique symbol of 3 bits is assigned to each of the eight signal points.

  By assigning symbols to these signal points, in the case of 8PSK, the first bit (corresponding to a1 in FIG. 7) is the adjacent Euclidean distance in 8PSK, and the second bit (corresponding to a2 in FIG. 7) is QPSK. The adjacent Euclidean distance and the third bit (corresponding to a3 in FIG. 7) can be decoded under the BPSK Euclidean distance condition.

  The symbol assignment to the signal points obtained by the set division method is shared between the transmission and reception in advance, and the transmission side corrects the data transmitted by each bit constituting the symbol, suitable for the Euclidean distance between the corresponding signal points. A transmission system with high noise tolerance can be realized by performing encoding and modulation with an error correction code of capability and performing decoding corresponding to encoding on the transmitting side after demodulation on the receiving side.

  On the other hand, as a symbol allocation method that is often used in the same way as the set division method, there is a Gray code. As an example, FIG. 8 shows an example of assignment of symbols to 8PSK signal points by Gray code. Gray code is a technique for assigning symbols to signal points so that the symbols of adjacent signal points are always different from each other by one bit. Although there is no feature of transmitting at a different Euclidean distance for each bit in the set division method, it is assigned to 8PSK. The number of signal point pairs in the relationship of the minimum Euclidean distance of each bit in a given symbol is smaller than that in the set partitioning method. For example, in FIGS. 7 and 8, focusing on the first bit, the number of signal point pairs in the relationship of the minimum Euclidean distance is 8 in the set division, but only 4 in the Gray code. Therefore, as far as the first bit is concerned, since the Gray code has a smaller number of pairs of signal points having the minimum Euclidean distance than the set division method, the signal point that provides a good bit error rate (BER) in the same noise environment. It is an arrangement. On the other hand, with respect to the second and third bits, the set division method in which the signal point distances are equivalent to QPSK and BPSK, respectively, provides better BER characteristics in the same noise environment than the Gray code. However, this is a performance based on the assumption that the first bit can be correctly received. If the decoding performance of the first bit is insufficient, the decoding performance of the second and third bits is adversely affected. Even if the decoding performance of the first bit is sufficient, if the decoding performance of the second bit is not sufficient, the decoding performance of the third bit is adversely affected. In such a case, as a result, it is assumed that the BER characteristic of the entire symbol constituting bits is worse than that of the gray code.

  In the transmission system of the advanced broadband satellite digital broadcasting described in DVB-S2 and ARIB STD-B44 (hereinafter referred to as the advanced satellite broadcasting system; see, for example, Non-Patent Document 3), all the bits constituting the symbol A Gray code that can bring out performance with a simple circuit configuration to which one error correction code is applied is employed.

  FIG. 9 shows C / N vs. BER characteristics of each symbol constituting bit when the Gray code and the set division method are applied to 8PSK in the conventional technique. In the set division method shown in FIG. 9, the signal point is divided into three stages as shown in FIG. 7, and one of the three bits constituting the symbol is assigned to the first for each division. By assigning bits sequentially, the assignment of symbols to each signal point is determined.

  On the transmission side, it is assumed that mapping is performed based on the correspondence between the symbols and signal points obtained in this way, and on the reception side, it is assumed that the bits assigned to each division are sequentially decoded from the first bit. Here, in order to individually evaluate the noise immunity of the bits allocated to each division, the first bit is correctly received for the characteristics of the second bit, and the first bit and the second bit are correctly received for the performance of the third bit. The extracted characteristics are shown.

  From FIG. 9, in the set division method according to the conventional technique, it can be expected that the performance improves as the Euclidean distance increases as the higher-order bits. On the other hand, comparing the BER of the Gray code 8PSK and the set division 8PSK for the first bit, the performance of the latter is inferior, so in the case of set division, the error correction code applied to the first bit must be made strong. It can be seen that the bit error of the first bit affects the decoding of the lower bits, and as a result, the BER of the entire symbol may be deteriorated as compared with the Gray code.

  Therefore, when assigning symbols to signal points by set division, it is important to select an error correction code to be applied to each bit constituting the symbol.

  As the error correction code, it is effective to use a code having a performance close to the Shannon limit as the performance of the error correction code alone, such as an LDPC (Low Density Parity Check) code or a turbo code.

In addition, an error correction code such as an LDPC code or a turbo code is applied to the set partitioning method using 8PSK as an example shown in FIG. 7, and an individual coding rate is set for each bit of the symbol constituent bits to achieve sufficient performance. Therefore, it is desirable that all the correction capabilities of the first to third bits exhibit the same correction capability in the same C / N environment in the vicinity of the target required C / N. That is, in the set partitioning method of FIG. 9, when the required C / N is set to 9 dB, the first bit BER before error correction is 1.2 × 10 ⁻¹ and the second bit BER is 4.7 × 10 ^−3. Since the third bit BER is 3.3 × 10 ⁻⁵ , there is a large difference with respect to the BER before error correction of each bit of the symbol constituent bits, so that these bit error rates are set to a desired bit error rate (for example, BER = 1.0 × 10 ⁻⁷ ), and a code having a parity bit length as short as possible is preferably applied to each bit of the symbol configuration bits from the viewpoint of frequency utilization efficiency.

  In the conventional advanced satellite broadcasting system (Non-patent Document 3), a concatenated code using an LDPC code as an inner code and a BCH code (shortened BCH (65535, 65343) code with a correction capability of 12 bits) as an outer code is adopted. In particular, in the LDPC code, the coding rates are 41/120, 49/120, 61/120, 73/120, 81/120, 89/120, 97/120, 101/120, 105/120, 109 / 120 different coding rates are available. Here, it is considered that an LDPC code having these coding rates is applied to the set partitioning method. As described above, the set partitioning method has a property that the Euclidean distance increases in order from the first bit to the third bit when, for example, a symbol is composed of 3 bits (see FIG. 7). A code having a coding rate that can correct a bit error before error correction to a desired bit error rate or less at a target required C / N is assigned to one bit, and a code assigned to the first bit after the second bit It is necessary to assign a code having a higher coding rate than the coding rate.

FIG. 10 shows coding rates 61/120 for the first bit, coding rates 109/120 for the second bit, and coding rates 109/120, 3rd from the 10 types of LDPC codes supported by the conventional advanced satellite broadcasting system. The C / N vs. BER characteristics after error correction when coding rate 109/120 is selected and assigned to bits are shown. Here, the BER before error correction satisfying BER = 1.0 × 10 ⁻⁷ after error correction of coding rate 61/120 is 1.29 × 10 ⁻¹ , and after error correction of coding rate 109/120. The BER before error correction that satisfies BER = 1.0 × 10 ⁻⁷ is 1.5 × 10 ⁻² . Further, C / N satisfying BER = 1.0 × 10 ⁻⁷ after error correction is about 9.0 dB when the coding rate 61/120 is applied to the first bit, and the coding rate 109 / is applied to the second bit. When 120 is applied, it is about 7.7 dB, and when the coding rate 109/120 is applied to the third bit, it is about 4.7 dB. Ideally, the C / N of these second and third bits is 9.0 dB, which is the same as that of the first bit. Here, however, an error correction code having an excessive correction capability is added to the second and third bits. Will be assigned.

  That is, FIG. 10 shows the BER characteristics after error correction when the coding rate for each bit is applied. The C / N at the falling edge of the BER curve is about 9 dB. The performance of 1 bit is reflected as it is. Although the second bit and the third bit have more than necessary correction capability, it can be said that the original performance is limited by the performance of the first bit. Therefore, in the second bit and the third bit, among the coding rates larger than the coding rate 61/120, the C / N is about 9 dB and the bit error rate is corrected to the same level as the BER after the correction of the first bit. If a code with a possible coding rate can be applied, the frequency utilization efficiency can be increased without increasing the required C / N.

  As described above, when only the coding rate supported by the advanced satellite system, which is the conventional system, is used, sufficient accuracy can be obtained when the error rate of each bit of the symbol constituent bits is greatly different as in the set division method. Thus, it is difficult to set the coding rate, and the range of the coding rate that can be selected is limited, so that it is difficult to increase the overall frequency utilization efficiency.

  In addition, a technique for optimizing the coding rate of each bit using a set division method which is a conventional technique is known (for example, see Non-Patent Document 4). In this technique, when only 10 types of LDPC codes that are compatible with the above-described conventional advanced satellite broadcasting system are used, the required C / N for the problem that the range of encoding rates is insufficient. = 9 dB is assumed, and an optimum combination of LDPC coding rates is shown, and for the third bit whose minimum Euclidean distance is equivalent to BPSK, only a shortened BCH (65535, 65167) code having a 23-bit correction capability is provided. The frequency use efficiency is improved by allocating and correcting.

  Since this technique is additionally applied with a shortened BCH (65535, 65167) code different from the outer code of the conventional system, the impact of the system change is great. In addition, since the target required C / N is almost determined by the correction capability of the BCH code applied to the third bit, it is necessary to prepare a different BCH code for each required C / N, and to set the target required C / N. When / N is set to 8 dB or less in order to cope with a worse noise environment, there may be a case where sufficient performance cannot be obtained with the correction capability of the BCH code.

For example, FIG. 11 shows C / N vs. BER characteristics when the shortened BCH (65535, 65167) code is applied to the third bit of the set partitioning method. From FIG. 11, in the application of only the shortened BCH (65535, 65167) code, the required C / N = 8 dB or less cannot fall below BER = 1 × 10 ⁻⁸ and satisfy sufficient performance. It is understood that cannot be done.

  On the other hand, with respect to the first bit in the set partitioning, the symbols are assigned to the signal points by a set partitioning method including a partition that reduces the signal point logarithm of the minimum Euclidean distance without increasing the minimum Euclidean distance. Has disclosed a technique for changing the relationship between the Euclidean distances of the respective bits and making the error rate characteristics uniform between the first bit and the second bit (see, for example, Non-Patent Document 5).

G. Ungerboeck, “Channel coding with multilevel / phase signals”, IEEE Transaction Information Theory, Vol.IT-28, No.1, January 1982, p.55−67 “Satellite Digital Broadcasting Transmission Standards Standard ARIB STD-B20 3.0 Edition, [online], formulated November 6, 1998, ARIB, [Search June 21, 2011], Internet <URL: http: // www.arib.or.jp/english/html/overview/doc/2-STD-B20v3_0.pdf> "Transmission system of advanced broadband satellite digital broadcasting standard ARIB STD-B44 1.0 version, [online], formulated on July 29, 2009, ARIB, [searched on June 21, 2011], Internet <URL: http: //www.arib.or.jp/english/html/overview/doc/2-STD-B44v1_0.pdf> Suzuki et al., “A Study on Performance Improvement of Set-Division 8PSK Coded Modulation Using LDPC Code”, IEICE Technical Report, vol. 112, no. 440, February 14, 2013, pp. 47- 52 Suzuki et al., “A Study on Performance Improvement of 32QAM Coded Modulation System Using LDPC Code”, Proceedings of Society Conference of IEICE, 2011 Volume 1, B-5-21, August 30, 2011, p.400

  As described above, when configuring a digital data transmission apparatus and reception apparatus using the set division method, the code design is performed by reducing the range of the code rate assigned to each symbol constituent bit when configuring the code modulation. There is a technique disclosed in Non-Patent Document 5 as a technique for facilitating the above. However, with only the technique disclosed in Non-Patent Document 5, for example, in 8PSK modulation, a line margin equivalent to that of current BS digital broadcasting can be secured, and a low required C / C of about 8 dB or less that can cope with a worse noise environment. N still has a problem in realizing high-rate coding modulation. That is, when configuring a digital data transmitting apparatus and receiving apparatus using the set division method, a lower required C / N (for example, 8 dB or less) is desired without configuring different types of concatenated codes for each bit. In the applications to be used, there still remains a problem as to how to improve the frequency utilization efficiency and realize code modulation with a high coding rate.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a digital data transmission apparatus and reception apparatus that improve frequency utilization efficiency and have excellent noise resistance.

  The present invention divides the first bit uniformly so that the minimum Euclidean distance between signal points is expanded, and the second and subsequent bits are not accompanied by the expansion of the minimum Euclidean distance, and the signal point logarithm of the minimum Euclidean distance. A new coding modulation scheme based on an improved set division method that divides so as to reduce the number of symbols, and a predetermined number of encodings determined according to the correction capability for each bit of the symbol constituent bits Digital data transmission apparatus with improved frequency utilization efficiency by applying an LDPC code having a rate (which means that the coding rate applied to each bit after the second bit is the same) And a receiving apparatus.

  As an example of this improved set partitioning method (referred to as “hybrid set partitioning method” in the present specification), an example of symbol allocation by a symbol allocation method to 8PSK signal points is shown in FIG. 12, and symbol allocation to 8PSK signal points is shown in FIG. An example of the method is shown in FIG. FIG. 14 shows the C / N vs. BER characteristics of each symbol constituent bit in the case of the symbol allocation method shown in FIG.

  In this hybrid set partitioning, unlike the conventional set partitioning method, the minimum Euclidean distance is increased for the partition corresponding to the first bit, as in the conventional set partitioning method. It can be seen from FIG. 13 that the distance does not increase and the signal point pair having the minimum Euclidean distance relationship is divided from 2 to 1. It can also be seen from FIG. 14 that the correction capability of the second bit and the third bit is made uniform.

  By using the hybrid set partitioning method, for the first bit, the second bit for which application of a high coding rate is required while applying the code of the coding rate with the same correction capability as the conventional set partitioning method and For the third bit, both correction capabilities can be made uniform.

In FIG. 14, when focusing on the BER at the required C / N = 8 dB, the BER is 5.8 × 10 ⁻³ for both the second bit and the third bit. Compared with the third bit example of the modulo (BER = 2 × 10 ⁻⁴ at C / N = 8 dB in FIG. 11), the required coding rate is reduced, and a sufficiently long parity length can be secured. The design of the code becomes easy, and even when the required C / N is set low, the frequency utilization efficiency can be further improved by applying an optimum error correction code such as an LDPC code. More specifically, the features of the present invention will be described below.

The first feature is
In a transmission apparatus that transmits digital data, symbols are assigned to signal points used for modulation using a concatenated code composed of an LDPC code and a BCH code, and the first bit is uniformly distributed between signal points. Is divided so that the minimum Euclidean distance is expanded, and the second and subsequent bits are not accompanied by the expansion of the minimum Euclidean distance, and the hybrid set partitioning method is divided so as to decrease the signal point logarithm of the minimum Euclidean distance. The LDPC code in the concatenated code has a predetermined number of coding rates determined according to the required correction capability of each bit constituting the symbol, and the LDPC code of each symbol constituting bit in the set division method In encoding, the correction capability corresponding to the required C / N for the first bit of the symbol constituent bits Encoding is performed at a coding rate, and for the second and subsequent bits, among the predetermined number of coding rates, C / N within a predetermined range with respect to the required C / N (preferably ± 10% of the required C / N) And the second and subsequent bits are encoded at the same encoding rate. More specifically, with respect to LDPC encoding in symbol constituent bits, in order to cope with a lower required C / N, error correction corresponding to a target required C / N for the first bit of the symbol constituent bits. The previous bit error rate is encoded at a coding rate with a correction capability that can be reduced to a desired bit error rate, and for the second and subsequent bits, the correction capability is out of the predetermined number of coding rates with respect to the required C / N. Most of the coding rates of the correction capability that can reduce the bit error rate before error correction to a desired bit error rate within a predetermined range of C / N (preferably within ± 10% of the required C / N) Encoding is performed at a high encoding rate, and the bits after the third bit are encoded at the same encoding rate as the second bit. Thereby, it becomes possible to improve the frequency utilization efficiency in the set division method.

The second feature is
In the LDPC code, the code length of the LDPC code is 44880. Thereby, transmission with high consistency with MPEG-2 TS becomes possible.

The third feature is
The LDPC code has an encoding rate of 0.95 for the first bit with an accuracy of ± 10% (for example, 39/120) with respect to a coding rate of 0.325 for the first bit, and a coding rate of 0.95 for the second bit and thereafter. The accuracy is ± 10% (for example, 114/120), and a low coding rate is assigned in ascending order of Euclidean distance. Thus, by having a coding rate determined according to the required correction capability for each bit, the coding rate of the correction capability corresponding to the required C / N is applied to the first bit of the symbol constituent bits, For the second and subsequent bits, among the predetermined number of coding rates, the correction capability is sufficient when the C / N is within a predetermined range with respect to the required C / N (preferably within ± 10% of the required C / N). Since the ensured coding rate can be applied, the frequency use efficiency in the set partitioning method can be increased.

The fourth feature is
The LDPC code is a code for each bit when the coding rate applied to each bit of the symbol configuration bits is (r-1, r-2, r-3) when the symbol configuration bits are 3 bits. The combination of the conversion ratios is (0.325 ± 10%, 0.95 ± 10%, 0.95 ± 10%). As a result, transmission with the required C / N reduced optimally becomes possible.

The fifth feature is
In the transmission apparatus configured by the first to fourth features, the coding rate information of the LDPC code used on the transmission apparatus side is transmitted by the transmission multiplex control signal. Accordingly, it is possible to provide a transmission device and a reception device in which encoding and decoding are matched according to the encoding rate used.

The sixth feature is
In the receiving device that receives the signal transmitted by the transmitting device configured by the first to fifth features, the first bit is divided so that the minimum Euclidean distance between the signal points is uniformly expanded, In the second and subsequent bits, the symbol configuration is based on the correspondence between the signal points and the symbols obtained by the hybrid set division method for dividing so as to reduce the signal point logarithm of the minimum Euclidean distance without increasing the minimum Euclidean distance. Of the bits, the first bit is the encoding rate encoded on the transmission side, and the second and subsequent bits are the required C / N out of the predetermined number of encoding rates set on the transmission side. Decoding processing corresponding to each symbol component bit is performed at the highest coding rate that is C / N within a predetermined range with respect to N (preferably within ± 10% of the required C / N) In the Ukoto. As a result, optimal bit error distribution is possible for the symbol constituent bits corresponding to each division.

The seventh feature is
In the receiving apparatus that receives the signal transmitted by the transmitting apparatus configured by the first to fifth features, decoding corresponding to the LDPC code and BCH code of the coding rate set on the transmitting side is performed. This enables efficient error correction decoding.

The eighth feature is
In the receiving apparatus that receives the signal transmitted by the transmitting apparatus having the fifth feature, the coding rate of the LDPC code is determined based on the transmission multiplex control signal. Accordingly, it is possible to provide a transmission device and a reception device in which encoding and decoding are matched according to the encoding rate used.

  By configuring the transmitting device and the receiving device by adopting the above technique, the first bit is divided so that the minimum Euclidean distance between signal points is uniformly increased, and the second and subsequent bits are the minimum Euclidean distance. The hybrid set partitioning method is configured to divide so that the signal point logarithm of the minimum Euclidean distance is reduced without the expansion of, and the concatenated code is determined by the coding rate considering the correction capability of each bit of this hybrid set partitioning method. By configuring the transmission performance, it becomes possible to improve the transmission performance.

  That is, the transmitting apparatus of the present invention is a transmitting apparatus for transmitting digital data, comprising concatenated encoding means composed of an LDPC code and a BCH code, a plurality of codeword sequences as an input symbol sequence, and a first bit Is divided so that the minimum Euclidean distance between signal points is expanded uniformly, and after the second bit, the signal is not expanded with the minimum Euclidean distance, and is divided so as to decrease the logarithm of the signal point of the minimum Euclidean distance. Based on the correspondence between symbols and signal points obtained by the hybrid set division method, symbol / signal point conversion means for converting to a signal point series, and the signal point sequence generated by the symbol / signal point conversion means are orthogonal Orthogonal modulation means for modulating, and the concatenating encoding means relates to the first bit of the symbol constituent bits for the LDPC code. Is encoded at a coding rate with a correction capability corresponding to the required C / N, and for the second and subsequent bits, out of the predetermined number of coding rates, the C / N is within a predetermined range with respect to the required C / N. The encoding is performed at the highest encoding rate, and the second and subsequent bits are encoded at the same encoding rate.

  In the transmitting apparatus of the present invention, the LDPC code has a code length of 48880 bits.

  In the transmission apparatus of the present invention, the LDPC code has an accuracy of ± 10% for the coding rate of 0.325 for the first bit and an accuracy of ± 10% for the coding rate of 0.95 after the second bit. And a low coding rate is assigned in ascending order of Euclidean distance.

  In the transmitting apparatus of the present invention, the LDPC code has a coding rate of 0.325 ± 10% for the first bit and a coding rate of the second bit and the third bit when the symbol constituent bits are 3 bits. 0.95 ± 10%, and a low coding rate is assigned in ascending order of Euclidean distance.

  The transmission apparatus according to the present invention further includes coding rate determination signal multiplexing means for transmitting information related to the coding rate of the LDPC code using a transmission multiplexing control signal.

  In the transmission apparatus of the present invention, the concatenated encoding unit includes an encoder that performs LDPC encoding of the digital data using a check matrix unique to each encoding rate, and the encoder includes 44880 bits. An initial value of a parity check matrix initial value table predetermined for each coding rate with a code length of It has means for performing LDPC coding using a parity check matrix arranged and arranged at every cycle, and the parity check matrix initial value table (Table 1) with the coding rate of 0.325 is composed of the following table: Features.

  In the transmission apparatus of the present invention, the concatenated encoding unit includes an encoder that performs LDPC encoding of the digital data using a check matrix unique to each encoding rate, and the encoder includes 44880 bits. An initial value of a parity check matrix initial value table predetermined for each coding rate with a code length consisting of: 374 columns in the column direction of 1 element of a submatrix corresponding to an information length corresponding to a coding rate of 0.95 It has means for performing LDPC coding using a parity check matrix arranged and arranged at every cycle, and the parity check matrix initial value table (Table 2) having the coding rate of 0.95 is composed of the following table: Features.

  Furthermore, the receiving apparatus of the present invention is a digital data receiving apparatus that performs quadrature demodulation on a modulated wave signal subjected to concatenated coding composed of an LDPC code and a BCH code, and outputs a received signal point sequence. And a plurality of codeword sequences as input symbol sequences, and the symbol constituent bits of the input symbol sequences are divided so that the minimum Euclidean distance between signal points is uniformly expanded for the first bit, From the bit onward, the symbol constituent bit is determined based on the correspondence between the signal point and the symbol obtained by the hybrid set partitioning method that does not increase the minimum Euclidean distance and divides the signal point logarithm of the minimum Euclidean distance. Decoding means for performing corresponding decoding processing, and the LDPC code of the decoding means is determined according to the correction capability for each bit. The decoding means decodes at the coding rate of the correction capability corresponding to the required C / N encoded on the transmission side for the first bit of the symbol constituent bits, For the bit and subsequent bits, the highest coding rate that is C / N within a predetermined range with respect to the required C / N among the predetermined number of coding rates encoded on the transmission side, and the second and subsequent bits This bit is decoded at the same coding rate as that of the second bit, so that a decoding process corresponding to the symbol constituent bit is performed.

  In the receiving apparatus of the present invention, the decoding means performs decoding corresponding to an LDPC code and a BCH code having a coding rate set on the transmission side.

  In the receiving apparatus of the present invention, the decoding means includes coding rate determining means for determining the coding rate of the LDPC code based on a transmission multiplex control signal.

  Also, in the receiving apparatus of the present invention, the decoding means receives the modulated wave signal transmitted by the transmitting apparatus according to any one of claims 1 to 5 and receives symbol-constituting bits in the hybrid set division method. The decoding is performed based on the coding rate of the LDPC code set for each bit individually.

  Further, in the receiving apparatus of the present invention, the decoding means receives the modulated wave signal transmitted by the transmitting apparatus according to claim 6 or 7, and individually receives each of the symbol constituent bits in the set division method. The decoding is performed based on the coding rate of the LDPC code set to 1 and the parity check matrix.

  According to the present invention, by configuring and using a hybrid set division method in a digital data transmission apparatus and reception apparatus, the performance of coded modulation in a combination of error correction code and multilevel modulation is improved, and under white noise. Transmission performance can be improved. In particular, in a digital data transmission apparatus and reception apparatus, frequency utilization efficiency is improved so that a lower required C / N (for example, 8 dB or less) is achieved without configuring different types of concatenated codes for each bit. It is possible to realize coding modulation of the conversion rate.

It is a figure which shows the structural example of the transmitter of one Embodiment in this invention, and a receiver. It is a figure which shows the structural example of the transmitter and receiver which took 8PSK as an example in one Example in this invention. The figure which shows the example of a slot structure in case M = 3, 1st bit LDPC coding rate 0.325, 2nd bit LDPC coding rate 0.95, 3rd bit LDPC coding rate 0.95 based on this invention It is. It is a figure which shows the C / N vs. BER characteristic under the white noise of case A and case B according to the present invention. It is a figure which shows the C / N vs. BER characteristic via the 12 GHz band satellite repeater of case A and case B which concerns on this invention. It is a figure which shows a required C / N improvement amount in one Example by this invention. It is a figure which shows the example of a division | segmentation of the set division | segmentation method in conventional 8PSK. It is a figure which shows the example of the symbol allocation to the signal point by the gray code in the conventional 8PSK. It is a figure which shows the C / N versus BER characteristic of the set division | segmentation method in 8PSK from the past, and a Gray code | cord | chord. The C / N vs. BER characteristics in the conventional combination of set division method and LDPC code in 8PSK (a1: coding rate 61/120, a2: coding rate 109/120, a3: coding rate 109/120) FIG. It is a figure which shows the C / N vs. BER characteristic at the time of applying shortened BCH (65535, 65167) code | cord | chord to the 3rd bit of the set division | segmentation method in the conventional 8PSK. It is a figure which shows the correspondence of the 8PSK signal point and bit by the hybrid set division | segmentation method based on this invention. It is a figure which shows the example of a division | segmentation in 8PSK by the hybrid set division | segmentation method which concerns on this invention. It is a figure which shows the C / N vs. BER characteristic in 8PSK by the hybrid set division | segmentation method based on this invention.

  Hereinafter, a transmission device and a reception device according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of a transmission device 10 and a reception device 20 according to an embodiment of the present invention.

(Device configuration)
[Transmitter]
Referring to FIG. 1, a transmission apparatus 10 of the present embodiment is a forward error correction transmission apparatus, and includes a serial / parallel conversion unit 11, an error correction coding unit 12, a coding rate setting unit 13, and the like. The hybrid set division mapping unit 14, the orthogonal modulation unit 15, and the coding rate determination signal multiplexing unit 16 are provided. That is, the functional block configuration of the transmission apparatus 10 is different from that of the transmission apparatus of the coded modulation based on the set division method, the processing of the error correction coding unit 12, the accompanying coding rate setting unit 13, and the hybrid set division. The mapping unit 14 is different from the conventional technique.

The serial / parallel converter 11 is configured such that a 1-bit transmission data sequence is M = log ₂ L-bit data sequence (in the case of 8-level modulation, M = log ₂ 8 = 3 bits) and output to the error correction encoder 12 (M is hereinafter referred to as a modulation order).

  The error correction encoding unit 12 includes a first error correction encoding unit 12-1 to an Mth error correction encoding unit 12-M, and is encoded with a predetermined error correction code (for example, a BCH code and an LDPC code). The generated M codeword sequences are generated. In the present embodiment, in particular, the error correction coding unit 12 and the hybrid set division mapping unit 14 described later are different from the coded modulation of the conventional technique. The correspondence between signal points and symbols in the hybrid set division mapping unit 14 is derived by set division different from the conventional set division method. In this set division (hybrid set division method), the first bit is divided so that the minimum Euclidean distance between signal points is uniformly expanded, and the second and subsequent bits are not accompanied by an increase in the minimum Euclidean distance. Division is performed so as to reduce the signal point logarithm of the minimum Euclidean distance. Therefore, after the second bit, there are a plurality of symbol configuration bits having substantially the same noise tolerance, and an error correction code having an equivalent correction capability is applied to these symbol configuration bits. Therefore, the error correction encoding unit 12 functions as an encoding unit that generates a code word sequence in which error correction is performed on a plurality of data sequences at a bit rate encoding rate determined according to the hybrid set division method.

  The coding rate setting unit 13 divides the first bit so that the minimum Euclidean distance between signal points is uniformly increased, and the second and subsequent bits are not accompanied by the expansion of the minimum Euclidean distance, and the minimum Euclidean distance is not increased. The coding rate of the LDPC code is individually set for each bit of the symbol constituent bits in the hybrid set division method for dividing so as to reduce the signal point logarithm. In particular, the LDPC code in this embodiment is a predetermined number of coding rates determined according to the correction capability for each bit (preferably 0.325 ± 10% for the first bit, and for the second and subsequent bits. 0.95 ± 10%), and the coding rate setting unit 13 sets a desired bit error rate before error correction corresponding to the target required C / N for the first bit of the symbol constituent bits. A correction rate coding rate that can be reduced to a bit error rate is set, and for the second and subsequent bits, C / N (with a correction capability within a predetermined range with respect to the required C / N among the predetermined number of coding rates) Preferably, the highest coding rate among the coding rates of the correction capability that can reduce the bit error rate before error correction to a desired bit error rate is set within ± 10% of the required C / N. In the hybrid set partitioning method according to the present invention, the second and subsequent bits have the same correction capability, so the same coding rate is set. Thereby, the error correction encoding unit 12 divides the first bit so that the minimum Euclidean distance between the signal points is uniformly increased, and the second and subsequent bits are not accompanied by the expansion of the minimum Euclidean distance. A coding rate is set in consideration of the correction capability of the symbol constituent bits by the hybrid set division method for dividing so that the signal point logarithm of the minimum Euclidean distance decreases, and after the second bit, the correction limit C / N of the first bit is set. In the vicinity, LDPC encoding can be performed at a highest encoding rate with sufficient correction capability. As a result, the frequency utilization efficiency can be increased.

  Hybrid set division mapping section 14 uses the M codeword sequences as input symbol sequences, and outputs I-axis and Q-axis amplitude values of signal points corresponding to the symbols as modulated signal point sequences. Note that the correspondence between the symbol and the signal point used is divided so that the minimum Euclidean distance between the signal points is uniformly increased for the first bit, and the minimum Euclidean distance is increased after the second bit. First, the correspondence determined by the hybrid set partitioning method is used in which the signal point logarithm of the minimum Euclidean distance is decreased. Therefore, the hybrid set division mapping unit 14 functions as a symbol / signal point conversion means for converting an input symbol sequence composed of a plurality of codeword sequences into a signal point sequence based on this correspondence.

  The orthogonal modulation unit 15 performs a roll-off filter process on the modulated signal sequence generated by the hybrid set division mapping unit 14, and then transmits the modulated wave signal subjected to the orthogonal modulation to an external transmission path.

  The coding rate determination signal multiplexing unit 16 receives from the coding rate setting unit 13 coding rate information for each bit of the symbol configuration bits set for the error correction coding unit 12 by the coding rate setting unit 13. It has a function of multiplexing the modulated wave signal in the quadrature modulation unit 15 so as to transmit by a transmission multiplexing control signal (that is, TMCC signal).

[Receiver]
The receiving device 20 of the present embodiment is a receiving device of a forward error correction method, and includes an orthogonal demodulation unit 21, first to M-th bit log likelihood ratio calculation units 22-1 to 22-M, M-bit error correction decoding units 23-1 to 23 -M, a parallel / serial conversion unit 24, and a coding rate determination unit 25 are provided. In other words, the functional block configuration of the receiving device 20 is the same as that of the coded modulation receiving device by the set division method, but the processing of the first to M-th bit error correction decoding units 23-1 to 23-M is different from the conventional technique. .

  The orthogonal demodulator 21 transmits a modulated wave signal obtained by modulating the modulated signal sequence based on the correspondence relationship between the symbol and the signal point obtained by the hybrid set division method according to the present invention from the transmission device 10 via the transmission path. The received signal is orthogonally demodulated and a received signal point sequence corresponding to the symbol of the main signal is output. Therefore, the orthogonal demodulation unit 21 restores and outputs the modulated signal point sequence modulated based on the correspondence relationship between the symbol and the signal point obtained by the hybrid set division method according to the present invention by orthogonal demodulation. Functions as a means.

  The code rate discriminating unit 25 informs the receiving device 20 of information obtained from the orthogonal demodulating unit 21 such as a function of multiplexing a synchronization signal with a modulated wave signal and a transmission method setting in order to identify the head of the error correction code. The transmission multiplexing control signal is input, and the first to M-th bit error correction decoding units 23-1 to 23-M determine the first to M-th bit coding rate information used from the transmission multiplexing control signal. Are sent to the first to Mth bit error correction decoding units 23-1 to 23-M, respectively.

  The first bit log likelihood ratio calculation unit 22-1 is configured to set the bit to 1 for the first bit constituting the symbol based on the correspondence between the symbol and the signal point obtained by the hybrid set partitioning method according to the present invention. Probabilities (likelihoods) P11 and P10 of 0 are obtained, and the natural logarithm (LLR: log likelihood ratio) of the ratio P11 / P10 is calculated and sent to the first bit error correction decoding unit 23-1.

  The first bit error correction decoding unit 23-1 encodes the first bit constituting the symbol using the log likelihood ratio of the first bit by the first bit log likelihood ratio calculation unit 22-1. An error correction code (for example, a concatenated code of an LDPC code and a BCH code) is decoded according to the first bit coding rate information obtained from the rate discriminating unit 25, and the decoding result of the first bit is converted into a second bit logarithm. The data is sent to the likelihood ratio calculation unit 22-2 and the parallel / serial conversion unit 24.

  The second bit log likelihood ratio calculation unit 22-2 uses the second bit constituting the symbol in the same manner as the first bit based on the correspondence between the symbol and the signal point obtained by the hybrid set division method according to the present invention. The log likelihood ratio is calculated and sent to the second bit error correction decoding unit 23-2.

  The second bit error correction decoding unit 23-2 encodes the second bit constituting the symbol using the log likelihood ratio of the second bit by the second bit log likelihood ratio calculation unit 22-2. An error correction code (for example, a concatenated code of an LDPC code and a BCH code) is decoded according to the second bit coding rate information obtained from the rate discriminating unit 25, and the decoding result of the second bit is used as the next bit. The log likelihood ratio calculation unit and the parallel / serial conversion unit 24 transmit the result. Thereafter, the same processing is performed up to the Mth bit log likelihood ratio calculation unit 22-M and the Mth bit error correction decoding unit 23-M, and sequential decoding is performed until all bits constituting the symbol are decoded.

  In this way, the first to Mth bit log likelihood ratio calculation units 22-1 to 22-M and the first to Mth bit error correction decoding units 23-1 to 23-M Hybrid set partitioning that divides uniformly so that the minimum Euclidean distance between signal points is expanded, and does not increase the minimum Euclidean distance after the second bit so that the signal point logarithm of the minimum Euclidean distance decreases. Based on the correspondence between symbols and signal points obtained by the method, sequential decoding is performed using a decoding result obtained for each bit and a log likelihood ratio. Therefore, the first to Mth bit log likelihood ratio calculation units 22-1 to 22-M and the first to Mth bit error correction decoding units 23-1 to 23-M are performed by the hybrid set partitioning method according to the present invention. It functions as a decoding means that decodes each symbol constituent bit based on the correspondence between the signal point to which the symbol is assigned to the signal point and the symbol.

  The parallel / serial conversion unit 24 performs parallel / serial conversion on the decoding result of the data series corresponding to the bits constituting the symbols obtained from the first to Mth bit error correction decoding units 23-1 to 23 -M, and outputs 1 bit. The received data series is sent to the outside.

  Next, with reference to FIG. 2, an embodiment according to the present invention when the modulation method is 8PSK will be described more specifically.

(Example)
FIG. 2 shows information on the coding rate of an LDPC code having a period of 374 and a code length of 44880 bits using the parity check matrix initial value table for each coding rate shown in Tables 1 and 2 according to the present invention (Table 1: Codes). Encoding rate 0.325, Table 2: encoding rate 0.95) as encoding rate information, M = 3, encoding to first bit, encoding rate 0.325, second bit and third bit It is a figure which shows one Example of the transmitter 10b and the receiver 20b to which the rate 0.95 is applied. The transmission device 10b and the reception device 20b illustrated in FIG. 2 are an example in which M = 3 with respect to the transmission device 10 and the reception device 20 according to the embodiment illustrated in FIG. For this reason, the same reference numerals are given to similar components (reference numbers with “b”), and the description will be made in the order of the transmission device 10b and the reception device 20b.

[Transmission Device of One Example]
The transmission apparatus 10b includes a serial / parallel converter 11b, an error correction encoder 12b, an encoding rate setting unit 13b, a hybrid set division mapping unit 14b, an orthogonal modulation unit 15b, and an encoding rate determination signal multiplexing unit. 16b.

  Here, the transmission apparatus 10b shown in FIG. 2 will be described in detail as an embodiment of the transmission apparatus 10 shown in FIG.

  The serial / parallel converter 11b converts a 1-bit transmission data sequence into a 3-bit data sequence as symbol configuration bits, and sends it to the error correction encoding unit 12b.

  The error correction coding unit 12b sends the generated codeword sequence to the hybrid set division mapping unit 14b. The error correction encoding unit 12b of the present example includes a first error correction encoding unit 12b-1 to a third error correction encoding unit 12b-3. The error correction encoding unit 12b divides the first bit uniformly so that the minimum Euclidean distance between signal points is expanded, and the second and subsequent bits are not accompanied by the expansion of the minimum Euclidean distance, and the minimum Euclidean distance is increased. For the symbol constituent bits by the hybrid set partitioning method for partitioning so that the number of signal points is reduced, the concatenated codes are encoded at a predetermined LDPC encoding rate in consideration of the correction capability for each bit. In particular, after the second bit in the symbol constituent bits, the coding rate setting unit based on the criterion for selecting the highest coding rate having sufficient correction capability near the correction limit C / N of the first bit The first error correction coding rate r-1, the second error correction coding rate r-2, and the third error correction coding rate r-3 are set from 13b to the error correction coding unit 12b. In this case, r-1 = 0.325 and r-2 = r-3 = 0.95. Here, each of the first error correction encoding unit 12b-1 to the third error correction encoding unit 12b-3 is a concatenated code that combines a shortened BCH (65535, 65343) code and an LDPC code at the encoding rate. , Codeword sequences (a1), (a2), and (a3) are generated. An example of the generated codeword sequence is shown in FIG. In FIG. 3, the BCH code parity length is 192 bits. The slot configuration shown in FIG. 3 is determined based on a predetermined selection criterion, as will be described in detail later, and assigns a coding rate to each bit of the symbol configuration bits based on the hybrid set division method. This is a preferred example when a system codeword sequence (a3, a2, a1) is used.

  In this example, the hybrid set division mapping unit 14b uses the three codeword sequences (a3, a2, a1) generated by the error correction encoding unit 12b as input symbol sequences, and the correspondence relationship between the above-described symbols and signal points. A modulation signal point sequence is generated according to FIG. Thereafter, the orthogonal modulation unit 15b performs the same processing as described in FIG. 1 to generate a modulated wave signal. Also, the coding rate determination signal multiplexing unit 16b receives the coding rate information for each bit of the symbol configuration bits set for the error correction coding unit 12b by the coding rate setting unit 13b, and the coding rate setting unit 13b. Are multiplexed on the modulated wave signal in the quadrature modulation unit 15b so as to be transmitted by the transmission multiplexing control signal (that is, TMCC signal).

[Receiver of one embodiment]
As illustrated in FIG. 2, the receiving device 20b includes an orthogonal demodulation unit 21b, first to third bit log likelihood ratio calculation units 22b-1 to 22b-3, and first to third bit error correction decoding units 23b. -1 to 23b-3, a parallel / serial conversion unit 24b, and a coding rate determination unit 25b.

  Here, the receiving device 20b shown in FIG. 2 will be described in detail as an embodiment of the receiving device 20 shown in FIG.

  The orthogonal demodulator 21b transmits a modulated wave signal obtained by modulating the modulated signal sequence based on the correspondence relationship between the symbol and the signal point obtained by the hybrid set division method according to the present invention from the transmission device 10b via the transmission line. The received signal is orthogonally demodulated and a received signal point sequence corresponding to the symbol of the main signal is output.

  The coding rate discriminating unit 25b identifies the head of the error correction code from the synchronization signal obtained from the orthogonal demodulation unit 21b and uses the first to third bit error correction decoding units 23b-1 to 23b-3. The 1st to 3rd bit coding rate information is discriminated from the transmission multiplex control signal and sent to the 1st to 3rd bit error correction decoding units 23b-1 to 23b-3, respectively. In this case, r-1 = 0.325 and r-2 = r-3 = 0.95. The first to third bit log likelihood ratio calculation units 22b-1 to 22b-3 and the first to third bit error correction decoding units 23b-1 to 23b-3 are modulated signal points obtained through the orthogonal demodulation unit 21b. For a sequence, decoding processing of an error correction code (for example, a concatenated code of an LDPC code and a BCH code) is executed based on the coding rate information acquired from the coding rate information determination unit 25b, and in particular, obtained for each symbol constituent bit. For the log likelihood ratio and the error correction decoding section after the second bit, the decoding is performed sequentially from the first bit to the third bit using the preceding decoding result.

  The parallel / serial conversion unit 24b performs parallel / serial conversion on the decoding result of the data series corresponding to the bits constituting the symbols obtained from the first to third bit error correction decoding units 23b-1 to 23b-3, and outputs 1 bit. The received data series is sent to the outside.

  Here, as described above, when multistage decoding is performed in the set partitioning method, the decoding error of the first stage is propagated to the subsequent stage. Therefore, it is important to improve the decoding characteristics of the first bit. Similarly to the set division method from the above, in order to improve the frequency efficiency, the coding rate selection criteria in the error correction coding unit 12b and the coding rate setting unit 13b are important.

  That is, in the LDPC code according to the present invention, the type of coding rate and the combination of coding rates to be applied to each bit are selected based on the coding rate selection criteria described later, that is, the correction capability for each bit. As a predetermined number of coding rates determined according to the above, a value corresponding to 0.325 ± 10% for the first bit and 0.95 ± 10% for the second bit and the third bit is adopted. Is preferred. At this time, the coding rate setting unit 13b uses the LDP code coding rate combination applied to each bit of the symbol configuration bits as the combination of the coding rates of the LDPC codes in the required required C / N for the first bit of the symbol configuration bits. The bit error rate before error correction is set to a coding rate that can be corrected to a desired bit error rate, and for the second and subsequent bits, the correction capability is set to the required C / N among the predetermined number of coding rates. On the other hand, in a C / N within a predetermined range (preferably within ± 10% of the required C / N), a bit error rate before error correction can be corrected to a desired bit error rate or less. Set the highest coding rate. Thereby, the error correction encoding unit 12b divides the first bit so that the minimum Euclidean distance between the signal points is uniformly expanded, and the second and subsequent bits are not accompanied by the expansion of the minimum Euclidean distance. In consideration of the correction ability of the symbol component bits by the hybrid set division method that divides so that the signal point logarithm of the minimum Euclidean distance decreases, the second and subsequent bits are sufficient in the vicinity of the correction limit C / N of the first bit. LDPC encoding can be performed with a high correction rate and a high encoding rate.

  With respect to the selection criteria of the type of coding rate and the combination of coding rates applied to each bit in the LDPC code according to the present invention, r-1 = 0.325, r-2 = r-3 = 0.95, In the vicinity of the 1-bit correction limit C / N, the transmission performance (simulation) indicates that the combination of coding rates has a sufficient correction capability and is most suitable for LDPC coding at the highest coding rate. This will be explained based on the results. Assuming white noise as the transmission model, the number of decoding iterations of the LDPC code is set to a maximum of 50 times per stage.

  First, as an example satisfying the required C / N = 8 dB, since the required C / N under white noise of the coding rate 89/120 in 8PSK of the advanced satellite broadcasting system is 7.9 dB, the overall coding rate 89 / 120 is set as the reference coding rate. Here, 89/120 corresponds to the LDPC coding rate. When the overall coding rate is 89/120, it is necessary to allocate the coding rate so that the total coding rate assigned to each bit of the symbol constituting bits is 267/120. Also, here, the LDPC coding rate is distributed to 3 slots. As an example of a combination that satisfies the above conditions, case A: first bit coding rate 37/120, second bit coding rate = third bit coding rate 115/120, case B: first bit coding rate 39 / 120, second bit coding rate = third bit coding rate 114/120, case C: first bit coding rate 41/120, second bit coding rate = third bit coding rate 113/120 LDPC There are 3 cases. FIG. 4 shows C / N vs. BER characteristics under white noise in the above three cases. From FIG. 4, as the first bit coding rate is lowered, the overall performance at low C / N is improved. On the other hand, if the first bit coding rate is lowered too much, the code of the second bit exceeds the correction limit, and high Conversely, it can be seen that the overall performance deteriorates at C / N. Therefore, it can be seen from FIG. 4 that case B is a combination of coding rates that provides the best performance. Further, in order to show that Case B has characteristics superior to those of the conventional system (advanced satellite broadcasting system), the characteristics of the advanced satellite broadcasting system 8PSK89 / 120 are also shown in FIG. From FIG. 4, it can be seen that Case B exhibits characteristics superior to the advanced satellite broadcasting system 8PSK89 / 120.

  The slot configuration shown in FIG. 3 corresponds to the slot configuration of case B. Here, the coding rates of Case B are 39 / 120≈0.325 and 114 / 120≈0.95. Also, the information bit length of the slots (a2) and (a3) corresponding to the information bit length 14212 bits of the slot (a1) corresponding to the first bit encoding rate, the second bit encoding rate, and the third bit encoding rate The total of 42262 bits is 98736 bits, which is divisible by 187 × 8 bits, and is thus suitable for MPEG-2 TS slot transmission. Therefore, the configuration of FIG. 3 is referred to as a slot configuration of the present embodiment.

  As an example showing that the slot configuration of the present embodiment is also suitable on a satellite transmission path, C / C in a case where satellite transmission path distortion is added by a 12 GHz band satellite repeater configuration including an input filter, a TWTA, and an output filter. N vs. BER characteristics are shown in FIG. For comparison with the conventional system, FIG. 5 also shows the characteristics of the coding rate 89/120 in the advanced satellite broadcasting system 8PSK under the same conditions. From FIG. 5, it can be seen that Case B exhibits characteristics superior to the coding rate 89/120 in the advanced satellite broadcasting system 8PSK.

FIG. 6 shows the required C / N via white noise and a 12 GHz band satellite repeater for a coding rate of 89/120 in this embodiment and the advanced satellite broadcasting system 8PSK. The required C / N was defined as C / N satisfying BER = 1 × 10 ⁻¹¹ by linear extrapolation of the results of FIGS. 4 and 5. From FIG. 6, it can be confirmed that the configuration according to the present invention is improved in performance by 0.08 dB in white noise and 0.23 dB through the satellite repeater when compared with the advanced satellite broadcasting system.

  Also, the LDPC code encoder and decoder according to the present invention can be configured in the same manner as disclosed in Japanese Patent No. 4688841 or Japanese Patent No. 4856608. A parity check matrix used for encoding / decoding is a partial matrix corresponding to an information length corresponding to each coding rate, with a parity check matrix initial value table predetermined for each coding rate having a code length of 48880 bits as an initial value. The check matrix initial value tables corresponding to the coding rates of 0.325 and 0.95 of the LDPC code are respectively configured as shown in Table 1 and Table 1 above. The one shown in Table 2 is used. As a result, when applying the LDPC code to the set division method according to the present invention, optimum BER characteristics are obtained for the symbol constituent bits corresponding to each division stage, and transmission with excellent noise tolerance is possible.

  Further, although the case where it is mainly applied to the advanced satellite system has been described, it can be applied to other transmission systems having different code lengths. That is, instead of 39/120, 114/120, 114/120, by applying a coding rate of 0.325 ± 10%, 0.95 ± 10%, 0.95 ± 10%, other codes The present invention can be applied in exactly the same manner to transmission systems having different lengths. Here, the range of ± 10% is generally given because the correction capability of an error correction code is generally determined by the coding rate if the error correction code of the same type (for example, LDPC code) is used, but the code length It is known that the correction capability varies slightly depending on the completeness of the code, and generally the longer the code length, the fewer codes in cycles 4, 6,... This is because a difference of about 10% caused by a difference in conditions is included.

  Although the above embodiment has been described based on a specific example, various applications are possible. For example, although the modulation scheme has been described by taking 8PSK as an example, the above-described combination of coding rates can also be applied to other 3-bit digital modulation schemes (such as 8QAM). The present invention can also be applied to other transmission methods such as satellite broadcasting, terrestrial broadcasting, mobile communication, and fixed communication.

  According to the present invention, it is possible to improve the encoding modulation performance in the combination of the error correction code and the multi-level modulation and improve the transmission performance under white noise, so that the error correction code and the multi-level modulation are used. Useful for any application.

10, 10b Transmitting device 11, 11b Serial / parallel conversion unit 12, 12b Error correction coding unit 12-1, 12b-1 First error correction coding unit 12-2, 12b-2 Second error correction coding unit 12 -3, 12b-3 Third error correction coding unit 12-M M error correction coding unit 13, 13b Coding rate setting unit 14, 14b Hybrid set division mapping unit 15, 15b Orthogonal modulation unit 16, 16b coding Rate discriminating signal multiplexer 20, 20b Receiver 21, 21b Orthogonal demodulator 22-1, 22b-1 First bit log likelihood ratio calculator 22-2, 22b-2 Second bit log likelihood ratio calculator 22- 3, 22b-3 Third bit log likelihood ratio calculation unit 22-M M bit log likelihood ratio calculation unit 23-1, 23b-1 First bit error correction decoding unit 23-2, 23b-2 Second bi Error correction decoding unit 23-3, 23b-3 third bit error correction decoding unit 23-M M bit error correction decoding unit 24, 24-b parallel / serial conversion unit 25, 25-b coding rate determination unit

Claims (12)

A transmission device for transmitting digital data,
Concatenated encoding means comprising an LDPC code and a BCH code;
A plurality of codeword sequences are input symbol sequences, and the first bit is divided so that the minimum Euclidean distance between signal points is uniformly expanded, and the second and subsequent bits are not accompanied by an increase in the minimum Euclidean distance. A symbol / signal point conversion means for converting into a signal point series based on a correspondence relationship between a symbol and a signal point obtained by a hybrid set division method for dividing so as to reduce the signal point logarithm of the minimum Euclidean distance;
Orthogonal modulation means for orthogonally modulating the signal point sequence generated by the symbol / signal point conversion means,
The concatenated encoding means encodes the LDPC code with the coding rate of the correction capability corresponding to the required C / N for the first bit of the symbol constituent bits, and the predetermined number of codes for the second and subsequent bits. Encoding at the highest encoding rate that is C / N within a predetermined range with respect to the required C / N, and encoding the second and subsequent bits at the same encoding rate. A transmitter characterized by the above.   The transmission apparatus according to claim 1, wherein a code length of the LDPC code is 44880.   The LDPC code has an accuracy of ± 10% with respect to an encoding rate of 0.325 in the first bit, an accuracy of ± 10% with respect to an encoding rate of 0.95 after the second bit, and in order of increasing Euclidean distance. The transmission apparatus according to claim 1, wherein a low coding rate is assigned.   The LDPC code has a coding rate of 0.325 ± 10% for the first bit and a coding rate of 0.95 ± 10% for the second and third bits when the symbol constituent bits are 3 bits. The transmission apparatus according to claim 1, wherein lower coding rates are assigned in ascending order of Euclidean distance.   5. The transmission apparatus according to claim 1, further comprising: a coding rate determination signal multiplexing unit that transmits information related to a coding rate of the LDPC code by a transmission multiplexing control signal. 6. The concatenated encoding means includes an encoder that performs LDPC encoding of the digital data using a unique check matrix for each encoding rate,
The encoder uses a parity check matrix initial value table predetermined for each coding rate with a code length of 44880 bits as an initial value, and 1 of a submatrix corresponding to an information length corresponding to a coding rate of 0.325. Means for performing LDPC encoding using a parity check matrix configured by arranging elements in a cycle of 374 columns in the column direction;
The parity check matrix initial value table of the coding rate 0.325 is
The transmission device according to claim 1, comprising: The concatenated encoding means includes an encoder that performs LDPC encoding of the digital data using a unique check matrix for each encoding rate,
The encoder uses a parity check matrix initial value table predetermined for each coding rate with a code length of 44880 bits as an initial value, and 1 of a submatrix corresponding to an information length corresponding to a coding rate of 0.95. Means for performing LDPC encoding using a parity check matrix configured by arranging elements in a cycle of 374 columns in the column direction;
The parity check matrix initial value table with the coding rate of 0.95 is
The transmission device according to claim 1, comprising: A digital data receiving device,
Orthogonal demodulation means for orthogonally demodulating a modulated wave signal subjected to concatenated encoding composed of an LDPC code and a BCH code, and outputting a received signal point sequence;
A plurality of codeword sequences are set as an input symbol sequence, and the symbol constituent bits of the input symbol sequence are divided so that the minimum Euclidean distance between signal points is uniformly increased with respect to the first bit. Decoding corresponding to the symbol constituent bits based on the correspondence between the signal points and the symbols obtained by the hybrid set division method that divides so as to reduce the signal point logarithm of the minimum Euclidean distance without enlarging the minimum Euclidean distance A decoding means for performing processing,
The LDPC code of the decoding means has a predetermined number of coding rates determined according to the correction capability for each bit, and the decoding means encodes the first bit of the symbol constituent bits on the transmission side. The second and subsequent bits are decoded at a coding rate with a correction capability corresponding to the required C / N, and the predetermined number of coding rates encoded on the transmission side are within a predetermined range with respect to the required C / N. The decoding process corresponding to the symbol component bit is performed by decoding the second and subsequent bits with the same coding rate as the second bit for the second and subsequent bits. A receiving apparatus.   The receiving apparatus according to claim 8, wherein the decoding unit performs decoding corresponding to an LDPC code and a BCH code having a coding rate set on a transmission side.   The receiving apparatus according to claim 8 or 9, wherein the decoding means comprises coding rate discrimination means for discriminating a coding rate of the LDPC code based on a transmission multiplex control signal.   The decoding means receives the modulated wave signal transmitted by the transmission apparatus according to any one of claims 1 to 5, and is individually set for each bit of the symbol constituent bits in the hybrid set division method. And a decoding apparatus that performs decoding based on a coding rate of the LDPC code.   The decoding means receives the modulated wave signal transmitted by the transmission device according to claim 6 or 7, and codes the LDPC code individually set for each bit of the symbol constituent bits in the set division method Decoding based on the conversion rate and the parity check matrix.