JP2015015390A - Offset voltage correction method of hall device and hall sensor employing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method capable of correcting an offset voltage Vo in an extremely simple structure and further easily regarding a method for canceling and correcting the offset voltage Vo of a Hall device 1, and a Hall sensor in a simple structure based on this principle.SOLUTION: A predetermined constant current is caused to flow to a pair of current terminals, and a resistor 100 including a variable resistance Rv is connected between two points within the Hall device 1 at such a time or between the pair of current terminals. At least a part of voltage drop there is extracted as an output voltage Vd by adjusting the variable resistance Rv and while utilizing the Vd, under a condition that an external magnetic field is zero, the offset voltage Vo generated in a Hall voltage terminal is canceled. The high-accuracy and high-sensitivity Hall sensor is provided to which the resistor 100 with the variable resistance Rv applicable to this method is mounted or can be mounted and further in which a magnetic substance for magnetic field convergence is provided proximately to a magnetic sensitive part of the Hall device.

Description

  The present invention relates to a method for canceling offset voltage of a Hall element and a Hall sensor using this method.

Conventionally, Hall sensors can measure DC magnetic field and direction of magnetic field, and IC technology (integrated technology) enables Hall sensors equipped with ultra-small Hall elements and various amplification circuits and correction circuits to be IC technology. An integrated and molded product is also commercially available. Here, the Hall element means a semiconductor substrate having a current terminal and a Hall voltage terminal. Generally, the semiconductor substrate has an ohmic contact electrode for a pair of current terminals and a pair of holes. Ohmic contact electrodes for voltage terminals are formed, these electrodes are formed along the outer periphery of the Hall element, and with respect to the direction of current flowing into the Hall element from a pair of current terminal electrodes A pair of Hall voltage terminal electrodes are formed on the same straight line in the orthogonal direction.

  However, when the pair of Hall voltage terminal electrodes are slightly deviated from the same straight line in the orthogonal direction with respect to the direction of current flowing into the Hall element, the current flow is biased otherwise. When the magnetic field is zero, such as when the symmetry of the current flow is lost, the voltage between the pair of Hall voltage terminals should be zero, but the offset voltage (which is a voltage other than the Hall voltage Vh) Unbalanced voltage) Vo is generated. The current bias occurs when a mechanical stress is applied to the Hall element due to a temperature change or when a non-uniform impurity concentration distribution exists in the semiconductor substrate that is the Hall element. In addition, since the Hall element is made of a semiconductor substrate, its resistance value has a large temperature dependency. In particular, a predetermined constant current (drive current) I is passed through a pair of current terminals of the Hall element. In the case of driving, the voltage drop between the pair of current terminals changes depending on the resistance value having a large temperature dependency based on the temperature at that time, and accordingly, the offset voltage Vo seems to be temperature dependent. Formula 1 shows the total output voltage Vt of the Hall voltage Vh between the Hall voltage terminals of the Hall element and the offset voltage Vo. When the external magnetic field B that is the magnetic field to be measured is extremely small, the hall voltage Vh associated therewith is also small. As shown in Equation 1, since the Hall voltage Vh under the (external) magnetic field (magnetic flux density) B and the offset voltage Vo are both proportional to the current I flowing through the Hall element, the offset is higher than the Hall voltage Vh. In some cases, the voltage Vo is larger, resulting in a larger error, and various methods for canceling the offset voltage Vo have been proposed. In Equation 1, an n-type semiconductor substrate having a Hall coefficient Rh = −1 / en and an electron density (carrier density) of n is used, and the elementary charge of electrons is e, and the thickness of the semiconductor substrate of the Hall element ( The magnetic field B direction) is d. ΔR is a value obtained by dividing the offset voltage Vo by the current I flowing at that time, and is an equivalent offset resistance. Under a constant current (driving current) I value, the same carrier density n, the same Hall element thickness d, and the same magnetic field B, the Hall voltage Vh is constant, but the offset voltage Vo is an equivalent offset. Due to the influence of the resistance ΔR, a semiconductor having a carrier with a high mobility μ has a smaller equivalent resistance ΔR, so that the offset voltage Vo is also reduced and the measurement accuracy can be improved. Therefore, in general, since electrons are higher in mobility μ than carriers are holes, an n-type semiconductor is used as a Hall element. Conventionally, n-type GaAs (gallium arsenide) and InSb (indium antimony) crystals have been used as Hall elements because of higher electron mobility than n-type Si (silicon).

Conventionally, as a method of canceling the offset voltage Vo, a so-called spinning current method, which is a so-called Hall element current terminal and Hall voltage terminal, is switched by a switch and each current and Hall voltage Vh are measured to obtain an offset voltage. A method of subtracting Vo and removing it (see, for example, Patent Document 1, Patent Document 2, and Patent Document 3) or two Hall elements having the same shape are connected in series, and the Hall element sensing parts are close to each other in a direction orthogonal to each other. A method of removing the offset voltage caused by the stress by arranging (see, for example, Patent Document 4), and furthermore, a constant current is passed through the Hall element, and the output voltage is amplified by the differential amplifier to obtain the sensor output voltage. With a current sensor, the voltage drop of the internal resistance Ri of the Hall element, which changes with temperature changes, is input to the compensation differential amplifier, and this is compensated to the specified level Reduced offset voltage generated by changes in ambient temperature by calculating with gain β and outputting, and subtracting voltage output of compensation differential amplifier from voltage output of differential amplifier to obtain sensor output voltage A method (see Patent Document 5) has been proposed.

However, in the spinning current method, the offset voltage is generated based on the symmetry of the Hall element shape and the resistance distribution in the semiconductor substrate of the Hall element, the offset voltage is generated based on the resistance change due to the stress, and the ohmic property of the electrode. It is extremely difficult to cancel the generation of the offset voltage based on the deviation from the contact. In addition, even when two Hall elements having the same shape are cancelled in series, it is difficult to correct particularly for the generation of an offset voltage based on the symmetry of the shape of the Hall element and the resistance distribution in the semiconductor substrate of the Hall element. . In addition, a method of canceling the offset voltage by inputting the voltage drop of the internal resistance Ri of the Hall element to the compensation differential amplifier and calculating and outputting with a predetermined compensation gain β is an offset voltage based on a temperature change. This component is easy to cancel, but since it is not corrected with zero magnetic field, it is difficult to cancel the generation of the offset voltage based on the symmetry of the Hall element shape and the resistance distribution in the semiconductor substrate of the Hall element. In addition, the control circuit is also complicated, and there is a problem that it becomes a complicated process cancellation method.

JP-A-6-186103 JP 2001-337147 A JP 2010-54301 A JP-A-62-208683 Japanese Patent Laid-Open No. 2003-14788

  The present invention eliminates the problems of the above-described method of canceling the offset voltage Vo of the conventional Hall element, proposes a method that can cancel the offset voltage Vo with a very simple structure and easily, and to this principle. An object of the present invention is to provide a Hall sensor that can easily cancel the offset voltage Vo. Originally, if the offset voltage Vo can be completely canceled, as shown in Equation 1, under the same external magnetic field B with the same drive current I, the same carrier density n, the same shape of the Hall element, the semiconductor Since the Hall voltage Vh should be obtained regardless of the type, it is possible to use a silicon (Si) single crystal substrate as a Hall element, which has a small mobility μ, but is easy to integrate, etc., and has a low manufacturing cost. Become.

  In order to achieve the above object, an offset voltage correction method according to claim 1 of the present invention is a Hall element offset voltage correction method in which a predetermined current is passed through a pair of current terminals, and the Hall element at that time Using at least a part of the voltage drop between the two points or between the pair of current terminals, a resistor having a variable resistor is used, and the variable resistor is adjusted to take out as an output voltage Vd. This is characterized in that the correction is set so as to cancel the offset voltage Vo generated at the Hall voltage terminal under the condition of zero external magnetic field.

Here, the entire resistor may be a variable resistor, but is generally divided into a fixed resistor and a variable resistor. It is better to use resistors with a very low temperature coefficient, but even if the temperature coefficient is large, they are used to share the voltage drop, so the variable resistance component and the other fixed resistance components have the same temperature coefficient. If it has, there is no problem. Further, the current flowing through the resistor having the variable resistor is set to be smaller by one digit or more than the current (driving current) flowing through the Hall element in order to flow a predetermined constant current (called driving current) through the Hall element. It is better to leave the resistance value higher. The predetermined current flowing through the pair of current terminals is generally a direct current and is adjusted through a direct current source, and is a constant direct current of about 1 mA (milliampere), for example.

In the first place, the offset voltage Vo is when the external magnetic field (magnetic flux density) B is zero (at least when the Hall element is installed in an environment where B is zero), and when a predetermined current is passed through a pair of current terminals. This is a potential difference between a pair of hall voltage terminals, which is a pair of hall voltage terminals (a hall voltage terminal electrode having the same potential as the hall voltage terminal) when viewed from the reference terminal of the pair of current terminals. However, the same is true), and a difference in voltage drop based on a predetermined current at each Hall voltage terminal. There are three main reasons for this. 1) Deviation from a predetermined position of a pair of Hall voltage terminal electrodes (symmetry deviation), 2) Non-uniformity of impurity concentration distribution of the semiconductor substrate of the Hall element, and 3) Heat between the mold resin and the Hall element. This is caused by a change in resistance distribution in the Hall element due to stress strain due to a difference in expansion coefficient. 1) The deviation of the pair of Hall voltage terminal electrodes from the expected position (symmetry deviation) is that the Hall element semiconductor substrate is rectangular and has a uniform impurity concentration distribution. There should be a pair of Hall voltage terminal electrodes on a straight line in a direction perpendicular to the straight line connecting the electrodes, but this occurs due to misalignment of the mask in the manufacturing process. It is. Therefore, when the same current is passed through a pair of current terminals as a predetermined current, even if the magnetic field (magnetic flux density) B is zero, an offset voltage (a difference in voltage drop between the pair of Hall voltage terminals) Unbalanced voltage) Vo is generated. This offset voltage Vo is directly proportional to the current I flowing between the current terminals. 2) The offset voltage Vo due to the non-uniformity of the impurity concentration distribution in the semiconductor substrate of the Hall element is generated even without the above-described symmetry shift, and the resistance distribution in the semiconductor substrate of the Hall element is different. Therefore, the current values passing through the pair of Hall voltage terminal electrodes are different, and a difference in voltage drop occurs. 3) The offset voltage Vo due to the change in the resistance distribution in the Hall element due to the stress strain due to the difference in the thermal expansion coefficient between the mold resin and the Hall element due to the thermal expansion coefficient, etc. This is due to the difference in voltage drop based on the difference.

The principle of the offset voltage correction method of the present invention is as follows. First, the cause of the occurrence of the above three offset voltages is to each Hall voltage terminal (or Hall voltage terminal electrode) of the pair of Hall voltage terminals as viewed from the reference terminal of the pair of current terminals. It can be concluded that this is a voltage drop difference based on the difference in resistance value. Since these resistance values are semiconductor resistances in the Hall element that is a semiconductor substrate, the resistance temperature coefficient thereof is large. However, this resistance has a positive temperature coefficient (resistance value increases as the temperature rises), which is a metallic resistance temperature coefficient when the impurity concentration is high enough to degenerate, and a negative temperature coefficient (temperature) at a low concentration. The resistance value decreases with increasing). Therefore, in a state where a predetermined constant current is passed through the current terminal, the positive resistance temperature coefficient increases the semiconductor resistance in the Hall element as the ambient temperature rises. The offset voltage Vo also increases. Further, with a negative resistance temperature coefficient, as the ambient temperature rises, the semiconductor resistance in the Hall element decreases, and accordingly, the offset voltage Vo, which is the difference in voltage drop, also decreases. Thus, when only the offset voltage Vo is viewed, the temperature dependence of the absolute value of the offset voltage Vo appears to be different for each Hall element sample. However, since the semiconductor resistance distribution itself in the Hall element has the same temperature dependency, the ratio to the original value hardly has the temperature dependency. That is, if the Hall element itself is made into a small shape so that even if the ambient temperature changes, there is no temperature distribution in the Hall element, and it can be assumed that the temperature is almost uniform. A resistance R43 between each of the Hall voltage terminals 4 and 5 of the pair of Hall voltage terminals when viewed from the reference terminal 3 of the pair of current terminals, with respect to the resistance R23 between the current terminals. R43 / R23 and R53 / R23, which are their ratio, have almost no ambient temperature dependency. Of course, even if it is not the resistance R23 between the pair of current terminals, if the Hall element is at a constant uniform temperature, the resistance between any two points on the semiconductor substrate that is the Hall element is similarly the same temperature. Since it changes with the coefficient, it becomes possible to cancel the temperature dependence by making the ratio. The present invention makes use of these effects, even if the resistance of the Hall element is not a resistance R23 between a pair of current terminals. Use a resistor, divide this by a resistor whose resistance temperature coefficient is almost zero, and provide a variable resistor in this, so as to cancel the offset voltage by adjusting the shared voltage with the external magnetic field B being zero The correction is made to the above.

The correction of the offset voltage Vo due to the causes 1) and 2) described above may be performed when the Hall element is manufactured because the ratio of the resistance distribution and the like is determined once the Hall element is manufactured. The correction of the offset voltage Vo based on () occurs, for example, when packaged in a mold resin, and after such packaging has been performed, it is actually incorporated into a current sensor or the like. It is good to carry out with the external magnetic field B = 0 (zero magnetic field) in the current supplied to the current terminal of the operating environment and the ambient temperature. It is also important to match the thermal expansion coefficients of the mold resin and the Hall element as much as possible. Furthermore, in order to make it difficult for a large stress to be applied to the Hall element between the Hall element and the mold resin, it may be structured to allow some degree of freedom by filling with a gap or a flexible material. In consideration of the above, after incorporating a Hall element and a resistor having a variable resistor and packaging with a mold resin if necessary, a predetermined temperature and a predetermined driving current (current flowing through a current terminal) are reduced. Further, it is preferable that the output voltage Vd is taken out from the variable resistor in a state where the magnetic field B is zero, and the offset voltage Vo is adjusted to be canceled by the variable resistor.

In the offset voltage correction method according to claim 2 of the present invention, one Hall voltage terminal electrode (40) is formed on one side of the Hall element, and one Hall voltage terminal (4) is taken out from this, and on the other side, Two Hall voltage terminal electrodes (50a, 50b) are formed, and the other two Hall voltage terminals (5a, 50b) corresponding to the two Hall voltage terminal electrodes (50a, 50b) are formed. 5b) is taken out, and a resistor having the variable resistor is connected between the two Hall voltage terminals (5a, 5b) so that the output voltage Vd can be taken out from the variable resistor.

As described above, if the semiconductor substrate of the Hall element is rectangular and has a uniform impurity concentration distribution, a pair of straight lines in a direction perpendicular to a straight line connecting a pair of current terminal electrodes is formed. It is desirable to provide an electrode for the Hall voltage terminal and to have an electrode arrangement with good symmetry, but even if this symmetry is shifted or not shifted, the offset voltage Vo is not symmetrical because the current distribution of the drive current is not symmetrical. It may have occurred. In any case, as described above, the resistance ratio (resistance) between two different points (may share one point) with respect to the resistance between any two points in the semiconductor substrate of the Hall element Since the ratio) has almost no temperature dependence, the offset voltage Vo is canceled and corrected using this action and effect.

Here, one Hall voltage terminal electrode (40) is formed on one side of the semiconductor substrate of the Hall element on a straight line in a direction orthogonal to the straight line connecting the pair of current terminal electrodes, The two Hall voltage terminal electrodes (50a, 50b) are formed on the opposite side of the Hall element semiconductor substrate, and the two Hall voltage terminal electrodes (50a) 50b), but in general, a resistor having a variable resistor is connected between the Hall voltage terminals (5a, 5b) which are the terminals, and a magnetic field is applied under a predetermined (drive) current. In the state where B is zero, the offset voltage Vo is canceled by the output voltage Vd from the variable resistor. The output voltage Vd from the variable resistor is a potential obtained by dividing the potential between the Hall voltage terminals (5a, 5b) by a resistor having a variable resistor and taking out from the variable resistor. It can be operated as a potential. If the value of the variable resistor is adjusted so that this output voltage Vd becomes equal to the potential difference V43 between the Hall voltage terminal 4 corresponding to one Hall voltage terminal electrode (40) and the common current terminal 3, for example. Since the potential difference V43 and the output voltage Vd are equal to each other, for example, they can be differentially amplified and canceled to make the offset voltage Vo zero. At this time, the resistance value of the resistor with the variable resistor is set for the Hall voltage terminal so that the current flowing through the resistor side with the variable resistor is negligibly smaller than the current flowing through the Hall element due to the drive current. It may be set so that it is at least one digit larger than the resistance value between the electrodes (50a, 50b).

An offset voltage correction method according to claim 3 of the present invention is a Hall element having a pair of current terminals and a pair of Hall voltage terminals, wherein the variable resistor is connected in parallel between the pair of current terminals. Insert the resistor provided, take out the output voltage Vd due to the voltage drop from the variable resistor under a predetermined current of the current terminal, and add the output voltage Vd to the output voltage related to the voltage between the Hall voltage terminals Alternatively, the offset voltage Vo is canceled by subtraction.

According to the second aspect of the present invention, the potential between the Hall voltage terminals (5a, 5b) corresponding to the two Hall voltage terminal electrodes (50a, 50b) formed in the semiconductor substrate of the Hall element is represented by a resistor having a variable resistor. The Vd divided and taken out from the variable resistor was used, but here, these two Hall voltage terminal electrodes (50a, 50b) are called current terminal electrodes (20 30), and a resistor having a variable resistor connected between the current terminal 2 and the current terminal 3 corresponding thereto can be considered. Then, the reference potential is used as a common current terminal 3 (which may be a ground potential here), and a shared voltage which is a voltage drop across the variable resistor is taken out as an output voltage Vd. The offset voltage Vo is canceled by adjusting the variable resistance so as to be equal to, and subtracting it from the offset voltage Vo (adding when the sign is opposite). There is an advantage that the offset voltage Vo can be canceled and corrected using the four terminals of the existing Hall element without changing the design of the Hall element. If the offset voltage Vo and the output voltage Vd of the shared voltage, which is a voltage drop across the variable resistor, always have the same sign, the offset voltage Vo can be easily canceled using a differential amplifier. Therefore, as described above, a pair of Hall voltage terminal electrodes should exist on a straight line in a direction orthogonal to a straight line connecting the pair of current terminal electrodes. The offset voltage Vo becomes a positive sign voltage or a negative sign voltage due to a slight positional shift of the terminal electrode, and the circuit differs depending on the addition process or the subtraction process. In order to prevent this, one of the Hall voltage terminal electrodes may be deviated from the above-described straight line so as to surely generate an offset voltage Vo having a positive sign. .

If the offset voltage Vo and the output voltage Vd of the shared voltage, which is a voltage drop across the variable resistor, always have the same sign, the offset voltage Vo can be easily canceled using a differential amplifier. Therefore, as described above, a pair of Hall voltage terminal electrodes should exist on a straight line in a direction orthogonal to a straight line connecting the pair of current terminal electrodes. The offset voltage Vo becomes a positive sign voltage or a negative sign voltage due to a slight positional shift of the terminal electrode, and the circuit differs depending on the addition process or the subtraction process. In order to prevent this, an offset voltage Vo having a positive sign is surely generated, and this offset voltage Vo is canceled by a differential operation (subtraction processing circuit) with an output voltage Vd from a variable resistor generated with a positive sign. In addition, one Hall voltage terminal electrode may be formed by deviating from the above-described straight line in the orthogonal direction.

According to a fourth aspect of the present invention, there is provided a Hall sensor that corrects the offset voltage Vo of the Hall element, wherein one Hall voltage terminal electrode (40) is formed on one side of the Hall element, The Hall voltage terminal (4) is taken out, two Hall voltage terminal electrodes (50a, 50b) are formed on the opposite side of the Hall element, and the two Hall voltage terminal electrodes (50a, 50b) are formed. ), The other two Hall voltage terminals (5a, 5b) corresponding to these are taken out, and a resistor having the variable resistance is connected between the two Hall voltage terminals (5a, 5b), The output voltage Vd can be taken out from the variable resistor.

In this case, the offset voltage correction method according to claim 2 is a product invention, and a Hall sensor having a Hall element is provided. As described above, the two Hall voltage terminal electrodes (50a, 50b) are arranged on one side of the Hall element semiconductor substrate on a straight line in a direction orthogonal to the straight line connecting the pair of current terminal electrodes. In addition, one Hall voltage terminal electrode (40) is formed on each other, and the two Hall voltage terminal electrodes (50a, 50b) are placed opposite to the semiconductor substrate of the Hall element with the perpendicularity in the orthogonal direction interposed therebetween. It is better to form these electrodes on the side, and it is better to form these electrodes on the outer peripheral portion of the semiconductor substrate of the Hall element like a general Hall element. In addition, the resistance value of the resistor having the variable resistance of one digit or more larger than the resistance value in the semiconductor substrate between the two Hall voltage terminal electrodes (50a, 50b) is the resistance having the variable resistance. It is preferable that the current flowing into the substrate is small. However, if the resistance is too large, a noise is generated. Therefore, it is preferable that the resistance value in the semiconductor substrate between the two Hall voltage terminal electrodes (50a, 50b) is small. . Therefore, it is better to form the distance between the two Hall voltage terminal electrodes (50a, 50b) as small as possible. Of course, the offset voltage Vo is canceled by using the output voltage Vd from the variable resistance of the Hall sensor.

The Hall sensor according to claim 5 of the present invention is a case where the variable resistor is adjusted so that the offset voltage Vo of the Hall element can be canceled by using the output voltage Vd at that time.

For example, a Hall element is installed under a predetermined current (drive current) and normal ambient temperature, and a magnetic field B (magnetic flux density) is zero, and the variable resistance is adjusted to output at that time. If the voltage Vd and the potential of the other Hall voltage terminal 4 are differentially operated by differential amplification such as an OP amplifier so that the output voltage becomes zero, the offset voltage Vo of the Hall element is canceled. Can be set to That is, in an environment where the magnetic field B is zero, the potential of one Hall voltage terminal 4 and the output voltage Vd are made equal. The output voltage Vd is the difference between the common current terminal 3 (generally, this common current terminal 3 is set to the ground potential) and the potential of the movable part terminal of the variable resistor, that is, the movable part of the variable resistor from the ground potential. This is the output voltage corresponding to the voltage drop to the terminal.

The Hall sensor according to claim 6 of the present invention is a Hall sensor configured to correct the offset voltage Vo of the Hall element, wherein a resistor having a variable resistance is inserted in parallel between a pair of current terminals, The offset voltage Vo between the pair of Hall voltage terminals at that time is obtained by using the output voltage Vd which is a voltage drop across the variable resistor when the external magnetic field is zero under a predetermined current flowing through the pair of current terminals. The variable resistor is adjusted so as to cancel the signal.

In this case, the offset voltage correction method according to claim 3 is used as a product invention to provide a Hall sensor having a Hall element. Here again, the output voltage Vd is movable from the difference between the common current terminal 3 (generally making this common current terminal 3 ground potential) and the potential of the movable part terminal of the variable resistor, that is, the ground potential of the variable resistor. This is the output voltage corresponding to the voltage drop to the terminal. Here, the Hall element is provided with a pair of current terminal electrodes and a pair of Hall voltage terminal electrodes and corresponding terminals, and the voltage between the pair of Hall voltage terminals is: In an environment where the magnetic field B is zero, it corresponds to the offset voltage Vo. For example, when the external magnetic field B is zero (under an environment of zero), the variable resistor is adjusted so that the output voltage Vd from the variable resistor is equal to the offset voltage Vo, and this is subtracted from the offset voltage Vo. Thus, the offset voltage Vo can be canceled. Of course, after offsetting one or both, the offset voltage Vo may be canceled by subtracting.

The Hall sensor according to claim 7 of the present invention includes an arithmetic circuit that cancels the offset voltage Vo by adding or subtracting the output voltage Vd to or from an output voltage based on a voltage between a pair of Hall voltage terminals. Is the case.

Here, as described above, for example, the output voltage Vd and the offset voltage Vo are made equal, and when the signs are the same, the subtraction processing circuit such as an OP amplifier performs subtraction, and when the signs are opposite, the addition is performed. This is a case where a Hall sensor is provided that includes an arithmetic circuit that performs addition by a processing circuit to cancel the offset voltage Vo. In general, the offset voltage Vo differentially amplifies the voltage between a pair of Hall voltage terminals by an OP amplifier or the like. In order to set the offset voltage Vo to the output value of the OP amplifier as it is, the amplification factor of the OP amplifier may be set to 1. Here, even when the amplification factor of the OP amplifier is not 1, the output voltage Vd can be made equal to the amplified offset voltage Vo, and the offset voltage Vo can be canceled by subtraction, for example.

A Hall sensor according to an eighth aspect of the present invention is a case in which a resistor having the variable resistor or a fixed resistance component of the resistor having the variable resistor is formed integrally with the Hall element.

All the resistors having the variable resistors may be composed of only the variable resistors, but a combination of a fixed resistor and a variable resistor is suitable for canceling the accurate offset voltage Vo. As described above, the adjustment of the output voltage Vd from the variable resistor is based on the mold resin, considering the possibility that the offset voltage Vo is generated due to the stress due to the difference in thermal expansion coefficient between the mold resin and the semiconductor substrate of the Hall element. It is better to cancel the offset voltage Vo after packaging. Therefore, here, a resistor having a variable resistance, that is, a combination of a variable resistor and a fixed resistor is integrated with a printed circuit board or the like, or the variable resistor is removed from the integration with the Hall element, so that at least the fixed resistor It is a case where it is made to integrate only with the said Hall element.

For example, Nichrome, which is a metal having a high resistivity and a small temperature coefficient of resistance, is formed by sputtering on an insulating thin film on a semiconductor substrate of a Hall element, and this is patterned by photolithography to obtain a desired resistance value. This can be used as a fixed resistor integrated with the semiconductor substrate of the Hall element. At this time, a terminal can be taken out from the middle of the fixed resistor and used as a terminal for a variable resistor attached to the outside. Of course, the fixed resistor can also be integrated by being embedded in, for example, a mold resin to be packaged. It is also possible to manufacture a hall sensor in which a fixed resistor and a variable resistor are integrated together with a hall element on a printed board. Further, the variable resistance portion may be a thin film resistor formed on a printed circuit board or the like, and may be adjusted to a desired resistance value by laser trimming or the like.

The Hall sensor according to a ninth aspect of the present invention is a case where at least the magnetically sensitive portion of the Hall element is formed in the SOI layer of the SOI substrate or the semiconductor layer formed on the SOI layer.

An SOI substrate is an Si ₂ oxide film (referred to as a BOX layer) that is an Si oxide film, which is an electrical insulating layer (hereinafter simply referred to as an insulating layer), on a silicon single crystal semiconductor substrate (underlying substrate). A semiconductor substrate to which a thin silicon single crystal semiconductor layer (referred to as an SOI layer) is attached. This SOI layer has a thickness of about 0.1 μm (μm) to about 50 μm and is commercially available. Recent integrated circuits (ICs) are often formed on this SOI layer. Also in the MEMS technology, the above BOX layer is used as an etching stopper, etc., so that the diaphragm structure of the SOI layer including the BOX layer, cross-linking Applications such as forming a structure or a cantilever structure with a cavity below it are becoming popular. In the present invention, as can be seen from the equation 1, the Hall element is advantageous in that its thickness is thinner, and in addition, it is also advantageous to attach a magnetic element for magnetic convergence. In addition, it is advantageous from the viewpoint of holding a semiconductor layer of an indium antimony (InSb) crystal thin film having a large electron mobility μ, which is a semiconductor other than Si, and is also advantageous in that an integrated circuit can be formed on an SOI substrate. There are many. The magnetically sensitive portion of the Hall element refers to a semiconductor region sensitive to an external magnetic field B surrounded by a pair of current terminal electrodes and a pair of Hall voltage terminal electrodes (or electrodes corresponding thereto). .

According to a tenth aspect of the present invention, there is provided a Hall sensor in which an Hall element is driven on an SOI substrate, and at least a part of an integrated circuit for amplifying and calculating a signal related to the Hall element is integrated with the Hall element. Is formed.

As mentioned above, SOI substrates are convenient semiconductor substrates for forming integrated circuits. Therefore, in order to provide a Hall sensor which is a compact magnetic sensor, at least a part of the necessary integrated circuit is integrally formed on the SOI substrate so that a basic integrated circuit is not required. .

A Hall sensor according to an eleventh aspect of the present invention includes a magnetic body for converging magnetic fields.

For example, by adhering a ferrite chip, which is a soft magnetic material having a high magnetic permeability, as a magnetic material for converging magnetic fields, to the front side and back side of the Hall element made of a semiconductor thin film substrate, or at least one side thereof. This is a case where the magnetic field to be measured (external magnetic field) B is used for the purpose of increasing the sensitivity of the Hall sensor by focusing and strengthening the magnetic flux on the Hall element. These magnetic bodies for converging magnetic fields may be formed by being embedded in a mold resin.

In a Hall sensor according to a twelfth aspect of the present invention, a cavity is formed at least in a region corresponding to a lower portion of the magnetically sensitive portion of a base substrate of an SOI substrate, and a magnetic body for converging a magnetic field is provided in the cavity. This is the case.

As described above, the cavity can be easily formed in the SOI substrate, particularly, the base substrate by the MEMS technique. By inserting and fixing the magnetic body for magnetic field convergence in this cavity, the magnetic body for magnetic field convergence can be installed very close to the magnetic sensitive part of the Hall element formed in the thin SOI layer. Is provided. Of course, by providing a magnetic field converging magnetic body close to the upper part of the Hall element, the SOI layer in which the distance between the magnetic field converging magnetic body inserted into the lower cavity and the magnetic field converging magnetic body thereabove is almost thin Since these magnetic resistances are reduced, a stronger magnetic field B penetrates the magnetic sensitive part. Therefore, a highly sensitive and compact Hall sensor can be provided.

The Hall element offset voltage correction method of the present invention utilizes at least a part of the voltage drop between two points in the Hall element or between the pair of current terminals, and this voltage drop is controlled by a variable resistor. Since the voltage is divided, the output voltage Vd corresponding to the shared voltage changes in a directly proportional relationship with the offset voltage Vo with respect to the change in the environmental temperature under a driving current at a predetermined constant current. Therefore, the output voltage Vd and the offset voltage Vo are proportional to the temperature, and there is an advantage that the offset voltage Vo can be easily canceled by a differential amplifier circuit or the like.

In the Hall element offset voltage correction method of the present invention, the Hall element is corrected in an environment in which only the offset voltage Vo, which is an environment in which the external magnetic field (magnetic flux density) B is zero, is generated, so that the offset voltage Vo can be canceled out precisely. There is an advantage.

In the Hall element offset voltage correction method of the present invention, two Hall voltage terminal electrodes of a Hall element are provided on one side, and a resistor having a variable resistor is connected between them to output voltage Vd from the variable resistor. Since the offset voltage Vo can be canceled by the above, there is an advantage that the correction of the offset voltage Vo can be achieved with a simple circuit.

In the Hall element offset voltage correction method of the present invention, a resistor having a variable resistor is connected between the current terminals of the Hall element, and the offset voltage Vo can be canceled by the output voltage Vd from the variable resistor. The circuit can correct the offset voltage Vo and can be applied to a commercially available Hall element without specially designing the Hall element.

In the Hall sensor of the present invention, the resistor having the variable resistor is a passive element unlike the OP amplifier circuit, and therefore, it is easy to integrate with the Hall element, and there is an advantage that an ultra-small Hall sensor can be created. .

In the Hall sensor of the present invention, by using the SOI substrate and forming the magnetically sensitive portion of the Hall element in the SOI layer, the magnetically sensitive portion of the thin Hall element that is difficult to handle is handled as a Hall element chip of the SOI substrate. There is an advantage that the chip is easy to handle.

In the Hall sensor of the present invention, by forming the magnetically sensitive portion of the Hall element in the SOI layer, an extremely thin Hall element magnetically sensitive portion can be achieved, so that there is an advantage that the sensitivity can be increased.

The Hall sensor of the present invention has an advantage that an integrated circuit such as a signal processing circuit can be easily formed using an SOI substrate.

In the Hall sensor of the present invention, a Hall sensor having high accuracy and sensitivity can be easily formed as a magnetically sensitive portion of a Hall element on a semiconductor thin film other than Si, for example, an indium antimony crystal thin film, on the SOI layer. There is an advantage that can also be provided.

It is the structure schematic of one Example of the Hall sensor which outputs the output containing the conventional Hall element and its offset voltage Vo. Example 1 It is the structure schematic of one Example which shows the offset voltage correction method of this invention. Example 1 It is the structure schematic of another Example which shows the offset voltage correction method of this invention. (Example 2, Example 6) It is the structure schematic of another Example which shows the offset voltage correction method of this invention. (Example 3, Example 6) It is the structure schematic of one Example of the Hall element of the Hall sensor of this invention. Example 1 1 is a schematic configuration diagram of an embodiment of a Hall sensor of the present invention. Example 1 It is the structure schematic of other one Example of the Hall sensor of this invention. (Example 2, Example 6) It is the structure schematic of other one Example of the Hall sensor of this invention. (Example 2, Example 7) FIG. 5 is a schematic configuration diagram when a Hall element and an integrated circuit (IC) are formed on an SOI substrate according to another embodiment of the Hall sensor of the present invention. Example 4 FIG. 10 is a schematic cross-sectional view of a structure in which the Hall sensor of the present invention shown in FIG. (Example 4, Example 5) It is a structure schematic diagram in other one Example at the time of forming a Hall element and an integrated circuit (IC) in the SOI substrate of the Hall sensor of this invention. (Example 5, Example 6) It is another Example at the time of forming a Hall element in the SOI substrate of the Hall sensor of this invention, and is a structure schematic of a semiconductor substrate. (Example 6) It is another Example at the time of forming a Hall element in the SOI substrate of the Hall sensor of this invention, and is a structure schematic of a semiconductor substrate. (Example 6) 12 and 13 show another embodiment of the schematic diagram of the semiconductor substrate in the case where the Hall element is formed on the SOI substrate of the Hall sensor of the present invention shown in FIG. 12 and FIG. It is. (Example 6, Example 7) It is another Example at the time of forming a Hall element in the SOI substrate of the Hall sensor of this invention, and is a cross-sectional schematic diagram of a semiconductor substrate. (Example 7) It is the cross-sectional schematic of the structure provided with the magnetic body for magnetic flux convergence in other one Example of the Hall sensor of this invention. (Example 8)

  The offset voltage correction method of the present invention and a hall sensor using the offset voltage correction method according to the present invention will be described in detail based on embodiments with reference to a schematic configuration diagram using a hall element capable of correcting an offset voltage Vo made of a semiconductor substrate. explain. In the Hall element, the Hall voltage Vh generated by the Lorentz force due to the magnetic field B during the movement by the electric field of electrons or holes that are carriers of the semiconductor is measured. The Hall voltage Vh is related to the thickness d of the Hall element, the same carrier density n, and the same external magnetic field B. The Hall voltage Vh is irrelevant to the type of semiconductor, but the offset voltage Vo is It increases in proportion to the equivalent resistance ΔR of the semiconductor. The smaller the offset voltage Vo, the higher the accuracy, and the smaller the error. For this reason, semiconductor materials that reduce ΔR have been used for Hall elements. This is determined by the carrier mobility μ of electrons and holes, and since the mobility μ and ΔR are inversely related, a semiconductor having the highest mobility μ has been selected. The carrier mobility μ is generally an n-type semiconductor because electrons are generally larger than holes. Therefore, also in the present embodiment below, an embodiment of a Hall element using an n-type semiconductor is given. In addition, since electrons of indium antimony (InSb) crystals have a mobility μ that is one digit or more larger than electrons of silicon (Si) crystals, conventionally, the offset voltage Vo is reduced to provide relatively high-precision holes. InSb semiconductor thin films have been used as sensors. Therefore, if the offset voltage Vo can be easily canceled by the method of the present invention, a Si semiconductor having a small carrier mobility μ is rather utilized as a Hall element because of other requirements such as integration and manufacturing process. It should be.

  FIG. 1 is a schematic configuration diagram of an embodiment of a conventional hall sensor that outputs a total output voltage Vt (= Vh + Vo) that is a voltage between hall voltage terminals including a hall element 1 and its offset voltage Vo. As shown in FIG. 1, there are a pair of current terminal electrodes 20, 30 on the opposing outer peripheral sides of the semiconductor substrate of the rectangular Hall element 1, and the current terminals 2, 3 corresponding to each pair, The constant current source 600 is controlled and supplied so that a predetermined constant current I, for example, 1 mA, flows through the Hall element 1. Then, the pair of Hall voltage terminal electrodes 40 and 50 should be arranged on the straight line (XX) orthogonal to the straight line (YY) connecting the pair of current terminal electrodes 20 and 30. However, in actuality, the Hall voltage terminal electrode 50 of the pair of Hall voltage terminal electrodes 40 and 50 is arranged at a position slightly deviated from the straight line (XX). This occurs because the electrodes are relatively shifted from the design schedule due to mask alignment at the time of electrode pattern formation.

In addition, the size of the Hall voltage terminal electrode should ideally be one point, but in reality, it has a certain electrode area and is relatively different from the Hall voltage terminal due to the difference in current distribution. It is also included that the electrode 50 is displaced from a position that is one point on the original straight line. Further, there is a non-uniformity in the impurity concentration of the semiconductor substrate 10 of the Hall element 1, the current distribution is not uniform, and the position of the Hall voltage terminal electrode 50 may be equivalently shifted. Further, even if the impurity concentration of the semiconductor substrate 10 of the Hall element 1 is strictly uniform and the positions of the physical pair of Hall voltage terminal electrodes 40 and 50 are also arranged on the orthogonal straight line (XX). The resistance distribution in the semiconductor substrate 10 of the Hall element 1 may change due to stress such as thermal strain, and the position of the Hall voltage terminal electrode 50 may be equivalently shifted. Including the displacement of the equivalent Hall voltage terminal electrode 50 as shown in FIG. 1, a predetermined constant current is applied with an external magnetic field (magnetic flux density) B applied perpendicularly to the Hall element 1. When I is passed through the Hall element 1, the Hall voltage terminal for the Hall voltage terminal 4 and 5 as viewed from the current terminal electrode 30 due to the positional deviation of the Hall voltage terminal electrode 50 in addition to the Hall voltage Vh. An offset voltage Vo, which is a difference in voltage drop between the electrode 40 and the Hall voltage terminal electrode 50, is generated. The Hall voltage terminal voltage Vt is observed between the Hall voltage terminals 4 and 5, and the breakdown is a voltage that includes Vt = Vh + Vo including the sign. The theoretical formula based on this principle is the above formula 1. Thus, in the (external) magnetic field B = 0 (meaning that the magnetic field B is zero), since the Hall voltage Vh = 0, only the offset voltage Vo due to the voltage drop remains in the Hall voltage terminal voltage Vt.

The above-described offset voltage Vo is particularly problematic in the measurement of a minute magnetic field when the magnetic field B is small, and how to cancel this component has been a conventional problem. As described above, there are many cancellation methods (correction methods). ) Has been proposed. FIG. 2 shows a schematic configuration diagram of an embodiment of the offset voltage correction method of the present invention. Among the Hall voltage terminal electrodes 40, 50, the Hall voltage terminal electrode 50 of the Hall voltage terminal electrode 50a and the Hall voltage terminal electrode 50b is sandwiched between the orthogonal straight lines (XX) as shown in FIG. In the case of using the Hall element 1 provided on the current terminal electrode 20 side and the current terminal electrode 30 side on one side of the outer periphery of the n-type rectangular semiconductor substrate 10 of the Hall element 1. is there. Then, like the Hall sensor of the present invention shown in FIG. 6, the Hall voltage terminal 4 and the Hall voltage terminal 5 are drawn from the Hall voltage terminal electrode 50a and the Hall voltage terminal electrode 50b shown in FIG. A resistor 100 having a variable resistor Rv is connected, an output terminal 70 is drawn out from the variable resistor Rv, and a predetermined (drive) current I is passed through the Hall element 1 as shown in FIG. With the (external magnetic field to be measured) applied, the output voltage Vd and the Hall voltage terminal 4 from the variable resistor Rv that is a voltage drop at the output terminal 70 with reference to the current terminal 3 that is at ground potential. The voltage drop V43 is connected to the differential input terminal of the OP amplifier (A1) 501 so that the differential output can be taken out from the OP amplifier output terminal 81. The differential input terminal of the OP amplifier (A1) 501 receives the output voltage Vt = Vh + Vo, which is the difference between the output voltage Vd and the voltage drop V43 at the Hall voltage terminal 4.

The offset voltage correction method of the present invention according to this embodiment is as follows. First, a chamber surrounded by a thick high magnetic permeability soft magnetic material is prepared, and the region in the chamber is a space in which the external magnetic field B is considered to be zero. When the magnetic field B cannot be regarded as zero, the magnetic field is canceled by a coil or the like so that at least the space where the magnetically sensitive part of the Hall element 1 enters can be regarded as B = 0). Here, the Hall element 1 of the Hall sensor of the present invention is inserted and set, and the circuit is set as shown in FIG. 2, and a predetermined constant current I = 1 mA (milliampere) is supplied to the Hall element 1 by the constant current source 600. Is passed from the current terminal 2 through the current terminal 3 (ground). At this time, the Hall voltage Vh is zero, and the differential input voltage Vt to the OP amplifier (A1) 501 should include only the offset voltage Vo. Therefore, the variable resistor Rv is adjusted and its output Vd , And the offset voltage Vo can be canceled by causing the output voltage of the OP amplifier (A1) output terminal 81 to become zero. If the Hall sensor is a package of mold resin or the like, there is some influence of the environmental temperature. Therefore, it is better to perform the offset voltage correction under the actual environmental temperature as much as possible.

FIG. 3 shows a schematic configuration diagram of another embodiment of the offset voltage correction method of the present invention. In this embodiment, a resistor 100 having a variable resistor Rv is connected between the current terminal 2 and the current terminal 3 of the Hall element 1 as shown in FIG. 7, and the output terminal 70 is drawn from the variable resistor Rv. Is the case. Then, a predetermined constant current I (for example, DC 1 mA) is passed through the Hall element 1, and the output voltage Vd of the output terminal 70 is set in an environment where the magnetic field B described in the first embodiment is zero. Subtraction processing with the output voltage V53 of one Hall voltage terminal 5 of the pair of Hall voltage terminals 4 and 5, or addition processing when the signs of the output voltage Vd and the output voltage V53 are opposite, -It is performed via the subtraction circuit 550. Then, the offset voltage Vo is canceled by adjusting the variable resistance Rv. In this method, the output voltage Vd is made equal to the offset voltage Vo of the Hall element 1. The difference voltage between the output voltage of the addition / subtraction circuit 550 remaining after the offset voltage Vo is subtracted between the differential input terminals of the OP amplifier (A1) 501 shown in FIG. A certain Vt comes to input. At this time, since the magnetic field B = 0, the Hall voltage Vh = 0, and the output voltage of the addition / subtraction circuit 550 is also subtracted from the offset voltage Vo, so that it is originally the voltage V43 of the Hall voltage terminal 4. Therefore, a zero voltage should be output to the output terminal 81 of the OP amplifier (A1) 501. Actually, there is also an offset voltage of the OP amplifier (A1) 501 itself, and the variable resistor Rv is adjusted so that the output voltage of the OP amplifier (A1) 501 including this is zero. Good.

In FIG. 8, as a resistor 100 having a variable resistance Rv, an insulating film is formed on the surface of the semiconductor substrate of the Hall element 1, and manganin, nichrome or the like, which is a resistance material having a very low resistance temperature coefficient, is sputtered thereon. When the thin film is formed by deposition or the like and patterned by photolithography so as to have a desired resistance, and the fixed resistance Ra of the resistance 100 having the variable resistance Rv is integrally formed with the Hall element 1 Is shown. Here, the variable resistor Rv is connected from the middle of the fixed resistor Ra via the variable resistor output terminal 160. Of course, this variable resistor Rv may also be provided as a Hall sensor integrated with the Hall element 1 and a printed circuit board.

As shown in FIG. 7 and FIG. 8, the Hall element 1 used in FIG. 3 has a Hall voltage terminal electrode 50 that is orthogonal to a straight line connecting a pair of current terminal electrodes 20 and 30. The addition / subtraction circuit 550 is deviated slightly from above, and is configured to operate as a subtraction circuit, that is, to be used as a differential input of an OP amplifier. This ensures that the potential of the Hall voltage terminal 5 has the same sign as the potential of the output terminal 70 of the variable resistor Rv, and a subtracting circuit can be applied. Differential amplification is possible, which is preferable.

FIG. 4 shows a schematic configuration diagram of another embodiment of the offset voltage correction method of the present invention. This embodiment is almost the same as the circuit shown in FIG. In FIG. 3 of the second embodiment, the difference is that the output voltage Vd from the variable resistor Rv and the output voltage V53 at the Hall voltage terminal 5 are input to the addition / subtraction circuit 550, for example, to perform subtraction processing. The offset voltage Vo is canceled out, and the output voltage V43 of the other Hall voltage terminal 4 and the output of the addition / subtraction circuit 550 are compared by the OP amplifier (A1) 501. In this embodiment, FIG. Like the conventional Hall sensor, the differential operation between the pair of Hall voltage terminals 4 and 5 is performed by the OP amplifier (A1) 501, and the generated offset voltage Vo is used as the output voltage from the variable resistor Rv. Output voltage generated at the output terminal 81 of the OP amplifier (A1) 501 and output voltage Vd are differentially amplified by the OP amplifier (A2) 502 so as to cancel at Vd, and output voltage generated at the output terminal 82 is output. However, by adjusting the variable resistance Rv, the magnetic field B is zero. B = 0) under circumstances, under a predetermined constant drive current is intended to be zero. Here, it is a case where the amplification factor of the OP amplifier (A1) 501 is set to 1 (function of only impedance conversion), and the offset voltage Vo and the output voltage Vd are made equal. Of course, it is easy to amplify them together and cancel the offset voltage Vo.

FIG. 9 shows a schematic diagram of a configuration in which a Hall element and an integrated circuit (IC) 900 are formed on an SOI substrate 11 in another embodiment of the Hall sensor of the present invention. In this embodiment, the SOI substrate 11 which is the semiconductor substrate 10 is used, and the Hall element 1 and the integrated circuit (IC) 900 are integrally formed on the SOI layer 12. FIG. 10 shows a schematic cross-sectional view of a structure in which the Hall sensor of the present invention shown in FIG. 9 is provided with magnetic bodies 701 and 702 for converging magnetic fields. In order to increase the external magnetic field (magnetic flux density) B, which is the magnetic field to be measured, in the magnetically sensitive part (semiconductor region surrounded by the current terminal electrodes 20, 30 and the Hall voltage terminal electrodes 40, 50a, 50b) Magnetic converging magnetic bodies 701 and 702 such as a ferrite chip having a high magnetic permeability and a soft magnetic body are provided. As shown in the above equation 1, the Hall voltage Vh is inversely proportional to the thickness d of the semiconductor layer of the Hall element 1 in the direction through which the magnetic field B passes, under the same drive current I and magnetic field B. A thinner thickness d is advantageous for higher sensitivity. In addition, the magnetic bodies for magnetic field convergence 701 and 702 have to be divided into a magnetic body for magnetic field convergence 701 in the lower part and a magnetic body for magnetic field convergence 702 in the upper part with the Hall element 1 interposed therebetween. In order to reduce these magnetic resistances, the smaller the distance (interval) between the lower magnetic field focusing magnetic body 701 and the upper magnetic field focusing magnetic body 702, the higher the magnetic flux density B. From this point of view, a thinner thickness d is advantageous for higher sensitivity. The SOI substrate 11 is generally about 500 μm (micrometer) due to the presence of the base substrate 15, but since the thickness of the SOI layer 12 is about 10 μm, if the SOI layer 12 is the Hall element 1, The thickness d is about 10 μm, which is the thickness of the SOI layer 12, and can be formed very thin.

The SOI layer 12 is an n-type having a high mobility μ, for example, a Si (silicon) single crystal layer having a resistivity of about 1 Ω · cm, the base substrate 15 is anisotropically etched, and the cavity 55 is formed by MEMS technology. The diaphragm 150 formed of the SOI layer 12 including the BOX layer 52 formed thereon is used as the Hall element 1. In the Hall element 1 of the present embodiment, one Hall voltage terminal electrode 40 is provided on the straight line XX orthogonal to the direction of the drive current I, and the other Hall is formed, as in the case shown in FIG. In this example, the voltage terminal electrode 50 is divided into a hall voltage terminal electrode 50a and a hall voltage terminal electrode 50b. A resistor 100 having a variable resistor Rv is formed outside between the Hall voltage terminal electrode 50a and the Hall voltage terminal electrode 50b. Since the operation is the same as that in FIG. 2 of the first embodiment, the description thereof is omitted here. However, in this embodiment, an integrated circuit (IC) 900 is formed on the SOI layer 12. The integrated circuit (IC) 900 includes an amplification of the Hall voltage Vh and the offset voltage Vo from the Hall element 1, a signal processing circuit, a control circuit with a predetermined constant current I, and the like. The wiring 110 that connects each integrated circuit (IC) 900 or the like or the electrode 6 is expressed in a simplified manner, and may be several wirings instead of one if necessary.

In the Hall sensor of this embodiment, a magnetic field is generated in the cavity 55 formed in the base substrate 15 so that the magnetic bodies for magnetic field convergence 701 and 702 can be installed as close as possible to the magnetically sensitive portion of the Hall element 1 shown in FIG. A converging magnetic body 701 is inserted and fixed with a soft adhesive 750. In particular, since the diaphragm 150 of the SOI layer 12 is easily broken, it is preferable to determine the size of the magnetic body 701 for magnetic field converging so that the diaphragm 150 can be fixed with a little gap and fix it with an adhesive 750 that is soft and easily absorbs stress. The upper magnetic body for magnetic field convergence 702 is also bonded to the vicinity of the magnetically sensitive portion of the Hall element 1 with an adhesive. Further, since the Hall voltage Vh of the Hall element 1 is generated at the outer peripheral portion of the Hall element 1 in the presence of the external magnetic field B, the uniform SOI layer 12 is divided so that the outer peripheral portion of the Hall element 1 is Then, the groove 53 is formed from the relationship of forming the current terminal electrodes 20 and 30 and the hall voltage terminal electrodes 50a and 50b along that, and the SOI layer 12 is etched away at that portion. The wiring 110 is routed over the groove 53. Of course, although not depicted here, filling the groove 53 with an electrical insulator and forming the wiring 110 thereon is recommended from the viewpoint of preventing disconnection.

FIG. 11 shows a schematic plan view of a configuration in the case where the Hall element 1 and the integrated circuit (IC) 900 are formed on the SOI substrate 11 in another embodiment of the Hall sensor of the present invention. In this embodiment, the Hall element 1 is formed on the diaphragm 150 of the SOI layer 12 including the BOX layer 52 in FIG. In FIG. 11 of the example, the Hall element 1 has a bridge structure in which the vicinity of the pair of current terminal electrodes 20 and 30 and the vicinity of the Hall voltage terminals 40, 50a, and 50b are supported. In addition, in order to electrically divide the uniform SOI layer 12 and form the Hall element 1 composed of the SOI layer 12, the vicinity of each pair of current terminal electrodes 20, 30 and the Hall voltage terminals 40, 50a , 50 b is formed in the SOI substrate 11 excluding the cavity 55 so as to surround the vicinity of 50 b. The Hall element 1 having a bridge structure above the cavity 55 has a shape in which the SOI layer 12 is removed by the slit 54 and the cavity 55 is exposed. Of course, the lower magnetic field converging magnetic body 701 and the upper magnetic field converging magnetic body 702 as shown in FIG. 10 of Example 4 were attached to the inside of the cavity 55 and the upper portion of the Hall element 1. Better. Since the operation of the Hall element 1 is the same as described above, the description thereof is omitted.

12 and 13 are schematic plan views of the configuration of the semiconductor substrate 10 in another embodiment in which the Hall element 1 is formed on the SOI substrate 11 of the Hall sensor of the present invention. In this embodiment, the SOI layer 12 of the SOI substrate 11 is a p-type semiconductor (for example, resistivity 5 Ω · cm), and the n-type semiconductor layer used as the Hall element 1 is substantially rectangular by n-type impurity diffusion. In this case, the impurity diffusion region 14 is formed. In this case, a cavity 55 is formed below the Hall element 1 by anisotropic etching of Si, DRIE, or the like so as to be a diaphragm 150 including the SOI layer 12 including the BOX layer 52. FIG. 12 shows an example in which a pair of current terminal electrodes 20, 30 and Hall voltage terminal electrodes 40, 50 a, 50 b are formed in the shape shown in FIG. 11 as the Hall element 1. FIG. 13 shows a case where the Hall voltage terminal electrodes 40 and 50 are shifted from the straight line perpendicular to the current I from the current terminal electrodes 20 and 30 as the Hall element 1. It is an example at the time of forming in a shape like FIG.3, FIG4 and FIG.7. Although the resistor 100 including the variable resistor Rv is not described here, it is similar to the example of the corresponding drawing described above, so only the semiconductor substrate 10 is shown here. FIG. 14 shows a magnetic field converging magnetic body 701 in the lower portion where the cavity 55 formed in the base substrate 15 of the semiconductor substrate 10 which is the SOI substrate 11 including the Hall element 1 shown in FIGS. 3 is a schematic cross-sectional view of a Hall sensor including an upper magnetic field focusing magnetic body 702 bonded and fixed on a diaphragm 150 on which an element 1 is formed. FIG. Of course, in the present embodiment, the diaphragm 150 is used as the Hall element 1, but, for example, a bridge structure 151 as shown in FIG. Since the operation of the Hall element 1 is the same as that described above, the description thereof is omitted here.

FIG. 15 shows another embodiment of the Hall sensor of the present invention, in which the SOI substrate 11 is used, and the Hall element is formed on the diaphragm 150 of the SOI layer 12 by the cavity 55 via the insulating layer 51 made of a silicon thermal oxide film. 1 is a schematic cross-sectional view of a configuration when a semiconductor layer 13 such as an n-type indium antimony (InSb) crystal forming 1 is formed. The smaller the thickness d of the Hall element 1 is, the higher the sensitivity is, and a thin thin film is optimal. However, since the handling (handling) of the Hall element 1 is difficult, a thick SOI substrate 11 that is easy to handle is used as a sensor chip. Further, an n-type indium antimony (InSb) crystal having a high mobility μ is formed on the diaphragm 150 of the thin SOI layer 12. Of course, although not drawn here, the lower magnetic field focusing magnetic body 701 is inserted and fixed in the cavity 55 as shown in FIG. 14 above, and the upper magnetic field focusing magnetic field 701 is placed on the Hall element 1 thereon. A magnetic sensor 702 may be provided as a hall sensor.

As described above, in general, the Hall element 1 is a Hall sensor having the same shape under the same drive current I and having the same carrier density n (substantially equal to the impurity density) as shown in Equation 1 above. Thus, under the same magnetic field B, the same Hall voltage Vh is generated. However, the offset voltage Vo requires a small power supply voltage to pass the same current I because the semiconductor mobility of the Hall element 1 decreases as the carrier mobility μ increases. Along with this, the offset voltage Vo, which is a voltage drop, is also reduced, so that the error is relatively reduced and the Hall voltage Vh can be measured with high accuracy. However, if the offset voltage Vo can be canceled almost completely as in the present invention, the crystal growth is difficult and the n-type indium antimony (InSb) crystal thin film, which has many variations, is stable. By using a silicon (Si) single crystal that is excellent in single crystallinity, and using the SOI layer 12 that is a particularly thin Si single crystal, the manufacturing process is easy, the mass productivity is high, and the integrated circuit 900 is manufactured. Since it is easy to incorporate, an inexpensive Hall sensor can be provided.

FIG. 16 shows a schematic cross-sectional view of a structure in the case where the magnetic field converging magnetic bodies 701 and 702 are provided in another embodiment of the Hall sensor of the present invention. Since the magnetic field generated by the external magnetic field B concentrates on a high permeability material having a small magnetic resistance, the magnetic layers 701 and 702 for magnetic field converging made of a soft magnetic material having a high permeability are used as the semiconductor layer of the Hall element 1. And a case where the semiconductor substrate (including a thin-film semiconductor substrate) is bonded to at least a magnetically sensitive portion with an adhesive or the like so as to be sandwiched from both sides, and is packaged with a mold resin 760. Here, one magnetic field converging magnetic body 701, 702 is bonded to the printed circuit board 800 with an adhesive 750, and the wiring 11 is connected to the electrode terminal 6 provided on the printed circuit board 800 to the electrode 60 on the semiconductor substrate of the Hall element 1. The case where it has carried out wire bonding is shown. Further, here, the current terminals 2 and 3 of the Hall element 1 are visible, and the current terminals 2 and 3 are connected to a resistor 100 having a variable resistance Rv. Yes. Of course, the fixed resistor Ra or the like of the resistor 100 having the variable resistor Rv may be formed directly on the Hall element 1 as shown in FIG. It is also possible to embed it in the hole and integrate it with the Hall element 1. By providing the magnetic bodies 701 and 702 for converging the magnetic field, the magnetic field of the external magnetic field B can be concentrated on the Hall element 1 by 10 times or more, so that the minute magnetic field B can be detected and measured accordingly. Here, two magnetic field converging magnetic bodies 701 and 702 are provided so as to sandwich the Hall element 1, but one of them may be used.

The offset voltage correcting method of the Hall element of the present invention and the Hall sensor using the same are not limited to the present embodiment, and naturally there are various modifications while the gist, operation and effect of the present invention are the same. sell.

In the Hall element 1 offset voltage correction method and Hall sensor using the same of the present invention, the Hall voltage terminal electrode is increased by one on the semiconductor substrate 10 of the Hall element 1 as described above, and two electrodes are provided on one side. Even if the shape of the conventional Hall element 1 is not changed, a resistor 100 having a variable resistance Rv, which is a passive element, is connected between the pair of current terminals without changing the shape of the conventional Hall element 1. This is an offset voltage correction method that can easily cancel the offset voltage Vo by adjusting the variable resistance Rv in an environment of zero. It is possible to provide a Hall sensor capable of measuring a very small magnetic field with a high speed response, in particular, with extremely high cancellation accuracy against changes in temperature environment. Further, the present invention can be applied to an ultra-small Hall element 1 having a size of several micrometers. Rather, the ultra-small Hall element 1 is more preferable because the temperature of the semiconductor substrate of the Hall element 1 tends to be uniform. In addition, by forming the Hall element 1 in the SOI layer of the SOI substrate, a thin Hall element can be formed, so that high sensitivity is achieved, and integrated circuits are easily integrated. A highly sensitive Hall sensor can be provided. For this reason, the offset voltage correction method of the present invention and the hall sensor using the offset voltage correction method can detect the minute magnetic field B. Therefore, the conventional non-contact current sensor, position information by geomagnetic measurement, non-contact switch, etc. Magnetic detection can be performed with higher accuracy and sensitivity than magnetic detection in the field where Hall sensors are used.

DESCRIPTION OF SYMBOLS 1 Hall element 2, 3 Current terminal 4, 5, 5a, 5b Hall voltage terminal 6 Electrode terminal 10 Semiconductor substrate 11 SOI substrate 12 SOI layer 13 Semiconductor layer 14 Impurity diffusion region 15 Base substrate 20, 30 Current terminal electrodes 40, 50 50a, 50b Hall voltage terminal electrode 51 Insulating layer 52 BOX layer 53 Groove 54 Slit 55 Cavity 60 Electrode 61 Ohmic contact 70 Output terminal 81, 82 OP amplifier output terminal 100 Resistor 110 with variable resistance 110 Wiring 150 Diaphragm 151 Bridging Structure 160 Variable resistance output terminals 501 and 502 OP amplifier 550 Addition / subtraction circuit 600 Constant current source 701 and 702 Magnetic substance 750 for magnetic field convergence Adhesive 760 Mold resin 800 Printed circuit board 900 Integrated circuit (IC)
Ra, Rb fixed resistance
Rv variable resistance

Claims (12)

In the offset voltage correction method for a Hall element, a predetermined current is passed through a pair of current terminals, and at least a part of a voltage drop between two points in the Hall element or between the pair of current terminals at that time is variable. Using a resistor having a resistor, adjusting the variable resistor to take out as an output voltage Vd, and using the output voltage Vd, cancel the offset voltage Vo generated at the Hall voltage terminal under the condition of zero external magnetic field An offset voltage correction method characterized in that the correction setting is performed as described above. One Hall voltage terminal electrode (40) is formed on one side of the Hall element, one Hall voltage terminal (4) is taken out from this, and two Hall voltage terminal electrodes (50a, 50b) are provided on the opposite side. And the other two Hall voltage terminals (5a, 5b) corresponding to the two Hall voltage terminal electrodes (50a, 50b) are taken out from the two Hall voltage terminal electrodes (50a, 50b). 5. The offset voltage correction method according to claim 1, wherein a resistor having the variable resistor is connected between 5 b), and an output voltage Vd can be taken out from the variable resistor. A Hall element having a pair of current terminals and a pair of Hall voltage terminals, wherein a resistor having the variable resistance is inserted in parallel between the pair of current terminals, Under the current, the output voltage Vd due to the voltage drop from the variable resistor is taken out, and the output voltage Vd is added to or subtracted from the output voltage related to the voltage between the Hall voltage terminals to cancel the offset voltage Vo Item 4. The offset voltage correction method according to Item 1. In the Hall sensor for correcting the offset voltage Vo of the Hall element, one Hall voltage terminal electrode (40) is formed on one side of the Hall element, and one Hall voltage terminal (4) is taken out from the Hall element. Two Hall voltage terminal electrodes (50a, 50b) are formed on the opposite side of the two, and the other two holes corresponding to these from the two Hall voltage terminal electrodes (50a, 50b) are formed. A voltage terminal (5a, 5b) is taken out, and a resistor having the variable resistor is connected between the two hall voltage terminals (5a, 5b) so that an output voltage Vd can be taken out from the variable resistor. Hall sensor characterized by that. 5. The hall sensor according to claim 4, wherein the variable resistor is adjusted so that the offset voltage Vo of the hall element can be canceled by using the output voltage Vd at that time. In the Hall sensor configured to correct the offset voltage Vo of the Hall element, a resistor having a variable resistor is inserted in parallel between the pair of current terminals, and a predetermined current flowing through the pair of current terminals is reduced. Below, using the output voltage Vd, which is the voltage drop across the variable resistor when the external magnetic field is zero, adjusting the variable resistor so as to cancel the offset voltage Vo between the pair of Hall voltage terminals at that time A hall sensor. 7. The hall sensor according to claim 6, further comprising an arithmetic circuit that cancels the offset voltage Vo by adding or subtracting the output voltage Vd to or from an output voltage based on a voltage between a pair of hall voltage terminals. The Hall sensor according to claim 4, wherein a resistor having the variable resistor or a fixed resistor component of the resistor having the variable resistor is formed integrally with the Hall element. 9. The Hall sensor according to claim 4, wherein at least a magnetically sensitive portion of a Hall element is formed in an SOI layer of the SOI substrate or a semiconductor layer formed on the SOI layer. 10. The hall sensor according to claim 9, wherein at least a part of an integrated circuit for driving the hall element and amplifying and calculating a signal related to the hall element is integrated with the hall element on the SOI substrate. The Hall sensor according to claim 4, further comprising a magnetic body for converging magnetic fields. 11. The Hall sensor according to claim 9, wherein a cavity is formed at least in a region corresponding to a lower portion of the magnetically sensitive portion of the base substrate of the SOI substrate, and a magnetic body for converging a magnetic field is formed in the cavity. The hall sensor according to claim 11 provided.

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