JP2015002299A - Funnel-shaped through electrode and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To remove overhang where an insulation layer on the through hole surface, causing disconnection of a through electrode formed on a semiconductor substrate, projects, or bird beak where the interface of the semiconductor substrate and insulation layer is harsh.SOLUTION: A through electrode has the inner wall of a first hole 407 having a first depth made by using an opening pattern 406 of a first area, arranged on an insulation layer 404 covering a first principal surface, as a mask, the inner wall of a second hole 408 having a second area exceeding the first area, including the opening pattern, and having a second depth not exceeding the first depth, and a conductor 411 arranged along the inner wall of the first hole and the inner wall of the second hole.

Description

  The present invention relates to a structure of a through electrode used for stacking silicon integrated circuits, and relates to improving electrical connection reliability of the through electrode, reducing a mounting area, and simplifying a manufacturing process.

  With advances in semiconductor technology, information devices are becoming smaller, lighter, and consume less power. In particular, high integration and high-density mounting of a silicon integrated circuit to be mounted greatly contribute to these developments. Specific examples thereof include three-dimensionalization of silicon integrated circuits. In the three-dimensional structure, the front and back surfaces of the silicon integrated circuit are wired with through electrodes, and a plurality of integrated circuits are stacked. The through electrode digs a deep hole from the front side toward the wiring pattern disposed on the back surface of the silicon integrated circuit, and forms a conductive path between the front and back surfaces by imparting conductivity to the hole. This manufacturing process is preferably performed at the wafer level where a large number of integrated circuits are arranged.

The conductive path of the through electrode is formed along the side surface of the deep hole described above, and if there are irregularities inside the hole, the conductive path is often disconnected in that region. In addition, although there is electrical continuity immediately after manufacture, the conductive path may be disconnected with a long operation. For this reason, it is required to control the shape of a deep hole to form a hole shape that is as smooth as possible.

FIG. 8 is a diagram for explaining a conventional manufacturing process of a through electrode. FIG. 2A shows a cross section of a silicon integrated circuit in which electronic circuit elements such as transistors are arranged. In the figure, 300 is a silicon substrate, 301 is the electronic circuit element disposed on the back side, 302 is a conductive thin film for electrical wiring, and 303 and 304 are insulating layers. A plurality of insulating layers (for example, an oxide film and a nitride film) may be laminated on 303 and 304. In many cases, 302 is arranged inside 303 for protection. FIG. 2B shows a state in which an opening 306 is provided in a mask layer 305 such as a photoresist disposed on the surface side of the silicon substrate. Such an opening is formed at a position facing the conductive thin film 302. A deep hole 307 is formed in the 300 through the opening ((c) in the figure). Such formation is formed by a known means such as reactive ion etching (RIE). 307 “pierces” the silicon substrate 300, and the insulating layer 303 is exposed at the bottom of the hole 307. Such an insulating layer 303 is removed by etching using a technique such as RIE, so that the conductive thin film 302 is exposed at the bottom of the hole (FIG. 4D). Subsequently, the mask layer 305 is removed, and an insulating layer 308 is deposited on the inner wall of the hole 307 (FIG. 5E). The insulating layer 308 is also deposited on the bottom of the hole 307, but is etched away by a well-known method. Subsequently, the hole 307 is filled with a conductive material (referred to as “plug” 309 in this specification), and an electrode pattern 310 for wiring is formed on the surface of 304 (FIG. 5F). Examples of conductive materials include a metal thin film by vapor deposition, a metal by plating, or a combination thereof. In FIG. 5F, the conductive thin film 302 disposed on the back surface side of 300 and the electrode pattern 310 formed on the front surface side of 300 are electrically connected to form a through electrode. FIG. 6G is an enlarged view of the area indicated by 311 in FIG. As shown in FIG. 5G, a “dent” 312 called “bird beak” is formed in the RIE process. In 312, the silicon substrate side of the interface between the insulating layer 304 and the silicon substrate 300 is greatly etched, and a “step” is observed between 304 and 300. That is, the end portion of the insulating layer 304 protrudes and becomes an “overhang” shape. When such “bird beak” and “overhang” occur, large protrusions are formed on the surface shape of the insulating layer 308 covering this region. For this reason, a crack is easily generated in the insulating layer 308. This crack deteriorates the insulation characteristics between the plug 309 and the silicon substrate 300. Even if such a crack does not occur immediately after manufacturing, there is a high possibility that the crack will occur due to secular change, stress propagation, etc. while the silicon integrated circuit continues to operate. In addition, when filling a conductive material, voids are likely to occur due to large protrusions, which may induce disconnection of the plug. For this reason, the conventional example shown in FIG. 8 has a serious drawback that the reliability related to the through electrode is low.

FIG. 9 is a diagram for explaining a technique for improving the defects of the conventional example illustrated in FIG. This figure is shown in FIGS. 4 to 6 of the cited Patent Document 1. In FIG. 4A (FIG. 4 in the cited patent document), a shallow hole 30 is formed in the oxide film 10 by anisotropic etching through an opening 24 provided in the mask layer 22. Subsequently, a hole 36 that is laterally widened by isotropic etching is produced (FIG. 5B, FIG. 5 in the cited patent document). Furthermore, a deep hole 48 (having a depth of about 1 micron) that reaches the silicon substrate 12 is produced by using anisotropic etching (FIG. 6C, FIG. 6 in the cited patent document). . In such a structure, the surface of the finally produced “hole” is “smooth”, and it is said that a wine glass shape can be realized. However, this method relates to a processing method in the thickness direction of the oxide film (which is an insulating layer having a thickness of about 1 micron) and cannot be used immediately for the through electrode. Of course, if a deep hole (not shown, usually a depth of several tens of microns) is formed in the silicon substrate 12 subsequent to FIG. However, since a new “bird beak” is generated at the interface between the oxide film 10 and the silicon substrate 12, the problem of reliability reduction of the through electrode due to the bird beak and the overhang is not solved.

10- (A), (B), (C), (D), and (E) are diagrams for explaining another method for improving the defect of the conventional example illustrated in FIG. F). This figure is shown in FIGS. 3A to 3E and FIG. 1D of Patent Document 2 cited below. In FIG. 2A, an opening is opened in the insulating film 11 by laser irradiation to expose the surface of the semiconductor substrate 10. Subsequently, a deep hole portion 22A (depth t1 is 20 microns) is formed by dry etching. An oxide film 12 is formed on the entire surface of the structure (FIG. 5B), and then the oxide film on the side surface 22A is removed by etching back to remove the oxide film in other regions (FIG. 5C). Next, dry etching is performed using the oxide film 11 as a mask to expand the depth of the deep hole portion 22A to t4 (60 microns or more) (FIG. 4D). At this time, the oxide film on the side surface 22A prevents unnecessary etching 23 (FIG. (F)) on the silicon side surface 221, and the finally formed 22A has a cylindrical shape (having the same radius in the depth direction). It can be interpreted as being). Finally, the conductive portion 30A is formed by filling the conductive material into 22A ((E) in the figure).
With such a manufacturing method, in a semiconductor device using a through electrode, “the amount of voids generated due to the shape of the through electrode affected by side etching can be suppressed during reflow” (the following cited patent document) The description in paragraph [0024] of 2 is quoted as it is).
However, the following cited patent document 2 is insufficiently described in the following points. That is,
(1) In FIG. 5B, the depth t3 of the deep hole portion 22A is “set to be deeper than the depth of the side etch portion 23 (see FIG. 1C)” (paragraph “0017” of the cited Patent Document 2 below). Is quoted as is). Although the following cited patent document 2 does not describe the generation mechanism of the “side-etched portion”, it is generally considered that the size of the side-etched portion increases as the depth of the deep hole portion increases. The following cited patent document 2 exemplifies a case where t1 (a side etch portion appears) is 60 microns and t3 is 20 microns. From the difference in depth, it can be determined that “a side-etched portion appears even at a depth of t3”. That is, even if “set to be deeper than the depth of the side-etched portion 23 (see FIG. 1C)”, the “side-etched portion” still occurs. As a result, the shape of the 22A in the depth direction is not a “straight line”, but a shape in which a “side-etched portion” appears in a region close to 101 (partially including a barrel shape).
(2) In FIG. 6C, after the oxide film 12 is formed on the inner wall surface 221 of the deep hole portion 22A, it is processed to a depth t4 by etching. Although such etching conditions are unknown, it can be determined that the etching conditions are the same as those used for processing up to the depth t3. Since the case where t3 is 20 microns and t4 is 60 microns is illustrated, when the deep hole portion 22A is dug from t3 to t4 (the depth to be processed is 40 microns), the above-mentioned "side etch portion" Appears again, and the shape of the deep hole 22A in the depth direction in FIG. 4D is a shape in which “two side etch portions occur”.
(3) The following cited patent document 2 does not describe that the silicon substrate immediately below the oxide film 11 is etched in the lateral direction to generate a “bird beak”. The occurrence of such a bird beak also causes an overhang at the end of the oxide film 11. Similarly, when 22A is processed from depth t3 to t4, the lower side of oxide film 12 formed on the inner wall surface (region indicated by reference numeral 800) is largely bound, and bird beaks are also generated.
From the above, the assumed shape of 22A is the shape (reference numeral 801) added to FIG. That is, there are two barrel-shaped “side etch parts” and two bird beaks. As indicated by reference numeral 801, the finally formed cross-sectional shape of 22A is not a “straight line” but a shape having complicated irregularities. As a result, although the following cited patent document 2 can suppress the “occurrence of voids” due to the “side-etched portion”, the problem of the reliability deterioration of the through electrode due to the bird beak and the overhang as described above is solved. Will not be.

As described above, as long as a dry etching (RIE is one type) process is employed, the occurrence of bird beaks and overhangs is inevitable, and as a result, it is difficult to improve the reliability of the through electrodes.

US Patent No. 2001/3678 JP 2007-258233 PR

Three-dimensional packaging of integrated circuits is indispensable in order to meet demands for miniaturization and weight reduction and high density and low power consumption in information equipment. Technology development for three-dimensional mounting is progressing with a focus on memory elements, but high reliability of the “through electrode” that is the key is particularly important. The through electrode has a configuration in which an insulating layer is disposed on the inner wall of a “hole” penetrating the front and back surfaces of the silicon substrate, and a conductor is disposed on the surface layer. It is well known that irregularities occur on the inner wall of the hole in the process of making this “hole”. For example, the overhang in which the insulating layer on the surface of the silicon substrate protrudes and the bird beak in which the interface between the substrate and the insulating layer is raised are uneven. If there are such irregularities, the insulating layer described above is broken in that region, causing a short circuit between the through electrode and the silicon substrate, and a break in the conductive path of the through electrode. Moreover, even if there is no abnormality immediately after manufacturing, the short circuit or the disconnection may occur according to a long-time operation. There is a demand for the development of a novel through electrode configuration and manufacturing method for avoiding such problems and realizing a highly reliable through electrode. In the above-described prior art, “the amount of voids generated due to the shape of the through electrode affected by side etching can be suppressed during reflow” (described in paragraph “0024” of the above cited Patent Document 2). However, it cannot solve the problems such as “short circuit with silicon substrate” and “breakthrough of through electrode” caused by “overhang” and “bird beak”. In order to solve such a problem, it is required to control the shape of the “hole” to form a hole shape that is as smooth as possible. More specifically, when producing a “hole” using the current reactive ion etching technology, the occurrence of the “overhang” and “bird beak” described above is unavoidable. The solution is to realize a smooth hole shape and to improve the reliability of the through electrode.

At least one penetrating electrode disposed on the first main surface, which is one of the front and back surfaces of the plate-like structure, (1) an opening pattern having a first area on the insulating layer covering the first main surface And (2) an inner wall of a first hole having a first depth made using the pattern as a mask, and (3) a first area exceeding a first area on the insulating layer and the plate-like structure. An inner wall of a second hole having a second area, including the opening pattern, and having a second depth not exceeding the first depth; and (4) an inner wall of the first hole The through electrode has a conductor disposed along the inner wall of the second hole.

  In this paragraph, an example of a process for producing the through electrode described in the previous paragraph is described. An opening having a first area is provided in the insulating layer covering the first main surface, the first hole is provided using the pattern of the opening as a mask, and then the second hole is defined as “the surface of the first hole. Drill through the area. At this stage, the first hole and the second hole are in a state of “substantially coaxial” in the thickness direction of the plate-like structure, and have a “funnel shape” as a whole. When the plate-like structure is a conductor (for example, a silicon substrate), an insulating layer is disposed on the inner wall (funnel-shaped inner wall) of the first hole and the second hole. Next, a conductor is arranged along the inner wall of the first hole and the second hole (which becomes the surface of the insulating layer) to complete the through electrode.

  In addition, the through electrode according to the process example described in the previous paragraph is (1) disposing at least one opening as a mask pattern in the insulating layer covering the first main surface which is one of the front and back surfaces of the plate-like structure, (2) The plate-like structure is dug down in a cylindrical shape from the opening toward the second main surface on the back side of the first main surface, and (3) the inner wall region on the first main surface side of the drilled hole (4) A through electrode having a conductor disposed along the inner wall of the funnel-shaped hole formed by the inner wall of the bowl-shaped inner wall and the inner wall of the hole dug down into the cylindrical shape It is.

  In addition, although the above-mentioned plate-shaped structure is a silicon substrate etc., it is not restricted to this. For example, it may be a compound semiconductor substrate, an organic or inorganic wiring substrate, glass or the like. When the plate-like structure is a silicon substrate and an integrated circuit is provided, the through electrode disposed on the first main surface (for example, the upper surface) that is one of the front and back surfaces of the plate-like structure However, it is connected to the wiring arrange | positioned at the 2nd main surface (for example, lower surface) which is another surface. This connection is made in the thickness direction of the plate-like structure. The wiring is connected to an electronic circuit element such as a transistor disposed on the second main surface side. With such a configuration, the electric signal on the second main surface side is guided to the first main surface side through the through electrode. A plurality of such plate-like structures can be stacked in the “height” direction, and so-called three-dimensional mounting is possible.

The “penetrating electrode” in this specification will be described in detail. From the expression “penetrating”, there is an image that all the thickness direction of the plate-like structure is “pierced”, but this is not necessarily true in the silicon technical field. The English expression corresponding to “through electrode” is TSV (Through Silicon Via), and “through” is generally interpreted as “Through Silicon” (through the silicon region), and this interpretation also follows this interpretation. In the configuration described in the preceding paragraph, the “penetrating electrode” is “pierced” on the first main surface side of the plate-like structure, but the second main surface side is “not penetrated”, and the second main surface It is a form of “stopped” by wiring (for example, an aluminum thin film layer) arranged on the side.

  In addition to the “through electrode” configuration described in the previous paragraph, there are also “through” through electrodes. As such an example, there is a wiring board (including an interposer) such as a printed board. That is, when the plate-like structure is a wiring board, the “penetrating electrode” is completely “pierced” on both sides of the first main surface and the second main surface. Included in this patent.

  The opening pattern is provided in an insulating layer that covers the first main surface side. Such an opening pattern is formed by a known technique. For example, there are a photoresist process and a processing process by laser light irradiation. In the former, the opening pattern is formed through steps such as application of a photoresist, drying (pre-baking), exposure using a glass mask, development, baking (post-baking), etching of the insulating layer, and resist removal. Although this is a well-known technique in the semiconductor field, there are difficulties in using many processing facilities. On the other hand, in the latter, a carbon dioxide laser, an excimer laser, a YAG laser or the like is used. In such a processing process, a photoresist process is unnecessary, and the opening pattern can be formed only by a laser processing machine. When there are a plurality of the opening patterns, a plurality of aperture patterns can be obtained by irradiating / blocking laser light and mechanical movement of the plate-like structure (not necessary when laser light movement (= scanning) is possible). The opening patterns are sequentially formed. A laser processing machine in which laser light is confined in a water stream (water jet) can also be used. When such a laser processing machine is used, there is an advantage that wastes (called debris) of the insulating layer dissolved, evaporated and scattered by the energy of the laser light can be quickly removed with a water flow. In this patent, means for forming the opening pattern is not limited.

  The shape of the opening pattern is often circular but is not limited to this. In the case of laser light irradiation, it is generally circular, and in the case of a photoresist process, it is often circular or an arbitrary polygon. The size (= first area) of the opening pattern is not particularly limited, but is generally in the range of several microns to several hundred microns. The size of the opening pattern is selected according to the magnitude of the current flowing through the through electrode, the frequency of the AC signal flowing through the through electrode, or the like. That is, the larger the current, the larger the opening, and the higher the frequency, the larger the opening. The depth of the opening pattern is the thickness of the insulating layer, and even when the insulating layer is formed of a plurality of layers, the depth of the opening pattern rarely exceeds several microns. The three-dimensional shape of the opening pattern is preferably a “cylindrical shape”, but strictly speaking, it may change in the thickness direction of the insulating layer and become a “bowl” shape. In the case of such a shape, the “first area” is the area on the surface of the insulating layer.

  The first hole is formed using the opening pattern described in the previous paragraph as a mask. For example, there are chemical etching (often wet), etching in a reactive gas (sulfur fluoride, SF6, etc.) atmosphere (dry), etching by ion beam (FIB), and the like. Etching (RIE) using a reactive gas is frequently used to form deep holes. Among these, RIE called the Bosch process has advantages such as a high processing speed and easy control of the shape of the side wall of the hole. In the Bosch process, etching with a reactive gas (SF6) and side wall protection (passivation) with a non-reactive gas (C4F8) are repeated. As a result, a deep hole having a substantially constant area can be formed. However, since etching and passivation are alternately repeated, a step called “scallop” (“襞” shape) occurs on the side wall. Such a scallop can reduce the level difference by controlling process conditions (such as etching and passivation cycle). On the other hand, in RIE, in the vicinity of a mask opening (which is an opening pattern disposed in the insulating layer), more specifically, in the peripheral area of the opening at the interface between the insulating layer and the plate-like structure, the plate-like structure is provided. Is greatly etched in the lateral direction to form a dent called “bird beak”, resulting in an overhang shape in which the end of the insulating layer protrudes. When such bird beaks and overhangs occur, problems occur in insulating layer deposition (described later) in a later process. For example, stress concentrates on an insulating layer deposited along a dent (bird beak), and a crack occurs (breaks) in the insulating layer, and the insulation between the through electrode and the plate-like structure is caused through the crack. Deteriorated and leakage current increases. In an extreme case, the through electrode and the plate-like structure may be electrically connected. Even if these defects are not observed immediately after the through electrode is formed, the deterioration proceeds and the defect may occur as the operation proceeds for a long time, thereby significantly reducing the long-term reliability of the through electrode.

  In addition, it describes about the magnitude | size of said 1st hole. As described in the previous paragraph, since the first hole is formed using the opening pattern as a mask, the area thereof is approximately the same as the first area, and the shape of the hole is generally “cylindrical” (or “multiple” Square pillars)). Strictly speaking, notching (because the bottom of the hole becomes larger) and bowing (becomes a “barrel” shape instead of a cylinder) generated by the charging effect of the hole region by reactive gas, or “cylinder” shape due to the scallop Sometimes it disappears. However, the through electrode does not necessarily have a “cylindrical” shape, and the conductor disposed along the inner wall of the first hole only needs to “function as a conductor”. The depth of the first hole (= first depth) is substantially equal to the “thickness” of the plate-like structure. Strictly speaking, it is a value obtained by adding “a distance to a wiring (for example, an aluminum thin film layer) arranged on the second main surface side” to this “thickness”. However, the “distance to the wiring (for example, the aluminum thin film layer) arranged on the second main surface side” (often not exceeding several microns) is “the thickness of the plate-like structure” (several tens of microns to several hundreds). It is extremely small compared to (micron), so it is a size that can be ignored numerically.

  In this paragraph, the “second hole” will be described in detail. The second hole is formed from the first main surface side after the first hole is formed. The conditions of the second hole are: (1) the planar size (= second area) of the second hole exceeds the first area, and (2) the “first hole” is defined as “inside” (That is, the second hole and the first hole are substantially “coaxial”), and (3) depth (= second depth) is the first depth. Do not exceed. About (1). The shape of the second hole is preferably “a mortar composed of a gentle curved surface” (described later), but is not limited thereto. The “second area” is the size of the insulating layer covering the first main surface. About (2). In the plane which forms the surface of the insulating layer covering the first main surface, the second hole includes the first hole inside. The shape of the second area is preferably similar to the shape of the first area, but is not limited thereto. As an example in which both are similar, the first opening is circular, and the shape of the second hole in the plane is also circular. Further, the centers of these two circles are substantially at the same position (coaxial). That is, the second hole is “several” larger than the first hole. About (3). Strictly speaking, the “second depth” is the sum of “the depth dug into the plate-like structure” and “the thickness of the insulating layer covering the first main surface”. However, the thickness of the insulating layer does not exceed a few microns, and the digging depth is a value exceeding a few microns. For this reason, the second depth may be the “depth dug into the plate-like structure”. In any case, the “second depth” does not exceed the depth of the first hole and is about a few tenths thereof. For example, if the thickness of the plate-like structure is 300 microns, the second depth is 10 microns. The size and depth of the second hole is preferably a value that can “remove” the bird's beak and the overhang. Under the above conditions, a “bowl-shaped” hole extending on the first main surface side is formed. Furthermore, the second hole in the “bowl shape” and the first hole dug in a cylindrical shape in the lower part thereof have a “funnel shape”.

  The second hole forming means will be described. A well-known method can be applied to the forming means, and the forming method is not limited to the method. As an example of the forming means, laser light irradiation will be outlined below. The laser used here is a carbon dioxide laser, excimer laser, YAG laser, or the like. The diameter is a value corresponding to the second area. Further, when the diameter of the laser beam used when forming the opening is the same, the laser beam may be scanned along the circumference of the “circular”.

  In this paragraph, the shape of the second hole will be described in detail. When the second hole is formed by laser light irradiation, many shapes depending on the irradiation conditions are formed. (1) A shape in which not only the insulating layer covering the first main surface by laser light irradiation but also the surface on the first main surface side of the plate-like structure is partially removed (as a result, the bird's beak is removed) (2) The shape of the first hole already formed by the irradiation of the laser beam is partially removed from the end portion (overhang) on the first main surface side. About (1). In “the shape in which the surface on the first main surface side of the plate-like structure is partially removed”, the surface of the removed plate-like structure is “planar” (like a road made on a mountain slope). Shape), “arc” (a shape in which the boundary between the cliff and the road is rounded), or a combination of “plane” and “arc”. About (2). In the “shape in which the end portion on the first main surface side of the first hole is partially removed”, it is a shape that is “chamfered” (becomes a plane-shaped slope) or “a plurality of times with different angles”. Or chamfered "(becomes a smooth curved slope). Any of these shapes may be used in this patent.

  In addition, after the first hole and the second hole are formed, a conductor is disposed in these two holes. When the plate-like structure is a conductor such as silicon, it is necessary to dispose an insulating layer on the inner walls of these two holes. Such an insulating layer is formed by a known method such as CVD. In this insulating layer forming process, since the insulating layer is also deposited on the bottom of the first hole (the conductive thin film made of aluminum or the like is exposed), only the bottom insulating layer is removed by etch back. Subsequently, the conductor is disposed along the inner walls of the two holes by a technique such as vapor deposition or plating. Next, an electrode pattern (conductive) is disposed on the surface of the insulating layer covering the first main surface, and is electrically connected to the conductors disposed in the two holes. Through such a process, the conductive thin film and the electrode pattern are electrically connected by a “penetrating electrode” penetrating the plate-like structure.

  In the preceding paragraph, the conductors are “arranged”, but may be completely “filled” or may be thinly deposited on the surface layer region of the inner wall of the two holes. In the latter configuration, the central region of the two holes is hollow.

  A method for “arranging” the conductors will be described. In the previous paragraph, the case of “arrangement in one step” is described, but “arrangement in a plurality of steps” may be performed. For example, depositing a thin conductor on the surface layer of the inner walls of the two holes, and then depositing a different conductor thereon. There is an example in which a metal (gold, nickel, titanium, etc.) having a thickness not exceeding 0.1 microns is deposited on the thin conductor by electroless plating. This is an example of depositing metal (copper, gold, etc.) by electrolytic plating or the like.

The description up to the previous paragraph shows an example in which the through electrode is formed from the upper surface side toward the lower surface (where electronic circuit elements are arranged). However, the present invention is not limited to this configuration. For example, the configuration opposite to that described above, that is, “the through electrode is formed from the main surface side on which the electronic circuit element is disposed” is also included. In such a configuration, (1) the first hole is formed from the main surface on which the electronic circuit element is disposed (here, the main surface becomes the first main surface), and (2) the first The depth (= first depth) of the hole does not exceed the thickness of the plate-like structure (the bottom of the first hole is the second main surface side (the side where no electronic circuit element is arranged)) (3) The second hole is formed, (4) A conductor is disposed in the first hole and the second hole, and (5) the plate-like structure is Polishing or etching from the two principal surface sides until the conductor is exposed, and (6) an electrode pattern is formed on the exposed conductor. In the formation process up to (4), a “non-penetrating” “electrode structure” is formed, but the conductor is “penetrated” by polishing or the like in (5). In a state in which this configuration is completed, the first depth is a value that exceeds the “thickness of the polished plate-like structure”. In such a configuration, it is as if a “non-penetrating” electrode is configured, but finally a penetrating electrode “through” the plate-like structure is formed.

In this paragraph, the relationship between the configuration described in the previous paragraph and claim 1 will be described in detail. Note that claim 1 is described for a “completed through electrode”, claim 1
At least one penetrating electrode disposed on a first main surface (which is a main surface on which an electronic circuit element is disposed) that is one of the front and back surfaces of the plate-like structure is (1) the first main surface An opening pattern having a first area is disposed on the insulating layer covering the first layer, and (2) a first depth produced using the pattern as a mask (in the completed configuration, “a plate-like structure from the second main surface side” (3) the insulating layer and the plate-like structure have a second area that exceeds the first area, and the opening An inner wall of a second hole including a pattern and having a second depth not exceeding the first depth; and (4) along the inner wall of the first hole and the inner wall of the second hole. Through-electrodes having conductors arranged in this way (the procedure of fabrication has been changed but “arranged” in the completed configuration). As described above, the configuration described in the previous paragraph is also included in this patent.

At least one penetrating electrode disposed on the first main surface, which is one of the front and back surfaces of the plate-like structure, (1) an opening pattern having a first area on the insulating layer covering the first main surface (2) A first hole having a first depth is produced using the pattern as a mask, and (3) a second area exceeding the first area in the insulating layer and the plate-like structure. A second hole including the opening pattern and having a second depth not exceeding the first depth, and (4) an inner wall of the first hole and the second hole A through electrode is manufactured by arranging a conductor along the inner wall of the hole.

In the production of the through electrode described in the previous paragraph, the opening pattern is produced by laser light, the first hole is produced by reactive ion etching, and the second hole is produced by laser light.

At least one penetrating electrode disposed on the first main surface, which is one of the front and back surfaces of the plate-like structure, (1) an opening pattern having a first area on the insulating layer covering the first main surface (2) A first hole having a first depth is produced using the pattern as a mask, and (3) a second area exceeding the first area in the insulating layer and the plate-like structure. A second hole including the opening pattern and having a second depth not exceeding the first depth, and (4) an inner wall of the first hole and the second hole (5) reducing the thickness of the plate-like structure from the second main surface side which is the other surface of the front and back of the plate-like structure, and placing the conductor along the inner wall of the hole It is produced by exposing a partial region of the conductor and (6) disposing an electrode in the exposed region of the second main surface.

  In the description up to the previous paragraph, the plate-like structure is a silicon substrate, and the through electrode is applied to a silicon integrated circuit. However, the configuration of such a through electrode is not limited to a silicon integrated circuit, and may be applied to, for example, an organic or inorganic wiring substrate (including an interposer), a glass substrate, or the like.

  According to the present invention, the through electrode can be configured with a smooth hole shape. In the conventional configuration, it is inevitable that the through electrode is electrically connected (short-circuited) to the silicon substrate or the through electrode is disconnected due to an overhang or a bird's beak. With the through electrode according to the present invention, it is possible to effectively remove overhangs and bird beaks. As a result, the above-described problems can be avoided, and the reliability of the through electrode can be greatly improved. The funnel-shaped through electrode according to the present invention can be widely applied to three-dimensional stacking of silicon integrated circuits and wiring boards, and greatly contributes to high-density mounting, miniaturization, weight reduction, and low power consumption of information equipment. .

It is a figure which shows the structure of the penetration electrode according to a preparation procedure. <Example 1> It is a figure which shows filling with a conductor. It is a figure which shows filling with a conductor. It is a figure which shows the shape of a 1st hole. It is a figure which shows the shape of a 2nd hole. It is a figure which shows the structure of the penetration electrode according to a preparation procedure. <Example 2> FIG. 6 is a diagram illustrating a final configuration in the second embodiment. It is a figure which shows the structure of the conventional penetration electrode. It is a figure which shows the processing method of the oxide film improved conventionally. It is a figure which shows the structure of the conventional improved penetration electrode, and the example of the conventional defect.

  Hereinafter, the through electrode according to the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a first embodiment of the present invention. This figure shows a cross section of a silicon integrated circuit in which electronic circuit elements such as transistors are arranged. In FIG. 4A, 400 is a plate-like structure (here, a silicon substrate), and 401 is arranged on the back side of the second main surface, which is one side (the back side in the figure) of the plate-like structure. The electronic circuit element 402 is a conductive thin film for electrical wiring, and 403 and 404 are insulating layers. A plurality of insulating layers (for example, an oxide film and a nitride film) may be laminated on 403 and 404. In many cases, 402 is arranged inside 403 for protection. An opening 406 is opened in the insulating layer 404 covering the first main surface (the surface in the figure) of the plate-like structure 400 (FIG. 5B). The planar shape of the opening is preferably circular, but is not limited thereto. The opening is formed by irradiating a laser beam such as a carbon dioxide laser, an excimer laser, or a YAG laser. The opening has a size approximately equal to the diameter of the laser beam, and the opening area is the first area. In FIG. 5C, a first hole 407 is formed using the opening as a mask pattern. The 407 is formed using RIE technology, and etching proceeds in an atmosphere in which SF6 and C4F8 are alternately switched. That is, etching proceeds in the depth direction of 407 in the SF6 atmosphere, and the inner wall of 407 is protected (passivation) in the C4F8 atmosphere. This etching is called a Bosch process, and the inner wall of 407 has minute irregularities (scallops). In addition, the plate-like structure is greatly etched in the lateral direction at the uppermost portion of the 407 (boundary region with the insulating layer 404), and an overhang (a wrinkle) is formed at the end of the bird's beak and the 404. The area of the first hole is approximately equal to the first area. As conceptually shown in FIG. 5C, the shape of the inner wall 407 is uneven, so it is difficult to uniquely define the area. Therefore, in this specification, “the area of the first hole is approximately equal to the first area”. The depth of the first hole is the same as the thickness of 400, and the insulating layer 403 is exposed on the bottom surface. Next, the insulating layer exposed on the bottom surface is etched in a fluorine-based gas (for example, CF6) atmosphere to expose the conductive thin film 402 ((d) in the figure). Thus, the first hole is formed.

In FIG. 1 (e), a second hole 408 is formed. The 408 is formed by the above-described laser light irradiation. When the diameter of the laser light is increased, 408 having a larger area than 406 is formed. If the diameter of the laser beam cannot be increased, the laser beam may be scanned in an arc shape with a diameter equal to the diameter of the laser beam used to form 406. Although the shape of 408 depends on the laser light irradiation conditions (light quantity, irradiation time, etc.), it is preferable that a part of the insulating layer 404 and the plate-like structure 400 be removed to form a bowl shape. By making such a mortar shape, the above-described bird beak and overhang are removed. The area of the second hole (= second area) in the plane including the surface of the 404 is larger than the area of the opening 406 (= first area), and the second hole One opening is “included” (indicating a spatial positional relationship in a plane including the surface of 404). That is, the second hole is in a state of wrapping the first opening.

This paragraph describes the “second depth” of the second hole. The second hole has no “bottom”. For this reason, the “second depth” is from the surface of the insulating layer 404 to a region where the second hole is in contact with the first hole (for example, a circumferential shape). In FIG. 1E, “second depth” is shown as d1. The “second depth” is a value that does not exceed the aforementioned “first depth”. For example, the first depth (corresponding to the thickness of the plate-like structure 400) is 300 microns, and the second depth is 10 microns. If the second depth is set beyond the first depth, the first hole disappears or the hole shape penetrates the insulating layer 403, so that the above two values are set. Will be. In forming the second hole, it is preferable that the shapes of the lower region and the bottom region of the already formed first hole do not change.

In FIG. 1F, the insulating layer 410 is formed along the inner walls of the first hole and the second hole. This insulating layer electrically insulates the conductor (which will be a through electrode) disposed in the next step and the plate-like structure 400. Such 410 is formed by a known method such as CVD, but is also deposited on the bottom of the first hole (the conductive thin film 402 is exposed). The insulating layer formed on the bottom is selectively removed by a technique such as etch back. In FIG.1 (g), the conductor 411 is filled along the inner wall of a 1st hole and a 2nd hole, and the plug is comprised. Although the figure shows a completely filled state, even if the arrangement method is such that only the surface layer region of the inner wall of the first hole and the second hole is deposited and there is a gap in the central region. I do not care. Further, an electrode pattern 412 is disposed on the surface on the first main surface side and is electrically connected to the 411. With such a configuration of the through electrode, the conductive film 402 on the second main surface side and the electrode pattern 412 on the first main surface side are electrically connected by the 411.

FIG. 2 shows another example regarding the formation of the electrode pattern. In the figure, the same reference numerals as those in FIG. 1 denote the same components. FIG. 6A is the same as FIG. 1F, and an insulating layer 410 is disposed in the first hole and the second hole. Note that the insulating layer in the region in contact with the conductive thin film 402 at the bottom of the first hole is removed. In FIG. 2B, a thin conductor 413 is formed. The 413 is a well-known method, for example, electroless plating of gold, nickel, titanium, or the like to a thickness of approximately 0.1 microns. In FIG. 5C, the conductor 414 is filled in the two holes. The reference numeral 414 is copper, gold or the like formed by a known method such as electrolytic plating. In FIG. 4D, the 413 and 414 are patterned to form an electrode pattern 415. In the example of FIG. 2, the conductor has a two-layer structure, but a multi-layer structure exceeding two layers may be used. A material is selected for 413 in view of adhesion to the insulating layer 410 and electrical connectivity to the conductive thin film 402. In 414, a material is selected in view of conductivity. With such a configuration, there is an advantage that it is possible to configure a through electrode that has good electrical connectivity with the 402 and that does not deteriorate characteristics even with a change over time.

FIG. 3 shows another example regarding the formation of the electrode pattern. In the figure, the same reference numerals as those in FIG. 1 denote the same components. FIG. 11A is the same as FIG. 1F, and an insulating layer 410 is disposed along the first hole and the second hole. Note that the insulating layer in the region in contact with the conductive thin film 402 at the bottom of the first hole is removed. In FIG. 5B, the electrode pattern 416 is formed after the conductor is “arranged”. The “arrangement” here is not a completely filled state, but a gap 417 exists. Even if such a gap exists, no particular trouble occurs as long as the electrical connection with 402 is made. FIG. 3 shows the case where the conductor is made of one material. However, even in the case of the conductor having the two-layer configuration (more generally, the multi-layer configuration) illustrated in FIG. I do not care.

In Example 1 illustrated in FIG. 1, the configuration of the through electrode is described in detail by showing a typical structural cross-sectional view in accordance with the manufacturing order of the through electrode. In the following paragraphs, the present invention will be described by giving other examples of structural sectional views. FIG. 4 is a view for explaining the shape of the first hole, and the cross-sectional view is exaggerated. The same numbers as those in FIG. 1 indicate the same components. FIG. 1A is an enlarged view of a part of FIG. 1D, and is a sectional view of a structure in which a scallop and an overhang are formed. The planar size of the first hole in the figure is substantially constant in the depth direction. FIG. 2B shows a barrel-shaped first hole where a bird beak and an overhang are generated. FIG. 3C shows a conical first hole where a bird beak and an overhang are generated. Note that scallops are omitted in FIGS. These exemplified cross-sectional shapes are generated depending on RIE processing conditions, but any shape may be used in this patent. This is because the bird beak and the overhang that deteriorate the reliability as described above are removed when the second hole is formed.

FIG. 5 illustrates a cross-sectional shape observed in the second hole forming process. The same numbers as those in FIG. 1 indicate the same components. The figure (a) is the figure which expanded and displayed a part of FIG.1 (e), and the second hole of a bowl shape is shown. In the figure, the second depth is indicated by d1. In FIG. 6B, a “plane” 420 is formed by removing a part of the region 400 by laser light irradiation. Reference numeral 420 denotes a shape such as “a road made on a mountain slope”. In the figure, the second depth is indicated by d2. In FIG. 4C, a part of the area 400 is removed by laser light irradiation to form an “arc” 421. 421 forms a shape such as “a rounded shape of the boundary between the cliff and the road”. In the figure, the second depth is indicated by d3. In FIG. 4D, a part of 400 is removed by irradiation with laser light, and a “chamfered” region 422 is formed. 422 in the figure forms a “planar slope” shape. In the figure, the second depth is indicated by d4. Further, 422 may be a shape (not shown) that is “chamfered multiple times at different angles” (becomes a smooth curved slope). In this patent, any shape may be used. This is because the bird beak and the overhang that deteriorate the reliability as described above are removed when the second hole is formed, and there is no limitation on the shape that can be removed.

FIG. 6 shows a second embodiment of the present invention. This figure shows a cross section of a silicon integrated circuit in which electronic circuit elements such as transistors are arranged. In FIG. 5A, 500 is a plate-like structure (here, a silicon substrate), and 501 is arranged on one surface of the plate-like structure (in the figure, the surface is the first main surface). The electronic circuit element 502 is a conductive thin film for electrical wiring, and 503 and 504 are insulating layers. A plurality of insulating layers (for example, an oxide film and a nitride film) may be laminated on 503 and 504. In many cases, 502 is arranged inside 503 for protection. An opening 506 is opened in the insulating layer 503 that covers the first main surface (the surface in the figure) of the plate-like structure 500 (FIG. 5B). The planar shape of the opening is preferably circular, but is not limited thereto. The opening is formed by irradiating a laser beam such as a carbon dioxide laser, an excimer laser, or a YAG laser. The opening has a size approximately equal to the diameter of the laser beam, and the opening area is the first area. In FIG. 5C, a deep hole 507a is formed using the opening as a mask pattern. The 507a constitutes the “first hole” when the through electrode is completed. The “first hole” differs only in the thickness (depth) of 500 in the thickness direction, and the shape in the horizontal direction in the figure is the same. The formation of the 507a uses RIE technology, and etching proceeds in an atmosphere in which SF6 and C4F8 are alternately switched. That is, etching proceeds in the depth direction of 507a in the SF6 atmosphere, and the inner wall of the 507a is protected (passivation) in the C4F8 atmosphere. This etching is called a Bosch process, and the inner wall of 507a has minute irregularities (scallops). In addition, the plate-like structure is greatly etched in the lateral direction at the uppermost portion of the 507a (boundary region with the insulating layer 503), and an overhang is formed at the end of the bird's beak and the 503. The area of the deep hole 507a is approximately equal to the first area. As conceptually shown in FIG. 6C, the inner wall shape of 507a has irregularities, so it is difficult to uniquely define the area. Therefore, in this specification, “the area of the deep hole is approximately equal to the first area”. Further, the depth of the deep hole is a value not exceeding 400, and the bottom surface does not reach the insulating layer 504.

In FIG. 6D, a second hole 508 is formed. The 508 is formed by the above-described laser light irradiation. By increasing the diameter of the laser light, 408 having a larger area than 506 is formed. If the diameter of the laser beam cannot be increased, the laser beam may be scanned in an arc shape with a diameter equal to the diameter of the laser beam used to form 406. Although the shape of 508 depends on the laser light irradiation conditions (light quantity, irradiation time, etc.), it is preferable that a part of the insulating layer 503 and the plate-like structure 500 is removed to form a bowl shape. By making such a mortar shape, the above-described bird beak and overhang are removed. The area (= second area) of the second hole in the plane including the surface of 503 is larger than the area (= first area) of the opening 506, and the second hole One opening is “included” (indicating a spatial positional relationship in a plane including the surface of 503). That is, the second hole is in a state of wrapping the first opening. The “second depth” of the second hole is a value that does not exceed the aforementioned “depth of the deep hole 507a”. For example, the thickness of the plate-like structure 500 is 300 microns, the depth of the deep hole is 200 microns, and the second depth is 10 microns. If the second depth is set beyond the depth of 507a, the first hole disappears or the hole shape penetrates the insulating layer 504, so both values described above are set. It will be. When forming the second hole, it is preferable that the shapes of the lower region and the bottom region of the deep hole already formed are not changed.

In FIG. 6E, the insulating layer 510 is formed along the inner walls of the deep hole and the second hole. This insulating layer electrically insulates the conductor (which becomes a through electrode) to be filled in the next step and the plate-like structure 500. Such 510 is formed by a known method such as CVD, and is also deposited on the bottom of the deep hole 507a. In this embodiment, as will be described later, the insulating layer deposited on the bottom of 507a may not be removed. In FIG. 6F, a part of the insulating layers 510 and 503 is removed and a contact hole 520 is formed. The partial area | region of the electroconductive thin film connected to the electronic circuit element by the said 520 is exposed. In FIG. 6G, the conductor 511 is filled into the deep hole 507a and the second hole 508 while covering the 520, thereby forming a plug. In the figure, a completely filled state is shown, but a filling method may be employed in which deposition is performed only on the inner walls of the deep hole and the second hole, and a gap exists in the central region. Further, the conductor on the surface on the first main surface side is processed so as to be an electrode pattern 512.

In FIG. 6 (h), the structure of FIG. 6 (g) is processed so that the thickness is reduced from the back side. The processing can be performed by a known method such as polishing or etching. The processing is performed until the conductor 511 is exposed, and an exposed region 513 of the 511 is formed on the lower surface of the plate-like structure. As a result, the “depth” in the “deep hole 507a” is reduced to the same value as “the thickness of the plate-like structure having a reduced thickness”.

Next, an insulating layer 514 is formed on the surface processed by polishing or the like, and the insulating layer in a region corresponding to 513 is removed (FIG. 6I). Finally, an electrode pattern 515 is formed. As described above, the front and back surfaces of the plate-like structure are electrically connected by the conductor composed of 512, 511, 513, and 515.

FIG. 7 shows the final form of the second embodiment configured by the procedure described up to the previous paragraph. In the figure, the same reference numerals as those in FIG. 6 denote the same components. In the figure,
550: First main surface (in this embodiment, the main surface on the side where the electronic circuit elements are arranged)
551: Through electrode (disposed on the first main surface, conductor (511, 512 and 515)
And is composed of)
d10a: depth of the deep hole (507a) d10: first depth of the first hole c10: first area (approximately)
d20: second depth of the second hole c20: second area. As described above, the initially formed “deep hole (507a)” (depth is d1a) is obtained by polishing and thinning the plate-like structure 500, so that the “first hole” (depth is d1). )It has become. The initial “deep hole (507a)” does not “penetrate” the 500, but as a result of polishing, the “first hole” is supposed to “penetrate” the 500. As apparent from the above description, the second embodiment is included in claim 1.

  FIG. 7 (g) is in the middle of the manufacturing procedure of this embodiment, but this configuration can be applied to a trench capacitor. Such a trench capacitor is a capacitance element formed between an inner wall side of a trench ("digging", which is a shape of a through electrode in the figure) provided in a semiconductor substrate and the semiconductor substrate. . Since the semiconductor substrate is used in the height direction, it has a feature that a large capacitance value can be obtained even with a small area.

  A highly reliable through electrode has become possible. The present invention is not limited to the through electrode, and can be widely applied to the case where the hole is formed in the thickness direction of the silicon substrate. An example of this is a trench capacitor of a storage device.

300, 400, 500 Silicon substrate 301, 401, 501 Electronic circuit element 302, 402, 502 Conductive thin film 303, 304, 308, 403, 404, 410, 503, 504, 510, 514
Insulating layer 305 Mask layer 306, 406, 506 Opening 307, 507a Deep hole 309 Plug 310, 412, 415, 416, 512, 515 Electrode pattern 311 Region 312 Bird beak 407 First hole 408, 508 Second hole 411, 414 511 Conductor 413 Thin conductor 417 Air gap 420 Plane 421 Arc 422 Planar slope 513 Exposed region 520 of conductor Contact hole 550 First main surface 551 Through electrode

Claims (2)

Arranging at least one through electrode arranged on the first main surface which is one of the front and back surfaces of the plate-like structure, an opening pattern having a first area in the insulating layer covering the first main surface;
An inner wall of a first hole having a first depth produced using the pattern as a mask;
The insulating layer and the plate-like structure have a second area that exceeds the first area, includes the opening pattern, and has a second depth that does not exceed the first depth. The inner wall of the second hole,
A through electrode comprising a conductor disposed along an inner wall of the first hole and an inner wall of the second hole. 2. The through electrode according to claim 1, wherein the opening pattern is formed by laser light, the first hole is formed by reactive ion etching, and the second hole is formed by laser light.

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