JP2014241706A - DC-DC converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To control a charge amount transmitted to an output part per cycle of a switching operation to be a constant value regardless of a variation and such of a power supply voltage.SOLUTION: The DC-DC converter includes: a switch connected to a power supply; an output part connected to the switch through a coil; and a control part that, by measuring a charging amount transmitted from the coil to the output part, determines operation timing of the switch on the basis of measured results. By detecting a charging amount transmitted from the coil to the output part during charging, timing of completing a charging period is determined and switch driving is controlled.

Description

  The present invention relates to a DC-DC converter, and more particularly to a PFM control type DC-DC converter.

  With the downsizing of portable electronic devices, the space that a battery can occupy in the housing of the device has been limited. On the other hand, higher functionality is also progressing, and the power consumed when the device is operating is increasing. In order to obtain a long driving time with a small battery capacity, a DC-DC converter having high conversion efficiency is widely used for power control. There are several control methods for the DC-DC converter.

  FIG. 4 is a circuit example of a PFM control type DC-DC converter.

  PFM is an abbreviation for Pulse Frequency Modulation, and is a control method characterized by high efficiency, especially at light loads, because the switching operation is performed as many times as necessary depending on the output status.

  There is a switch P1 between the power source Vin and the output terminal VSW, and a switch N1 between VSW and GND. The time for applying the voltage Vin to the coil L connected to VSW is controlled, and the time for storing energy in L and the stored energy The desired power is transmitted to Vout by adjusting the ratio of the time for transmitting to the output Vout.

  The DC-DC converter 100 illustrated in FIG. 4 includes a comparator VO_CMP101 that determines whether Vout is a desired value, a peak current detection unit 102 that detects a current flowing through L through P1, and a flow through L through N1. A zero current detection unit 103 that detects that the current has become zero and a switching control unit 104 that receives the outputs of the detection units 101, 102, and 103 and controls the switches P1 and N1 are provided.

  The VO_CMP 101 monitors the output voltage Vout and gives a signal to the switching control unit 104. The switching control unit 104 drives P1 and N1 to perform a switching operation only when Vout is equal to or lower than a desired voltage value from the CMP signal. One cycle of the switching operation includes a charging phase in which P1 is turned on / N1 is turned off and a transmission phase in which P1 is turned off / N1 is turned on.

  In order to store energy in the coil 105 (L), the switching operation is performed from the charging phase. If Vout is equal to or lower than a desired voltage value, the switching control unit 104 turns on P1 and turns off N1. Then, the voltage value of VSW becomes equal to Vin, and a voltage of Vin−Vout is applied to L.

  In the step-down converter, Vin> Vout, and if the direction from VSW to Vout is positive, a positive current flows through L. The current value depends on the time during which the voltage is applied, and the current value flowing through L t seconds after the start of the charging phase is expressed as IL = (Vin−Vout) × t ÷ L.

  The current value IL during the charging phase is monitored by the peak current detector 2. The peak current detector 102 monitors the current flowing through P1, but the current flowing through P1 is equal to the current flowing through L during the charging phase. When IL in the charging phase reaches a predetermined value, it is determined that necessary energy is stored in the coil 105, and the charging phase is shifted to the transmission phase. A means for monitoring the current flowing through P1 is described in, for example, Patent Document 1 and has a circuit configuration shown in FIG.

  When shifting from the charging phase to the transmission phase, P1 that was in the on state is turned off, and N1 that was in the off state is turned on. Then, the voltage value of VSW becomes equal to the GND potential, and a voltage of 0-Vout is applied to L. A current value flowing through L after t ′ seconds from the start of the transmission phase is represented by IL = −Vout × t ′ ÷ L + IL0. Here, IL0 is t '= 0, that is, the value of IL at the start of the transmission phase.

  The IL during the transmission phase is monitored by the zero current detection unit 103. The zero current detector 103 monitors the current flowing through N1, but the current flowing through N1 is equal to the current flowing through L during the transmission phase. When the value of IL becomes 0 during the transmission phase, it is determined that the energy stored in the coil 105 has been completely transmitted to Vout, the transmission phase is terminated, and one cycle of the switching operation is completed.

  When Vout is equal to or higher than a desired value when one cycle of the switching operation is completed, in order to prevent the voltage of Vout from rising, P1 is turned off and N1 is turned off to stop the switching operation and enter a standby state. If Vout is less than or equal to the desired value when the cycle is completed, the process proceeds to the charging phase of the next cycle. Even during the standby state, VO_CMP monitors Vout, and when the voltage value falls below the desired value, the state shifts from the standby state to the charging phase.

JP 2008-206238 A

  One means for prolonging the driving time of a portable device is to lower the minimum output voltage of the rechargeable battery than before. Accordingly, DC-DC converters for portable devices are required to operate with a lower power supply voltage than before.

  In the coil peak current control type PFM converter as shown in FIG. 4, when the peak current limit value is ILPK, it is expressed as ILPK = (Vin−Vout) × Tchg ÷ L, where Tchg has a charge phase. This is the charging period from the start to the end. This control method operates so that ILPK is constant. Therefore, it can be understood that Tchg decreases when the power supply voltage Vin increases, and Tchg increases when Vin decreases. Since the transmission phase period Ttran is determined by ILPK and Vout, it is constant regardless of the power supply voltage.

  The amount of charge ΔQ transferred to Vout in one cycle of the switching operation is ∫ΔIL × dt = (Tchg + Ttran) × ILPK / 2, and Tchg increases or decreases depending on Vin, so ΔQ also depends on the power supply voltage Vin.

  When one cycle of the switching operation is completed, the voltage value of Vout increases from before the start of the cycle as ΔQ is transmitted to Vout. The range of the rise is obtained from the capacitance value of Cout provided between Vout and GND and ΔQ in a relationship of ΔQ ÷ Cout. This voltage fluctuation range is called an output ripple voltage Vripple. Then, Vripple increases as Tchg and ΔQ increase. As shown in FIG. 6, the output voltage waveform of the DC-DC converter is a waveform in which Vripple on the triangular wave is superimposed, and when Vripple increases, problems such as characteristic deterioration occur in an electronic device to which power is supplied.

  Accordingly, an object of the present invention is to provide a DC-DC converter in which Vripple does not increase even when the power supply voltage is low.

  The present invention is a DC-DC converter, a switch connected to a power supply unit, an output unit connected to the switch via a coil, and an amount of charge transmitted from the coil to the output unit. And a control unit for determining the operation timing of the switch based on the measurement result.

  The control unit includes a comparator that determines whether the output voltage is a desired value, a charge detection unit that detects a charge amount transmitted from the coil to the output unit, and a current that detects a current amount flowing through the coil. And a switching control unit that controls the operation of the switch based on output results from the charge detection unit and the current detection unit.

  The charge detection unit includes a capacity for storing a charge proportional to a current flowing through the coil during the charging period, and a detection comparator for determining whether a voltage generated from the charge stored in the capacity is a predetermined value. It is characterized by.

  The charge detection unit detects the amount of charge transmitted from the coil to the output unit during the charging period, and determines the timing of the end of the charging period.

  The charge amount transmitted from the coil to the output unit is controlled to be constant based on detection of the charge amount for each cycle from the start of charge to the end of charge corresponding to the switching operation period of the switch.

  The switch is driven and controlled by a PFM control method.

  According to the present invention, the amount of charge transmitted from the coil to the output unit during the charging period is detected to determine the timing of the end of the charging period and control the drive of the switch. In addition, the amount of charge transmitted to the output unit for each cycle of the switching operation can be controlled to a constant value, so that the output ripple voltage does not increase even when the power supply voltage is lowered. It can be held at a constant value.

It is a block diagram which shows the circuit example of the DC-DC converter which is one Embodiment of this invention. It is a circuit diagram which shows the structure of the electric charge detection part which is one Embodiment of this invention. It is a timing chart which shows the operation example of the PFM control system using the electric charge detection circuit of this invention. It is a block diagram which shows the circuit example of the conventional DC-DC converter. It is a circuit diagram which shows the structure of the conventional charge detection part. It is a timing chart which shows the operation example of the PFM control system using the conventional charge detection circuit.

  An embodiment of the present invention will be described with reference to FIGS. In addition, about the same part as the prior art example mentioned above, the description is abbreviate | omitted and the same code | symbol is attached | subjected.

(Constitution)
FIG. 1 shows a configuration example of a DC-DC converter of a PFM control system as a DC-DC converter according to the present invention.

  The DC-DC converter 1 includes a switch 3 connected to a power source 2 (Vin), an output unit 5 (Vout) connected to the switch 3 via a coil 4 (L), and the coil 4 to the output unit 5. The control unit 10 is configured to measure the amount of transmitted charge and determine the operation timing of the switch 3 based on the measurement result. In the switch 3, two transistors (P1, N1) are connected in series between Vin of the power supply 2 and GND. A resistor 6 (Rload) and a capacitor 7 (Cout) are connected in parallel to the output terminal of the output unit 5.

  The control unit 10 includes a comparator 11 that determines whether the output voltage Vout is a desired value, and a charge detection unit 12 that detects the amount of charge transferred from the coil 4 (L) to the output unit 5 (Vout) during the charging phase. And the zero current detector 13 as a current detector for detecting the amount of current flowing through the coil 4 (L) during the transmission phase, and the output of the switch 3 based on the output results from the charge detector 12 and the zero current detector 13. It is comprised from the switching control part 14 which controls operation | movement.

  The comparator 11 determines whether Vout is a desired value. The charge detector 12 can detect the amount of charge transmitted by the coil L during the charging phase and determine the timing of the end of the charging phase. The zero current detector 13 can detect that the current flowing through the coil L has become zero during the transmission phase.

<Charge detection unit>
FIG. 2 shows a configuration example of the charge detection unit 12.

  The charge detection unit 12 includes three transistors 21, 22, 23 (P2, N2, N3), a charge sense amplifier 24 (Qsense_AMP), a capacitor 25 (Csense), and a detection comparator 26 (Qsense_CMP). .

  The transistor P2 is connected to the transistor P1 of the switch 3 so that the source terminal potential and the gate terminal potential are common.

  The charge sense amplifier 24 receives the drain terminal potential of the transistor P1 and the drain terminal potential of the transistor P2, and the gate terminal of the transistor N2 is driven by the Qsense_AMP output so that both potentials are the same. Therefore, due to the action of Qsense_AMP, the transistor P1 and the transistor P2 have a mirror circuit configuration because the terminal potentials of the source, gate, and drain are the same.

  The transistor sizes of the transistors P1 and P2 are determined to be N: 1 (N >> 1). The drain current of transistor P2 is equal to 1 / N of the drain current of transistor P1. Since the drain current of the transistor P1 is equal to the current IL flowing through the coil L during the charging phase of the DC-DC converter 1, the current flowing through the transistor P2 during the charging phase is equal to 1 / N of IL.

  The drain current of transistor P2 during the charging phase is stored in Csense. In Csense, the voltage Vsense generated from the charge stored by the drain current of the transistor P2 is input to the detection comparator 26 (Qsense_CMP) and compared with the reference detection pressure VPK. When the Vsense voltage becomes higher than the VPK voltage, a signal Det_Qpeak is given from Qsense_CMP. The charge of Csense is discharged by N3 before each charge phase starts.

(Operation)
The circuit operation will be described with reference to FIG.

  As shown in the circuit of the PFM control system shown in FIG. 1, the operation when the charge detection unit 12 of the present invention is applied in place of the conventional current detection unit 102 and the charge phase end timing is determined by Det_Ipeak will be described. To do.

  The purpose of the PFM control method is to control the current stored in the coil and keep the voltage value of Vout within a certain range regardless of external disturbance such as load fluctuation. The current stored in the coil 4 is performed by performing a switching operation for turning on / off the transistors P1 and N1 of the switch 3 in a complementary manner and controlling the length of time each transistor is on.

  These switches 3 are controlled by observing the signal supplied from VO_CMP which monitors Vout and the current flowing through the transistor N1 during the discharge phase in which the transistor N1 of the switch 3 is on, and the current flowing through the coil 4 is zero. The signal Det_Izero supplied from the zero current detection unit 13 that monitors the occurrence of the charge and the charge flowing through the transistor P1 during the charge phase when the transistor P1 of the switch 3 is on are observed, and the charge transferred to Vout is desired This is performed by a signal Det_Qpeak supplied from the charge detection unit 12 that monitors that the value has been reached.

  When the output voltage Vout is higher than the lower limit value, the voltage value of the output voltage Vout is within the desired range, and a signal for stopping the switching operation is given from the VO_CMP to the switching control unit 14, and the transistors P1 and N1 Both are kept off.

  When the output voltage Vout decreases due to a load current or the like and falls below the lower limit value, a signal for starting the switching operation is given from VO_CMP to the control unit. The switching operation starts from the charging phase in order to store current in the coil 4.

  When the charge phase is started, the charge detection unit 12 starts monitoring the amount of charge given from Vin to Vout. When the total amount of transmitted charge reaches a desired value, the charge phase is terminated and the process proceeds to the transmission phase. Signal Det_Qpeak is supplied to the control unit. In response to this, the switching control unit 14 changes the on / off state of the transistors P1 and N1 of the switch 3 and shifts from the charging phase to the transmission phase.

  When the transmission phase is started, the zero current detector 13 starts monitoring the current flowing through the transistor N1 of the switch 3. At this time, the current IL flowing through the coil 4 is equal to the current flowing through the transistor N1. When it is detected that the current flowing through the transistor N1 has become zero, Det_Izero is given to the switching control unit 14 to end the transmission phase.

  If the Vout voltage value does not reach the desired value at the end of the transmission phase, the charging phase is continuously started. If the voltage value is equal to or higher than the desired value, the switching operation is stopped by a signal supplied from VO_CMP.

  Next, the operation of the charge detection unit 12 during the charging phase will be described.

  During the charging phase, Qsense_AMP drives and controls the gate of the transistor N2 so that the drain potential of the transistor P2 and the drain potential of P1 are equal, so that the transistor P1 and the transistor P2 have a mirror circuit configuration. If the transistor size ratio of the transistor P1 and the transistor P2 is N: 1, the drain current of the transistor P2 is equal to 1 / N of the drain current of the transistor P1, and the drain current of the transistor P1 is equal to the current IL flowing through the coil L. The drain current of transistor P2 is equal to 1 / N of IL.

  The drain current of transistor P2 is stored in Csense, generating a voltage Vsense. Since the drain current of the transistor P2 and the drain current of the transistor P1 are similar, the charge amount Qout supplied from Vin to Cout through the transistor P1 and the coil L and the charge supplied from Vin to Csense through the transistor P2. Since the quantity Qsense is similar and the drain current ratio of the transistors P1 and P2 is N: 1, the relationship Qout: Qsense = N: 1 holds.

  From Q = C × V, the value of Vsense is similar to ΔVout = Vripple during the charging phase, and Vsense = (1 / N) × Vripple.

  Therefore, from Vsense / Vripple = 1 / N, the Vsense output ripple voltage Vripple can be controlled to a constant value by monitoring Vsense and determining the end timing of the charging phase.

  Even when the amount of charge given to Cout per unit time increases or decreases due to the change in power supply voltage Vin and the change in coil current per unit time (Vin−Vout) ÷ L increases or decreases, it is given to Csense. Since the amount of charge increases and decreases with the same tendency, the ratio of Vsense to Vripple does not change. Therefore, since the amount of charge given to Cout can be detected regardless of the power supply voltage Vin, Vripple can be controlled to a constant value.

  As described above, since the charge amount transmitted from the coil 4 to the output unit 5 during the charging period is detected to determine the timing of the end of the charging period, the drive of the switch 3 is controlled. Regardless of fluctuations in Vin or the like, the amount of charge transferred to the output unit 5 can be controlled to a constant value for each cycle of the switching operation, so that even when the power supply voltage Vin is lowered, the output is possible. The ripple voltage does not increase and can always be held at a constant value.

1 DC-DC converter 2 Power supply 2 (Vin)
3 switch (transistor, P1, N1)
4 Coil (L)
5 Output section (Vout)
6 Resistance (Rload)
7 Capacity (Cout)
DESCRIPTION OF SYMBOLS 10 Control part 11 Comparator 12 Charge detection part 13 Zero current detection part 14 Switching control part 21, 22, 23 Transistor (P2, N2, N3)
24 charge sense amplifier (Qsense_AMP)
25 Capacity (Csense)
26 Detection comparator (Qsense_CMP)
DESCRIPTION OF SYMBOLS 100 DC-DC converter 101 Comparator 102 Peak current detection part 103 Zero current detection part 104 Switching control part 105 Coil

Claims (6)

A DC-DC converter,
A switch connected to the power supply,
An output connected to the switch via a coil;
A DC-DC converter comprising: a control unit that measures an amount of charge transmitted from the coil to the output unit and determines an operation timing of the switch based on the measurement result. The controller is
A comparator for determining whether the output voltage is a desired value;
A charge detector for detecting the amount of charge transmitted from the coil to the output unit;
A current detector for detecting the amount of current flowing through the coil;
A switching control unit for controlling the operation of the switch based on output results from the charge detection unit and the current detection unit;
The DC-DC converter according to claim 1, comprising: The charge detector is
A capacity for storing a charge proportional to the current flowing through the coil during the charging period;
The DC-DC converter according to claim 2, further comprising a detection comparator that determines whether a voltage generated from the electric charge stored in the capacitor is a predetermined value.   4. The DC-DC converter according to claim 2, wherein the charge detection unit detects a charge amount transmitted from the coil to the output unit during a charging period, and determines a timing for ending the charging period.   The charge amount transmitted from the coil to the output unit is controlled to be constant based on detection of the charge amount for each cycle from charging start to charging end corresponding to a switching operation period of the switch. Item 5. The DC-DC converter according to any one of Items 1 to 4.   The DC-DC converter according to claim 1, wherein the switch is driven and controlled by a PFM control method.

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