JP2014238776A5 - - Google Patents

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Publication number
JP2014238776A5
JP2014238776A5 JP2013122025A JP2013122025A JP2014238776A5 JP 2014238776 A5 JP2014238776 A5 JP 2014238776A5 JP 2013122025 A JP2013122025 A JP 2013122025A JP 2013122025 A JP2013122025 A JP 2013122025A JP 2014238776 A5 JP2014238776 A5 JP 2014238776A5
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JP
Japan
Prior art keywords
recording medium
recording
data
reproducing apparatus
timing signal
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JP2013122025A
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English (en)
Japanese (ja)
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JP6151976B2 (ja
JP2014238776A (ja
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Priority to JP2013122025A priority Critical patent/JP6151976B2/ja
Priority claimed from JP2013122025A external-priority patent/JP6151976B2/ja
Publication of JP2014238776A publication Critical patent/JP2014238776A/ja
Publication of JP2014238776A5 publication Critical patent/JP2014238776A5/ja
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Publication of JP6151976B2 publication Critical patent/JP6151976B2/ja
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JP2013122025A 2013-06-10 2013-06-10 記録再生装置及び制御方法 Active JP6151976B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2013122025A JP6151976B2 (ja) 2013-06-10 2013-06-10 記録再生装置及び制御方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013122025A JP6151976B2 (ja) 2013-06-10 2013-06-10 記録再生装置及び制御方法

Publications (3)

Publication Number Publication Date
JP2014238776A JP2014238776A (ja) 2014-12-18
JP2014238776A5 true JP2014238776A5 (enrdf_load_stackoverflow) 2016-07-28
JP6151976B2 JP6151976B2 (ja) 2017-06-21

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ID=52135869

Family Applications (1)

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JP2013122025A Active JP6151976B2 (ja) 2013-06-10 2013-06-10 記録再生装置及び制御方法

Country Status (1)

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JP (1) JP6151976B2 (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6894736B2 (ja) * 2017-03-24 2021-06-30 キヤノン株式会社 記録装置、制御方法、及びプログラム
JP2024033024A (ja) * 2021-01-19 2024-03-13 パナソニックＩｐマネジメント株式会社 ホスト装置、スレーブ装置及びデータ転送システム

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007164697A (ja) * 2005-12-16 2007-06-28 Shinko Electric Ind Co Ltd 半導体集積回路およびメモリシステム並びにクロック信号設定方法
JP5119828B2 (ja) * 2007-09-25 2013-01-16 株式会社デンソー タイミング調整装置
JP2011233042A (ja) * 2010-04-28 2011-11-17 Toshiba Corp キャリブレーション処理制御装置及びキャリブレーション処理制御方法
JP2011258134A (ja) * 2010-06-11 2011-12-22 Renesas Electronics Corp インタフェース回路
US8972818B2 (en) * 2012-10-05 2015-03-03 Qualcomm Incorporated Algorithm for optimal usage of external memory tuning sequence

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