JP2014225673A5 - Device manufacturing method - Google Patents
Device manufacturing method Download PDFInfo
- Publication number
- JP2014225673A5 JP2014225673A5 JP2014121769A JP2014121769A JP2014225673A5 JP 2014225673 A5 JP2014225673 A5 JP 2014225673A5 JP 2014121769 A JP2014121769 A JP 2014121769A JP 2014121769 A JP2014121769 A JP 2014121769A JP 2014225673 A5 JP2014225673 A5 JP 2014225673A5
- Authority
- JP
- Japan
- Prior art keywords
- micro
- device manufacturing
- silicon oxide
- vacancy
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 13
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 9
- 229910052710 silicon Inorganic materials 0.000 claims description 9
- 239000010703 silicon Substances 0.000 claims description 9
- 239000007788 liquid Substances 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 6
- CBENFWSGALASAD-UHFFFAOYSA-N ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 3
- 239000002253 acid Substances 0.000 claims description 2
- 230000001590 oxidative Effects 0.000 claims description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N HCl Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N HF Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims 2
- 238000005530 etching Methods 0.000 claims 2
- 239000004065 semiconductor Substances 0.000 claims 2
- 238000004140 cleaning Methods 0.000 claims 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims 1
Description
本発明は、デバイスの製造方法に関するものである。 The present invention relates to a device manufacturing method.
本発明の一つの側面は、酸化シリコン層の上にシリコン層が積層されている基体であって、シリコン層を貫通し底部に酸化シリコン層が露出しているマイクロ空室を有する基体を用意し、マイクロ空室の開口を通じて、オゾンまたは酸を用いてシリコン層を酸化することによってマイクロ空室の内側壁面に酸化シリコン膜を形成し、酸化シリコン膜に対して濡れ性のある処理液を、酸化シリコン膜が形成されたマイクロ空室の空間に導入することを特徴とするデバイスの製造方法にある。 One aspect of the present invention provides a substrate in which a silicon layer is laminated on a silicon oxide layer, and the substrate has a microcavity that penetrates the silicon layer and exposes the silicon oxide layer at the bottom. A silicon oxide film is formed on the inner wall surface of the micro-vacancy by oxidizing the silicon layer using ozone or acid through the opening of the micro-vacancy, and a treatment liquid having wettability to the silicon oxide film is oxidized. A device manufacturing method is characterized in that the device is introduced into a space of a micro-vacancy in which a silicon film is formed .
Claims (11)
前記マイクロ空室の開口を通じて、オゾンまたは酸を用いて前記シリコン層を酸化することによって前記マイクロ空室の内側壁面に酸化シリコン膜を形成し、
前記酸化シリコン膜に対して濡れ性のある処理液を、前記酸化シリコン膜が形成されたマイクロ空室の空間に導入することを特徴とするデバイスの製造方法。 A substrate silicon layer is laminated on the silicon oxide layer, the silicon oxide layer is prepared substrates that have a micro Check exposed at the bottom through said silicon layer,
The through openings of the micro-check, a silicon oxide film formed on the inner side wall surface of the micro-check by oxidizing the silicon layer with ozone or acid,
A device manufacturing method wherein the processing solution having the wettability with respect to the silicon oxide film, is introduced into the space of the micro-check that the silicon oxide film is formed.
前記酸化シリコン層は前記半導体基板と前記シリコン層との間に配されていることを特徴とする請求項１乃至９の何れか１項に記載のデバイスの製造方法。 The device manufacturing method according to claim 1, wherein the silicon oxide layer is disposed between the semiconductor substrate and the silicon layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014121769A JP6243802B2 (en) | 2014-06-12 | 2014-06-12 | Device manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014121769A JP6243802B2 (en) | 2014-06-12 | 2014-06-12 | Device manufacturing method |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013549461A Division JP5569831B1 (en) | 2013-05-15 | 2013-05-15 | Inner wall surface processing method for micro vacancy |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2014225673A JP2014225673A (en) | 2014-12-04 |
| JP2014225673A5 true JP2014225673A5 (en) | 2016-07-07 |
| JP6243802B2 JP6243802B2 (en) | 2017-12-06 |
Family
ID=52124084
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2014121769A Active JP6243802B2 (en) | 2014-06-12 | 2014-06-12 | Device manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP6243802B2 (en) |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3488030B2 (en) * | 1996-12-05 | 2004-01-19 | 森田化学工業株式会社 | Method for manufacturing semiconductor device |
| JP2002289575A (en) * | 2001-03-28 | 2002-10-04 | Dainippon Screen Mfg Co Ltd | Substrate treating method and its equipment |
| JP2006278955A (en) * | 2005-03-30 | 2006-10-12 | Dainippon Screen Mfg Co Ltd | Method and device for substrate processing |
| JP5025508B2 (en) * | 2008-01-30 | 2012-09-12 | 東京エレクトロン株式会社 | Method for removing polysilicon film and storage medium |
| JP5195102B2 (en) * | 2008-07-11 | 2013-05-08 | 大日本印刷株式会社 | Sensor and manufacturing method thereof |
| JP2012204424A (en) * | 2011-03-24 | 2012-10-22 | Toshiba Corp | Surface processing method of semiconductor substrate and substrate processing device |
-
2014
- 2014-06-12 JP JP2014121769A patent/JP6243802B2/en active Active
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