JP2014201505A - Method of producing group iii nitride semiconductor substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of producing a large-diameter group III nitride semiconductor substrate.SOLUTION: A method of producing a group III nitride semiconductor substrate includes: a preparation step of preparing a first group III nitride semiconductor layer 13 having the c-plane and a diameter expansion growth rate-limiting surface including at least one of the {1-102} plane, the {1-101} plane and the {hkil} plane (h, k and i are integers, other than 0, meeting the condition h+k=-i and l is a positive number) as exposed surfaces; and a first growth step of growing second group III nitride semiconductor layers 11 and 12 from the c-plane and the diameter expansion growth rate-limiting surface having the first group III nitride semiconductor layer 13, with the outer peripheral side surface of the first group III nitride semiconductor layer 13 exposed. In the first growth step, the second group III nitride semiconductor layers 11 and 12 are grown under conditions of accelerating growth from the diameter expansion growth rate-limiting surface.

Description

  The present invention relates to a method for manufacturing a group III nitride semiconductor substrate.

  Patent Document 1 discloses an invention of a method for manufacturing a nitride semiconductor free-standing substrate, in which manufacturing a large-diameter nitride semiconductor free-standing substrate is an issue. In the present invention, a nitride semiconductor of the same type as the seed substrate is epitaxially grown on the nitride semiconductor free-standing substrate to be a seed substrate, and then sliced in parallel with the epitaxial growth surface and divided into two to form one seed substrate. Two nitride semiconductor free-standing substrates are manufactured.

In Patent Document 2, in GaN growth on a seed, the growth temperature is increased, the ratio of NH ₃ / GaN is increased, the pressure is decreased, a desired temperature gradient is set, or the flow rate is uneven. It is described that by adjusting the bowl growth conditions, the wafer grows in both the direction perpendicular to the seed and in the direction parallel to the seed, and as a result, a wafer with a large area can be manufactured (the paragraph of the specification of Patent Document 2). [0049]). As an example, a GaN bowl grown without significantly reducing the crystal area of the starting GaN seed is shown. In addition, in the said Example, it is described that the ratio of ammonia with respect to the hydrochloric acid under process was maintained at about 35 (patent document 2 specification paragraph [0116], [0117]).

JP 2008-156189 A JP-T-2003-527296

  An object of the present invention is to provide a manufacturing method for manufacturing a large-diameter group III nitride semiconductor substrate.

According to the present invention,
c-plane, and {1-102} plane, {1-101} plane, and {hkil} plane (h, k, i are integers other than 0 satisfying h + k = −i, l is a positive number). A preparatory step of preparing a first group III nitride semiconductor layer having, as an exposed surface, an enlarged-diameter growth rate limiting surface including one;
With the outer peripheral side surface of the first group III nitride semiconductor layer exposed, a second group III nitride is formed from the c-plane of the first group III nitride semiconductor layer and the diameter-enlarging growth rate controlling surface. A first growth step for growing a semiconductor layer,
In the first growth step, there is provided a method for manufacturing a group III nitride semiconductor substrate in which the second group III nitride semiconductor layer is grown under conditions that promote growth from the diameter-enlarged growth rate-determining surface. .

Moreover, according to the present invention,
A second growth step of growing a fourth group III nitride semiconductor layer on the third group III nitride semiconductor layer with the outer peripheral side surface of the third group III nitride semiconductor layer exposed; Have
In the second growth step, c-plane, {1-102} plane, {1-101} plane, and {hkil} plane (h, k, i are integers excluding 0 satisfying h + k = −i. L is A growth rate-determining surface including at least one of the positive number) is exposed as a group III nitride semiconductor layer, and growth is promoted from the growth-limited surface-limited surface. There is provided a method for manufacturing a group III nitride semiconductor substrate for producing the fourth group III nitride semiconductor layer by growing a group III nitride semiconductor layer.

  According to the present invention, a manufacturing method for manufacturing a large-diameter group III nitride semiconductor substrate is realized.

It is a figure which shows an example of the cross-sectional schematic diagram of the group III nitride semiconductor substrate of this embodiment. It is a figure which shows an example of the cross-sectional schematic diagram of the group III nitride semiconductor substrate of this embodiment. It is a figure which shows an example of the cross-sectional schematic diagram of the group III nitride semiconductor substrate of this embodiment. It is a figure which shows an example of the cross-sectional schematic diagram of the group III nitride semiconductor substrate of this embodiment. It is a figure which shows an example of the cross-sectional schematic diagram of the group III nitride semiconductor substrate of this embodiment. It is a figure which shows an example of the cross-sectional schematic diagram of the group III nitride semiconductor substrate of this embodiment. It is a figure which shows an example of the cross-sectional schematic diagram of the group III nitride semiconductor substrate of this embodiment. It is a figure which shows an example of the cross-sectional schematic diagram of the group III nitride semiconductor substrate of this embodiment. It is a figure which shows an example of the cross-sectional schematic diagram of the group III nitride semiconductor substrate of this embodiment. FIG. 2 is an example of a diagram in which the (0001) plane of the first growth region 11 and the (0001) plane of the group III nitride semiconductor layer 13 in FIG. 1 are observed from the top to the bottom in FIG. It is the schematic which shows an example of the apparatus used for the manufacturing method of the group III nitride semiconductor substrate of this embodiment. It is a figure which shows a mode that the cross section of GaN of a comparative example was observed with the fluorescence microscope. It is a figure which shows a mode that the cross section of GaN of an Example was observed with the fluorescence microscope. It is a figure which shows the relationship between carrier gas flow ratio, growth temperature, and angle (theta) which the 2nd line M and 1st line L 'make. It is a figure which shows the relationship between V / III ratio and angle (theta) which the 2nd line M and 1st line L 'make. It is a schematic diagram which shows an example of the group III nitride semiconductor substrate which has (0001) surface and {1-102} surface as an exposed surface. It is a schematic diagram showing an example of a group III nitride semiconductor substrate having (0001) plane, {1-102 plane} and {1-101} plane as exposed surfaces. It is a figure for demonstrating a reference technique. It is a figure which shows the relationship between carrier gas flow ratio, growth temperature, and angle (theta) which the 2nd line M and 1st line L 'make.

  Hereinafter, embodiments of a group III nitride semiconductor substrate and a method for manufacturing a group III nitride semiconductor substrate of the present invention will be described with reference to the drawings. The drawings are only schematic diagrams for explaining the configuration of the invention, and the size, shape, number, and ratio of different member sizes are not limited to those shown in the drawings.

  The group III nitride semiconductor substrate of the present embodiment grows with the (0001) plane as the growth plane, the first growth region having the (0001) plane as the first principal plane and the (000-1) plane as the second principal plane. And a second growth region grown in a different direction from the first growth region and in contact with the sidewall of the first growth region. Then, in any of the cross sections perpendicular to the first main surface, a straight line passing through both ends of the line representing the bonding surface between the first growth region and the second growth region appearing in the cross section is defined as the first line. When the line representing the second main surface appearing in the cross section is the second line, a state where the angle formed by the first line and the second line is 70 ° or more and smaller than 180 ° is observed.

  First, the concept of this embodiment will be described.

  The inventor has (0001) plane, {1-102} plane, {1-101} plane, and {hkil} plane (h, k, i are integers excluding 0 satisfying h + k = −i. L is positive. A seed substrate (group III nitride semiconductor substrate) having an exposed surface, and preferably a (0001) surface as a main surface. , When observed in a direction perpendicular to the (0001) plane, the (0001) plane and the aperture of the seed substrate in which the periphery of the (0001) plane (main surface) is continuously or intermittently surrounded by the growth-rate limiting surface. By growing the group III nitride semiconductor under predetermined growth conditions in a state where the growth growth rate-determining surface is the growth surface and the outer peripheral side surface of the GaN substrate is exposed (a state in which the diameter expansion growth rate-limiting surface is exposed), It was found that a group III nitride semiconductor can be formed.

  Here, FIG. 16 shows an example of a schematic perspective view of the seed substrate as described above. The seed substrate shown in the figure has a (0001) plane as a main surface, and when observed in a direction perpendicular to the (0001) plane, the {hkil} plane and the {1-102} plane around the (0001) plane. Enclosed in The {hkil} surface is composed of a plurality of surfaces by a combination of h, k, i, and l, and has a truncated cone shape. The {hkil} plane and the {1-102} plane are located alternately. That is, the {hkil} plane is sandwiched between two {1-102} planes that are separated from each other. Note that the {hkil} plane is in contact with the (0001) plane.

  FIG. 17 shows another example. The seed substrate shown in the figure has a (0001) plane as a main surface, and when observed in a direction perpendicular to the (0001) plane, the {hkil} plane and the {1-102} plane around the (0001) plane. Surrounded by the {1-101} plane. The {hkil} surface is composed of a plurality of surfaces by a combination of h, k, i, and l, and has a truncated cone shape. The {hkil} plane, the {1-102} plane, and the {1-101} plane are alternately positioned. That is, the {hkil} plane is sandwiched between two {1-102} planes that are separated from each other. Further, the {hkil} plane is sandwiched between two {1-101} planes that are separated from each other. Note that the {hkil} plane is in contact with the (0001) plane.

  These are merely examples. In addition, the seed substrate has a (0001) plane as a main surface, and when observed in a direction perpendicular to the (0001) plane, the periphery of the (0001) plane is the {hkil} plane. What is surrounded by the {1-101} plane, or what is surrounded by a plurality of fine {1-102} planes, or a plurality of fine {1-101} planes, instead of the {hkil} plane It may be enclosed by a configured surface. Further, the {hkil} plane may be a single plane, for example, the {11-23} plane. Further, in the example of the seed substrate, when observed in a direction perpendicular to the (0001) plane, other planes may appear around the (0001) plane. For example, a {1-100} plane may appear as the diameter expansion growth rate limiting surface.

  When using such a seed substrate and growing a group III nitride semiconductor under conventional general growth conditions (carrier gas: hydrogen, growth temperature: about 1050 °, V / III ratio: about 15, etc.) As shown in FIG. 18, the (0001) plane becomes smaller as the growth proceeds. This is thought to be because the growth rate-limiting surface is gradually dominant because the growth rate from the growth-rate-limiting surface is slow.

  In this embodiment, a seed substrate as described above is used, and a group III nitride semiconductor is grown under growth conditions that promote growth from the diameter-enlarged growth rate-determining surface. The disadvantage of becoming smaller is suppressed or eliminated, and as a result, a large-diameter group III nitride semiconductor is obtained.

  In accordance with the above, the inventor has grown a group III nitride semiconductor having a (0001) plane and a diameter-enlarged growth rate-determining plane as an exposed surface from a seed substrate (group III nitride semiconductor substrate) having a (0001) plane. Preferably, after having the (0001) plane as a main surface, and when observed in a direction perpendicular to the (0001) plane, the aperture is continuously or intermittently around the (0001) plane (main surface). After the growth of the group III nitride semiconductor surrounded by the expansion growth rate-determining surface, the (0001) plane of the group III nitride semiconductor and the diameter-enlarged growth rate-limiting surface are used as the growth surface, and the outer peripheral side surface of the GaN substrate is exposed. In the same manner, it has been confirmed that a group III nitride semiconductor having a large diameter can be formed by growing a group III nitride semiconductor under predetermined growth conditions in a state where the diameter expansion growth rate controlling surface is exposed.

  Hereinafter, the group III nitride semiconductor substrate of this embodiment and the method for manufacturing the group III nitride semiconductor substrate will be described in detail.

  FIG. 1 shows an example of a schematic cross-sectional view of a group III nitride semiconductor substrate 10 of the present embodiment.

  The group III nitride semiconductor substrate 10 shown in the figure has a group III nitride semiconductor layer 13 and a first growth region 11 and a second growth region 12 grown from the group III nitride semiconductor layer 13. In the group III nitride semiconductor layer 13, the first growth region 11, and the second growth region 12, each [0001] direction is substantially parallel. FIG. 1 shows the [0001] direction.

  The group III nitride semiconductor layer 13 is, for example, GaN, AlGaN, AlN, InN, or InGaN. The group III nitride semiconductor layer 13 is a seed substrate for growing the first growth region 11 and the second growth region 12.

  Group III nitride semiconductor layer 13 has a (0001) plane. As shown in FIG. 1, group III nitride semiconductor layer 13 may further have a diameter-enlarging growth rate-determining surface. In the figure, an example in which the group III nitride semiconductor layer 13 has a {1-102} plane as an exposed surface is shown. When the group III nitride semiconductor layer 13 is observed in a direction perpendicular to the (0001) plane, the periphery of the (0001) plane (main surface) is continuously or intermittently surrounded by an aperture-growing growth-controlling plane. preferable. FIGS. 16 and 17 are perspective views of an example of such a group III nitride semiconductor layer 13.

  The planar shape, planar size, thickness, etc. of group III nitride semiconductor layer 13 are design matters. However, it is preferable to use the group III nitride semiconductor layer 13 having a large plane. In this way, it becomes easy to obtain a large-diameter group III nitride semiconductor substrate 10.

  Returning to FIG. 1, the first growth region 11 grows with the (0001) plane of the group III nitride semiconductor layer 13 as the growth plane, the (0001) plane as the first principal plane, and the (000-1) plane as the second plane. It has as a main surface. In the example shown in FIG. 1, the first main surface is exposed and the second main surface is in contact with the group III nitride semiconductor layer 13. As shown in the drawing, the second main surface is a surface (opposite surface) on the back side of the first main surface.

  The first growth region 11 is, for example, GaN, AlGaN, AlN, InN, or InGaN.

  The thickness of the 1st growth field 11 is 1 mm or more and 100 mm or less, for example. The first growth region may expand in the m-axis direction as it proceeds in the [0001] direction. The first growth region may expand in the a-axis direction as it proceeds in the [0001] direction. Further, the first growth region may expand in both the a-axis direction and the m-axis direction as it proceeds in the [0001] direction.

  The second growth region 12 grows in a different direction from the first growth region 11 and is in contact with the side wall of the first growth region 11. The second growth region 12 has a diameter-enlarged growth rate-limiting surface as an exposed surface.

  In the case of the example shown in FIG. 1, the second growth region 12 is grown with the {1-102} plane of the group III nitride semiconductor layer 13 as the growth plane. The second growth region 12 has a {1-102} plane as an exposed surface. As shown in FIG. 1, the second growth region 12 may have the same enlarged diameter growth growth limiting surface as the exposed surface of the group III nitride semiconductor layer 13 as the exposed surface. Instead of this surface, another diameter expansion growth rate-limiting surface may be provided as the exposed surface, or both the same diameter expansion growth rate-limiting surface and another diameter expansion growth rate-limiting surface may be provided. Furthermore, a surface other than the diameter-enlarging growth rate-limiting surface may be included as the exposed surface. That is, the diameter-enlarging growth rate-determining surface of the group III nitride semiconductor layer 13 as an exposed surface may be reduced as the growth of the second growth region 12 proceeds, or may disappear as a result. As the growth of the second growth region 12 progresses, the diameter-enlarging growth rate-determining surface of the group III nitride semiconductor layer 13 as an exposed surface becomes smaller. . In this growth process, a surface other than the expansion growth rate limiting surface may appear as an exposed surface and may be included in the exposed surface of the second growth region 12.

  The second growth region 12 is, for example, GaN, AlGaN, AlN, InN, or InGaN.

  When the group III nitride semiconductor substrate 10 shown in FIG. 1 is observed from the top to the bottom in the drawing (in plan view), the second growth region 12 is continuously or intermittently around the first growth region 11. It may be surrounded by.

  Here, the group III nitride semiconductor substrate 10 of the present embodiment is described below in any one of the cross sections perpendicular to the first main surface ((0001) plane) of the first growth region 11. A general state is observed. It should be noted that the characteristic states described below may be observed in most of the cross section perpendicular to the first main surface ((0001) plane) of the first growth region 11, preferably all cross sections.

  FIG. 1 shows a cross section perpendicular to the first main surface ((0001) plane) of the first growth region 11. As shown in FIG. 1, straight lines passing through both ends (points A1 and B1, points A2 and B2) of the line L representing the joint surface between the first growth region 11 and the second growth region 12 appearing in the cross section are shown. Assuming that a line representing the second main surface ((000-1) plane) of the first growth region 11 appearing in the cross section is a second line M, the first line L ′ and the second line L ′ It is observed that at least one of the angles θ1 and θ2 (greater than 0 ° and smaller than 180 °), preferably both, formed by the line M is 70 ° or more and less than 180 °. Hereinafter, this state is referred to as “the characteristic state”.

  As a result, the first main surface ((0001) plane) of the first growth region 11 has the same size as the (0001) plane of the group III nitride semiconductor layer 13 that is the seed substrate, or the group III nitride semiconductor layer. 13 is the same size as the (0001) plane or larger than the (0001) plane of the group III nitride semiconductor layer 13.

  Note that θ1 and θ2 appearing in one cross section may be the same value or different values. Incidentally, in FIG. 1, they are 90 ° <θ1 <180 ° and 90 ° <θ2 <180 °. Most of the cross sections perpendicular to the first main surface ((0001) plane) of the first growth region 11, for example, 90 ° <θ1 <180 ° and 90 ° <θ2 <180 ° in all cross sections. When the state is observed, the first main surface ((0001) plane) of the first growth region 11 is larger than the (0001) plane of the group III nitride semiconductor layer 13.

  As actually shown in the following examples, when a cross section is observed using a fluorescence microscope, the line L representing the bonding surface between the first growth region 11 and the second growth region 12 and the first growth region 11 A second line M representing the two principal surfaces ((000-1) surface) can be observed.

  FIG. 2 shows another example of the group III nitride semiconductor substrate 10 of the present embodiment.

  The group III nitride semiconductor substrate 10 of this example is different from the example of FIG. 1 in the configuration of the group III nitride semiconductor layer 13. Specifically, the group III nitride semiconductor layer 13 does not have a diameter-enlarging growth rate-determining surface. Other configurations are the same as those of the group III nitride semiconductor substrate 10 of FIG.

  Even when the group III nitride semiconductor layer 13 does not have a diameter-enlarging growth rate-determining surface, the diameter-enlarging growth rate-limiting surface is exposed in the initial stage of growing the first growth region 11 and the second growth region 12, and then The group III nitride semiconductor substrate 10 as shown in FIG. 2 is obtained by growing the group III nitride semiconductor under the growth conditions that promote the growth from the growth rate limiting surface.

  Also in the group III nitride semiconductor substrate 10 of the example, the characteristic state is observed in any one of the cross sections perpendicular to the first main surface ((0001) plane) of the first growth region 11. . It should be noted that the above-mentioned characteristic state may be observed in most of the cross section perpendicular to the first main surface ((0001) plane) of the first growth region 11, preferably all cross sections.

  FIG. 3 shows another example of the group III nitride semiconductor substrate 10 of the present embodiment.

  The group III nitride semiconductor substrate 10 of this example is obtained by removing the group III nitride semiconductor layer 13 from the group III nitride semiconductor substrate 10 shown in FIG. 1 or FIG. Note that a part of the second growth region 12 may be removed or a part of the first growth region 11 may be removed due to the removal of the group III nitride semiconductor layer 13. In this example, the first main surface ((0001) surface) and the second main surface ((000-1) surface) of the first growth region 11 are exposed.

  Also in the group III nitride semiconductor substrate 10 of the example, the characteristic state is observed in any one of the cross sections perpendicular to the first main surface ((0001) plane) of the first growth region 11. . It should be noted that the above-mentioned characteristic state may be observed in most of the cross section perpendicular to the first main surface ((0001) plane) of the first growth region 11, preferably all cross sections.

  FIG. 4 shows another example of the group III nitride semiconductor substrate 10 of the present embodiment.

  Compared with the example of FIG. 3, the group III nitride semiconductor substrate 10 of this example has the first growth region 11 and the second growth region 11 appearing in a cross section perpendicular to the first main surface ((0001) plane) of the first growth region 11. The line L representing the bonding surface with the growth region 12 is different in that it is a curve. Although not shown, the line L may be a mixture of a curve and a straight line (for example, the left line L shown in FIG. 4 is composed of a curve and a straight line), or the curved line L and the straight line L may be mixed (for example, the left line L shown in FIG. 4 is a curve, and the right line L is a straight line). Other configurations are the same as those in the example of FIG.

  In the case of the example in FIG. 3, the line L is a straight line, and thus the first line L ′ that is a straight line passing through both ends of the line L overlaps the line L. In the case of the example shown in FIG. 4, since the line L is a curve, the line L and the first line L ′ do not completely overlap. Even in such a case, as shown in FIG. 4, the first line L ′ is defined as a straight line passing through both ends of the line L (point A1 and point B1, point A2 and point B2). It is observed that the angles θ1 and θ2 formed by the line L ′ and the second line M are 70 ° or more and smaller than 180 °.

  That is, the group III nitride semiconductor substrate 10 of this example also observes the above characteristic state in any cross section perpendicular to the first main surface ((0001) plane) of the first growth region 11. Is done. It should be noted that the above-mentioned characteristic state may be observed in most of the cross section perpendicular to the first main surface ((0001) plane) of the first growth region 11, preferably all cross sections.

  FIG. 5 shows another example of the group III nitride semiconductor substrate 10 of the present embodiment.

  Compared to the example of FIG. 3, the group III nitride semiconductor substrate 10 of the example has a side wall of the group III nitride semiconductor substrate 10 partially removed, and the side surface is the first main surface ((0001) of the first growth region 11. ) Surface) and is substantially perpendicular. Other configurations are the same as those in the example of FIG. Note that, as in the example of FIG. 4, the line L may include a curve.

  Also in the group III nitride semiconductor substrate 10 of the example, the characteristic state is observed in any one of the cross sections perpendicular to the first main surface ((0001) plane) of the first growth region 11. . It should be noted that the above-mentioned characteristic state may be observed in most of the cross section perpendicular to the first main surface ((0001) plane) of the first growth region 11, preferably all cross sections.

  FIG. 6 shows another example of the group III nitride semiconductor substrate 10 of the present embodiment.

  In the group III nitride semiconductor substrate 10 of this example, the amount of removal of the side wall of the group III nitride semiconductor substrate 10 is larger than that of the example of FIG. 5, and as a result, a part of the first growth region 11 is also removed. It has been. Other configurations are the same as those in the example of FIG. Note that, as in the example of FIG. 4, the line L may include a curve.

  In the case of the example of FIG. 6, the positions of both ends of the line L are different from those of the example of FIG. However, even in the example of FIG. 6, the line L has the first growth region 11 and the second growth region 12 that appear in a cross section perpendicular to the first main surface ((0001) plane) of the first growth region 11. The first line L ′ is defined as a straight line passing through both ends of the line L (point A1 and point B1, point A2 and point B2).

  Also in the group III nitride semiconductor substrate 10 of the example, the characteristic state is observed in any one of the cross sections perpendicular to the first main surface ((0001) plane) of the first growth region 11. . It should be noted that the above-mentioned characteristic state may be observed in most of the cross section perpendicular to the first main surface ((0001) plane) of the first growth region 11, preferably all cross sections.

  FIG. 7 shows another example of the group III nitride semiconductor substrate 10 of the present embodiment.

  The group III nitride semiconductor substrate 10 of the example has different angles of θ1 and θ2 compared to the example of FIG. Specifically, in the example of FIG. 3, θ1 and θ2 are larger than 90 °, but in this example, θ1 and θ2 are 90 °. Other configurations are the same as those in the example of FIG. Note that, as in the example of FIG. 4, the line L may include a curve.

  The group III nitride semiconductor substrate 10 of the example also has the above characteristic state (θ1 = 90) in any cross section perpendicular to the first main surface ((0001) plane) of the first growth region 11. °, θ2 = 90 °) is observed. When most of the cross sections perpendicular to the first main surface ((0001) plane) of the first growth region 11 are observed, for example, a state where θ1 = 90 ° and θ2 = 90 ° is observed in all cross sections. The first main surface ((0001) plane) of the first growth region 11 has the same size or almost the same size as the (0001) plane of the group III nitride semiconductor layer 13. One of θ1 and θ2 may be larger than 90 ° and smaller than 180 °.

  FIG. 8 shows another example of the group III nitride semiconductor substrate 10 of the present embodiment.

  The group III nitride semiconductor substrate 10 of the example has different angles of θ1 and θ2 compared to the example of FIG. Specifically, in the example of FIG. 3, θ1 and θ2 are larger than 90 °, but in the example, θ1 and θ2 are smaller than 90 °. Other configurations are the same as those in the example of FIG. Note that, as in the example of FIG. 4, the line L may include a curve.

  In the group III nitride semiconductor substrate 10 of this example, the above characteristic state (70 ° ≦ θ1 <90 °, 70 ° ≦ θ2 <90 °) is observed. Most of the cross section perpendicular to the first main surface ((0001) plane) of the first growth region 11, preferably 70 ° ≦ θ1 <90 ° and 70 ° ≦ θ2 <90 ° in all cross sections. When the state is observed, the first main surface ((0001) plane) of the first growth region 11 is substantially the same size (slightly smaller) as the (0001) plane of the group III nitride semiconductor layer 13. ing. Note that one of θ1 and θ2 may be 90 ° or more and smaller than 180 °.

  FIG. 9 shows another example of the group III nitride semiconductor substrate 10 of the present embodiment.

  Compared with the example of FIG. 8, the group III nitride semiconductor substrate 10 of the example has a side wall of the group III nitride semiconductor substrate 10 partially removed, and a part of the side surface is the first main surface of the first growth region 11. It differs in that it is substantially perpendicular to ((0001) plane). Other configurations are the same as those in the example of FIG. Note that, as in the example of FIG. 4, the line L may include a curve.

  Unlike the example of FIG. 8, the group III nitride semiconductor substrate 10 of the example has a part of the first growth region 11 and the second growth region 12 cut away. As a result, the positions of both ends of the line L are different from the example of FIG. However, even in the example of FIG. 9, the line L appears in the first growth region 11 and the second growth region 12 that appear in a cross section perpendicular to the first main surface ((0001) plane) of the first growth region 11. The first line L ′ is defined as a straight line passing through both ends of the line L (point A1 and point B1, point A2 and point B2).

  Also in the group III nitride semiconductor substrate 10 of the example, the characteristic state is observed in any one of the cross sections perpendicular to the first main surface ((0001) plane) of the first growth region 11. . It should be noted that the above-mentioned characteristic state may be observed in most of the cross section perpendicular to the first main surface ((0001) plane) of the first growth region 11, preferably all cross sections.

  In any of the above examples, the second growth region 12 sandwiches the first growth region 11 in a cross section perpendicular to the first main surface ((0001) plane) of the first growth region 11. That is, the second growth region 12 sandwiched the first growth region 11 from the left-right direction in the figure. However, the second growth region 12 may appear only on one side. That is, in the drawing, the second growth region 12 may appear only at the left end or only at the right end.

  Further, in FIGS. 1, 2, 3, 4, 7 and 8, the exposed surface of each of the two second growth regions 12 sandwiching the first growth region 11 from the left-right direction in the drawing is {1-102}. Although it is a surface, at least one of them may be another aperture expansion growth rate-limiting surface or a surface including two or more aperture expansion growth rate-limiting surfaces.

  Further, as in the example shown in FIGS. 3 to 9, when the above characteristic state is observed at two places in the cross section perpendicular to the first main surface ((0001) plane) of the first growth region 11, 2 The above-described characteristic states can be arbitrarily combined with the examples shown in FIGS. For example, the characteristic state on the right side of the group III nitride semiconductor substrate 10 shown in FIG. 3 may be as shown in FIG.

  Further, the group III nitride semiconductor substrate 10 of the example shown in FIGS. 4 to 9 may include a group III nitride semiconductor layer 13 as shown in FIGS.

  The perspective view of the group III nitride semiconductor substrate 10 of the present embodiment is the same as that of the seed substrate (group III nitride semiconductor layer 13) on which the first growth region 11 and the second growth region 12 are grown. As shown.

  FIG. 10 shows an example of a diagram in which the (0001) plane of the first growth region 11 of FIG. 1 and the (0001) plane of the group III nitride semiconductor layer 13 are observed from the top to the bottom in FIG. The group III nitride semiconductor substrate 10 of the example expands in the m-axis direction and the a-axis direction as the first growth region 11 proceeds in the [0001] direction. As shown in FIG. 10, the (0001) plane of the first growth region 11 has a larger width in the m-axis direction and a width in the a-axis direction than the (0001) plane of the group III nitride semiconductor layer 13. It has become. As a result, the (0001) plane of the first growth region 11 has a larger area than the (0001) plane of the group III nitride semiconductor layer 13.

  Next, an example of the manufacturing method of the group III nitride semiconductor substrate 10 of this embodiment is demonstrated.

  The manufacturing method of the group III nitride semiconductor substrate 10 of the example includes a preparation process and a first growth process performed after the preparation process.

  In the preparation step, a first group III nitride semiconductor layer having a c-plane and a diameter-enlarging growth rate-determining surface is prepared. The first group III nitride semiconductor layer corresponds to, for example, the group III nitride semiconductor layer 13 shown in FIG. 1 or the substrate shown in FIGS. 16 and 17.

  The first group III nitride semiconductor layer can be manufactured, for example, as follows. For example, after a group III nitride semiconductor layer is grown on the (0001) plane of a seed substrate that is the same or different kind of substrate, the seed substrate is removed. The growth method is not particularly limited, but the group III nitride semiconductor layer may be grown by, for example, a hydride vapor phase growth method.

  If the obtained group III nitride semiconductor layer includes the c-plane and the diameter-enlarging growth rate-determining surface as exposed surfaces, this can be used as the first group III nitride semiconductor layer. When the c-plane is included as an exposed surface in the obtained group III nitride semiconductor layer, but the diameter-enlarged growth rate-determining surface is not included as the exposed surface, the diameter-enlarged growth-rate-limiting surface is exposed by processing such as polishing. The first group III nitride semiconductor layer can be formed.

  In the first growth step, the second group III nitride semiconductor layer is grown from the c-plane and the diameter-enlarged growth rate-controlling surface of the first group III nitride semiconductor layer. The second group III nitride semiconductor layer corresponds to the first growth region 11 and the second growth region 12 described with reference to FIG.

  In the first growth step, the second group III nitride semiconductor layer is grown under the condition that the growth from the diameter-enlarged growth rate-controlling surface of the first group III nitride semiconductor layer is promoted. Further, the second group III nitride semiconductor layer is grown in a state where the outer peripheral side surface of the first group III nitride semiconductor layer is exposed (a state in which the diameter-enlarging growth rate controlling surface is exposed). Although the growth method is not particularly limited, for example, a group III nitride semiconductor may be grown by a hydride vapor phase growth method using an apparatus having a structure as shown in FIG.

In the present embodiment, the growth temperature, the type of carrier gas (eg, a mixed gas of N ₂ and H _2, a mixed gas of Ar and H ₂ , etc.), the carrier gas flow ratio (eg, N ₂ / (N ₂ + H ₂ )) , Ar / (Ar + H ₂ ), etc.) and the V / III ratio are appropriately adjusted. As shown in the following examples, in order to promote the growth from the {1-102} plane, that is, the angles θ1 and θ2 formed by the first line L ′ and the second line M described above (for example, In order to increase (see FIG. 1), the growth temperature is preferably higher, and the carrier gas flow ratio (eg, N ₂ / (N ₂ + H ₂ ), Ar / (Ar + H ₂ ), etc.) is preferably higher ( That is, it is preferable that the H ₂ ratio in the carrier gas is small), and it is preferable that the V / III ratio is small.

However, it is not always necessary to make all of them preferable as compared with the prior art, and the characteristic state can be obtained by appropriately adjusting the balance of the three elements. For example, even if the growth temperature is set to the level of the prior art, the carrier gas flow rate ratio (eg, N ₂ / (N ₂ + H ₂ ), Ar / (Ar + H ₂ ), etc.) is made sufficiently higher than that of the prior art. In addition or alternatively, the above characteristic state can be obtained if the V / III ratio is made sufficiently smaller than that of the prior art.

That is, in this embodiment, the growth temperature, the type of carrier gas (eg, a mixed gas of N ₂ and H _2, a mixed gas of Ar and H ₂ , etc.), the carrier gas flow ratio (eg, N ₂ / (N ₂ + H) ₂ ), Ar / (Ar + H ₂ ), etc.) and the V / III ratio are appropriately adjusted to obtain a large-diameter group III nitride semiconductor substrate 10 including the above-mentioned characteristic state. The other growth conditions can be the same as those in the prior art.

  Next, another example of the method for manufacturing the group III nitride semiconductor substrate 10 of the present embodiment will be described.

  The manufacturing method of the group III nitride semiconductor substrate 10 of the example has a second growth step.

  In the second growth step, a fourth group III nitride semiconductor layer is grown on the third group III nitride semiconductor layer.

  The third group III nitride semiconductor layer corresponds to, for example, the group III nitride semiconductor layer 13 described with reference to FIG. In other words, the third group III nitride semiconductor layer has the c-plane exposed, but does not have the diameter-enlarged growth-controlling surface as the exposed surface.

  The fourth group III nitride semiconductor layer corresponds to the first growth region 11 and the second growth region 12 described with reference to FIG.

  In the second growth step, after the growth of the group III nitride semiconductor layer having the c-plane and the enlarged-diameter growth-determining surface as the exposed surface (first stage), the growth from the enlarged-diameter growth-determining surface is promoted. By growing a group III nitride semiconductor under the above conditions (second stage), a fourth group III nitride semiconductor layer is generated. Although the growth method is not particularly limited, for example, a group III nitride semiconductor may be grown by a hydride vapor phase growth method using an apparatus having a structure as shown in FIG.

  In the first stage, for example, the group III nitride semiconductor layer is grown under the growth conditions (carrier gas: hydrogen, growth temperature: about 1050 °, V / III ratio: about 15), and the c-plane and aperture expansion growth is performed. A group III nitride semiconductor layer having a rate-limiting surface as an exposed surface can be grown.

  The growth conditions in the second stage, that is, the conditions for promoting the growth from the {1-102} plane are as described above, and thus the description thereof is omitted here. In the second stage, the fourth group III nitride semiconductor layer is grown in a state where the outer peripheral side surface of the group III nitride semiconductor layer is exposed (a state where the diameter-enlarging growth rate controlling surface is exposed).

  According to the method for manufacturing a group III nitride semiconductor substrate of the present embodiment described above, the group III nitride semiconductor substrate 10 of the present embodiment described above can be manufactured.

  A GaN substrate obtained by growing GaN on the (0001) surface of a sapphire substrate and separating the sapphire substrate (circular (2 inches in diameter), {1-102} facet on a part of the outer peripheral surface during the growth process Prepared). Then, organic cleaning and acid cleaning were performed on the GaN substrate. Next, a susceptor made of graphite was prepared, and the GaN (000-1) surface and the susceptor were attached with an adhesive mainly composed of alumina, and the adhesive was dried. Next, the susceptor with the GaN substrate attached was put into an HVPE apparatus, and a GaN layer was grown on the GaN substrate (0001) while the outer peripheral side surface of the GaN substrate was exposed. The growth conditions are as follows.

Comparative Example 1: Growth temperature = 1040 ° C., carrier gas type = H ₂ carrier gas, H ₂ carrier gas flow rate = 15.7 L / min, N ₂ carrier gas flow rate = 0 L / min, Ar carrier gas flow rate = 0 L / min, Carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) = (Ar / (Ar + H ₂ )) = 0, NH ₃ gas flow rate = 3 L / min, HCl gas flow rate on Ga = 0.2 L / min, V / III ratio = 15

Example 1: Growth temperature = 1130 ° C., carrier gas type = H ₂ carrier gas, H ₂ carrier gas flow rate = 15.7 L / min, N ₂ carrier gas flow rate = 0 L / min, Ar carrier gas flow rate = 0 L / min, Carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) = (Ar / (Ar + H ₂ )) = 0, NH ₃ gas flow rate = 3 L / min, HCl gas flow rate on Ga = 0.2 L / min, V / III ratio = 15

Example 2: Growth temperature = 1160 ° C., carrier gas type = H ₂ carrier gas, H ₂ carrier gas flow rate = 15.7 L / min, N ₂ carrier gas flow rate = 0 L / min, Ar carrier gas flow rate = 0 L / min, Carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) = (Ar / (Ar + H ₂ )) = 0, NH ₃ gas flow rate = 3 L / min, HCl gas flow rate on Ga = 0.2 L / min, V / III ratio = 15

Comparative Example 2: Growth temperature = 1030 ° C., carrier gas type = mixed carrier gas of H ₂ and N ₂ , H ₂ carrier gas flow rate = 13.8 L / min, N ₂ carrier gas flow rate = 3.9 L / min, Ar carrier Gas flow rate = 0 L / min, Carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) = 0.22, NH ₃ gas flow rate = 3 L / min, HCl gas flow rate on Ga = 0.2 L / min, V / III ratio = 15

Example 3: Growth temperature = 1030 ° C., carrier gas type = mixed carrier gas of H ₂ and N ₂ , H ₂ carrier gas flow rate = 3.9 L / min, N ₂ carrier gas flow rate = 13.8 L / min, Ar carrier Gas flow rate = 0 L / min, carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) = 0.78, NH ₃ gas flow rate = 3 L / min, HCl gas flow rate on Ga = 0.2 L / min, V / III ratio = 15

Example 4: Growth temperature = 1075 ° C., carrier gas type = mixed carrier gas of H ₂ and N ₂ , H ₂ carrier gas flow rate = 3.9 L / min, N ₂ carrier gas flow rate = 13.8 L / min, Ar carrier Gas flow rate = 0 L / min, carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) = 0.78, NH ₃ gas flow rate = 3 L / min, HCl gas flow rate on Ga = 0.2 L / min, V / III ratio = 15

Example 5: Growth temperature = 1120 ° C., carrier gas type = mixed carrier gas of H ₂ and N ₂ , H ₂ carrier gas flow rate = 3.9 L / min, N ₂ carrier gas flow rate = 13.8 L / min, Ar carrier Gas flow rate = 0 L / min, carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) = 0.78, NH ₃ gas flow rate = 3 L / min, HCl gas flow rate on Ga = 0.2 L / min, V / III ratio = 15

Example 6: Growth temperature = 1030 ° C., carrier gas type = N ₂ carrier gas, H ₂ carrier gas flow rate = 0 L / min, N ₂ carrier gas flow rate = 15.7 L / min, Ar carrier gas flow rate = 0 L / min, Carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) = 1, NH ₃ gas flow rate = 3 L / min, HCl gas flow rate on Ga = 0.2 L / min, V / III ratio = 15

Example 7: Growth temperature = 1075 ° C, carrier gas type = N ₂ carrier gas, H ₂ carrier gas flow rate = 0 L / min, N ₂ carrier gas flow rate = 15.7 L / min, Ar carrier gas flow rate = 0 L / min, Carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) = 1, NH ₃ gas flow rate = 3 L / min, HCl gas flow rate on Ga = 0.2 L / min, V / III ratio = 15

Example 8: Growth temperature = 1120 ° C., carrier gas type = N ₂ carrier gas, H ₂ carrier gas flow rate = 0 L / min, N ₂ carrier gas flow rate = 15.7 L / min, Ar carrier gas flow rate = 0 L / min, Carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) = 1, NH ₃ gas flow rate = 3 L / min, HCl gas flow rate on Ga = 0.2 L / min, V / III ratio = 15

Example 9: Growth temperature = 1030 ° C., carrier gas type = N ₂ carrier gas, H ₂ carrier gas flow rate = 0 L / min, N ₂ carrier gas flow rate = 15.7 L / min, Ar carrier gas flow rate = 0 L / min, Carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) = 1, NH ₃ gas flow rate = 3 L / min, HCl gas flow rate on Ga = 0.5 L / min, V / III ratio = 6

Example 10: Growth temperature = 1030 ° C., carrier gas type = N ₂ carrier gas, H ₂ carrier gas flow rate = 0 L / min, N ₂ carrier gas flow rate = 15.7 L / min, Ar carrier gas flow rate = 0 L / min, Carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) = 1, NH ₃ gas flow rate = 5 L / min, HCl gas flow rate on Ga = 0.5 L / min, V / III ratio = 10

Example 11: Growth temperature = 1030 ° C, carrier gas type = N ₂ carrier gas, H ₂ carrier gas flow rate = 0 L / min, N ₂ carrier gas flow rate = 15.7 L / min, Ar carrier gas flow rate = 0 L / min, Carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) = 1, NH ₃ gas flow rate = 8 L / min, HCl gas flow rate on Ga = 0.5 L / min, V / III ratio = 16

Example 12: Growth temperature = 1030 ° C, carrier gas type = N ₂ carrier gas, H ₂ carrier gas flow rate = 0 L / min, N ₂ carrier gas flow rate = 15.7 L / min, Ar carrier gas flow rate = 0 L / min, Carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) = 1, NH ₃ gas flow rate = 1 L / min, HCl gas flow rate on Ga = 0.2 L / min, V / III ratio = 5

Example 13: Growth temperature = 1030 ° C, carrier gas type = N ₂ carrier gas, H ₂ carrier gas flow rate = 0 L / min, N ₂ carrier gas flow rate = 15.7 L / min, Ar carrier gas flow rate = 0 L / min, Carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) = 1, NH ₃ gas flow rate = 2 L / min, HCl gas flow rate on Ga = 0.2 L / min, V / III ratio = 10

Example 14: Growth temperature = 1030 ° C., carrier gas type = mixed carrier gas of H ₂ and Ar, H ₂ carrier gas flow rate = 13.8 L / min, N ₂ carrier gas flow rate = 0 L / min, Ar carrier gas flow rate = 3.9 L / min, carrier gas flow rate ratio (Ar / (Ar + H ₂ )) = 0.22, NH ₃ gas flow rate = 3 L / min, HCl gas flow rate on Ga = 0.2 L / min, V / III ratio = 15

Example 15: Growth temperature = 1030 ° C., carrier gas type = mixed carrier gas of H ₂ and Ar, H ₂ carrier gas flow rate = 3.9 L / min, N ₂ carrier gas flow rate = 0 L / min, Ar carrier gas flow rate = 13.8 L / min, carrier gas flow rate ratio (Ar / (Ar + H ₂ )) = 0.78, NH ₃ gas flow rate = 3 L / min, HCl gas flow rate on Ga = 0.2 L / min, V / III ratio = 15

Example 16: Growth temperature = 1030 ° C., carrier gas type = Ar carrier gas, H ₂ carrier gas flow rate = 0 L / min, N ₂ carrier gas flow rate = 0 L / min, Ar carrier gas flow rate = 15.7 L / min, carrier Gas flow ratio (Ar / (Ar + H ₂ )) = 1, NH ₃ gas flow rate = 3 L / min, HCl gas flow over Ga = 0.2 L / min, V / III ratio = 15

Example 17: Growth temperature = 1075 ° C., carrier gas type = mixed carrier gas of H ₂ and Ar, H ₂ carrier gas flow rate = 3.9 L / min, N ₂ carrier gas flow rate = 0 L / min, Ar carrier gas flow rate = 13.8 L / min, carrier gas flow rate ratio (Ar / (Ar + H ₂ )) = 0.78, NH ₃ gas flow rate = 3 L / min, HCl gas flow rate on Ga = 0.2 L / min, V / III ratio = 15

  After removing the crystal grown under each growth condition from the susceptor, a {11-20} cross section appears in the crystal in order to observe the growth state of the {1-102} plane forming the facet plane due to the slow growth rate. The cross section near the outer periphery of the crystal was observed with a fluorescence microscope.

  As observation examples, cross-sectional fluorescence microscopic images of the crystal periphery grown in Comparative Example 1 and Example 8 are shown in FIGS. 12 and 13, respectively.

  In the cross-sectional observation of GaN with a fluorescence microscope, the difference between the growth film (first growth region 11 and second growth region 12) and the interface between the GaN substrate (group III nitride semiconductor layer 13) and the impurity concentration due to the growth plane orientation. The bonding surface of the first growth region 11 and the second growth region 12 is observed due to the difference in the emission intensity of visible light generated by the above, and it is possible to determine the growth history of which position is the growth mainly of which growth surface. .

  The broken line indicates the interface (second line M) between the GaN substrate (group III nitride semiconductor layer 13) and the growth film (first growth region 11 and second growth region 12), and the alternate long and short dash line indicates the first growth region 11 and A first line L ′ along the bonding surface of the second growth region 12 is shown.

  A region on the GaN substrate (group III nitride semiconductor layer 13) having a relatively strong visible light emission intensity is the first growth region 11 grown with the (0001) plane as a growth surface, and the visible light emission intensity is relatively weak. The region is the second growth region 12 grown using the {1-102} plane as a growth surface.

  As shown in FIG. 12, in Comparative Example 1, the angle θ formed by the second line M and the first line L ′ is 64 °. On the other hand, as shown in FIG. 13, in Example 8, the angle θ formed by the second line M and the first line L ′ is 123 °.

FIG. 14 shows the second line M and the first line with respect to the carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) and the growth temperature in the test results of Examples 1 to 8 and Comparative Examples 1 and 2. It is the figure which plotted angle (theta) which L 'makes. The horizontal axis represents the carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )), the vertical axis represents the growth temperature, and the angle θ between the second line M and the first line L ′ is described beside each object. ing. In all of Examples 1 to 8 and Comparative Examples 1 and 2, the V / III ratio is 15.

It can be seen from FIG. 14 that the angle θ between the second line M and the first line L ′ increases as the growth temperature increases. Further, it can be seen that the larger the carrier gas flow ratio (N ₂ / (N ₂ + H ₂ )) (the smaller H ₂ ), the larger the angle θ formed by the second line M and the first line L ′. .

  In order to form a wafer by slicing a long bulk crystal of GaN, the angle θ formed by the second line M and the first line L ′ is preferably more than 70 °, more preferably 80 ° or more, and 90 °. The above is more preferable, and it is more preferable that it is larger than 90 °.

The growth condition in which the angle θ formed by the second line M and the first line L ′ is 70 ° or more and the growth condition exceeding 80 ° are indicated by a broken line and an alternate long and short dash line in the drawing, respectively. When the carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) is F and the growth temperature is T (° C.), the following relationship is established.

The growth condition range in which the angle θ formed by the second line M and the first line L ′ is 70 ° or more is:
T ≧ −130F + 1130
It can be expressed as.

The growth condition range in which the angle θ formed by the second line M and the first line L ′ is 80 ° or more is:
T ≧ −130F + 1160
It can be expressed as.

FIG. 19 shows the second line M and the first line L with respect to the carrier gas flow rate ratio (Ar / (Ar + H ₂ )) and the growth temperature of the test results of Examples 1, 2, 14 to 17 and Comparative Example 1. It is the figure which plotted angle (theta) which ′ makes. The horizontal axis represents the carrier gas flow rate ratio (Ar / (Ar + H ₂ )), the vertical axis represents the growth temperature, and the angle θ between the second line M and the first line L ′ is described beside each object. In all of Examples 1, 2, 14 to 17, and Comparative Example 1, the V / III ratio is 15.

From FIG. 19, when the carrier gas is a mixed gas of Ar and H ₂ , as in the case where the carrier gas is a mixed gas of N ₂ and H ₂ (see FIG. 14), the higher the growth temperature, the second line M It can be seen that the angle θ formed with the first line L ′ tends to increase. Further, it can be read that the larger the carrier gas flow rate ratio (Ar / (Ar + H ₂ )) (the smaller the H ₂ ), the greater the angle θ formed by the second line M and the first line L ′.

The growth condition in which the angle θ formed by the second line M and the first line L ′ is 70 ° or more and the growth condition exceeding 80 ° are indicated by a broken line and an alternate long and short dash line in the drawing, respectively. When the carrier gas flow rate ratio (Ar / (Ar + H ₂ )) is G and the growth temperature is T (° C.), the following relationship is established.

The growth condition range in which the angle θ formed by the second line M and the first line L ′ is 70 ° or more is:
T ≧ −464G + 1130
It can be expressed as.

The growth condition range in which the angle θ formed by the second line M and the first line L ′ is 80 ° or more is:
T ≧ −167G + 1160
It can be expressed as.

  The two growth condition ranges of T and F and the two growth condition ranges of T and G are calculated based on measurement data when the V / III ratio is 15. As will be described below with reference to FIG. 15, when the V / III ratio changes, the angle θ formed by the second line M and the first line L ′ changes, so the optimum growth condition range also changes. However, as the V / III ratio decreases, the angle θ formed by the second line M and the first line L ′ tends to increase (see FIG. 15). Therefore, the above four growth condition ranges can be said to be true growth condition ranges when the V / III ratio is 15 or less.

  The two growth condition ranges T and F and the two growth condition ranges T and G are calculated based on measurement data when the HCl gas flow rate on Ga is 0.2 L / min. It is what you did. As will be described below with reference to FIG. 15, when the HCl gas flow rate on Ga changes, the angle θ formed by the second line M and the first line L ′ changes, so that the optimum growth condition range also changes. However, when the HCl gas flow rate on Ga decreases, the angle θ formed by the second line M and the first line L ′ tends to increase (see FIG. 15). Therefore, the above four growth condition ranges can be said to be true growth condition ranges when the HCl gas flow rate on Ga is 0.2 L / min or less.

FIG. 15 is a graph plotting the angle θ formed by the second line M and the first line L ′ with respect to the V / III ratio for the test results of Example 6 and Examples 9 to 13. In all of Examples 6 and 9 to 13, the growth temperature is 1030 ° C. and the carrier gas flow rate ratio (N ₂ / (N ₂ + H ₂ )) is 1. In Examples 6, 12 and 13 indicated by squares in the figure, the HCl gas flow rate on Ga is 0.2 L / min. In Examples 9, 10, and 11 indicated by circles in the figure, the HCl gas flow rate on Ga is 0.5 L / min.

  From FIG. 15, it can be seen that the smaller the V / III ratio, the greater the angle θ formed by the second line M and the first line L ′ (the effect of maintaining and expanding the diameter increases). If the V / III ratio is about 20 or less, it can be seen that a state is obtained in which the angle θ formed by the second line M and the first line L ′ is 70 ° or more. It can also be seen that the angle θ formed by the second line M and the first line L ′ increases when the raw material supply amount (raw material supply partial pressure) is reduced even at the same V / III ratio. .

From FIG. 15, the growth condition range in which the angle θ formed by the second line M and the first line L ′ is 70 ° or more is “GaCl partial pressure is 2.1 × 10 ³ Pa or less, and The V / III ratio is 16 or less ". This growth condition is calculated based on measurement data when the carrier gas type is N ₂ (F = 1) and the growth temperature T is 1030 (° C.). When the carrier gas type and the growth temperature change, the angle θ formed by the second line M and the first line L ′ changes as shown in FIG. 14, and the optimum growth condition range also changes. However, as shown in FIG. 14, as the growth temperature T increases, the angle θ formed by the second line M and the first line L ′ tends to increase. Therefore, the growth condition range can be said to be a true growth condition range when the carrier gas type is N ₂ (F = 1) and the growth temperature T is 1030 (° C.) or higher.

As described above, in order to increase the angle θ formed by the first line L ′ and the second line M based on the results of FIGS. 14 and 15, the growth temperature is preferably higher, and the carrier gas flow rate ratio (N ₂ It can be seen that / (N ₂ + H ₂ )) is preferably large and the V / III ratio is preferably small. Further, it can be seen that it is better to reduce the raw material supply amount (raw material supply partial pressure).

  According to the above embodiment, it can be seen that the angle θ formed by the first line L ′ and the second line M can be increased to at least about 140 °.

  Moreover, according to the above result, the following can be read. That is, as shown in the results of Comparative Examples 1 and 2, the GaN layer is grown to some extent by growing the GaN layer in a state where the outer peripheral side surface of the GaN substrate is exposed (a state where the diameter-enlarging growth rate-limiting surface is exposed). The angle θ formed with the first line L ′ can be increased. However, unless the growth conditions are optimized, the angle θ formed at most is on the order of 60 °, and it is difficult to increase it further. On the other hand, as shown in the results of Examples 1 to 17, when the outer peripheral side surface of the GaN substrate is exposed (a state in which the diameter-enlarging growth rate-determining surface is exposed) and the growth conditions are optimized, the second line The angle θ formed by M and the first line L ′ can be set to 70 ° or more. That is, a large-diameter group III nitride semiconductor can be formed.

  Further, as shown in the above examples, according to the present embodiment, a group III nitride semiconductor in which the angle θ formed by the second line M and the first line L ′ is greater than 90 ° can be formed. . In this case, as compared with the case where θ is 90 ° or less, many wafers having the same diameter as that of the substrate can be manufactured (only wafers having a diameter equal to or smaller than the substrate diameter can be manufactured at 90 ° or less), and the surface portion of the grown crystal is formed on the substrate. By repeating the reuse, a wafer having the same diameter as the substrate can be manufactured while the dislocation density is continuously reduced (the dislocation density decreases as the thickness of GaN increases). Further, in the GaN substrate production by peeling, the diameter size of the GaN substrate is determined to be equal to or less than the diameter size of the commercially available sapphire substrate, but according to the present embodiment, the diameter size of the obtained GaN substrate is limited to this. Not. Further, since the c-plane is formed above the facet surface where the dislocation density tends to decrease, a region having a low dislocation density can be formed on the c-plane.

10 Group III nitride semiconductor substrate 11 First growth region 12 Second growth region 13 Group III nitride semiconductor layer

Claims (13)

c-plane, and {1-102} plane, {1-101} plane, and {hkil} plane (h, k, i are integers other than 0 satisfying h + k = −i, l is a positive number). A preparatory step of preparing a first group III nitride semiconductor layer having, as an exposed surface, an enlarged-diameter growth rate limiting surface including one;
With the outer peripheral side surface of the first group III nitride semiconductor layer exposed, a second group III nitride is formed from the c-plane of the first group III nitride semiconductor layer and the diameter-enlarging growth rate controlling surface. A first growth step for growing a semiconductor layer,
In the first growth step, the Group III nitride semiconductor substrate is grown by growing the second Group III nitride semiconductor layer on the condition that growth from the diameter-enlarged growth rate-determining surface is promoted. A second growth step of growing a fourth group III nitride semiconductor layer on the third group III nitride semiconductor layer with the outer peripheral side surface of the third group III nitride semiconductor layer exposed; Have
In the second growth step, c-plane, {1-102} plane, {1-101} plane, and {hkil} plane (h, k, i are integers excluding 0 satisfying h + k = −i. L is And a growth promoting rate-determining surface including at least one of the positive number)), and the growth of the group III nitride semiconductor layer having the exposed surface as an exposed surface is promoted. A method of manufacturing a group III nitride semiconductor substrate, wherein the fourth group III nitride semiconductor layer is formed by growing a group III nitride semiconductor layer. In the manufacturing method of the group III nitride semiconductor substrate according to claim 1 or 2,
In the step of growing the group III nitride semiconductor layer under conditions that promote growth from the above-mentioned growth rate control surface, the mixed gas of N ₂ and H ₂ is used as the carrier gas, the growth temperature is T (° C.), and the carrier gas. A manufacturing method of a group III nitride semiconductor substrate in which T and F are set so as to satisfy T ≧ −130F + 1130, where F is a flow ratio (N ₂ / (N ₂ + H ₂ )). In the manufacturing method of the group III nitride semiconductor substrate according to claim 1 or 2,
In the step of growing the group III nitride semiconductor layer under the condition that the growth from the diameter-enlarged growth rate-determining surface is promoted, a mixed gas of Ar and H ₂ is used as the carrier gas, the growth temperature is T (° C.), and the carrier gas flow rate. A group III nitride semiconductor substrate manufacturing method in which T and G are set so as to satisfy T ≧ −464G + 1130, where G is a ratio (Ar / (Ar + H ₂ )). In the manufacturing method of the group III nitride semiconductor substrate according to claim 1 or 2,
In the step of growing the group III nitride semiconductor layer under the condition that the growth from the diameter-enlarged growth rate controlling surface is promoted, the GaCl partial pressure is 2.1 × 10 ³ Pa or less and the V / III ratio is 16 or less. A method for producing a group III nitride semiconductor substrate performed under conditions. In the manufacturing method of the group III nitride semiconductor substrate of any one of Claim 1 to 5,
The second group III nitride semiconductor layer includes:
A first growth region having a (0001) plane as a growth plane, a (0001) plane as a first main plane, and a (000-1) plane as a second main plane;
A second growth region grown in a different direction from the first growth region and in contact with a sidewall of the first growth region,
In any one of the cross sections perpendicular to the first main surface,
A straight line passing through both ends of a line representing the bonding surface between the first growth region and the second growth region appearing in the cross section is defined as a first line, and a line representing the second main surface appearing in the cross section is defined as a second line. In the case of a line, the group III nitride semiconductor substrate manufacturing method in which an angle formed by the first line and the second line is observed to be 70 ° or more and smaller than 180 °. In the manufacturing method of the group III nitride semiconductor substrate according to claim 6,
The angle formed is a method for manufacturing a group III nitride semiconductor substrate larger than 90 °. In the manufacturing method of the group III nitride semiconductor substrate according to claim 6 or 7,
The method for producing a group III nitride semiconductor substrate, wherein the angle formed is 140 ° or less. In the manufacturing method of the group III nitride semiconductor substrate of any one of Claim 6 to 8,
The second growth region has {1-102} plane, {1-101} plane and {hkil} plane (h, k, i are integers excluding 0 satisfying h + k = −i. L is a positive number). A method for producing a group III nitride semiconductor substrate, wherein a growth limiting surface having an enlarged diameter including at least one of them is used as a growth surface. In the manufacturing method of the group III nitride semiconductor substrate according to claim 9,
The method for manufacturing a group III nitride semiconductor substrate, wherein the second growth region has the diameter-enlarged growth rate-controlling surface as an exposed surface. In the manufacturing method of the group III nitride semiconductor substrate according to any one of claims 6 to 10,
The method of manufacturing a group III nitride semiconductor substrate, wherein the first growth region expands in the m-axis direction as it proceeds in the [0001] direction. In the manufacturing method of the group III nitride semiconductor substrate according to any one of claims 6 to 11,
The method of manufacturing a group III nitride semiconductor substrate, wherein the first growth region expands in the a-axis direction as it proceeds in the [0001] direction. In the manufacturing method of the group III nitride semiconductor substrate according to any one of claims 6 to 12,
A method of manufacturing a group III nitride semiconductor substrate, wherein the second growth region surrounds the first growth region continuously or intermittently in plan view.