JP2014179838A - Communication device and program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To achieve band control in the environment of a plurality of CPU cores simultaneously performing transmission processing in a router having a multi-core CPU (Central Processing Unit).SOLUTION: Each CPU core in the multi-core CPU is allocated one-by-one to each communication I/F unit provided in the router. Each CPU core refers to a routing table to identify a communication I/F unit corresponding to the transmission destination of a data block received through the communication I/F unit associated with the self-CPU core, and writes the data block into the transmission queue of the communication I/F unit. During a time until completing writing, the CPU core is made to execute first processing to inhibit the writing into the transmission queue by other CPU cores, and second processing to transmit the data block stored in the transmission queue of the communication I/F unit associated with the self-CPU core while performing band control.

Description

  The present invention relates to a technique for transmitting data to a communication network while performing QoS (Quality of Service).

  QoS refers to a technique for performing transmission control of data blocks such as packets so that necessary communication quality can be obtained according to the type of data communication. There are two types of QoS realization methods: priority control and bandwidth control. FIG. 4 is a diagram for explaining an outline of general QoS. In QoS, data blocks to be transmitted are classified according to the type of data written in each payload part and the type of communication protocol used for each transmission, and queues (hereinafter referred to as class) provided for each class. It is temporarily stored in another queue. The data blocks stored in these class queues are read by the scheduler and sent to the communication network. The above-described priority control and bandwidth control are realized by the data block read control from the class-specific queue. For example, priorities are defined for each class queue, and while data blocks are stored in other class queues with higher priority than that class queue for each class queue, The priority control is realized by not reading the data block. In addition, bandwidth control is realized by setting a target communication rate for each queue for each class and reading data blocks from each class queue so that the actual communication rate becomes a value approximate to the target communication rate. The The communication rate refers to the amount of data transmission per unit time.

  QoS is performed in a communication device that transmits data to a communication network, such as a relay device such as a router or a switching hub, or an information distribution server. For example, when performing QoS in a relay device, it is common to cause the main CPU (Central Processing Unit) of the relay device to execute the above-described classification and data block read control from each class queue. However, when the relay device is connected to a large number of communication networks, a class-specific queue for each communication interface connected to each communication network (hereinafter, a plurality of class-specific queues provided for one communication interface unit). The queue is collectively referred to as “transmission queue”), and it is necessary to control the writing of data blocks to the transmission queue and the reading of data blocks from the transmission queue for each communication interface. For this reason, depending on the number of communication interfaces provided in the relay device and the number of queues for each class constituting each transmission queue, the processing load on the main CPU of the relay device becomes excessively high, resulting in throughput (data transferable per unit time). There is a risk that the amount will decrease. As an example of a technique for avoiding such a decrease in throughput, a technique disclosed in Patent Document 1 can be cited. In the technique disclosed in Patent Literature 1, a dedicated controller that writes data blocks to each transmission queue and reads data blocks from each transmission queue is provided separately from the main CPU, thereby avoiding a decrease in throughput. .

JP 2010-226275 A

  As in the technique disclosed in Patent Document 1, in an aspect in which a dedicated controller for writing data blocks to each transmission queue and reading data blocks from each transmission queue is provided, the cost of the relay device increases and the market competitiveness is increased. There is a problem of incurring a decline. In order to prevent a reduction in throughput while suppressing an extreme increase in cost, it is conceivable to use a multi-core CPU as the main CPU of the relay apparatus. A multi-core CPU is configured by enclosing a plurality of CPU cores (a semiconductor integrated circuit including an arithmetic circuit and an L1 cache) and a bus interface and an L2 cache shared by the plurality of CPU cores in one processor package. Refers to the CPU. With such a multi-core CPU, it is possible to avoid a decrease in throughput by causing each of a plurality of CPU cores to perform relay processing of data blocks (and queue control associated therewith) in parallel. This is because an increase in cost can be suppressed to a low level as compared with a mode in which a dedicated controller for queue control is provided.

  However, even if a multi-core CPU is used as the main CPU of the relay apparatus, the expected effect may not be obtained. Hereinafter, the reason will be described taking the case of performing bandwidth control as QoS as an example. When a multi-core CPU is used as the main CPU of the relay device and the relay control of the data block and the associated queue control are performed independently for each CPU core, a plurality of CPU cores simultaneously transmit packets via one communication interface unit. An event such as trying to occur may occur. When performing bandwidth control, it is necessary to calculate an actual communication rate for each communication interface, and in order to correctly calculate the actual communication rate, a plurality of CPU cores are used for one communication interface unit. However, it is necessary to perform exclusive control so that transmission processing and the like are not performed at the same time. For this reason, even when a multi-core CPU is used as the main CPU of the relay device, when QoS is performed, processing waits due to exclusive control frequently occur, and the original performance of the multi-core CPU cannot be exhibited.

  The present invention has been made in view of the above problems, and in a communication apparatus equipped with a multi-core CPU, a technique for realizing QoS while suppressing a decrease in throughput in an environment where a plurality of CPU cores perform transmission processing simultaneously. The purpose is to provide.

  In order to solve the above problems, the present invention provides a plurality of communication interface units, a transmission queue provided for each communication interface, a plurality of CPU cores associated with each of the plurality of communication interface units, Each of the plurality of CPU cores specifies a communication interface unit corresponding to the transmission destination when transmitting the data block to which the header including the transmission destination address is assigned, and transmits the transmission queue of the communication interface unit. The first process for prohibiting the writing of the data block to the transmission queue by another CPU core and the transmission of the communication interface unit associated with itself until the writing of the data block is completed. The data block stored in the queue is transferred via the communication interface unit while performing QoS. A communications device, characterized in that to perform the second process of signal, the.

  In the communication apparatus of the present invention, enqueue to the transmission queue by another CPU core is prohibited (that is, exclusive control is executed) only during the writing of the data block to the transmission queue (hereinafter referred to as “enqueue”). When the data block is read from the transmission queue (hereinafter referred to as “dequeue”), exclusive control is not performed. For this reason, compared with the case where exclusive control is performed both in the enqueue and dequeue to the transmission queue, the waiting time due to exclusive control is reduced, and a reduction in throughput due to performing exclusive control can be suppressed. In addition, in the communication device of the present invention, only the CPU core associated with each communication interface unit transmits data using the communication interface unit, which may cause problems in communication rate calculation and priority control. Absent. That is, according to the present invention, it is possible to perform QoS while suppressing a decrease in throughput in an environment in which a plurality of CPU cores perform transmission processing simultaneously in a communication device equipped with a multi-core CPU. As another aspect of the present invention, an aspect of providing a program that causes a computer (CPU core) to execute the first process and the second process is also conceivable.

  As a more preferable aspect, the processing load of each CPU core (for example, the average value of the CPU usage rate per unit time, the average value of the number of drive tasks, etc.) is measured. A mode in which the communication device is provided with changing means for changing the correspondence between the CPU core and the communication interface unit so as to be associated with the communication interface unit, and a more preferable mode is a traffic of communication performed via the communication interface unit ( For example, the total data transmission amount of each class per unit time) is measured for each communication interface, and a CPU core with a heavy processing load is associated with a communication interface with less traffic so that the CPU core and the communication interface unit are associated with each other. A mode for causing the changing means to execute the process of changing the association is considered. . According to these aspects, it is possible to avoid a large variation in the processing load of each CPU core.

  Specific examples of the communication device include a relay device such as a router and a switching hub, and an information distribution device (information distribution server) that distributes information in response to a request message transmitted from a client. When the communication device is a relay device, the communication device generally includes a storage unit in which a table in which information for associating a destination of the received data block with a plurality of communication interface units is written is stored. For example, if the communication device is a router, the table is a so-called routing table, and if the communication device is a switching hub, the table is a so-called MAC (Media Access Control) address table. Therefore, when the communication device is a relay device, the first process is executed with the data block received via any one of the plurality of communication interface units as the data block to be transmitted. In this case, each CPU core may be caused to execute processing for identifying the communication interface unit corresponding to the transmission destination of the data block to be transmitted with reference to the stored contents of the table. Further, when the communication device is an information distribution device, the communication interface unit that has received the request message transmits the data block to be transmitted (that is, the data block in which the data requested to be transmitted by the request message is written in the payload unit) The first processing may be executed by each CPU core as a communication interface unit corresponding to the transmission destination.

  When the processing capability of each CPU core is sufficiently high, exclusive control is executed even when dequeuing from the transmission queue (that is, transmission of the communication interface unit associated with itself in the second processing) (When the data block stored in the queue is read, each CPU core executes a process of prohibiting writing of data packets to the transmission queue by other CPU cores until the reading is completed) Conceivable. If the processing capacity of each CPU core is sufficiently high, the processing time required for enqueuing to the transmission queue and the processing time required for dequeuing from the transmission queue will be sufficiently short, and exclusive control will be performed for both enqueuing and dequeuing to the transmission queue. This is because even if it is performed, the throughput is not significantly reduced. However, even if exclusive control is performed both in the enqueue to the transmission queue and in the dequeue from the transmission queue, there is no particular effect as compared to the mode in which exclusive control is performed only when enqueuing to the transmission queue. In addition, it is inevitable that the throughput is reduced by the amount of exclusion waiting when dequeuing from the transmission queue. Therefore, an aspect in which exclusive control is performed only at the time of enqueuing to the transmission queue is sufficient.

It is a figure which shows the structural example of the relay apparatus 10 of one Embodiment of this invention. It is a figure for demonstrating the mounting aspect of a queue. FIG. 6 is a diagram for explaining the operation of the relay device 10. It is a figure for demonstrating QoS.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a diagram illustrating a configuration example of a relay device 10 according to an embodiment of a communication device of the present invention.
The relay device 10 is a so-called router. The router refers to a communication device that performs relay control of data blocks (that is, packets) that are transmitted and received according to a communication protocol of the third layer (that is, the network layer) in an OSI (Open Systems Interconnection) reference model. As shown in FIG. 1, the relay device 10 includes a control unit 100, a communication interface (hereinafter abbreviated as “I / F”) unit 120-n (n = 1 to 4), a storage unit 130, and between these components. A bus 140 that mediates the exchange of data is included.

  The control unit 100 is a main CPU of the relay device 10. The control unit 100 is a so-called multi-core CPU, and has a plurality of CPU cores that share a cache memory (not shown in FIG. 1). As shown in FIG. 1, the control unit 100 according to the present embodiment has four CPU cores (CPU cores 110-1, 110-2, 110-3, and 110-4). Each of the CPU cores 110-n (n = 1 to 4) performs packet relay control by executing the relay control program 134 c stored in the storage unit 130.

  Each of the communication I / F units 120-n (n = 1 to 4) is a NIC (Network Interface Card), for example, and is connected to a different communication network. Each of the communication I / F units 120-n (n = 1 to 4) includes a queue (hereinafter referred to as a reception queue) in which packets received from the communication network of the connection destination are stored in the order of reception, and the communication network. A transmission queue in which packets to be transmitted are stored for each class (as described above, a transmission queue composed of a plurality of class-specific queues) is associated. Furthermore, in this embodiment, the CPU core 110-n is associated with the communication I / F unit 120-n. The reason why the CPU core 110-n is associated with the communication I / F unit 120-n will be clarified later.

  As shown in FIG. 1, the storage unit 130 includes a volatile storage unit 132 and a nonvolatile storage unit 134. The volatile storage unit 132 is, for example, a RAM (Random Access Memory), and is used by each of the CPU cores 110-n (n = 1 to 4) as a work area when executing the relay control program 134c. The volatile storage unit 132 functions as a reception queue 132a-n of the communication I / F unit 120-n and also functions as a transmission queue 132b-n of the communication I / F unit 120-n. As a specific mode of realization of each class queue and reception queue 132a-n constituting the transmission queue 132b-n, a unidirectional list having the structure shown in FIG. 2 is used. It is possible to add an entry (data set consisting of data and a pointer indicating the storage address of subsequent data) to the data, read the data from the first entry at the time of dequeuing, and delete the first entry from the list. It is done.

  The nonvolatile storage unit 134 is configured by, for example, a flash memory or a hard disk. In the nonvolatile storage unit 134, a transmission destination management table 134a, a class classification table 134b, and a relay control program 134c are stored in advance. The transmission destination management table 134a is a so-called routing table, and data to be transmitted from the communication I / F unit 120-n in association with identifiers indicating the communication I / F units 120-n (n = 1 to 4). Information indicating a packet (information indicating a transmission destination address or a range of transmission destination addresses) is stored in advance. The class classification table 134b is a table for classifying packets received via the communication I / F unit 120-n, and indicates the relationship between the classification index (for example, the protocol type) and the class to be classified. Information is stored in advance.

  The relay control program 134c is a program for causing each of the CPU cores 110-n (n = 1 to 4) to perform packet relay control based on the transmission destination address. The relay control program 134c is read into the volatile storage unit 132 by the control unit 100 when the power supply (not shown in FIG. 1) of the relay device 10 is turned on. Similarly, the transmission destination management table 134a and the class classification table 134b are also read out to the volatile storage unit 132 by the control unit 110 when the relay device 10 is turned on. The relay control program 134c read to the volatile storage unit 132 is executed independently by each of the CPU cores 110-n (n = 1 to 4). The CPU core 110-n operating according to the relay control program 134c executes two types of processing, that is, enqueue processing to the transmission queue 132b-n and dequeue processing from the transmission queue 132b-n.

  The enqueue process is executed periodically at predetermined time intervals or whenever a packet is written to the reception queue 132a-n of the communication I / F unit 120-n associated with the CPU core 110-n. It is processing. In this enqueue process, the CPU core 110-n reads the oldest packet stored in the reception queue 132a-n (packet stored in the first entry in the list structure shown in FIG. 2), The communication I / F unit 120-k that should transmit the packet is identified with reference to the stored contents of the transmission destination management table 134a, and the class of the packet is determined with reference to the class classification table 134b. Next, the CPU core 110-n writes the packet to the corresponding class queue in the transmission queue 132b-k of the communication I / F unit 120-k and waits until the writing is completed. Exclusive control is performed to prohibit writing of packets to the class-specific queue by m (m ≠ n).

  For example, as shown in FIG. 3A, when the CPU core 110-1 enqueues the packet P1 in a certain class queue in the transmission queue 132b-3, the CPU core 110-2 enters the same class queue. When enqueueing the packet P2, the operation of the CPU core 110-2 is blocked until the enqueue processing of the CPU core 110-1 is completed. This is to prevent inconsistency that two packets are registered at the end of one class-specific queue as shown in FIG. It should be noted that existing QoS may be used for packet class discrimination and classification, and well-known techniques such as semaphores may be used for exclusive control.

  The dequeue process is also executed periodically at predetermined time intervals or whenever a packet is written to the transmission queue 132b-n of the communication I / F unit 120-n associated with the CPU core 110-n. It is processing. In this dequeue process, the CPU core 110-n reads the packets stored in the queues for each class constituting the transmission queue 132b-n so that the actual communication rate becomes a value approximate to the target communication rate. Are read out while adjusting, and transmitted via the communication I / F unit 120-n (that is, transmitted while performing bandwidth control).

  It should be noted here that in the relay device 10 according to the present embodiment, each CPU core 110-m (m ≠ n) performs the class-specific processing only during the writing of the packet to the class-specific queue of the transmission queue 132b-k. The exclusive control for prohibiting the writing of the packet to the queue is executed by the CPU 110-n, and the exclusive control is not performed when the packet is dequeued from the transmission queue 132b-n. In the present embodiment, only the CPU core 110-n associated with each communication I / F unit 120-n dequeues packets from the transmission queue 132b-n of the communication I / F unit 120. For this reason, a plurality of CPU cores 110-n do not simultaneously perform dequeue processing on one class-by-class queue, and it is not necessary to perform exclusive control in the dequeue processing.

  As described above, in the relay device 10 of the present embodiment, exclusive control is performed only when enqueuing the transmission queue. The processing with the highest load in QoS is transmission rate calculation at the time of dequeuing. However, in this embodiment, it is not necessary to perform exclusive control when performing the processing, so that a reduction in throughput can be suppressed. In addition, in this embodiment, only the CPU core 110-n associated with each communication I / F unit 120-n transmits data using the communication I / F unit 120-n. There is no problem in calculating the communication rate.

  In the exclusive control of the database in the multi-user environment, while the data is being written to the database, the exclusive control for prohibiting the update of the data by others is performed, and the reading of the data is also prohibited. It is common to be done. This avoids the occurrence of so-called dirty reads (reading before the data being updated is committed, and then when the update process rolls back, incorrect data is presented to the user as a result). It is to do. Compared with exclusive control in a general database, in the enqueue processing of this embodiment, the point that dequeuing from the transmission queue that writes packets in the enqueue processing is not prohibited causes some problem. The question of whether or not there may arise.

  However, in the enqueue processing of this embodiment, packets are added to the end of the transmission queue (more precisely, any class-specific queue included in the transmission queue). No updates are made. Unlike database access, rollback of enqueue processing is not performed. For this reason, in this embodiment, a problem such as dirty read does not occur even if dequeuing from the transmission queue in which packets are written in the enqueue process is not prohibited. Further, in the enqueue process of the present embodiment, there is one class-specific queue serving as a packet write destination, and so-called deadlock does not occur even if no special measures are taken during exclusive control.

  As described above, according to the present embodiment, in the relay device 10 in which the multi-core CPU is mounted as the control unit 100, each CPU core 110-n performs transmission processing at the same time, while suppressing a decrease in throughput, Control can be performed.

Although one embodiment of the present invention has been described above, it goes without saying that the following modifications may be added to this embodiment.
(1) In the above embodiment, the case of performing bandwidth control as QoS has been described. However, priority control may be performed instead of bandwidth control, or bandwidth control and priority control may be combined. In the above embodiment, the exclusive control in the enqueue process is performed for each class queue. This is to reduce the granularity in the exclusive control as much as possible and prevent frequent exclusion waits. However, exclusive control in the enqueue process may be performed for each transmission queue. Here, exclusive control for each transmission queue means that packet writing is performed while a certain CPU core is writing a packet to any one of a plurality of class-specific queues constituting the transmission queue. This means that packet writing by other CPU cores is prohibited even if the previous class queue is different. If exclusive control in enqueue processing is performed in units of transmission queues, there is a higher possibility that exclusive waiting will occur compared to the above embodiment, but exclusive control is simplified and resources required for exclusive control (for example, semaphores) In the case where exclusive control is performed using the semaphore, there is an advantage that the storage capacity for storing the semaphore value is small.

(2) Although the relay device 10 of the above embodiment has four communication I / F units and four CPU cores associated with each communication I / F unit, one relay device. The number of communication I / F units included in 10 may be two, three, or five or more, and the number of CPU cores included in the relay apparatus 10 is two, three, or five or more. There may be. In the above-described embodiment, the communication I / F unit 120-n and the CPU core 110-n are associated one-to-one. However, when viewed from the communication I / F unit 120-n, one CPU core 110-n is associated. It is sufficient that n is associated with each other, and one CPU core 110-n may be associated with a plurality of communication I / F units 120-n. As long as one predetermined CPU core 110-n is always in charge of dequeuing from one transmission queue, there is no problem in the calculation of the communication rate, and even if exclusive control is not performed in the dequeue process, there is no particular problem. This is because no problem occurs. Therefore, the number of communication I / F units provided in the relay apparatus 10 and the number of CPU cores do not have to be the same, and the latter may be smaller than the former. In the above-described embodiment, each CPU core 110-n is caused to perform enqueue processing for the packets stored in the reception queue 132a-n of the communication I / F unit 120 associated with the CPU core 110-n. Of course, the enqueue process may be performed on the packets stored in the reception queue. That is, the reception queue that is the packet reading destination in the enqueue processing and the transmission queue that is the packet writing destination in the enqueue processing may be associated with different communication I / F units.

(3) In the above embodiment, the correspondence between the communication I / F unit 120-n and the CPU core 110-n is fixed. However, the processing load of each CPU core 110-n is measured, and the CPU with a light processing load The core 110-n executes a process of dynamically changing the association between the CPU core 110-n and the communication I / F unit 120-n so as to be associated with many communication I / F units 120-n. A changing unit (for example, a control unit separate from the control unit 100) may be provided in the relay apparatus 10, and any of the plurality of CPU cores 110-n included in the control unit 100 may function as the changing unit. good. In addition, a process for measuring the traffic of communication performed via the communication I / F unit 120-n for each communication I / F unit 120-n and a CPU core with a heavy processing load, a communication I / F unit with less traffic A process for dynamically changing the association between the CPU core 110-n and the communication I / F unit 120-n so as to be associated with 120 may be executed by the changing unit.

(4) In the above embodiment, an application example to a router having a multi-core CPU having a plurality of CPU cores as a main CPU (control unit 100) has been described. However, of course, the present invention may be applied to a router having a plurality of single core CPUs each having one CPU core and functioning the plurality of single core CPUs as main CPUs. Of course, the present invention may be applied to a switching hub (that is, a relay device that relays data communication in the second layer (data link layer) in the OSI reference model) instead of the router. In this case, a frame, which is a data transmission / reception unit in the data link layer, becomes a data block of a processing unit in enqueue processing and dequeue processing. Further, the present invention may be applied to an information distribution apparatus that distributes various types of information in response to a request message transmitted from a client apparatus via a communication network, instead of a relay apparatus such as a router or a switching hub.

  In short, any communication device including a plurality of communication interface units, a transmission queue provided for each communication interface, and a plurality of CPU cores associated with each of the plurality of communication interface units. When transmitting a data block to which a header including a transmission destination address is assigned to each of the plurality of CPU cores, a communication interface unit corresponding to the transmission destination is specified, and the transmission queue of the communication interface unit The first process for prohibiting the writing of the data block to the transmission queue by another CPU core and the transmission queue of the communication interface unit associated with the data block until the writing of the data block is completed. The stored data block is transmitted via the communication interface unit while performing QoS. And processing, by the execution, the same effect as the above embodiment are achieved.

(5) In the above embodiment, each of the CPU cores 110-n (n = 1 to 4) has a relay control process (enqueue processing to the transmission queue 132b-n and transmission queue 132b-n) that clearly shows the characteristics of the present invention. The relay control program 134c for executing the dequeuing process from the non-volatile storage unit 134 is stored in advance. However, the relay control program 134c may be distributed by writing it on a computer-readable recording medium such as a CD-ROM (Compact Disk-Read Only Memory), or by downloading via a telecommunication line such as the Internet. May be.

  DESCRIPTION OF SYMBOLS 10 ... Relay apparatus, 100 ... Control part, 110-n (n = 1-4) ... CPU core, 120-n (n = 1-4) ... Communication I / F part, 130 ... Memory | storage part, 132 ... Volatility Storage unit, 132a-n (n = 1 to 4) ... Reception queue, 132b-n ... Transmission queue, 134 ... Non-volatile storage unit, 134a ... Destination management table, 134b ... Class classification table, 134c ... Relay control program, 140 ... Bus.

Claims (5)

A plurality of communication interface units;
A transmission queue provided for each communication interface;
A plurality of CPU cores associated one by one with each of the plurality of communication interface units,
Each of the plurality of CPU cores
When transmitting a data block to which a header including a transmission destination address is assigned, the communication interface unit corresponding to the transmission destination is specified, the data block is written to the transmission queue of the communication interface unit, and the writing is completed In the meantime, a first process for prohibiting writing of a data block to the transmission queue by another CPU core,
And a second process of transmitting the data block stored in the transmission queue of the communication interface unit associated with itself through the communication interface unit while performing QoS. .   The processing load of each CPU core is measured, and the CPU core having a lighter processing load further includes a changing unit that changes the association between the CPU core and the communication interface unit so as to be associated with more communication interfaces. The communication device according to claim 1.   The changing unit measures the traffic of communication performed via the communication interface unit for each communication interface, and the CPU core having a heavy processing load is associated with a communication interface with less traffic so that the CPU core and the communication interface unit The communication apparatus according to claim 2, wherein the association is changed. A storage unit storing a table in which information that associates each of a plurality of communication interface units with a destination address of a data block to which a header including a destination address is assigned is stored;
Each of the plurality of CPU cores executes the first process using a data block received via any of the plurality of communication interface units as a data block to be transmitted, and in the first process, The communication apparatus according to any one of claims 1 to 3, wherein a communication interface unit corresponding to a transmission destination of a data block to be transmitted is specified with reference to a stored content of the table. On the computer,
A plurality of communication interface units connected to the computer when transmitting a data block provided with a header including a transmission destination address, and a plurality of communication interface units each provided with a transmission queue, The communication interface unit corresponding to the transmission destination of the data block to be transmitted is specified, the data block is written to the transmission queue of the corresponding communication interface unit, and until the writing is completed, it is transferred to the transmission queue by another computer. A first process for prohibiting writing of the data block;
A second process of sending a data block stored in the transmission queue of the communication interface unit associated with itself via the communication interface unit while performing QoS;
A program characterized by having executed.

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