JP2014176014A - Phase error estimation method and device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To precisely provide a phase correction value even when a phase error or noise level is large.SOLUTION: In a phase error correction section 9, a signal extraction section 90 extracts a received reference signal GI from received signals; and an error vector calculation section 91 calculates an error vector in a phase error by comparing with a known reference signal to be transmitted. A representative vector calculating section 92 classifies the error vectors into two or more groups based on the frequency and calculates a representative vector of each group. A correction value calculation section 93 calculates a phase correction value of each frequency based on plural representative vectors. A phase correction section 94 corrects phase error in each frequency by using the calculated phase correction value.

Description

  The present disclosure relates to a phase error estimation method and apparatus applied to a wireless communication apparatus.

In a wireless communication system, a carrier frequency error that occurs between a transmitter and a receiver,
And symbol synchronization shift correction. For example, OFDM (Orthogonal Frequency Div
ision Multiplexing) In a wireless communication device that supports a wireless communication system, as a carrier frequency error correction method, after performing coarse frequency correction and coarse symbol synchronization shift correction,
A method of correcting a phase error caused by a residual carrier frequency offset and a residual symbol synchronization shift is employed.

When correcting the residual carrier frequency offset and residual symbol synchronization shift, if the phase error increases, the phase may exceed the range of −π to π [rad]. In this case, -π ~
A discontinuous phase change occurs as a phase error detected in the range of π [rad]. For this reason, the linearity of the phase with respect to the frequency is impaired, and the phase correction value cannot be obtained correctly.

An example of a conventional phase error estimation method is disclosed in Patent Document 1, for example. In this conventional example, when the discriminator does not detect phase discontinuity, the obtained phase error correction value is calculated and phase correction is performed. On the other hand, when phase discontinuity is detected, phase correction is performed using the correction value used immediately before. There is also a method called phase unwrapping that performs phase continuation by adding ± 2π to one phase when the absolute value of the difference between adjacent phases exceeds π. Generally known.

JP 2004-104744 A

In the above conventional example, there is a problem that a correct correction value cannot be obtained in a situation where the phase error or the noise level is large. When the phase error or the noise level is large and, for example, a phase discontinuity occurs in the initial stage, the correct correction value cannot be obtained by the method using the correction value immediately before the conventional example. Even if a correct correction value is obtained in the initial period, if the phase discontinuity continues to occur thereafter, the correction value is not updated, so that it deviates from the correction value to be originally calculated.
In addition, when phase unwrapping processing is used, it may be erroneously determined whether the absolute value of the phase difference exceeds π due to noise included in the received signal. In particular, in the wireless communication standard WiGig (registered trademark, the same applies hereinafter) (Wireless Gigabit) using the millimeter wave band,
Since the requirements for PER (Packet Error Rate) are severe, highly accurate phase error estimation is required.

An object of the present disclosure is to provide a phase error estimation method and apparatus capable of obtaining a highly accurate phase correction value even when the phase error or the noise level is large.

In the phase error estimation method of the present disclosure, the reception unit extracts the specific reference signal from the reception signal that has received the transmission signal having the specific reference signal, and obtains the frequency domain reception reference signal. The received reference signal in the frequency domain and the transmitted reference signal in which the specific reference signal in the transmitted signal is represented in the frequency domain are compared for each frequency to obtain a plurality of error vectors. Dividing into the above groups, obtaining a representative value for each group to obtain a plurality of representative vectors, and based on the plurality of representative vectors, the slope of the phase error and the offset of the phase error in the frequency domain of the received reference signal The phase error corresponding to the frequency is estimated from the slope of the phase error and the offset of the phase error.

The reception method of the present disclosure obtains a phase error corresponding to the frequency by the phase error estimation of the above-described phase error estimation method, and corrects the phase error for the received signal.

The reception method of the present disclosure obtains a phase error corresponding to the frequency by phase error estimation of the above-described phase error estimation method, obtains a phase based on transfer characteristics of a transmission path between the transmitter and the receiver by transmission path estimation, Phase correction is performed by combining the phase error obtained by the phase error estimation and the phase of the transfer characteristic obtained by the transmission path estimation.

The phase error estimation device according to the present disclosure is a signal in which a reception unit extracts a specific reference signal from a reception signal that has received a transmission signal having a specific reference signal, and obtains a reception reference signal in a frequency domain. An extraction unit, an error vector calculation unit that obtains a plurality of error vectors by comparing, for each frequency, a reception reference signal in the frequency domain and a transmission reference signal that represents a specific reference signal in the transmission signal in the frequency domain, and Divide multiple error vectors into two or more groups,
A representative vector calculation unit that obtains a representative value for each group to obtain a plurality of representative vectors, and obtains a phase error slope and a phase error offset in the frequency domain of the received reference signal based on the plurality of representative vectors. A correction value calculation unit that estimates a phase error according to a frequency based on a slope of the phase error and an offset of the phase error.

A receiving apparatus according to the present disclosure includes the above-described phase error estimation apparatus and a phase correction unit that corrects the phase error with respect to a reception signal.

The receiving apparatus according to the present disclosure is obtained by the above-described phase error estimation apparatus, a transmission path estimation unit that obtains a phase based on transmission characteristics of a transmission path between the transmitter and the receiver by transmission path estimation, and the phase error estimation apparatus. And a transmission path correction unit that performs phase correction by combining the phase error and the phase of the transfer characteristic obtained by the transmission path estimation unit.

According to the present disclosure, it is possible to obtain a highly accurate phase correction value even when the phase error or the noise level is large.

A block diagram showing a configuration of a receiving unit of a wireless communication apparatus compatible with WiGig FIG. 3 is a block diagram showing a configuration of a phase error correction unit in the first embodiment. The figure which shows the frequency number used for the spectrum of the reference signal GI in a frequency domain, and error vector calculation The figure which shows the structure of an error vector calculation part The figure which shows the structure of a representative vector calculation part The figure which shows the phase error by the residual carrier frequency offset and the residual symbol synchronization shift | offset | difference in the frequency domain in the case of low SNR. The figure which shows the error vector of a phase error in the case of low SNR Diagram showing representative vector of error vector of phase error Diagram showing phase error between low frequency representative vector and high frequency representative vector The figure which shows the structure of a correction value calculation part Diagram showing the relationship between normal addition and subtraction and loop addition and subtraction Diagram showing the correspondence between each phase and numerical value when the phase of ± π is assigned to a 4-bit value The figure which shows the structure of the determination device of the phase offset calculation part in a correction value calculation part. The figure which shows the structure of the correction value calculation part for every frequency in a correction value calculation part. Diagram showing the configuration of the phase correction unit The figure which shows an example of the phase error estimation result by the phase error correction part of this embodiment The block diagram which shows the structure which applied the phase error correction | amendment part of this embodiment to the receiving part of the radio | wireless communication apparatus corresponding to OFDM. The figure which shows the frequency number which designates the spectrum of the reference signal GI in the frequency domain based on Embodiment 2, and a low frequency domain and a high frequency domain FIG. 9 is a block diagram showing a configuration of a phase error correction unit in the third embodiment. The figure which shows the phase error by the residual carrier frequency offset and the residual symbol synchronization shift | offset | difference in the frequency domain in the case of low SNR. The figure which shows the error vector of a phase error in the case of low SNR Diagram showing representative vector of error vector of phase error The figure which shows the structure of the correction value calculation part in Embodiment 3. FIG. 9 is a block diagram showing a configuration of a correction value calculation unit in the fourth embodiment. FIG. 9 is a block diagram illustrating a configuration of a receiving unit of a wireless communication device in a fifth embodiment FIG. 7 is a block diagram showing a configuration of a phase error correction unit in the fifth embodiment. The figure which shows the structure of the transmission-line correction | amendment part in Embodiment 5. The figure which shows the signal format of WiGig Diagram showing residual carrier frequency offset and residual symbol synchronization shift in frequency domain Diagram showing an example of phase discontinuity in the frequency domain A block diagram showing a configuration of a receiving unit of a wireless communication device using a conventional phase error estimation method

<Background to the content of each embodiment of the present disclosure>
In the present disclosure, for example, an O such as IEEE 802.11a, g, n of the wireless LAN standard is used.
The receiver receives DFT (DFT) such as FDM (Orthogonal Frequency Division Multiplexing) or SC-FDE (Single Carrier Frequency Domain Equalizer) such as WiGig.
iscrete Fourier Transformation and IDFT (Inverse Discrete Fourier Transform)
1) shows an example of a wireless communication apparatus including a

Correction of a phase error caused by a residual carrier frequency offset and a residual symbol synchronization shift that occurs between a transmitter and a receiver in this type of wireless communication apparatus will be described below.

FIG. 1 is a block diagram illustrating a configuration of a receiving unit of a wireless communication apparatus compatible with WiGig.
1 includes an RF (Radio Frequency) processing unit 1 and an ADC (Analog-Digita).
l Converter) unit 2, synchronization detection unit 4, frequency correction unit 5, S / P (serial-parallel) conversion unit 6, DFT unit 7, transmission path correction unit 8, phase error correction unit 9, IDFT unit 10, P / P S (parall
el-serial) converter 11, demodulator 13, and selector 15.

The RF processing unit 1 converts a radio frequency reception signal received by an antenna into a complex baseband signal. The ADC unit 2 samples the baseband signal of the complex signal at a constant period and converts it into a digital complex baseband signal.

The synchronization detection unit 4 detects a known preamble signal (STF described later) for synchronization from the complex baseband signal. The frequency correction unit 5 is a known preamble signal (STF which will be described later).
Is used to calculate the carrier frequency error and correct the coarse carrier frequency offset.
The S / P converter 6 converts the complex baseband signal of the serial signal into a parallel signal. D
The FT unit 7 converts the complex baseband signal in the time domain subjected to the coarse carrier frequency offset correction into a complex signal in the frequency domain after coarse symbol synchronization according to the timing of the preamble signal detected by the synchronization detection unit 4. To do.

The transmission path correction unit 8 corrects a transmission path error between the transmitter and the receiver using a known preamble signal (CEF described later). The selector 15 selects an output signal from the frequency correction unit 5 or the P / S conversion unit 11 and outputs the selected signal to the transmission path correction unit 8. The phase error correction unit 9 corrects a residual phase error caused by a residual carrier frequency offset and a residual symbol synchronization shift using a known reference signal (GI described later).

The IDFT unit 10 converts the frequency domain signal output from the phase error correction unit 9 after the phase error correction into a complex baseband signal in the time domain. The P / S conversion unit 11 includes an IDFT unit 10
The output parallel signal is converted into a serial signal. The demodulator 13 demodulates the digitally modulated signal using the complex baseband signal converted into the time domain by the IDFT unit 10.

FIG. 28 is a diagram illustrating a signal format of WiGig. A signal transmitted in the WiGig wireless communication system starts with STF (Short Training Field), CEF (
Channel Estimation Field), GI (Guard Interval), header (Header),..., Data portion (Data1, Data2,...). Here, ST is used as the preamble signal.
F, CEF.

The STF is a repetition of a known preamble signal used in the synchronization detection unit 4 and the frequency correction unit 5 in FIG. AGC section (not shown) in AGC period from the beginning of STF
The AGC operation is performed, and the coarse carrier frequency offset is calculated by the frequency correction unit 5 in the remaining coarse CFO period. The last one symbol of the STF is a synchronization detection period, and coarse symbol synchronization is performed by the detection of the preamble signal by the synchronization detection unit 4.

CEF is a known preamble signal that is used in the transmission path correction unit 8 of FIG. 1 and is different from the above-described STF.

The header includes information indicating transmission data attributes such as a modulation scheme and the number of transmission symbols. The data part contains the data itself that is to be transmitted. GI is the above STF, C
Different from EF, it is a known reference signal inserted repeatedly at regular intervals in the header and data part. GI is used for phase error estimation (calculation of phase error correction value) in the phase error correction unit 9 of FIG.

Next, the residual carrier frequency offset and the residual symbol synchronization shift corrected by the phase error correction unit 9 will be described. The carrier frequency offset is a carrier frequency used for quadrature modulation of a complex baseband signal in an RF processing unit of a transmitter (not shown);
This is a phase error caused by a slight difference in carrier frequency used for quadrature demodulation in the RF processing unit 1 of the receiver.

The frequency correction unit 5 estimates and corrects the carrier frequency error (coarse carrier frequency offset). However, since the error occurs in the estimation of the carrier frequency offset due to the influence of the signal noise and the carrier phase noise, the phase error is Remains and accumulates. This is the residual carrier frequency offset. Therefore, it is necessary to continuously update the phase error correction value to correct the residual carrier frequency offset.

Residual symbol synchronization shift is caused by the sampling frequency of a DAC (Digital Analog Converter) unit that generates a complex baseband signal in a transmitter (not shown) and the ADC unit 2 of the receiver.
This is a phase error caused by a slight difference in sampling frequency. Due to the sampling frequency error between the transmitter and the receiver, even if the phase error correction is performed in the initial stage, the symbol synchronization error remains and accumulates with time, and the symbol timing error spreads. Therefore, it is necessary to continuously update the phase error correction value to correct the residual symbol synchronization shift.

The DFT unit 7 controls the DFT timing in accordance with the head of the CEF using the preamble signal detected by the synchronization detection unit 4. If symbol timing error spreads, DF
The window synchronization in the T section 7 is shifted.

FIG. 29 is a diagram illustrating a residual carrier frequency offset and a residual symbol synchronization shift in the frequency domain. In FIG. 29, the horizontal axis indicates the frequency, and the vertical axis indicates the phase error from −π to π [
rad]. As shown in the figure, since the phase error has linearity, the offset of the phase error (the average of the phase error at each frequency, that is, the offset amount in the average value of the frequency) is the residual carrier frequency offset, the slope of the phase error (with respect to the frequency). The amount of change in the phase error) represents the residual symbol synchronization shift.

Here, the phase error is a phase difference between the reference signal GI extracted from the received signal and the known reference signal GI to be transmitted. The phase error is y, the frequency is x, the slope of the phase error is a,
If the offset of the phase error is b, the phase error can be expressed by a linear interpolation formula such as the following formula [1].
y = ax + b [1]

The phase error is obtained by performing linear approximation on the phase error measurement values at a plurality of frequencies. For example, LSM (Least Squares Method) is used for the linear approximation. The LSM processing can be realized by using a generally known technique based on approximation.

FIG. 30 is a diagram illustrating an example of occurrence of phase discontinuity in the frequency domain. When the phase error increases, as shown in the example of FIG. 30, the phase (8) changes from π [rad] to −π [rad], and a discontinuous phase change occurs. In this case, the linearity of the phase with respect to the frequency is impaired, and the phase correction value cannot be acquired correctly.

Conventionally, as a countermeasure against the discontinuous phase change, as shown in the aforementioned Patent Document 1,
When phase discontinuity is detected, a method has been used in which phase correction is performed using the correction value used immediately before. FIG. 31 is a block diagram illustrating a configuration of a reception unit of a wireless communication apparatus using a conventional phase error estimation method. In this conventional example, when the discriminator 596 does not detect a phase discontinuity, the correction value of the phase error calculated by the correction value calculation unit 593 is used as the correction value output unit 59.
5 and the phase correction unit 594 performs phase correction. On the other hand, when the discriminator 596 detects a phase discontinuity, the correction value used immediately before the correction value output unit 595 is output to perform phase correction.

In addition, when it is determined that the absolute value of the difference between adjacent phases exceeds π using phase unwrapping processing, phase continuation is performed by adding ± 2π to one phase. There is also a method. In the example of FIG. 30, the unwrapping process for returning the phase is performed by adding + 2π to the phase of (8) by comparing the phases (7) and (8).

In the conventional example, in the method using the previous correction value when the phase discontinuity occurs, for example, when a phase discontinuity occurs in the initial stage, an incorrect correction value is used. Even if a correct correction value is obtained in the initial period, if the phase discontinuity continues to occur thereafter, the correction value is not updated, so that it deviates from the correction value to be originally calculated. In addition, when the phase unwrapping process is used, it may be erroneously determined whether the absolute value of the phase difference exceeds π due to noise included in the received signal.

These problems often occur when the measurement value of the phase error is disturbed in a low SNR (Signal-to-Noise Ratio) situation. For example, in the wireless LAN standard, PER = 10% is a required specification, whereas in WiGig, PER = 1% and the requirement for PER is severe even at a low SNR. In order not to degrade the PER, it is necessary to realize more accurate phase error correction.

In view of the above-described problems, in the present disclosure, even when the phase error or the noise level is large, when a phase discontinuity occurs in the phase error, it is possible to easily determine the phase discontinuity with high accuracy, A phase error estimation method and apparatus capable of obtaining a correction value are provided.

<Embodiment of the Present Disclosure>
Hereinafter, embodiments according to the present disclosure will be described in detail with reference to the drawings. The phase error estimation method and the phase error estimation device according to the present disclosure are realized in the wireless communication device of the embodiment.
In addition, about the figure used in the following description, the same code | symbol is attached | subjected to the same component and the overlapping description is abbreviate | omitted.

(Embodiment 1)
FIG. 2 is a block diagram illustrating a configuration of the phase error correction unit according to the first embodiment of the present disclosure. Here, the configuration and operation of the receiving unit of the wireless communication apparatus corresponding to the WiGig shown in FIG. 1 will be exemplified.

In FIG. 1, an RF processing unit 1 amplifies a radio frequency reception signal received by an antenna, performs quadrature modulation, and converts it into a baseband signal. The baseband signal after quadrature modulation is a complex signal.

The ADC unit 2 samples the signal after quadrature modulation in the RF processing unit 1 at a constant period and converts it into a digital complex baseband signal.

The synchronization detection unit 4 generates a known preamble signal (STF) for synchronization from the complex baseband signal.
) And outputs a timing signal for synchronization. The preamble signal is used for window synchronization of the DFT unit 7, that is, coarse symbol synchronization.

The frequency correction unit 5 calculates a coarse carrier frequency offset as a carrier frequency error using a known preamble signal (STF), and outputs a complex baseband signal with the coarse carrier frequency offset corrected.

The S / P converter 6 is a buffer for operating the DFT unit 7 and converts a complex baseband signal of a serial signal into a parallel signal. The DFT unit 7 corresponds to an example of a time-frequency conversion unit, and performs time-frequency conversion on the complex baseband signal in the time domain in which the coarse carrier frequency offset is corrected according to the STF timing detected by the synchronization detection unit 4. To output a frequency domain complex signal.

The transmission path correction unit 8 uses a known preamble signal (CEF) to calculate the amplitude and phase, which are transfer characteristics of the transmission path between the transmitter and the receiver, and corrects the transmission path error.

The selector 15 selects a signal from the frequency correction unit 5 or the P / S conversion unit 11 and outputs it to the transmission path correction unit 8. Selection of a signal used for transmission path error correction is determined by a designer. If a signal from the frequency correction unit 5 is selected, the correction value can be calculated quickly. If a signal from the P / S conversion unit 11 is selected, it is possible to calculate a correction value in consideration of a generated error between the DFT unit 7 and the IDFT unit 10 generated in circuitization.

The phase error correction unit 9 is a known reference signal (G
I) is used to calculate the residual carrier frequency offset and residual symbol synchronization shift, and correct the phase error due to the residual carrier frequency offset and residual symbol synchronization shift in the frequency domain.

The IDFT unit 10 corresponds to an example of a frequency-time conversion unit, performs frequency-time conversion of the output signal of the phase error correction unit 9, and converts it to a complex baseband signal in the time domain.

The P / S converter 11 converts the parallel signal output from the IDFT unit 10 into a serial signal.

The demodulator 13 demodulates the digitally modulated signal using the complex baseband signal after residual phase error correction converted into the time domain to obtain received data.

In the above configuration, the synchronization detection unit 4, frequency correction unit 5, S / P conversion unit 6, DFT unit 7, transmission path correction unit 8, phase error correction unit 9, IDFT unit 10, P / S conversion unit 11, demodulation unit 13
It can be realized by an information processing circuit including a processor and a memory, and each function can be realized by operating a software program in the processor and executing a predetermined process.

2, the phase error correction unit 9 includes a signal extraction unit 90, an error vector calculation unit 91, a representative vector calculation unit 92, a correction value calculation unit 93, and a phase correction unit 94. Here, the signal extraction unit 90, the error vector calculation unit 91, the representative vector calculation unit 92, and the correction value calculation unit 93 correspond to the phase error estimation unit 95.

In the frequency domain, the signal extraction unit 90 extracts a reference signal (GI) (corresponding to an example of a received reference signal) that is periodically and repeatedly received from the received signal. In the error vector calculation unit 91, a reference signal extracted from the received signal and a known reference signal to be transmitted (
GI) (corresponding to an example of a transmission reference signal), and a plurality of error vectors based on the difference between the two are calculated.

In the representative vector calculation unit 92, the error vector obtained by the error vector calculation unit 91 is
The frequency is divided into two or more groups according to the frequency, and a representative value for each group is calculated. Here, as an example of the representative value, an average value of error vectors in each group is calculated and output. As a method for calculating the average value, a simple vector average may be used, or the average may be calculated by performing predetermined weighting depending on the frequency. As a representative value, other values such as a median value for each group can be used, but a phase error due to a random noise component is added under a low SNR environment assumed in the present embodiment. In this case, it is preferable to use an average value.

The correction value calculation unit 93 calculates a phase correction value for each frequency according to each frequency based on a plurality of representative vectors (vector average values) for each group obtained by the representative vector calculation unit 92. In the phase correction unit 94, using the phase correction value calculated by the correction value calculation unit 93,
Correct the phase error at each frequency.

FIG. 3 is a diagram showing the spectrum of the reference signal GI in the frequency domain and the frequency number used for error vector calculation. In FIG. 3, the horizontal axis indicates the frequency number corresponding to each frequency, and the vertical axis indicates the absolute value of the amplitude of the GI spectrum.

The signal extraction unit 90 extracts the reference signal GI from the received signal, and obtains a spectrum obtained by Fourier transforming the reference signal GI of 64 symbols shown in FIG. Here, the frequency number is WiG
This is a number representing each frequency with 27.5 MHz obtained by dividing 1.76 GHz (-880 MHz to +880 MHz) which is a symbol rate of the ig standard by 64 symbols as one unit.

Of the spectrum in the frequency domain, a spectrum having a particularly large absolute value has high noise resistance and is less affected by phase noise. Therefore, here, as an example, a spectrum of a predetermined number (eight symbols in the illustrated example) having a large absolute value is used as a representative value, and frequency numbers −25 and −22 indicated by black circles in FIG. -10, -7, and 8, 13, 19, 24
Is further extracted.

FIG. 4 is a diagram illustrating a configuration of the error vector calculation unit 91. The error vector calculation unit 91
Complex multipliers 910-00 to 910-07 are provided. Here, in order to calculate the error vector of the reference signal GI for eight frequencies, eight circuits are provided in parallel. In order to calculate the error vector, a complex multiplier 910-00 to 910-07 is used to compare the reference signal extracted from the received signal with the known reference signal to be transmitted.

Each complex multiplier 910-00 to 910-07 has a coefficient re of a known reference signal as a reference.
f00 to ref07 are respectively given, and the values S1-00 to S1-07 of the reference signal GI of each frequency extracted by the signal extraction unit 90 and the coefficients ref00 to ref07 are complex-multiplied for each frequency. Coefficients ref00 to ref07 are conjugate complex numbers of known reference signals, and an error vector S2− with reference signals periodically received by complex multiplication.
00 to S2-07 are obtained. Note that it is possible to make the error vectors uniform in size by adding a weighting factor to the coefficient in advance.

FIG. 5 is a diagram illustrating a configuration of the representative vector calculation unit 92. The representative vector calculation unit 92
Two complex adders 920-L and 920-H are provided. In the representative vector calculation unit 92, the error vectors S2-00 to S2-07 output from the error vector calculation unit 91 are divided into two groups of low frequency and high frequency, and are respectively added by complex adders 920-L and 920-H. Complex addition is performed for each group. Thereby, representative vectors S3L and S3H of two groups of low frequency and high frequency are obtained. Since the representative vector means the average value of each group, it may be divided by the number of inputs of the complex adder. However, since the phase of the representative vector is important, there is no problem as long as it is a positive real number multiple of the average value, and there is no need to remove it.

Here, the behavior of each signal value when the SNR of the received signal is low will be described with reference to FIGS. 6 to 9 show examples of operations in the error vector calculation unit 91 and the representative vector calculation unit 92. FIG.

FIG. 6 is a diagram showing a phase error due to residual carrier frequency offset and residual symbol synchronization shift in the frequency domain in the case of low SNR. In FIG. 6, the horizontal axis indicates the frequency,
The vertical axis represents the phase error in the range of −π to π [rad]. An example of the phase error of each symbol of the received signal calculated by the error vector calculation unit 91 is represented by a black circle.

In FIG. 6, the phases (5), (7), and (8) are due to the fact that the phase error due to the residual carrier frequency offset and the residual symbol synchronization shift has increased, and the phase disturbance due to the low SNR has increased. There is a phase discontinuity. When linear approximation is performed on these discontinuous phases using LSM, the obtained straight line is greatly different from the actual phase error.

FIG. 7 is a diagram showing an error vector of the phase error in the case of the low SNR shown in FIG. FIG.
Represents the error vector on the complex IQ plane. With a predetermined frequency range,
Phases (1) to (4) are grouped into low-frequency vectors, and phases (5) to (8) are grouped into high-frequency vectors.

FIG. 8 is a diagram showing a representative vector of the error vector of the phase error shown in FIG. FIG. 8 shows a representative vector of error vectors on the complex IQ plane as in FIG. The complex adder 920-L of the representative vector calculation unit 92 calculates the low frequency representative vector S3L obtained by the vector average of the error vectors (1) to (4). Further, the complex adder 920-H calculates the high-frequency representative vector S3H obtained by the vector average of the error vectors (5) to (8). To make the figure easier to see, complex adders 920-L, 9
A representative vector is obtained by dividing the output of 20-H by the number of inputs of each complex adder. Thus, by using the vector average operation instead of the phase operation, the error vector (5) to
It can be seen that a good average value is obtained for the high-frequency representative vector S3H of (8).

FIG. 9 is a diagram showing the phase error between the low-frequency representative vector and the high-frequency representative vector shown in FIG. In FIG. 9, the horizontal axis indicates the frequency, and the vertical axis indicates the phase error in the range of −π to π [rad].

As shown in FIG. 9, the phase discontinuity of the phase is determined by the phase errors of the phases (1) to (8) in FIG. 6, and the phase S3PL of the low-frequency representative vector and the phase S3 of the high-frequency representative vector are compared.
A determination error can be reduced by determining based on the two phases of PH. This is because the number of times of determination is reduced by obtaining the representative vector of each group by averaging, and low S
This is because the influence of phase noise on NR is alleviated by averaging.

Next, the configuration and operation of the correction value calculation unit 93 will be described. FIG. 10 shows a correction value calculation unit 9.
FIG. The correction value calculation unit 93 performs vector-phase conversion (vector to phase conversion).
) Sections 930-L and 930-H, a phase inclination calculation section 931, a phase offset calculation section 932, and a correction value calculation section 933 for each frequency. The correction value calculation unit 93 obtains a correction value for the phase error for each frequency from the representative vector obtained by the representative vector calculation unit 92.

In the correction value calculation unit 93, the low-frequency representative vector S3L and the high-frequency representative vector S3H are converted into phases by the vector-phase conversion units 930-L and 930-H, respectively. Vector-phase conversion can be realized by, for example, arctan operation or CORDIC.

Next, the phase gradient calculation unit 931 obtains the phase error gradient S4a from the phase errors of the two representative vectors. The phase inclination calculation unit 931 includes a folding subtracter 9310 and a gain multiplication unit 9311. The folding subtractor 9310 performs folding subtraction on the phases of the two representative vectors, and obtains a phase difference between the phases of the representative vectors in the range of −π to π [rad].

The gain multiplication unit 9311 multiplies a gain that is the reciprocal of an amount (not necessarily an integer) representing the frequency difference between representative vectors by a frequency number. The gain multiplied by the gain multiplier 9311 is, for example, the frequency numbers −25, −22, −10 in the low frequency region selected in FIG.
, Which is the average of −7, and the reciprocal of 1/32 of the difference between 16 which is the average of frequency numbers 8, 13, 19, and 24 in the high frequency region. In this case, the phase difference of the output of the folding subtracter 9310 is multiplied by a gain 1/32. By the gain multiplication, the phase difference of the representative vectors between the groups is divided by the frequency difference, and the phase error gradient S4a is obtained.

Further, the phase offset calculation unit 932 obtains the phase error offset S4b from the phase errors of the two representative vectors. The phase offset calculation unit 932 includes an adder 9320, a gain multiplication unit 9321, a folding adder 9322, a selector 9323, and a determination unit 9324.

Adder 9320 adds the phases of the two representative vectors, and gain multiplier 9321.
Then, the addition result of the adder 9320 is halved. The output of the gain multiplication unit 9321 is input to one input of the selector 9323 as it is, and the value obtained by adding π by the folding adder 9322 is input to the other input of the selector 9323. Judgment device 932
4 determines whether or not there is a phase discontinuity. The selector 9323 outputs one of the inputs as the phase error offset S4b according to the determination result of the determiner 9324. That is, when the determiner 9324 determines that the phase is not discontinuous, the selector 9323.
The output of the gain multiplier 9321 is output as is, and when the determiner 9324 determines that the phase is discontinuous, the selector 9323 outputs a value obtained by shifting the output of the gain multiplier 9321 by π.

The phase discontinuity means that any of the representative vectors includes an excess phase of ± 2π. For this reason, the phase addition result of the representative vector is shifted by π after 1/2 times (−
It is possible to correct the phase discontinuity. Therefore, the phase offset calculation unit 932 can calculate the phase error offset S4b with high accuracy.

Here, the folding subtraction by the folding subtractor 9310 and the folding addition by the folding adder 9322 will be described. Although the folding subtraction and the folding addition have the difference between the sum and the difference, the folding calculation is the same, and therefore will be collectively described as folding addition / subtraction.

FIG. 11 is a diagram showing the relationship between normal addition / subtraction and loopback addition / subtraction. When the addition / subtraction value exceeds the range of ± π, the addition / subtraction is performed by adding an integer multiple of 2π to
It falls within the range of π. In an actual arithmetic circuit, for example, the range of ± π is made to correspond to the range of a signed binary integer ± (2 to the (N−1) th power), and an operation for taking out the lower N bits of the addition / subtraction result is performed easily. realizable.

As a specific example of the loop addition / subtraction, a case where ± π is expressed by 4 bits is illustrated. 4-bit MSB (Most Significant Bit) represents positive and negative, and ± π is expressed by −8 to +7. FIG. 12 is a diagram illustrating a correspondence between each phase and a numerical value when a phase of ± π is assigned to a 4-bit value. As shown in FIG. 12, each phase of −π to π is assigned to an integer value of −8 to +7 in π / 8 steps, and each integer value is expressed in binary. The binary representation of each integer value is 0 →
0000, + 1 → 0001, + 2 → 0010, + 3 → 0011, + 4 → 0100, + 5 →
0101, + 6 → 0110, + 7 → 0111, −8 → 1000, −7 → 1001, −6 →
1010, −5 → 1011, −4 → 1100, −3 → 1101, −2 → 1110, −1 →
1111.

When -1 and -3 are added together, -1 is 1111 in binary representation and -3 is 110.
As shown in the following formula [2], when a normal binary addition is performed, a carry is generated, so that it becomes 11100 and becomes 5 bits. In this example, the lower 4 bits out of the 5 bits are taken out to be 1100, that is, -4, and -4 as the result of the loop addition of -1 and -3.
Get.

When -6 and -3 are added back, the normal addition result is -9, but since it exceeds the range of ± π, the return addition result is +7 from FIG. 11 and FIG. -6 is 1010 in binary representation, and -3 is 1101. As shown in the following formula [3], when normal binary addition is performed, 1011 is obtained as 5 bits. Here, the lower 4 bits are extracted to 011
1, ie, +7 is obtained as a result of the addition of -6 and -3. With such operations,
Even when the addition / subtraction result exceeds the range of ± π, it is possible to realize the folding addition / subtraction to obtain a result obtained by shifting by 2π to be within the range of ± π.

FIG. 13 is a diagram illustrating a configuration of the determination unit 9324 of the phase offset calculation unit 932 in the correction value calculation unit 93. The determiner 9324 includes a subtracter 93240 and an inequality sign determiner 93241a.
, 93241b, and an OR circuit 93242. The subtractor 93240 subtracts the phases S3PL and S3PH of the two representative vectors. The inequality sign determiner 93241a determines whether the subtraction result of the subtractor 93240 is greater than or equal to π, that is, (S3PL−S3PH) ≧ π, and outputs “1” when the determination result is true. The inequality sign determiner 93241b includes a subtractor 93.
If the subtraction result of 240 is smaller than −π, that is, (S3PL−S3PH) <− π is determined. If the determination result is true, “1” is output. In the OR circuit 93242, when two inputs, that is, outputs of any of the inequality sign determiners 93241a and 93241b are “1”, “1”
Is output. The output of the OR circuit 93242 becomes the discontinuity determination value C1.

As a result, the determiner 9324 determines that a phase discontinuity has occurred when the absolute value of the phase difference between the calculated two representative vectors is greater than or equal to π, and sets “1” as the discontinuity determination value C1. "Is output. In the state where the received signal is symbol-synchronized, if there is no phase discontinuity, the phase error does not increase by more than π. Therefore, whether or not a phase discontinuity has occurred due to the influence of phase noise can be determined based on whether or not the absolute value of the phase difference is greater than or equal to π.

FIG. 14 is a diagram illustrating a configuration of the correction value calculation unit 933 for each frequency in the correction value calculation unit 93. The frequency-specific correction value calculation unit 933 obtains the phase correction value for each frequency number from the phase error slope S4a and the phase error offset S4b based on the linearity of the phase error shown in FIG. 29 and Equation [1].

The correction value calculation unit 933 for each frequency includes multipliers 9330-00 to 9330-63 and an adder 9.
331-00 to 9331-63. Here, in order to calculate the correction value for each frequency for 64 frequencies (64 symbols of the original GI), 64 circuits are provided in parallel.

In multipliers 9330-00 to 9330-63, in order to calculate the correction value of the phase error of each frequency number, the coefficient corresponding to each frequency with respect to the phase error gradient S4a obtained by the phase gradient calculation unit 931. Multiply The multiplication coefficients are frequency numbers −32 to +31. Adder 93
31-00 to 9331-63 adds the phase error offset S4b obtained by the phase offset calculation unit 932 to each multiplication result of the multipliers 9330-00 to 9330-63. By these calculations, frequency-specific correction values S5-00 to S5-63 are calculated.

FIG. 15 is a diagram illustrating a configuration of the phase correction unit 94. The phase correction unit 94 includes a phase-vector conversion unit 940-00 to 940-63, and a conjugate conversion (conj) unit 941-.
00 to 941-63, and complex multipliers 942-00 to 942-63. Here, 64
In order to correct the residual symbol synchronization shift with respect to the frequency (for 64 symbols of the original GI), 64 circuits are provided in parallel.

In the phase-vector conversion units 940-00 to 940-63, the phase error correction values (frequency correction values) S5-00 to S5-63 obtained by the correction value calculation unit 93 are converted into complex vectors. Convert. The conjugate conversion units 941-00 to 941-63 convert the complex vector of the correction value for each frequency into a conjugate complex number. In the complex multipliers 942-00 to 942-63, the frequency domain received signals S0-00 to S0-63 after the transmission line error correction by the transmission line correction unit 8 is multiplied by the conjugate complex vector of the correction value for each frequency. To do. As a result, the phase of the received signal is reversed, the phase error is corrected, and corrected signals S6-00 to S6-63 are obtained. The phase-vector conversion can be realized by, for example, tan calculation or CORDIC.

The phase correction unit 94 is not limited to the configuration that multiplies the conjugate complex vector of the correction value for each frequency. For example, the phase correction unit 94 has various configurations such as a configuration that rotates the phase using a gain multiplication unit and a CORDIC unit, and a configuration that performs phase correction using a correction table. Configuration can be applied.

FIG. 16 is a diagram illustrating an example of a phase error estimation result by the phase error correction unit of the present embodiment. In FIG. 16, due to ADC sampling frequency deviation, symbol synchronization deviation is 0. 0, for example.
The simulation result of the symbol estimation error obtained at the time of phase error correction in the case of 2 symbols is shown, and is a diagram comparing the performance of this embodiment and the conventional phase error estimation method.

In the graph of FIG. 16, this embodiment is indicated by “従 来” and the conventional example is indicated by “×”, and the error becomes smaller as the point indicating the value of the symbol estimation error becomes lower in the figure, and highly accurate correction is possible. In particular, it can be seen that, particularly when the CNR is as low as 2 dB or less, the symbol estimation error is significantly smaller than that of the conventional example.

In the above-described embodiment, an example has been described in which a total of eight frequencies are used, four each for obtaining the low-frequency representative vector and the high-frequency representative vector. On the other hand, in the example of FIG. 16, in order to use more effective measurement values, a total of 16 each of 8 in the low frequency region and the high frequency region are used.
The simulation result in the case of using individual frequencies is shown.

As described above, in the present embodiment, a specific reference signal (reference signal GI) that is periodically and repeatedly transmitted is used to specify a specific signal from among the received signals converted into the frequency domain by the phase error correction unit 9. A reference signal (reference signal GI) is extracted and compared with a specific reference signal to be transmitted, thereby calculating an error vector of a phase error in the frequency domain. Then, the plurality of error vectors are divided into two or more error vector groups, a representative value of the error vector is calculated for each group, a representative vector is calculated, and the slope and offset of the phase error are calculated based on the plurality of representative vectors. calculate. Then, a phase error correction value for each frequency is calculated, and phase error correction for each frequency is performed. When obtaining the representative vector, it is sufficient that the number of error vectors for calculating the representative value in each group is at least two and the number of groups to be divided is at least two, and the phase error can be calculated based on at least four values.

For example, the slope of the phase error is obtained from the phase difference between the plurality of representative vectors, and the phase error offset is obtained from the sum of the phases of the plurality of representative vectors. However, when calculating the phase error offset, the phase discontinuity is determined based on the phase difference between the representative vectors. If the phase is discontinuous, the result of the operation is calculated by adding π to the sum of the phases of the representative vectors. Falls within the range of ± π, and this is set as a phase error offset.

Thereby, even when a phase discontinuity occurs in the phase error, the phase discontinuity can be easily and accurately determined, and a highly accurate phase correction value can be obtained every time. Therefore, high-accuracy phase correction values can be obtained even in low SNR situations, and high-accuracy phase error correction can be realized, and even with low SNR, there is a high demand for PER, for example, wireless communication systems that perform high-speed transmission such as WiGig It is.

(Application example of Embodiment 1)
FIG. 17 is a block diagram illustrating a configuration in which the phase error correction unit of the present embodiment is applied to a reception unit of a wireless communication apparatus that supports OFDM. The wireless communication apparatus shown in FIG.
, ADC unit 102, synchronization detection unit 104, frequency correction unit 105, S / P conversion unit 106, DF
A T unit 107, a transmission path correction unit 108, a phase error correction unit 109, and a demodulation unit 113 are included.

Compared with the configuration of the wireless communication apparatus corresponding to WiGig in FIG. 1, the wireless communication apparatus corresponding to OFDM in FIG. 17 demodulates a signal in the frequency domain without an IDFT unit, and the reference signal has a specific time. The difference is that it is a pilot carrier assigned to a specific frequency, not a GI assigned to. Other configurations and operations are the same as those of the wireless communication apparatus of FIG.

In this way, even in a wireless communication device that supports OFDM, by applying the phase error correction unit of the present embodiment, a highly accurate phase correction value can be obtained even when the phase error or noise level is large, Highly accurate phase error correction can be realized.

(Embodiment 2)
FIG. 18 is a diagram illustrating a spectrum of the reference signal GI in the frequency domain according to Embodiment 2 of the present disclosure, and frequency numbers that specify the low frequency domain and the high frequency domain.

The second embodiment is an example in which the number of extracted phase errors used for error vector calculation is changed. As shown in FIG. 18, the signal extraction unit 90 extracts all signals in the frequency domain, calculates an error vector in the error vector calculation unit 91, and then divides the signal into a high frequency region and a low frequency region in the representative vector calculation unit 92. The representative vectors S3L and S3H are calculated respectively.

However, in the error vector calculation unit 91, the magnitude of the coefficient ref used for the calculation is determined as G
When the spectrum of I is large, the weight is increased, and when the spectrum of GI is small, the weight is decreased, and weighting is performed for each frequency according to the magnitude of the absolute value of the spectrum.
As a result, noise is suppressed in the representative vector obtained by combining the error vectors in the representative vector calculation unit 92.

In this case, in the correction value calculation unit 93, the gain multiplication unit 9311 of the phase inclination calculation unit 931.
Thus, when calculating the frequency number corresponding to the representative vector, the frequency averaged in each frequency region is weighted according to the magnitude of the GI spectrum.

In this way, a phase correction value with higher accuracy can be obtained by extracting a number of frequency domain signals to obtain a phase error.

(Embodiment 3)
FIG. 19 is a block diagram illustrating a configuration of the phase error correction unit according to the third embodiment of the present disclosure. The third embodiment is an example in which the grouping of the frequency region for calculating the representative vector is changed, and the representative vectors of the three groups of the low frequency region, the medium frequency region, and the high frequency region are obtained.

The phase error correction unit 9 includes three groups corresponding to three groups of a low frequency region, a medium frequency region and a high frequency region.
A representative vector calculating unit 92A that calculates three representative vectors and a correction value calculating unit 93A that calculates correction values from the three representative vectors are included. Other configurations and operations are the same as those of the phase error correction unit of the first embodiment shown in FIG.

An operation example of the representative vector calculation unit 92A in the third embodiment when the SNR of the received signal is low will be described with reference to FIGS.

FIG. 20 is a diagram illustrating a phase error due to a residual carrier frequency offset and a residual symbol synchronization shift in the frequency domain in the case of a low SNR. In FIG. 20, the horizontal axis indicates the frequency, and the vertical axis indicates the phase error in the range of −π to π [rad]. Error vector calculation unit 91
An example of the phase error of each symbol of the received signal calculated at is represented by a black circle. In this example,
The low frequency region is defined as phases (1) to (3), the intermediate frequency region is defined as phases (4) to (5), and the high frequency region is defined as phases (6) to (8). The value of the phase error at each frequency is the same as that in the first embodiment shown in FIG.

FIG. 21 is a diagram showing an error vector of the phase error in the case of the low SNR shown in FIG.
FIG. 21 shows the error vector on the complex IQ plane. Phases (1)-(3) are grouped into low-frequency vectors, phases (4)-(5) are grouped into medium-frequency vectors, and phases (6)-(8) are grouped into high-frequency vectors according to a predetermined frequency range. ing.

FIG. 22 is a diagram showing a representative vector of the error vector of the phase error shown in FIG. The representative vector calculation unit 92A calculates the low frequency representative vector S3L by the vector average of the error vectors (1) to (3), and calculates the medium frequency representative vector S3M by the vector average of the error vectors (4) to (5). The high frequency representative vector S3H is calculated by the vector average of the error vectors (6) to (8).

FIG. 23 is a diagram showing a configuration of the correction value calculation unit 93A in the third embodiment. The correction value calculation unit 93A includes vector-phase conversion units 930-L, 930-M, and 930-H, phase inclination calculation units 931-LM and 931-MH, phase offset calculation units 932-LM and 932-MH,
A phase gradient average unit 934, a phase offset average unit 935, and a correction value calculation unit 933 for each frequency are included.

In the correction value calculation unit 93A, the vector-phase conversion unit 930-L generates the low-frequency representative vector S3L, the vector-phase conversion unit 930-M generates the medium-frequency representative vector S3M, and the vector-phase conversion unit 930-H displays the high-frequency representative vector S3L. Each vector S3H is converted into a phase.

Next, the phase gradient calculation unit 931-LM calculates the gradient of the phase error between the low frequency and the medium frequency from the phase error of the representative vectors S3L and S3M, and the phase gradient calculation unit 931-MH calculates the phase error of the representative vectors S3M and S3H. The slope of the phase error between the medium frequency and the high frequency is calculated. The phase gradient calculation units 931-LM and 931-MH are the phase gradient calculation unit 9 of the first embodiment.
31.

Then, the phase gradient averaging unit 934 calculates the average of the gradients of the two phase errors between the low frequency and the medium frequency and between the medium frequency and the high frequency, and obtains the phase error gradient S4a. The phase gradient averaging unit 934 includes an adder 9340 and a gain multiplication unit 9341. The adder 9340 adds the slopes of phase errors between two different frequency regions, and the gain multiplier 9341 adds the adder 93.
The average calculation of the slope of the phase error is performed by multiplying the addition result of 40 by 1/2. The output of the phase gradient averaging unit 934 is a phase error gradient S4a obtained from three representative vectors of the low frequency region, the medium frequency region, and the high frequency region.

Further, the phase offset calculation unit 932-LM calculates the phase error offset at the low frequency and the middle frequency from the phase error of the representative vectors S3L and S3M, and the phase offset calculation unit 932-LM.
From MH, phase error offsets at low and medium frequencies are calculated from the phase errors of representative vectors S3M and S3H. The phase offset calculation units 932-LM and 932-MH are the same as the phase offset calculation unit 932 of the first embodiment.

Then, the phase offset averaging unit 935 calculates the average of the offsets of the two phase errors of low frequency and medium frequency, medium frequency and high frequency, and obtains the phase error offset S4b. The phase offset averaging unit 935 is the same as the phase offset calculation unit 932 of the first embodiment,
An adder 9350, a gain multiplier 9351, a folding adder 9352, a selector 9353,
It has a determiner 9354.

That is, the phase offset averaging unit 935 has an adder 9350 and a gain multiplication unit 935.
The average calculation of the phase error offset is performed by 1, and the determination unit 9354 determines whether or not there is a phase discontinuity. When it is determined that the phase is not discontinuous, the output of the gain multiplier 9351 is output as it is from the selector 9353, and when it is determined that the phase is discontinuous, the output of the gain multiplier 9351 is shifted by π from the selector 9353. Output the value. The output of the phase offset averaging unit 935 is a phase error offset S4b obtained from three representative vectors of a low frequency region, a medium frequency region, and a high frequency region.

The correction value calculation unit 933 for each frequency is the same as that of the first embodiment, and from the linearity of the phase error,
A phase correction value for each frequency number is obtained from the phase error slope S4a and the phase error offset S4b.

As described above, in the third embodiment, the error vector is divided into three error vector groups, that is, the low frequency region, the medium frequency region, and the high frequency region, and a representative vector of the error vector is calculated for each group. Calculate the slope and offset. Thus, as in the first embodiment, a highly accurate phase correction value can be obtained even in a low SNR situation, and a highly accurate phase error correction can be realized.

It should be noted that the phase error correction value can also be calculated in the same manner as described above when calculating the representative vector for each group and calculating the slope and offset of the phase error divided into four or more groups.

(Embodiment 4)
FIG. 24 is a block diagram illustrating a configuration of a correction value calculation unit according to Embodiment 4 of the present disclosure. The fourth embodiment is a modification of the correction value calculation unit 93A in the third embodiment described above.
In the fourth embodiment, an example in which LSM is used to calculate the slope and offset of a phase error will be described.

The correction value calculation unit 93A of the fourth embodiment includes vector-phase conversion units 930-L and 930-M.
930-H, Phase Unwrapping section 938, LSM approximation section 939
And a correction value calculation unit 933 for each frequency.

In the vector-phase conversion units 930-L, 930-M, and 930-H, vector-phase conversion of the low-frequency representative vector S3L, the medium-frequency representative vector S3M, and the high-frequency representative vector S3H is performed, and the phase error of each representative vector is calculated. Ask.

The phase unwrapping unit 938 performs a phase unwrapping process on the phase error of each representative vector, adds an appropriate integer multiple of 2π as necessary, returns the phase, and calculates the absolute value of adjacent phase differences. Does not exceed π. Phase unwrapping (Phas
e Unwrapping) processing can be realized by using a generally known technique based on phase calculation.

The LSM approximation unit 939 performs linear approximation by LSM processing, and calculates a phase error gradient S4a and a phase error offset S4b from the phase error of each representative vector having continuity. The LSM processing can be realized by using a generally known technique based on approximation. The frequency-specific correction value calculation unit 933 obtains a phase correction value for each frequency number from the phase error slope S4a and the phase error offset S4b based on the linearity of the phase error.

Thus, a phase correction value with high accuracy can be obtained from the three representative vectors even by a method using LSM.

(Embodiment 5)
FIG. 25 is a block diagram illustrating a configuration of the reception unit of the wireless communication device according to the fifth embodiment of the present disclosure. In the wireless communication apparatus of the fifth embodiment, the configuration of the WiGig compatible wireless communication apparatus shown in FIG. 1 is partially changed, and the function of the phase correction unit 94 of the phase error correction unit 9 is unified with the transmission path correction unit 8. It is a structural example.

The wireless communication apparatus of the fifth embodiment divides the function of the phase error correction unit 9 into a phase error estimation unit 95 and a phase correction unit 94, and instead of the phase error correction unit 9, a phase error estimation unit 95 and a phase correction A transmission path correction unit 8A having the function of the unit 94.

FIG. 26 is a block diagram showing the configuration of the phase error correction unit in the fifth embodiment. The phase error estimation unit 95 connected between the transmission path correction unit 8A and the IDFT unit 10 is a signal extraction unit 9.
0, an error vector calculation unit 91, a representative vector calculation unit 92, and a correction value calculation unit 93. That is, the phase error estimation unit 95 is the same as the phase correction unit 9 in the phase error correction unit 9 shown in FIG.
This is a configuration excluding 4. Since the configuration and operation of each part are the same as those in the first embodiment, description thereof is omitted. The phase correction value of each frequency calculated by the phase error estimation unit 95 is the transmission path correction unit 8A.
Is input.

FIG. 27 is a diagram illustrating a configuration of the transmission path correction unit 8A in the fifth embodiment. The transmission path correction unit 8A calculates the amplitude and phase, which are transfer characteristics of the transmission path between the transmitter and the receiver,
Correct the transmission path error. In the transmission path correction unit 8A, the phase component obtained by the phase error estimation unit 95 can be corrected together with the phase of the transmission characteristic of the transmission path, so that the number of correction circuits is reduced. This embodiment is a method of performing phase error correction by feedback, unlike the phase error correction by feedforward shown in FIG.

The transmission path correction unit 8A includes a transmission path estimation unit 80, multipliers 81-00 to 81-63, and a rotator 82.
-00 to 82-63, folding adders 83-00 to 83-63, flip-flop circuits 84-00 to 84-63 with enable, and folding adders 85-00 to 85-63. Here, in order to correct the amplitude and phase for 64 frequencies (for 64 symbols of the original GI), 64 circuits are provided in parallel.

In the transmission path correction unit 8A, the amplitude correction value and the phase correction value obtained by the transmission path estimation unit 80 are used to synthesize the phase correction value of each frequency calculated by the phase error estimation unit 95 while performing phase error correction. Amplitude correction and phase correction related to transmission path characteristics are executed.

The transmission path estimation unit 80 performs transmission path estimation using the output signal of the frequency correction unit 5 or the P / S conversion unit 11, and an amplitude correction value corresponding to the transfer characteristics of the transmission path between the transmitter and the receiver. And a phase correction value is calculated.

Multipliers 81-00 to 81-63 multiply the frequency domain received signals S0-00 to S0-63 output from the DFT unit 7 by the amplitude correction value obtained by the transmission path estimation unit 80,
Perform amplitude correction. Further, in the rotators 82-00 to 82-63, the multipliers 81-00 to 81-
With respect to the output of 63, the phase is rotated by the integrated phase correction value output from the folding adder 85-00 to 85-63 to perform phase correction.

At this time, the folding adders 83-00 to 83-63 use the phase error correction values (phase error estimation outputs) S5-00 to S5-63 for each frequency output from the phase error estimation unit 95 as flip-flop circuits. It adds back to the output of 84-00 to 84-63. In the flip-flop circuits 84-00 to 84-63 with enable, the enable terminals hold the outputs of the folding adders 83-00 to 83-63 at a high level timing. The flip-flop circuits 84-00 to 84-63 are enabled at the timing when the GI reception signal is input.

These folding adders 83-00 to 83-63 and flip-flop circuit 84-00
To 84-63 to obtain a phase error correction value S5-00 obtained from the phase error estimator 95.
Each time S5-63 changes, the phase is accumulated. The change in phase error occurs when the received signal contains GI.

In the folding adders 85-00 to 85-63, flip-flop circuits 84-00 to 84-84.
The output of −63 and the phase correction value obtained by the transmission path estimation unit 80 are added back. As a result, the accumulated result of the phase error and the phase correction value based on the transmission path estimation are combined, and the rotator 82-
The phase correction is performed by inputting to 00-82-63.

As described above, in the fifth embodiment, the correction circuit can be reduced and the circuit scale can be reduced by unifying the phase correction unit for phase error correction and the phase correction unit for transmission path correction.
As in the first embodiment, a highly accurate phase correction value can be obtained even in a low SNR situation.
Highly accurate phase error correction can be realized.

While various embodiments have been described above with reference to the drawings, it goes without saying that the present disclosure is not limited to such examples. It will be apparent to those skilled in the art that various changes and modifications can be made within the scope of the claims, and these are naturally within the technical scope of the present disclosure. Understood. In addition, each component in the above embodiment may be arbitrarily combined within a scope that does not depart from the spirit of the disclosure.

In each of the above-described embodiments, the present disclosure has been described by taking as an example the case where the present disclosure is configured using hardware. However, the present disclosure can also be realized by software in cooperation with hardware.

Each functional block used in the description of each of the above embodiments is typically an integrated circuit L.
Realized as SI. These may be individually made into one chip, or may be made into one chip so as to include a part or all of each functional block. The name used here is LSI, but it may also be called IC, system LSI, super LSI, or ultra LSI depending on the degree of integration.

Further, the method of circuit integration is not limited to LSI, and may be realized using a dedicated circuit or a general-purpose processor. FPGA (Field that can be programmed after LSI manufacturing)
(Programmable Gate Array) or a reconfigurable processor in which connection and setting of circuit cells inside the LSI can be reconfigured.

Furthermore, if integrated circuit technology comes out to replace LSI's as a result of the advancement of semiconductor technology or a derivative other technology, it is naturally also possible to carry out function block integration using another technology. Biotechnology can be applied.

Note that the present disclosure can be expressed as a phase error correction method executed in a wireless communication device. The present disclosure can also be expressed as a phase error correction device as a device having a function of executing the phase error correction method, or a program for operating the phase error correction method or the phase error correction device by a computer. . That is, the present disclosure can be expressed in any category of an apparatus, a method, and a program.

The present disclosure has an effect that a highly accurate phase correction value can be obtained even when a phase error or a noise level is large. For example, as a phase error correction method and apparatus applied to a wireless communication apparatus that performs high-speed transmission. Useful.

DESCRIPTION OF SYMBOLS 1 RF processing part 2 ADC part 4 Synchronization detection part 5 Frequency correction part 6 S / P conversion part 7 DFT part 8, 8A Transmission path correction part 80 Transmission path estimation part 81-00 to 81-63 Multiplier 82-00 to 82 -63 Rotator 83-00 to 83-63 Folding adder 84-00 to 84-63 Flip-flop circuit 85-00 to 85-63 Folding adder 9 Phase error correction unit 90 Signal extraction unit 91 Error vector calculation unit 910- 00 to 910-07 Complex multiplier 92 Representative vector calculation unit 920-L, 920-H Complex adder 93 Correction value calculation unit 930-L, 930-H, 930-M Vector-phase conversion unit 931, 931-LM, 931-MH phase inclination calculation unit 9310 folding subtractor 9311 gain multiplication unit 932, 932-LM, 932-MH phase offset calculation unit 9320 Adder 9321 Gain multiplier 9322 Fold adder 9323 Selector 9324 Determinator 93240 Adder 93241a, 93241b Unequal sign determiner 93242 OR circuit 933 Frequency-specific correction value calculator 9330-00 to 9330-63 Multiplier 9331-00 to 9331- 63 Adder 934 Phase inclination averaging unit 9340 Adder 9341 Gain multiplication unit 935 Phase offset averaging unit 9350 Adder 9351 Gain multiplication unit 9352 Folding adder 9353 Selector 9354 Determinator 938 Phase unwrapping unit 939 LSM approximation unit 94 Phase correction unit 940 -00 to 940-63 Phase-vector conversion unit 941-00 to 941-63 Conjugate conversion unit 942-00 to 942-63 Complex multiplier 95 Phase error estimation unit 10 IDFT 11 P / S conversion unit 13 demodulating section 15 selector

Claims (15)

In the reception unit, from the reception signal that has received the transmission signal having the specific reference signal, the specific reference signal is extracted to obtain the frequency domain reception reference signal,
A plurality of error vectors are obtained by comparing, for each frequency, a reception reference signal in the frequency domain and a transmission reference signal that represents a specific reference signal in the transmission signal in the frequency domain,
Dividing the plurality of error vectors into two or more groups, obtaining a representative value for each group, and obtaining a plurality of representative vectors;
Based on the plurality of representative vectors, a slope of a phase error and a phase error offset in a frequency domain included in the received reference signal are obtained, and a phase error corresponding to the frequency is determined by the slope of the phase error and the offset of the phase error. A phase error estimation method for estimation. The phase error estimation method according to claim 1,
In the estimation of the phase error, the representative vectors are converted from vectors to phases,
A phase error estimation method, wherein when a phase between the plurality of representative vectors is discontinuous, a predetermined phase value is added or subtracted when obtaining a slope of the phase error and an offset of the phase error. The phase error estimation method according to claim 1,
In the acquisition of the plurality of representative vectors, the group is a phase error estimation method in which the error vectors are grouped by a predetermined number of error vectors that are divided according to the magnitude of frequency and extracted from those having a large amplitude. The phase error estimation method according to claim 1,
In the acquisition of the plurality of representative vectors, a phase error estimation method of obtaining an average value by a vector average of the plurality of error vectors as a representative value for each group. The phase error estimation method according to claim 4,
A phase error estimation method for obtaining the average value by adding the plurality of error vectors in acquiring the plurality of representative vectors. The phase error estimation method according to claim 4,
In obtaining the plurality of representative vectors, using the plurality of error vectors obtained by performing predetermined weighting according to the magnitude of the amplitude of the error vector according to the frequency, the average value is obtained by adding the plurality of error vectors. Error estimation method. The phase error estimation method according to claim 2,
In the estimation of the phase error, when the absolute value of the phase difference between two representative vectors of the plurality of representative vectors is π or more, the phase between the plurality of representative vectors is discontinuous. A phase error estimation method for determining. The phase error estimation method according to claim 1,
In the estimation of the phase error, the representative vectors are converted from vectors to phases,
For the phase of two representative vectors to be the target among the plurality of representative vectors, the phase having a low frequency is phase-subtracted from the phase having a high frequency so that the calculation result falls within a range of ± π.
A phase error estimation method for obtaining a slope of the phase error by dividing by a frequency difference between the two representative vectors. The phase error estimation method according to claim 1,
In the estimation of the phase error, the representative vectors are converted from vectors to phases,
Add the phases of two representative vectors of the plurality of representative vectors to add 1/2
If the phase between the plurality of representative vectors is discontinuous by multiplying the gain by a factor of π, the phase error is calculated by adding π to the gain multiplication result so that the calculation result falls within a range of ± π. A phase error estimation method for obtaining an offset of. The phase error estimation method according to claim 1,
In obtaining the plurality of representative vectors, the group is divided into three or more groups to obtain representative values for each group,
In the estimation of the phase error, the representative vectors are converted from vectors to phases,
A phase error estimation method for obtaining an inclination and an offset of the phase error by performing unwrapping processing on the phase after conversion and performing linear approximation by LSM. A phase error corresponding to a frequency is obtained by phase error estimation of the phase error estimation method according to any one of claims 1 to 10,
A receiving method for correcting the phase error with respect to a received signal. A phase error corresponding to a frequency is obtained by phase error estimation of the phase error estimation method according to any one of claims 1 to 10,
Obtain the phase due to the transmission characteristics of the transmission path between the transmitter and receiver by transmission path estimation,
A reception method for performing phase correction by combining the phase error obtained by the phase error estimation and the phase of the transfer characteristic obtained by the transmission path estimation. In the receiving unit, a signal extracting unit that extracts the specific reference signal from the received signal that has received the transmission signal having the specific reference signal, and obtains the frequency domain received reference signal;
An error vector calculation unit that obtains a plurality of error vectors by comparing, for each frequency, a reception reference signal in the frequency domain and a transmission reference signal that represents a specific reference signal in the transmission signal in the frequency domain;
A representative vector calculation unit that divides the plurality of error vectors into two or more groups, obtains a representative value for each group, and acquires a plurality of representative vectors;
Based on the plurality of representative vectors, a slope of a phase error and a phase error offset in a frequency domain included in the received reference signal are obtained, and a phase error corresponding to the frequency is determined by the slope of the phase error and the offset of the phase error. A correction value calculation unit to be estimated;
A phase error estimation apparatus having: A phase error estimation device according to claim 13;
A phase correction unit for correcting the phase error with respect to the received signal;
A receiving apparatus. A phase error estimation device according to claim 13;
A transmission path estimator for obtaining a phase based on transfer characteristics of a transmission path between the transmitter and the receiver by transmission path estimation;
A transmission path correction unit that performs phase correction by combining the phase error obtained by the phase error estimation device and the phase of the transfer characteristic obtained by the transmission path estimation unit;
A receiving apparatus.

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