CN115174323A - Frequency modulation signal detection method, device, electronic equipment and storage medium - Google Patents

Frequency modulation signal detection method, device, electronic equipment and storage medium Download PDF

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Publication number
CN115174323A
CN115174323A CN202210763959.5A CN202210763959A CN115174323A CN 115174323 A CN115174323 A CN 115174323A CN 202210763959 A CN202210763959 A CN 202210763959A CN 115174323 A CN115174323 A CN 115174323A
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frequency
signal
specified number
rising
calculating
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CN115174323B (en
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马岩
彭吉生
张晓燚
陈家国
刘福华
李德建
甘杰
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Beijing Thinking Semiconductor Technology Co ltd
Beijing Smartchip Microelectronics Technology Co Ltd
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Beijing Thinking Semiconductor Technology Co ltd
Beijing Smartchip Microelectronics Technology Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/0014Carrier regulation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69Spread spectrum techniques
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69Spread spectrum techniques
    • H04B2001/6912Spread spectrum techniques using chirp
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/0014Carrier regulation
    • H04L2027/0024Carrier regulation at the receiver end
    • H04L2027/0026Correction of carrier offset

Abstract

The present disclosure provides a method, an apparatus, an electronic device, and a storage medium for detecting a frequency modulated signal, where the frequency modulated signal includes a signal frame header and a signal frame body, the signal frame header includes a first specified number of frequency-up signals and a second specified number of frequency-down signals, and the signal frame body includes a third specified number of foldback frequency-up signals for carrying a third specified number of modulation data, the method includes: determining the initial position of the signal frame header according to the received first specified number of frequency rising signals; calculating carrier frequency offset according to the received first specified number of frequency rising signals and the second specified number of frequency falling signals; carrying out carrier frequency offset compensation on the received signal frame body according to the carrier frequency offset to obtain a compensated signal frame body; and demodulating the compensated signal frame body to obtain the modulation data, thereby being convenient for realizing the detection and demodulation of the frequency modulation signal with low cost and low complexity.

Description

Frequency modulation signal detection method, device, electronic equipment and storage medium
Technical Field
The present disclosure relates to the field of communications, and in particular, to a method and an apparatus for detecting a frequency modulated signal, an electronic device, and a storage medium.
Background
A Chirp signal is a linearly frequency modulated signal whose amplitude does not modulate data. In the current technical scheme, the receiver simultaneously processes the amplitude data and the phase data, and certain invalid operation exists. For example, vector multiplication and Fast Fourier Transform (FFT) operations are required, which requires a large amount of computation and is not easy to reduce cost and power consumption; the implementation of demodulation by an analog Voltage Controlled Oscillator (VCO) is relatively complicated.
Disclosure of Invention
In order to solve the problems in the related art, embodiments of the present disclosure provide a frequency modulated signal detection method and apparatus, an electronic device, and a storage medium.
In a first aspect, an embodiment of the present disclosure provides a method for detecting a frequency modulated signal, where the frequency modulated signal includes a signal frame header and a signal frame body, the signal frame header includes a first specified number of frequency up signals and a second specified number of frequency down signals, and the signal frame body includes a third specified number of retrace frequency up signals for carrying a third specified number of modulation data, the method includes: determining the initial position of the signal frame header according to the received first specified number of frequency rising signals; calculating carrier frequency offset according to the received first specified number of frequency rising signals and the second specified number of frequency falling signals; carrying out carrier frequency offset compensation on the received signal frame body according to the carrier frequency offset to obtain a compensated signal frame body; and demodulating the compensated signal frame body to obtain the modulation data.
In accordance with an embodiment of the present disclosure, wherein,
the first specified number is 10; and/or
The second specified number is 2.
In accordance with an embodiment of the present disclosure, wherein,
the initial frequency of the retrace frequency rising signal is proportional to the modulation data.
In accordance with an embodiment of the present disclosure, wherein,
the frequency range of the frequency modulation signal is carrier frequency minus 125 kilohertz to carrier frequency plus 125 kilohertz.
In accordance with an embodiment of the present disclosure, wherein,
the determining the starting position of the signal frame header according to the received first specified number of frequency-up signals comprises:
calculating the frequency of the received frequency modulation signal according to the I path part and the Q path part of the received frequency modulation signal, and obtaining the frequency of the received frequency rising signal from the frequency of the received frequency modulation signal;
dividing a third specified number of received frequency-rising signals into a first part and a second part, calculating an average value of a first frequency difference according to the frequency of the first part and the frequency of the first part of the pre-stored frequency-rising signals, and calculating an average value of a second frequency difference according to the frequency of the second part and the frequency of the second part of the pre-stored frequency-rising signals, wherein the third specified number is less than or equal to the first specified number;
calculating the frequency difference minimum value of a third appointed number according to the mean value of the first frequency difference and the mean value of the second frequency difference;
calculating a frequency rising signal minimum frequency difference vector and a frequency rising signal minimum frequency difference vector mean value according to the frequency difference minimum values of the third designated number;
and determining the signal frame header according to the minimum frequency difference vector of the frequency rising signal, the mean value of the minimum frequency difference vector of the frequency rising signal and a specified threshold.
In accordance with an embodiment of the present disclosure, wherein,
calculating the carrier frequency offset according to the received first specified number of frequency rising signals and the second specified number of frequency falling signals comprises:
calculating fractional carrier frequency offset according to the minimum frequency difference vector mean value of the frequency rising signal and a downward integer value of the minimum frequency difference vector mean value of the frequency rising signal;
calculating the integer carrier frequency offset according to the minimum frequency difference vector mean value of the frequency rising signal and the minimum frequency difference vector mean value of the frequency falling signal;
and calculating the carrier frequency offset according to the fractional carrier frequency offset and the integer carrier frequency offset.
In accordance with an embodiment of the present disclosure, wherein,
the demodulating the compensated signal frame body to obtain the modulation data includes:
calculating a frequency difference, a maximum frequency difference and a maximum frequency difference index according to the received turn-back frequency rising signal and a pre-stored frequency rising signal;
calculating demodulation data according to the frequency difference, the maximum frequency difference index and the sampling frequency;
and carrying out rounding operation on the demodulated data to obtain the modulated data.
According to an embodiment of the present disclosure, wherein,
the sampling frequency is obtained by multiplying the symbol rate of the frequency modulated signal by the oversampling number.
In accordance with an embodiment of the present disclosure, wherein,
calculating demodulation data according to the frequency difference, the maximum frequency difference index and the sampling frequency comprises:
under the condition that the maximum frequency difference index is larger than or equal to half of the length of the retrace frequency rising signal, calculating demodulation data according to the first part frequency difference of the retrace frequency rising signal and the sampling frequency; and/or
And calculating demodulation data according to the second partial frequency difference of the retrace frequency rising signal and the sampling frequency under the condition that the maximum frequency difference index is less than half of the length of the retrace frequency rising signal.
In accordance with an embodiment of the present disclosure, wherein,
the first partial frequency difference of the reentrant frequency rising signal comprises: a frequency difference between a first portion of the folded back frequency up signal and a first portion of the frequency up signal; and/or
The second partial frequency difference of the reentrant frequency rising signal comprises: a frequency difference between a second portion of the folded frequency rising signal and a second portion of the frequency rising signal.
In a second aspect, an embodiment of the present disclosure provides a detection apparatus for frequency modulated signals, including:
a signal frame header determining module, configured to determine an initial position of the signal frame header according to the received first specified number of frequency-up signals;
a carrier frequency offset calculation module, configured to calculate a carrier frequency offset according to the received first specified number of frequency-up signals and the second specified number of frequency-down signals;
the carrier frequency offset compensation module is used for carrying out carrier frequency offset compensation on the received signal frame body according to the carrier frequency offset to obtain a compensated signal frame body;
and the demodulation module is used for demodulating the compensated signal frame body to obtain the modulation data.
In a third aspect, the present disclosure provides a chip, where the chip includes the apparatus for detecting a frequency modulation signal according to the second aspect.
In a fourth aspect, the present disclosure provides an electronic device, comprising a memory and a processor, wherein the memory is configured to store one or more computer instructions, and wherein the one or more computer instructions are executed by the processor to implement the method according to the first aspect.
In a fifth aspect, the disclosed embodiments provide a computer-readable storage medium having stored thereon computer instructions which, when executed by a processor, implement the method according to the first aspect.
The technical scheme provided by the embodiment of the disclosure can have the following beneficial effects:
according to the technical scheme provided by the embodiment of the disclosure, the initial position of the signal frame header is determined according to the received first specified number of frequency rising signals, the carrier frequency offset is calculated according to the received first specified number of frequency rising signals and the second specified number of frequency falling signals, the carrier frequency offset compensation is performed on the received signal frame body according to the carrier frequency offset to obtain a compensated signal frame body, the compensated signal frame body is demodulated to obtain the modulation data, and the detection and demodulation of the frequency modulation signal are realized with low cost and low complexity.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
Other features, objects, and advantages of the present disclosure will become more apparent from the following detailed description of non-limiting embodiments when taken in conjunction with the accompanying drawings. In the drawings:
fig. 1 illustrates an exemplary schematic diagram of a frequency modulated signal according to an embodiment of the present disclosure.
Fig. 2 shows a flow chart of a method of frequency modulated signal detection according to an embodiment of the present disclosure.
Fig. 3 shows a flowchart of a method for detecting a frame header of a signal according to an embodiment of the present disclosure.
Fig. 4 shows a flowchart of a carrier frequency offset calculation method according to an embodiment of the present disclosure.
Fig. 5 shows a flow diagram of a demodulation method according to an embodiment of the present disclosure.
Fig. 6 shows a block diagram of a frequency modulated signal detection apparatus according to an embodiment of the present disclosure.
Fig. 7 shows a block diagram of an electronic device according to an embodiment of the present disclosure.
FIG. 8 shows a schematic block diagram of a computer system suitable for use in implementing a method according to an embodiment of the present disclosure.
Detailed Description
Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement them. Also, for the sake of clarity, parts not relevant to the description of the exemplary embodiments are omitted in the drawings.
In the present disclosure, it is to be understood that terms such as "including" or "having," etc., are intended to indicate the presence of labels, numbers, steps, actions, components, parts, or combinations thereof disclosed in the present specification, and are not intended to exclude the possibility that one or more other labels, numbers, steps, actions, components, parts, or combinations thereof are present or added.
It should be further noted that the embodiments and labels in the embodiments of the present disclosure may be combined with each other without conflict. The present disclosure will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.
The Chirp signal is a linear frequency modulated signal with no modulation data in amplitude. In the current technical scheme, the receiver simultaneously processes the amplitude data and the phase data, and certain invalid operation exists. For example, vector multiplication and Fast Fourier Transform (FFT) operations are required, which requires a large amount of computation and is not easy to reduce cost and power consumption; the implementation of demodulation by an analog Voltage Controlled Oscillator (VCO) is relatively complicated.
In order to solve the above problems, the present disclosure provides a frequency modulation signal detection method, apparatus, electronic device, and storage medium.
Fig. 1 illustrates an exemplary schematic diagram of a frequency modulated signal according to an embodiment of the present disclosure.
It will be understood by those of ordinary skill in the art that fig. 1 illustrates a 1-frame frequency modulated signal without limiting the present disclosure.
As shown in fig. 1, the frequency modulated signal of 1 frame includes: a frequency up signal segment, a frequency down signal segment and a signal frame body.
The frequency rising signal segment includes: a first prescribed number of cycles of a frequency up signal, e.g., 10, the frequency down signal segment comprising: for example 2, of a second specified number of cycles. The signal frame body includes: for example, N, third specified number of cycles of the reentrant frequency rising signal. The frequency up signal segment and the frequency down signal segment constitute a signal frame header.
In the disclosed embodiment, the frequency of the frequency up signal rises linearly with time, for example, from "carrier frequency-125 KHz" to "carrier frequency +125KHz".
In the disclosed embodiment, the frequency rising signal can be expressed as:
css_basic_signal_up(m)=exp(j*2*pi*((m^2/2/M/L^2)-(1/2*m/L)))
wherein L is oversampling number and can be an integer not less than 4, SF is spreading factor, and M =2 SF M = 0-L M-1, steps of 1,m ^2 is the square of M, and L ^2 is the square of L.
The frequency of the frequency down signal decreases linearly with time, for example, linearly from "carrier frequency +125KHz" to "carrier frequency-125 KHz".
In the disclosed embodiment, the frequency drop signal can be expressed as:
css_basic_signal_down(m)=exp(-j*2*pi*((m^2/2/M/L^2)-(1/2*m/L)))
wherein, L is oversampling number, and can be an integer not less than 4, SF is spreading factor, and M =2 SF M = 0-L M-1, steps of 1,m ^2 is the square of M, and L ^2 is the square of L.
The sampling frequency is obtained by multiplying the symbol rate of the frequency modulated signal by the oversampling number L.
In the embodiment of the present disclosure, the initial frequencies of the N periods of the retrace frequency rising signals are respectively proportional to the modulation data D1, D2, and the modulation data DN-1, DN. In the turn-back frequency rising signal, the frequency linearly rises from the initial frequency to 'carrier frequency +125 KHz', then is turned back to 'carrier frequency-125 KHz', and linearly rises to the initial frequency.
In the embodiment of the disclosure, for a given symbol modulation value N, N is more than or equal to 0 and less than or equal to M-1, the digital foldback frequency rising signal expression in one period is as follows:
css_basic_signal_reverse(m)=exp(j*2*pi*((m^2/2/M/L^2)-(1/2*m/L)))
m=[L*N:1:L*M-1,0:1:L*N-1]。
in the disclosed embodiment, N is a modulated data value that needs to be transmitted. N may be, for example, 7, or 14.
One of ordinary skill in the art will appreciate that the first, second, and third specified amounts may be other values, and the disclosure is not limited thereto.
In the embodiment of the present disclosure, at the receiver side, the initial position of the signal frame header may be determined by the received frequency-up signal segment, and then the carrier frequency offset may be calculated according to the received frequency-up signal segment and the received frequency-down signal segment. And after carrier frequency offset compensation is carried out on the received signal frame body by using the carrier frequency offset, a compensated signal frame body is obtained. The signal frame body is demodulated to obtain modulated data D1, D2, DN-1, DN.
In the embodiment of the present disclosure, through the design of the frequency increasing signal segment, the frequency decreasing signal segment, and the signal frame body, the complex calculations such as vector multiplication, FFT, etc. can be avoided in the processes of signal frame header detection, carrier frequency offset estimation, and demodulation, thereby simplifying the design and reducing the implementation complexity of the receiver.
In the embodiment of the present disclosure, determining the start position of the signal frame header by the received frequency-up signal segment may be implemented in the following manner.
In the embodiment of the present disclosure, the phase information of the received frequency modulation signal is obtained by solving the inverse tangent atan (Q/I) from the I-path and Q-path data of the received frequency modulation signal, and the phase information is differentiated back and forth to obtain the frequency information, which is denoted by y, i.e., the frequency of the frequency modulation signal. According to the frequency rising characteristic in the frequency y of the frequency modulation signal, the frequency rising signal segment is detected.
Representing the nth frequency rising signal yn in the frequency rising signal segment as a vector yn = [ yn1, yn2], where yn1 is the first portion of yn, yn2 is the second portion of yn, and the lengths of yn1 and yn2 may be the same. The pre-stored frequency up signal upchirp may be expressed as: x = [ x1, x2], x1 being a first fraction of x, x2 being a second fraction of x, x1 and x2 being the same length.
A vector subtraction operation is performed and then the result of the subtraction is averaged:
Delta_disn1=mean(yn1-x1),
Delta_disn2=mean(yn2-x2),
mean () is the averaging operation.
Take the minimum of the two averages for the nth symbol:
Min_dis1=min(Delta_disn1,Delta_disn2)
the latest m (m < N) continuous Min _ dis1 values are taken to form a vector
dis_vect=[Min_dis1(n-m+1),Min_dis1(n-m+2),…Min_dis1(n)]
Continuously sliding the window containing m Min _ dis1, and averaging the vectors dis _ vent to obtain
Mean_dis2_up=mean(dis_vect)
Setting a threshold Th determined by simulation, and if max (dis _ vent-Mean _ dis2_ up) < Th, detecting a signal frame header; otherwise, no signal frame header is detected. Where max () is a maximum value calculation and abs () is an absolute value calculation.
In the embodiment of the present disclosure, after the signal frame header is accurately detected, the frequency drop signal segment and the signal frame body can be obtained from the frequency modulation signal according to the structure of the frequency modulation signal.
In the embodiment of the present disclosure, after detecting the signal frame header, the fractional carrier frequency offset CFO _ frac and the integer carrier frequency offset CFO _ int may be estimated.
CFO_frac=Mean_dis2_up-floor(Mean_dis2_up)
floor () represents a round-down operation.
In this embodiment of the present disclosure, for the frequency down signal segment, the same processing manner as the frequency up signal segment may be adopted to calculate another Mean _ dis2 value, which is denoted as Mean _ dis2_ down, and the integer carrier frequency offset
CFO_int=round((Mean_dis_up+Mean_dis_down)/2)
round () represents a round up operation.
In the disclosed embodiments, the total carrier frequency offset
CFO=CFO_frac+CFO_int
In the embodiment of the present disclosure, carrier frequency offset compensation is performed on the received signal frame body through CFO to obtain a compensated signal frame body, and then the compensated signal frame body is demodulated to obtain modulation data.
Calculating a received return frequency rising signal zn after carrier frequency offset compensation
[Max_val,max_idx]=max(abs(zn-x))
Max _ val is a maximum value calculation, abs () is an absolute value calculation, and the pre-stored frequency rise signal is represented as: x = [ x1, x2], and max _ idx is an index value corresponding to the maximum value.
If Max _ idx is larger than or equal to M/2, calculating the frequency difference yn1-x1 of the first part of the reentry frequency rising signal, calculating Data _ demod1= mean (abs (yn 1-x 1)/freq _ rate),
if Max _ idx < M/2, the second fractional frequency difference yn2-x2 of the reentry frequency rise signal is calculated, and Data _ demod1= mean (abs (yn 2-x 2)/freq _ rate) is calculated.
Calculating demodulation Data _ demod = round (Data _ demod 1)
And changing the value of the Data _ demod into a 2-system value, and performing parallel-serial conversion processing to obtain modulation Data. Where SF is a spreading factor, and freq _ rate is a rate of change with time of the frequency of the foldback frequency rising signal.
In the embodiment of the disclosure, in the processes of the signal frame header detection, the carrier frequency offset estimation and the demodulation, complex calculations such as vector multiplication, FFT and the like are not used, so that the design is simplified, and the implementation complexity of the receiver is reduced.
In the disclosed embodiment, as stated above for fig. 1, the frequency modulated signal of 1 frame includes: a frequency up signal section, a frequency down signal section and a signal frame body.
The frequency up signal segment includes: a first prescribed number of cycles of a frequency up signal, e.g., 10, the frequency down signal segment comprising: for example, a second specified number of cycles of 2. The signal frame body includes: for example, N, third specified number of cycles of the retrace frequency rising signal. The retrace frequency rise signal carries modulation data. The frequency up signal segment and the frequency down signal segment constitute a signal frame header.
In the disclosed embodiment, the fm signal includes a signal frame header and a signal frame body.
According to the embodiment of the disclosure, the signal frame header comprises a first specified number of frequency-up signals and a second specified number of frequency-down signals, the signal frame body comprises a third specified number of foldback frequency-up signals for carrying a third specified number of modulation data, and the frequency-modulated signal comprises the signal frame header and the signal frame body, so that detection and demodulation of the frequency-modulated signal can be realized with low cost and low complexity.
According to the embodiment of the disclosure, the first specified number is 10; and/or the second designated number is2, so that frame header detection and carrier frequency offset estimation are conveniently realized.
In the embodiment of the present disclosure, as described above, the initial frequencies of the N periods of the foldback frequency rising signals are respectively proportional to the modulation data D1, D2, and DN, and are used for carrying the modulation data D1, D2, and DN-1, DN. In the turn-back frequency rising signal, the frequency linearly rises from the initial frequency to 'carrier frequency +125 KHz', then is turned back to 'carrier frequency-125 KHz', and linearly rises to the initial frequency.
According to the embodiment of the disclosure, the initial frequency of the retrace frequency rising signal is in proportion to the modulation data, so that the modulation data is conveniently carried in the retrace frequency rising signal.
According to the embodiment of the present disclosure, the frequency range of the frequency modulation signal is from the carrier frequency minus 125khz to the carrier frequency plus 125khz, so that a good balance is achieved between the bandwidth occupied by the frequency modulation signal and the reliability of detecting the frequency modulation signal.
Fig. 2 shows a flow chart of a method of frequency modulated signal detection according to an embodiment of the present disclosure.
According to an embodiment of the present disclosure, the fm signal includes a signal frame header and a signal frame body, the signal frame header includes a first specified number of frequency-up signals and a second specified number of frequency-down signals, and the signal frame body includes a third specified number of retrace frequency-up signals for carrying a third specified number of modulation data.
As shown in fig. 2, the frequency modulation signal detection method includes: steps S201, S202, S203, S204.
In step S201, a start position of a header of the signal frame is determined according to the received first specified number of frequency-up signals.
In step S202, a carrier frequency offset is calculated according to the received first specified number of frequency-up signals and the second specified number of frequency-down signals.
In step S203, carrier frequency offset compensation is performed on the received signal frame according to the carrier frequency offset, so as to obtain a compensated signal frame.
In step S204, the compensated signal frame is demodulated to obtain the modulation data.
According to the embodiment of the disclosure, the starting position of the signal frame header is determined according to the received first specified number of frequency rising signals; calculating carrier frequency offset according to the received first specified number of frequency rising signals and the second specified number of frequency falling signals; carrying out carrier frequency offset compensation on the received signal frame body according to the carrier frequency offset to obtain a compensated signal frame body; and demodulating the compensated signal frame body to obtain the modulation data, thereby not using complex calculations such as vector multiplication, FFT and the like, simplifying the design, reducing the implementation complexity of a receiver, accurately finishing the synchronization of the signal frame head, the estimation of the carrier frequency offset, the compensation of the carrier frequency offset and the demodulation and obtaining the accurate modulation data.
Fig. 3 shows a flowchart of a method for detecting a frame header of a signal according to an embodiment of the present disclosure.
As shown in fig. 3, the method for detecting a header of a signal frame includes: steps S301, S302, S303, S304, S305.
In step S301, the frequency of the received frequency-converted signal is calculated according to the I-path portion and the Q-path portion of the received frequency-converted signal, and the frequency of the received frequency-up signal is obtained from the frequency of the received frequency-converted signal.
In step S302, a third designated number of received frequency-rising signals are divided into a first portion and a second portion, a mean value of first frequency differences is calculated according to the frequency of the received first portion and the frequency of the first portion of the pre-stored frequency-rising signals, a mean value of second frequency differences is calculated according to the frequency of the received second portion and the frequency of the second portion of the pre-stored frequency-rising signals, and the third designated number is equal to or less than the first designated number.
In step S303, a third specified number of frequency difference minima are calculated based on the mean value of the first frequency difference and the mean value of the second frequency difference.
In step S304, a frequency difference vector of the frequency rising signal and a mean value of the frequency difference vector of the frequency rising signal are calculated according to the third specified number of frequency difference minimum values.
In step S305, the signal frame header is determined according to the minimum frequency difference vector of the frequency-rising signal, the minimum frequency difference vector mean of the frequency-rising signal, and a specified threshold.
In the embodiment of the present disclosure, as described above, in the embodiment of the present disclosure, the phase information of the received frequency modulation signal is obtained by performing inverse tangent atan (Q/I) on the I-path and Q-path data of the received frequency modulation signal, and the phase information is differentiated back and forth to obtain the frequency information, which is represented by y, that is, the frequency of the frequency modulation signal. According to the frequency rising characteristic in the frequency y of the frequency modulation signal, the frequency rising signal segment is detected.
Setting a threshold Th determined by simulation, and if max (dis _ vent-Mean _ dis2_ up) < Th, detecting a signal frame header; otherwise, no signal frame header is detected. Where max () is a maximum value calculation and abs () is an absolute value calculation.
According to the embodiment of the present disclosure, determining the starting position of the header of the signal frame according to the received first specified number of frequency-up signals includes: calculating the frequency of the received frequency modulation signal according to the I path part and the Q path part of the received frequency modulation signal, and obtaining the frequency of the received frequency rising signal from the frequency of the received frequency modulation signal; dividing a third specified number of received frequency rising signals into a first part and a second part, calculating the mean value of a first frequency difference according to the frequency of the first part and the frequency of the first part of the pre-stored frequency rising signals, and calculating the mean value of a second frequency difference according to the frequency of the second part and the frequency of the second part of the pre-stored frequency rising signals, wherein the third specified number is less than or equal to the first specified number; calculating the frequency difference minimum value of a third appointed number according to the mean value of the first frequency difference and the mean value of the second frequency difference; calculating a frequency rising signal minimum frequency difference vector and a frequency rising signal minimum frequency difference vector mean value according to the third specified number of frequency difference minimum values; and determining the signal frame header according to the minimum frequency difference vector of the frequency rising signal, the mean value of the minimum frequency difference vector of the frequency rising signal and a specified threshold, thereby not using complex calculations such as vector multiplication, FFT and the like, simplifying the design, reducing the implementation complexity of a receiver, accurately detecting the signal frame header and carrying out accurate frame synchronization.
Fig. 4 shows a flowchart of a carrier frequency offset calculation method according to an embodiment of the present disclosure.
As shown in fig. 4, the method for calculating carrier frequency offset includes: steps S401, S402, S403.
In step S401, a fractional carrier frequency offset is calculated according to the frequency-up signal minimum frequency difference vector mean value and a downward integer value of the frequency-up signal minimum frequency difference vector mean value.
In step S402, an integer carrier frequency offset is calculated according to the minimum frequency difference vector mean of the frequency-up signal and the minimum frequency difference vector mean of the frequency-down signal.
In step S403, the carrier frequency offset is calculated according to the fractional carrier frequency offset and the integer carrier frequency offset.
In the embodiment of the present disclosure, as described above, after the signal frame header is accurately detected, the frequency drop signal segment and the signal frame body may be obtained from the frequency modulated signal according to the structure of the frequency modulated signal.
In the embodiment of the present disclosure, after detecting the signal frame header, the fractional carrier frequency offset CFO _ frac and the integer carrier frequency offset CFO _ int may be estimated.
In the disclosed embodiments, the total carrier frequency offset
CFO=CFO_frac+CFO_int。
According to an embodiment of the present disclosure, calculating a carrier frequency offset by using the received first and second specified numbers of frequency up signals includes: calculating a fractional carrier frequency offset according to the minimum frequency difference vector mean value of the frequency rising signal and a downward integer value of the minimum frequency difference vector mean value of the frequency rising signal; calculating the integer carrier frequency offset according to the minimum frequency difference vector mean value of the frequency rising signal and the minimum frequency difference vector mean value of the frequency falling signal; and calculating the carrier frequency offset according to the fractional carrier frequency offset and the integer carrier frequency offset, so that complex calculation such as vector multiplication, FFT and the like is not used, the design is simplified, the implementation complexity of a receiver is reduced, the carrier frequency offset is accurately calculated, the carrier frequency offset is favorably and accurately compensated, and the modulation data is conveniently and accurately demodulated.
Fig. 5 shows a flow diagram of a demodulation method according to an embodiment of the present disclosure.
As shown in fig. 5, the demodulation method includes: steps S501, S502, S503.
In step S501, a frequency difference, a maximum frequency difference, and a maximum frequency difference index are calculated from the received folded frequency rising signal and the pre-stored frequency rising signal.
In step S502, demodulation data is calculated according to the frequency difference, the maximum frequency difference index, and the sampling frequency.
In step S503, a rounding operation is performed on the demodulated data to obtain the modulated data.
As described above, in the embodiment of the present disclosure, carrier frequency offset compensation is performed on the received signal frame body through CFO to obtain a compensated signal frame body, and then the compensated signal frame body is demodulated to obtain modulation data.
Calculating a received return frequency rising signal zn after carrier frequency offset compensation
[Max_val,max_idx]=max(abs(zn-x))
Where Max _ val is the maximum value calculation, abs () is the absolute value calculation, and the pre-stored frequency rise signal is represented as: x = [ x1, x2], and max _ idx is an index value corresponding to the maximum value.
If Max _ idx is larger than or equal to M/2, calculating the frequency difference yn1-x1 of the first part of the reentry frequency rising signal, and calculating Data _ demod1= mean (abs (yn 1-x 1)/freq _ rate),
if Max _ idx < M/2, the second fractional frequency difference yn2-x2 of the reentry frequency rise signal is calculated, and Data _ demod1= mean (abs (yn 2-x 2)/freq _ rate) is calculated.
Calculating demodulation Data _ demod = round (Data _ demod 1)
And changing the value of the Data _ demod into a 2-system value, and performing parallel-serial conversion processing to obtain modulation Data. Where SF is a spreading factor, and freq _ rate is a rate of change with time of the frequency of the foldback frequency rising signal.
According to an embodiment of the present disclosure, obtaining the modulation data by demodulating the compensated signal frame body includes: calculating a frequency difference, a maximum frequency difference and a maximum frequency difference index according to the received turn-back frequency rising signal and a pre-stored frequency rising signal; calculating demodulation data according to the frequency difference, the maximum frequency difference index and the sampling frequency; and performing rounding operation on the demodulated data to obtain the modulated data, thereby not using complex calculations such as vector multiplication, FFT and the like, simplifying the design, reducing the implementation complexity of a receiver, and accurately demodulating the modulated data.
According to the embodiment of the disclosure, the sampling frequency is obtained by multiplying the symbol rate of the frequency modulation signal by the oversampling number, so that complete information in the received frequency modulation signal is better obtained in an oversampling manner, and the reliability of detection is improved.
According to an embodiment of the present disclosure, calculating demodulation data by indexing and sampling frequency according to the frequency difference, the maximum frequency difference index includes: under the condition that the maximum frequency difference index is larger than or equal to half of the length of the retrace frequency rising signal, calculating demodulation data according to the first part frequency difference of the retrace frequency rising signal and the sampling frequency; and/or under the condition that the maximum frequency difference index is smaller than half of the length of the retrace frequency rising signal, calculating demodulation data according to the second part frequency difference of the retrace frequency rising signal and the sampling frequency, thereby not using complex calculation such as vector multiplication, FFT and the like, simplifying the design, reducing the realization complexity of the receiver and accurately demodulating the modulation data.
According to an embodiment of the present disclosure, the frequency difference of the first part of the up signal by the folding back frequency includes: a frequency difference between a first portion of the folded frequency rising signal and a first portion of the frequency rising signal; and/or the second partial frequency difference of the reentry frequency rise signal comprises: and the frequency difference between the second part of the reentrant frequency rising signal and the second part of the frequency rising signal, thereby improving the demodulation accuracy.
According to this disclosed embodiment, through the generating device of frequency modulation signal, characterized by includes: a signal frame header generating module, configured to generate a signal frame header, where the signal frame header includes: a first specified number of frequency up signals; a second specified number of frequency down signals; and the signal frame body generating module is used for generating a signal frame body, the signal frame body comprises a third specified number of turn-back frequency-up signals and is used for carrying a third specified number of modulation data, and the frequency modulation signal comprises the signal frame header and the signal frame body, so that the detection and demodulation of the frequency modulation signal can be realized with low cost and low complexity.
The embodiment of the present disclosure further provides a chip, where the chip includes the above apparatus for detecting a frequency modulated signal, and the chip may be any one of chips capable of detecting a frequency modulated signal, and the apparatus may be implemented as part or all of the chip by software, hardware, or a combination of both.
Fig. 6 shows a block diagram of a frequency modulated signal detection apparatus according to an embodiment of the present disclosure.
As shown in fig. 6, the frequency-modulated signal detecting apparatus includes: a signal frame header determining module 601, a carrier frequency offset calculating module 602, a carrier frequency offset compensating module 603, and a demodulating module 604.
A signal frame header determining module 601, configured to determine a starting position of the signal frame header according to the received first specified number of frequency up signals;
a carrier frequency offset calculation module 602, configured to calculate a carrier frequency offset according to the received first specified number of frequency rising signals and the second specified number of frequency falling signals;
a carrier frequency offset compensation module 603, configured to perform carrier frequency offset compensation on the received signal frame according to the carrier frequency offset to obtain a compensated signal frame;
the demodulation module 604 is configured to demodulate the compensated signal frame body to obtain the modulation data.
According to the embodiment of the present disclosure, the signal frame header determining module is configured to determine the starting position of the signal frame header according to the received first specified number of frequency-up signals; a carrier frequency offset calculation module, configured to calculate a carrier frequency offset according to the received first specified number of frequency-up signals and the second specified number of frequency-down signals; the carrier frequency offset compensation module is used for carrying out carrier frequency offset compensation on the received signal frame body according to the carrier frequency offset to obtain a compensated signal frame body; and the demodulation module is used for demodulating the compensated signal frame body to obtain the modulation data, so that complex calculations such as vector multiplication, FFT (fast Fourier transform) and the like are not used, the design is simplified, the implementation complexity of a receiver is reduced, the synchronization of a signal frame header, the estimation of carrier frequency offset, the compensation of carrier frequency offset and the demodulation are accurately finished, and the accurate modulation data are obtained.
Fig. 7 shows a block diagram of an electronic device according to an embodiment of the present disclosure.
As shown in fig. 7, the electronic device includes a memory and a processor, where the memory is configured to store one or more computer instructions, where the one or more computer instructions are executed by the processor to implement:
a method for detecting a frequency-modulated signal, wherein the frequency-modulated signal comprises a signal frame header and a signal frame body, the signal frame header comprises a first specified number of frequency-up signals and a second specified number of frequency-down signals, and the signal frame body comprises a third specified number of foldback frequency-up signals and is used for carrying a third specified number of modulation data, the method comprising: determining the initial position of the signal frame header according to the received first specified number of frequency rising signals; calculating carrier frequency offset according to the received first specified number of frequency rising signals and the second specified number of frequency falling signals; carrying out carrier frequency offset compensation on the received signal frame body according to the carrier frequency offset to obtain a compensated signal frame body; and demodulating the compensated signal frame body to obtain the modulation data.
In the embodiments of the present disclosure, it is preferred,
the first specified number is 10; and/or
The second specified number is 2.
In the embodiments of the present disclosure, it is preferred,
the initial frequency of the reentrant frequency rising signal is proportional to the modulation data.
In the embodiments of the present disclosure, it is preferred,
the frequency range of the frequency modulation signal is carrier frequency minus 125 kilohertz to carrier frequency plus 125 kilohertz.
In the embodiments of the present disclosure, it is preferred,
the determining the starting position of the signal frame header according to the received first specified number of frequency-up signals comprises:
calculating the frequency of the received frequency modulation signal according to the I path part and the Q path part of the received frequency modulation signal, and obtaining the frequency of the received frequency rising signal from the frequency of the received frequency modulation signal;
dividing a third specified number of received frequency-rising signals into a first part and a second part, calculating an average value of a first frequency difference according to the frequency of the first part and the frequency of the first part of the pre-stored frequency-rising signals, and calculating an average value of a second frequency difference according to the frequency of the second part and the frequency of the second part of the pre-stored frequency-rising signals, wherein the third specified number is less than or equal to the first specified number;
calculating a third specified number of frequency difference minimum values according to the mean value of the first frequency difference and the mean value of the second frequency difference;
calculating a frequency rising signal minimum frequency difference vector and a frequency rising signal minimum frequency difference vector mean value according to the third specified number of frequency difference minimum values;
and determining the signal frame header according to the minimum frequency difference vector of the frequency rising signal, the mean value of the minimum frequency difference vector of the frequency rising signal and a specified threshold.
In the embodiments of the present disclosure, it is preferred,
calculating the carrier frequency offset according to the received first specified number of frequency rising signals and the second specified number of frequency falling signals comprises:
calculating fractional carrier frequency offset according to the minimum frequency difference vector mean value of the frequency rising signal and a downward integer value of the minimum frequency difference vector mean value of the frequency rising signal;
calculating the integer carrier frequency offset according to the minimum frequency difference vector mean value of the frequency rising signal and the minimum frequency difference vector mean value of the frequency falling signal;
and calculating the carrier frequency offset according to the fractional carrier frequency offset and the integer carrier frequency offset.
In the embodiments of the present disclosure, it is preferred,
the demodulating the compensated signal frame body to obtain the modulation data includes:
calculating a frequency difference, a maximum frequency difference and a maximum frequency difference index according to the received turn-back frequency rising signal and a pre-stored frequency rising signal;
calculating demodulation data according to the frequency difference, the maximum frequency difference index and the sampling frequency;
and carrying out rounding operation on the demodulated data to obtain the modulated data.
In the embodiments of the present disclosure, it is preferred,
the sampling frequency is obtained by multiplying the symbol rate of the frequency modulated signal by the oversampling number.
In the embodiments of the present disclosure, it is preferred,
calculating demodulation data according to the frequency difference, the maximum frequency difference index and the sampling frequency comprises:
under the condition that the maximum frequency difference index is larger than or equal to half of the length of the retrace frequency rising signal, calculating demodulation data according to the first part frequency difference of the retrace frequency rising signal and the sampling frequency; and/or
And under the condition that the maximum frequency difference index is less than half of the length of the retrace frequency rising signal, calculating demodulation data according to the second part frequency difference of the retrace frequency rising signal and the sampling frequency.
In the embodiment of the present disclosure, it is,
the first partial frequency difference of the reentrant frequency rising signal comprises: a frequency difference between a first portion of the folded frequency rising signal and a first portion of the frequency rising signal; and/or
The second partial frequency difference of the reentrant frequency rising signal comprises: a frequency difference between a second portion of the folded frequency rising signal and a second portion of the frequency rising signal.
FIG. 8 shows a schematic block diagram of a computer system suitable for use in implementing a method according to an embodiment of the present disclosure.
As shown in fig. 8, the computer system includes a processing unit that can execute various processes in the above-described embodiments according to a program stored in a Read Only Memory (ROM) or a program loaded from a storage section into a Random Access Memory (RAM). In the RAM, various programs and data necessary for system operation are also stored. The processing unit, the ROM, and the RAM are connected to each other by a bus. An input/output (I/O) interface is also connected to the bus.
The following components are connected to the I/O interface: an input section including a keyboard, a mouse, and the like; an output section including a display such as a Cathode Ray Tube (CRT), a Liquid Crystal Display (LCD), and the like, and a speaker; a storage section including a hard disk and the like; and a communication section including a network interface card such as a LAN card, a modem, or the like. The communication section performs communication processing via a network such as the internet. The drive is also connected to the I/O interface as needed. A removable medium such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, or the like is mounted on the drive as necessary, so that a computer program read out therefrom is mounted into the storage section as necessary. The processing unit can be realized as a CPU, a GPU, a TPU, an FPGA, an NPU and other processing units.
In particular, the above described methods may be implemented as computer software programs according to embodiments of the present disclosure. For example, embodiments of the present disclosure include a computer program product comprising computer instructions that, when executed by a processor, implement the method steps described above. In such an embodiment, the computer program product may be downloaded and installed from a network via the communication section, and/or installed from a removable medium.
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The units or modules described in the embodiments of the present disclosure may be implemented by software or by programmable hardware. The units or modules described may also be provided in a processor, and the names of the units or modules do not in some cases constitute a limitation of the units or modules themselves.
As another aspect, the present disclosure also provides a computer-readable storage medium, which may be a computer-readable storage medium included in the electronic device or the computer system in the above embodiments; or it may be a separate computer readable storage medium not incorporated into the device. The computer readable storage medium stores one or more programs for use by one or more processors in performing the methods described in the present disclosure.
The foregoing description is only exemplary of the preferred embodiments of the disclosure and is illustrative of the principles of the technology employed. It will be appreciated by those skilled in the art that the scope of the invention in the present disclosure is not limited to the specific combination of the above-mentioned features, but also encompasses other embodiments in which any combination of the above-mentioned features or their equivalents is possible without departing from the inventive concept. For example, the above features and (but not limited to) the features disclosed in this disclosure having similar functions are replaced with each other to form the technical solution.

Claims (23)

1. A method for detecting a frequency modulation signal, wherein the frequency modulation signal comprises a signal frame header and a signal frame body, the signal frame header comprises a first specified number of frequency-up signals and a second specified number of frequency-down signals, and the signal frame body comprises a third specified number of foldback frequency-up signals and is used for carrying a third specified number of modulation data, the method comprising:
determining the initial position of the signal frame header according to the received first specified number of frequency rising signals;
calculating carrier frequency offset according to the received first specified number of frequency rising signals and the second specified number of frequency falling signals;
carrying out carrier frequency offset compensation on the received signal frame body according to the carrier frequency offset to obtain a compensated signal frame body;
and demodulating the compensated signal frame body to obtain the modulation data.
2. The method of claim 1, wherein the first specified number is 10; and/or the second specified number is 2.
3. The method of claim 1,
the initial frequency of the retrace frequency rising signal is proportional to the modulation data.
4. The method of claim 1,
the frequency range of the frequency modulation signal is carrier frequency minus 125 kilohertz to carrier frequency plus 125 kilohertz.
5. The method of claim 1,
the determining the starting position of the signal frame header according to the received first specified number of frequency-up signals comprises:
calculating the frequency of the received frequency modulation signal according to the I path part and the Q path part of the received frequency modulation signal, and obtaining the frequency of the received frequency rising signal from the frequency of the received frequency modulation signal;
dividing a third specified number of received frequency rising signals into a first part and a second part, calculating the mean value of a first frequency difference according to the frequency of the first part and the frequency of the first part of the pre-stored frequency rising signals, and calculating the mean value of a second frequency difference according to the frequency of the second part and the frequency of the second part of the pre-stored frequency rising signals, wherein the third specified number is less than or equal to the first specified number;
calculating a third specified number of frequency difference minimum values according to the mean value of the first frequency difference and the mean value of the second frequency difference;
calculating a frequency rising signal minimum frequency difference vector and a frequency rising signal minimum frequency difference vector mean value according to the third specified number of frequency difference minimum values;
and determining the signal frame header according to the minimum frequency difference vector of the frequency rising signal, the mean value of the minimum frequency difference vector of the frequency rising signal and a specified threshold.
6. The method of claim 5,
calculating the carrier frequency offset according to the received first specified number of frequency rising signals and the second specified number of frequency falling signals comprises:
calculating fractional carrier frequency offset according to the minimum frequency difference vector mean value of the frequency rising signal and a downward integer value of the minimum frequency difference vector mean value of the frequency rising signal;
calculating the integer carrier frequency offset according to the minimum frequency difference vector mean value of the frequency rising signal and the minimum frequency difference vector mean value of the frequency falling signal;
and calculating the carrier frequency offset according to the fractional carrier frequency offset and the integer carrier frequency offset.
7. The method of claim 4,
the demodulating the compensated signal frame body to obtain the modulation data includes:
calculating a frequency difference, a maximum frequency difference and a maximum frequency difference index according to the received turn-back frequency rising signal and a pre-stored frequency rising signal;
calculating demodulation data according to the frequency difference, the maximum frequency difference index and the sampling frequency;
and carrying out rounding operation on the demodulated data to obtain the modulated data.
8. The method of claim 7,
the sampling frequency is obtained by multiplying the symbol rate of the frequency modulated signal by the oversampling number.
9. The method of claim 7,
calculating demodulation data according to the frequency difference, the maximum frequency difference index and the sampling frequency comprises:
under the condition that the maximum frequency difference index is larger than or equal to half of the length of the retrace frequency rising signal, calculating demodulation data according to the first part frequency difference of the retrace frequency rising signal and the sampling frequency; and/or
And under the condition that the maximum frequency difference index is less than half of the length of the retrace frequency rising signal, calculating demodulation data according to the second part frequency difference of the retrace frequency rising signal and the sampling frequency.
10. The method of claim 9,
the first partial frequency difference of the reentrant frequency rising signal comprises: a frequency difference between a first portion of the folded frequency rising signal and a first portion of the frequency rising signal; and/or
The second partial frequency difference of the reentrant frequency rising signal comprises: a frequency difference between a second portion of the folded frequency rising signal and a second portion of the frequency rising signal.
11. An apparatus for detecting a fm signal, the fm signal including a signal header and a signal frame body, the signal header including a first specified number of frequency up signals and a second specified number of frequency down signals, the signal frame body including a third specified number of retraced frequency up signals for carrying a third specified number of modulated data, the apparatus comprising:
a signal frame header determining module, configured to determine an initial position of the signal frame header according to the received first specified number of frequency-up signals;
a carrier frequency offset calculation module, configured to calculate a carrier frequency offset according to the received first specified number of frequency-up signals and the second specified number of frequency-down signals;
the carrier frequency offset compensation module is used for carrying out carrier frequency offset compensation on the received signal frame body according to the carrier frequency offset to obtain a compensated signal frame body;
and the demodulation module is used for demodulating the compensated signal frame body to obtain the modulation data.
12. The apparatus of claim 11, wherein the first specified number is 10; and/or the second specified number is 2.
13. The apparatus of claim 11,
the initial frequency of the retrace frequency rising signal is proportional to the modulation data.
14. The apparatus of claim 11,
the frequency range of the frequency modulation signal is carrier frequency minus 125 kilohertz to carrier frequency plus 125 kilohertz.
15. The apparatus of claim 11,
the determining the starting position of the signal frame header according to the received first specified number of frequency-up signals comprises:
calculating the frequency of the received frequency modulation signal according to the I path part and the Q path part of the received frequency modulation signal, and obtaining the frequency of the received frequency rising signal from the frequency of the received frequency modulation signal;
dividing a third specified number of received frequency rising signals into a first part and a second part, calculating the mean value of a first frequency difference according to the frequency of the first part and the frequency of the first part of the pre-stored frequency rising signals, and calculating the mean value of a second frequency difference according to the frequency of the second part and the frequency of the second part of the pre-stored frequency rising signals, wherein the third specified number is less than or equal to the first specified number;
calculating a third specified number of frequency difference minimum values according to the mean value of the first frequency difference and the mean value of the second frequency difference;
calculating a frequency rising signal minimum frequency difference vector and a frequency rising signal minimum frequency difference vector mean value according to the third specified number of frequency difference minimum values;
and determining the signal frame header according to the minimum frequency difference vector of the frequency rising signal, the mean value of the minimum frequency difference vector of the frequency rising signal and a specified threshold.
16. The apparatus of claim 15,
the calculating carrier frequency offset according to the received first specified number of frequency-up signals and the second specified number of frequency-down signals includes:
calculating fractional carrier frequency offset according to the minimum frequency difference vector mean value of the frequency rising signal and a downward integer value of the minimum frequency difference vector mean value of the frequency rising signal;
calculating the integer carrier frequency offset according to the minimum frequency difference vector mean value of the frequency ascending signal and the minimum frequency difference vector mean value of the frequency descending signal;
and calculating the carrier frequency offset according to the fractional carrier frequency offset and the integer carrier frequency offset.
17. The apparatus of claim 15,
the demodulating the compensated signal frame body to obtain the modulation data includes:
calculating a frequency difference, a maximum frequency difference and a maximum frequency difference index according to the received turn-back frequency rising signal and a pre-stored frequency rising signal;
calculating demodulation data according to the frequency difference, the maximum frequency difference index and the sampling frequency;
and carrying out rounding operation on the demodulated data to obtain the modulated data.
18. The apparatus of claim 17,
the sampling frequency is obtained by multiplying the symbol rate of the frequency modulated signal by the oversampling number.
19. The apparatus of claim 17,
calculating demodulation data according to the frequency difference, the maximum frequency difference index and the sampling frequency comprises:
under the condition that the maximum frequency difference index is larger than or equal to half of the length of the retrace frequency rising signal, calculating demodulation data according to the first part frequency difference of the retrace frequency rising signal and the sampling frequency; and/or
And under the condition that the maximum frequency difference index is less than half of the length of the retrace frequency rising signal, calculating demodulation data according to the second part frequency difference of the retrace frequency rising signal and the sampling frequency.
20. The apparatus of claim 19,
the first partial frequency difference of the reentrant frequency rising signal comprises: a frequency difference between a first portion of the folded frequency rising signal and a first portion of the frequency rising signal; and/or
The second partial frequency difference of the reentry frequency rising signal comprises: a frequency difference between a second portion of the folded frequency rising signal and a second portion of the frequency rising signal.
21. A chip comprising a device for detecting a frequency-modulated signal as claimed in any one of claims 11 to 20.
22. An electronic device comprising a memory and a processor; wherein the memory is configured to store one or more computer instructions, wherein the one or more computer instructions are executed by the processor to implement the method steps of any of claims 1-10.
23. A readable storage medium having stored thereon computer instructions which, when executed by a processor, carry out the method steps of any of claims 1-10.
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