JP2014168201A - MSK modulation circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To achieve an MSK modulation circuit 10+20 having a short startup time and not requiring PLL.SOLUTION: The MSK modulation circuit includes a rectangular wave generation circuit 11 generating two transmission signals f0, f1 by rectangular wave signals in synchronism with a data input clock CLK-DATAIN, a state determination circuit 13 determining a next transition state from current state and transmission data DATA-IN, and a waveform selection circuit 14 for selecting one of transmission signals f0, f0-, f1, f1- depending on that state and the transmission data DATA-IN, and outputting that signal. With regard to the transmission speed D and the transmission frequencies fH, fL of the transmission signals f0, f1 and a positive integer n, any one of the frequency selection conditions of a first mode, i.e., a formula (fH/D=n+0.50) and a formula (fL/D=n) are all established, or the frequency selection conditions of a second mode, i.e., a formula (fH/D=n) and a formula (fL/D=n-0.50) are all established, is satisfied.

Description

  The present invention relates to an MSK modulation circuit for performing MSK (minimum shift keying) modulation in which a condition such as phase continuity is further imposed on a kind of digital modulation FSK (frequency shift keying) modulation. The present invention relates to an MSK modulation circuit that can also be used for an unpowered ground element of an ATS-P system of equipment.

As means for realizing the MSK modulation circuit, one using quadrature amplitude modulation is generally known. FIG. 4 shows a specific example of such an MSK modulation circuit, where (a) is a block diagram and (b) is a time chart of a signal waveform example.
Since the contents thereof are publicly known, a detailed description is omitted here. However, in the illustrated MSK modulation circuit, an I (t) signal and a Q (t) signal corresponding to the digital signal of the input data based on the reference signal of the frequency fc. Are generated and added to perform MSK modulation. Therefore, this MSK modulation circuit takes time from the power-on to the stabilization of the sine waveform and level of the reference signal.

  In general, in the MSK modulation system, two types of transmission frequencies, high and low, are used depending on data, and switching of the transmission frequency that adopts one of the higher transmission frequency fH and the lower transmission frequency fL is used for data transmission. Although it is performed at the time of change, it is necessary to keep the phase of the transmission signal continuous even at the time of switching. In the general MSK modulation system as shown in the figure, an MSK modulation circuit is implemented using a PLL (phase locked loop) circuit in order to maintain phase continuity when switching transmission frequencies. Therefore, it takes time until the operation is stabilized after starting.

  On the other hand, in the field of railways, the ATS-P system is widely used in public railways such as East Japan Railway Company as signal equipment using high-speed digital wireless transmission. In this system, the FSK modulation method is used for radio transmission between the ground unit and the vehicle unit (see, for example, Non-Patent Documents 1 and 2). Since the FSK modulation system has a simple transmission circuit configuration and a short time from start-up to stable operation, power is supplied not only from the grounded power unit that is always in operation, but also from the car unit to the power wave. It is also used in non-powered ground units that only transmit data wirelessly.

In a system such as ATS-P (see, for example, Non-Patent Document 2), a non-powered ground element (information fixed type) that does not require the installation of a power line is an indispensable device for train protection at a speed limiting point The non-powered ground unit (variable information type) is often used to contribute to the reduction of ground facility costs.
In the ATS-P system, an FSK modulation signal of 1708 kHz ± 32 kHz (center frequency fc is 1708 kHz, bias frequency fd is 32 kHz, transmission frequency fH is 1740 kHz, transmission frequency fL is 1676 kHz) for radio transmission from the ground to the vehicle. The FSK modulation signal of 3000 kHz ± 32 kHz (the center frequency fc is 3000 kHz, the bias frequency fd is 32 kHz, the transmission frequency fH is 3032 kHz, and the transmission frequency fL is 2968 kHz) is used for wireless transmission from the vehicle to the ground. has implemented 64kbps digital information transmission, the bit error rate (BER) is high-quality transmission of 3 × ^{10 -5 hereinafter} are obtained.

Jointly written by Masakazu Miyaji, Kenjiro Matsumoto, Yoshinobu Katakata, Hitomi Iratsu, Susumu Toyoshima, “ATS-Ps (tentative name) system configuration and function”, 31st Railway Cybane Proceedings, paper number 411, p. 147-150, issued in November 1994 Overview of Signals for Railway Electricians “ATS • ATC [Second Revised Edition]” p. 55-58, issued by Japan Railway Electrical Engineering Association, April 2012

  When comparing these conventional FSK modulation methods and MSK modulation methods, the FSK modulation method that does not require phase continuity is easier to simplify the circuit than the MSK modulation method that requires phase continuity, and it can be from start-up to stable operation. Although time reduction is easy to implement, the MSK modulation method increases the transmission rate D to twice that of the FSK modulation method even if the same frequency band (range of transmission frequency fL to transmission frequency fH) is used. Is possible. In addition, if the frequency band of the transmission signal, and hence the bias frequency fd (transmission frequency fH−center frequency fc, center frequency fc−transmission frequency fL), are the same in the FSK modulation method and the MSK modulation method, the occupied bandwidth of the reception circuit Therefore, the noise level is the same, and therefore the bit error rate is also the same.

  If applied to the above-described ATS-P system, the transmission rate D, which was 64 kbps in the FSK modulation method, is maintained while maintaining the frequency band and communication quality by maintaining the bias frequency fd at 32 kHz by adopting the MSK modulation method. Can be doubled to 128 kbps. If higher-speed data transmission is possible, it will be possible to reduce the size of the ground unit and the vehicle upper unit, the advantage that it can handle higher speed trains even with the current shape of the ground unit and vehicle upper unit, Since it is possible to enjoy the advantage that the amount of transmission information from each ground element can be increased by increasing the length, the request to increase the transmission speed D without changing the center frequency fc and the bias frequency fd is met. Can do.

However, since the above-described conventional MSK modulation circuit performs quadrature modulation using a PLL, the so-called start-up settling time from the start-up until the operation is stabilized is long, so that it takes 1 to 2 ms after receiving the power wave. It has been difficult to use a conventional MSK modulation circuit for a non-powered ground element that starts up and starts transmission. It is difficult to simplify the circuit.
Therefore, it is a technical problem to realize an MSK modulation circuit that requires no PLL and has a short settling time after startup.

  The MSK modulation circuit of the present invention has been created to solve such a problem, and is synchronized with a data input clock that determines the timing for inputting transmission data composed of a binary data string. A rectangular wave generation circuit that generates a transmission signal as a rectangular wave signal; a state determination circuit that determines a next transition state from a current state and an input value of the transmission data; a state of the state determination circuit; and a state of the transmission data An MSK modulation circuit comprising a waveform selection circuit that selects and outputs one of four signals of the two transmission signals and its inverted signal according to an input value, the data input clock The transmission speed corresponding to the frequency of the transmission signal is D, the lower transmission frequency of the transmission signals is fL, the higher transmission frequency of the transmission signals is fH, and any one of positive integers. Where n is the frequency selection condition of the first mode in which the equations [fH / D = n + 0.50] and [fL / D = n] are all satisfied, or the equation [fH / D = n] The frequency selection condition of the second mode in which all the expressions [fL / D = n−0.50] are satisfied, or any one of the frequency selection conditions is satisfied.

Such an MSK modulation circuit according to the present invention can be realized by a sequential circuit in which basic binary logic elements are combined, as will be exemplified later. Yes, no PLL is required. In addition, it is possible to synchronize each signal necessary for satisfying the frequency selection condition with a simple method such as simultaneous initialization of the frequency division counter and flip-flop, and after initialization, each signal stabilizes quickly, The time from startup to stable operation is short.
Therefore, according to the present invention, it is possible to realize an MSK modulation circuit that requires no PLL and has a short settling time after startup.

1 shows the structure of an MSK modulation circuit according to the first embodiment of the present invention, in which (a) is a circuit diagram of a modulation processing unit composed of a binary logic circuit for rectangular wave signal processing, and (b) is a resonance circuit for sine wave conversion. It is a circuit diagram of the transmission part which consists of. The design conditions and operation examples of the MSK modulation circuit are shown, (a) is the frequency selection condition of the first mode, (b) is the frequency selection example, (c) is the basic waveform example, and (d) is the deterministic finite automaton-like state A transition diagram, (e) is a time chart of a data example and a signal waveform example. Other design conditions and operation examples of the MSK modulation circuit are shown, (a) is the frequency selection condition of the second mode, (b) is the frequency selection example, (c) is the basic waveform example, (d) is the deterministic finite automaton-like (E) is a time chart of a data example and a signal waveform example. FIG. 2A is a block diagram of a generally known MSK modulation circuit using quadrature amplitude modulation, and FIG. 2B is a time chart of a signal waveform example.

A specific embodiment for implementing the MSK modulation circuit of the present invention will be described with reference to the following first embodiment.
The embodiment 1 shown in FIGS. 1 to 3 embodies the above-described solution 1 (claim 1 at the beginning of the application).

  A specific configuration of the first embodiment of the MSK modulation circuit according to the present invention will be described with reference to the drawings. 1A is a circuit diagram of the modulation processing unit 10, and FIG. 1B is a circuit diagram of the transmission unit 20. FIG. 2A shows the frequency selection condition of the first aspect, and FIG. 3A shows the frequency selection condition of the second aspect.

  The MSK modulation circuit 10 + 20 includes a modulation processing unit 10 (main body unit) including a binary logic circuit (sequential circuit) that performs MSK modulation by processing a rectangular wave signal that satisfies a specific frequency selection condition as a rectangular wave. A transmission unit 20 (post-installation unit) including a resonance circuit that converts a rectangular wave signal after MSK modulation into a sine wave is provided. There are two modes as the specific frequency selection conditions related to the modulation processing unit 10, and the modulation processing unit 10 can arbitrarily select one of the two modes and switch the frequency selection conditions. First, the frequency selection conditions of the two modes and the reasons for their limitation will be described, then the circuit configuration will be described (see FIG. 1), and then the frequency selection conditions and operation of the first mode will be described. (Refer to FIG. 2) Then, the frequency selection conditions and operations of the remaining second aspect of the two aspects will be described (see FIG. 3).

In order to be able to perform MSK modulation, two transmission signals that are switched and used as a carrier wave and have different frequencies are required. A transmission signal having a lower transmission frequency fL and a transmission signal having a higher transmission frequency fH are required. And must be orthogonal. In order to minimize the frequency interval between the two transmission signals (fL, fH) while satisfying this orthogonal condition, the transmission speed D of transmission data consisting of a binary data string (this is a data input clock CLK− described later). Between the transmission frequency fL and the transmission frequency fH, and any of the frequency selection conditions of the following first to fourth modes listed below, which corresponds to the frequency of the DATAIN data input clock. That must be true.
In these frequency selection conditions, n is a positive integer.

  The frequency selection condition of the first mode is that the formula [fH / D = n + 0.50] and the formula [fL / D = n] are all satisfied (see FIG. 2A), and the frequency of the second mode. The selection condition is that the expression [fH / D = n] and the expression [fL / D = n−0.50] are all satisfied (see FIG. 3A), and the frequency selection condition of the third aspect is The expression [fH / D = n + 0.25] and the expression [fL / D = n−0.25] are all satisfied (not shown), and the frequency selection condition of the fourth aspect is the expression [fH / D D = n−0.25] and the formula [fL / D = n−0.75] are all established (not shown).

  If the PLL circuit is used in a state where power is constantly applied, any one of the frequency selection conditions of the first to fourth modes can be subjected to MSK modulation. In the present invention, the frequency selection conditions are those of the first and second modes (see FIG. 2 (a) and FIG. 3 (a)), two transmissions are performed on the data input clock CLK-DATAIN that determines the timing for inputting transmission data that takes one of two values at the transmission speed D. If the signals (fL, fH) are synchronized, the phase of the two transmission signals (fL, fH) when the transmission data changes is limited to either π or 0, so that the rectangular wave signal (fL, fH) The MSK signal (digital MSK signal MSK-OUT) can be expressed by the inverted signal (fL￣, fH￣).

Therefore, the MSK modulation circuit 10 + 20 that creates an MSK signal by switching and using four rectangular wave signals while performing simple state transition can be realized with a simple sequential circuit that does not include a PLL circuit. As described above (see FIG. 1), the MSK modulation circuit 10 + 20 includes the modulation processing unit 10 of the main unit and the transmission unit 20 of the post unit.
The modulation processing unit 10 (see FIG. 1A) includes a rectangular wave generation circuit 11, a condition switching circuit 12, a state determination circuit 13, and a waveform selection circuit 14, all of which execute binary logic. It consists of a sequential circuit combining a gate element, a flip-flop, etc., and can be made into an IC.

  Although the detailed circuit diagram is omitted, the rectangular wave generation circuit 11 is configured by, for example, three frequency division counters and the like, and includes three frequencies of the transmission speed D, the lower transmission frequency fL, and the higher transmission frequency fH. A basic clock whose frequency is a common multiple of the frequency is divided by each counter to generate a rectangular wave-shaped data input clock CLK-DATAIN, a transmission frequency fL, and a transmission frequency fH that satisfy a specific frequency selection condition. It has become. In this example, since the transmission frequency fH is assigned to the data value “0”, the transmission signal having the transmission frequency fH is referred to as a transmission signal FREQ-f0, and the transmission value fL is assigned to the data value “1”. A transmission signal having a frequency fL is referred to as a transmission signal FREQ-f1, but the above three signals (CLK-DATAIN, fL, fH) can be easily obtained by simultaneously initializing the three frequency dividing counters with the reset signal RESET-IN. Therefore, the transmission signal FREQ-f0 and the transmission signal FREQ-f1 are synchronized with the transmission data DATA-IN.

  When the switch SW is switched to the ground voltage side GND, the condition switching circuit 12 sends a command to perform a state transition operation when the frequency selection condition of the first mode is satisfied to the state determination circuit 13, while When the switch SW is switched to the power supply voltage side Vcc, a command for performing a state transition operation when the frequency selection condition of the second mode is satisfied is sent to the state determination circuit 13.

  The state determination circuit 13 takes one of the two states A and B, stores and holds it as the current state, and outputs it in the state signals STATE-A and STATE-B, and the state and transmission It consists of a logic gate circuit that determines the state to be taken next by the flip-flop from the value of the data DATA-IN by a binary logic operation. This logic gate circuit switches the state transition destination of the flip-flop according to the command received from the condition switching circuit 12, so that the same hardware can be used regardless of the frequency selection condition of either of the first and second modes. It can be used. In addition, the flip-flop is initialized by the reset signal RESET-IN similarly to the rectangular wave generating circuit 11, and the state transition is performed at the timing of the data input clock CLK-DATAIN. The condition is met.

  The waveform selection circuit 14 includes a logic gate circuit, and a transmission signal input from the rectangular wave generation circuit 11 in accordance with the state (STATE-A, STATE-B) of the state determination circuit 13 and the value of the transmission data DATA-IN. The transmission signal f0 as it is FREQ-f0, the transmission signal f0￣ obtained by inverting the transmission signal FREQ-f1, the transmission signal f1 as it is input from the rectangular wave generation circuit 11, and the transmission signal FREQ-f1 One of the transmission signals is selected from the transmission signal f1￣ obtained by inverting the signal, and the selected signal is transmitted to the transmission unit 20 as a digital MSK signal MSK-OUT. This selection is performed at the timing of the data input clock CLK-DATAIN. If the frequency selection condition is satisfied in either of the first and second modes, a transmission signal having a continuous phase before and after the selection switching is selected. It is supposed to be.

  The transmission unit 20 (see FIG. 1B) drives the transmission coil L1 functioning as a radio antenna with the digital MSK signal MSK-OUT, and removes harmonic components from the rectangular wave signal during the drive. However, in order to output efficiently, it is a resonance circuit in which capacitors C1 and C2 are connected in parallel to the transmission coil L1. Therefore, the transmission unit 20 can generate a sinusoidal MSK modulation signal from the rectangular wave MSK modulation signal and wirelessly transmit it. The illustrated E-OR element is an example of a booster, and a more powerful power amplifier or the like may be used or omitted depending on the required transmission power.

  With respect to the MSK modulation circuit 10 + 20, a usage mode and an operation when the frequency selection condition of the modulation processing unit 10 is switched to the first mode will be described with reference to the drawings. 2A is a frequency selection condition of the first mode, FIG. 2B is an example of frequency selection, FIG. 2C is a basic waveform example, FIG. 2D is a state transition diagram of a deterministic finite automaton, and FIG. It is a time chart of a specific data example and a signal waveform example.

  When the switch SW is connected to the ground voltage side GND and the frequency selection condition of the first aspect described above is satisfied (see FIG. 2A), the condition holds for any positive integer. Therefore, although the case where n = 1 is described here, the same applies to the case where n> 1. Since n is 1 (see FIG. 2B), the transmission frequency fH / transmission speed D = 1.50 and the transmission frequency fL / transmission speed D = 1.00. Further, as described above, the transmission signals f0 and f0￣ having the frequency fH are assigned to the data value “0” and the transmission signals f1 and f1￣ having the frequency fL are assigned to the data value “1”. Within one cycle (see FIG. 2 (c)), the transmission signals f1 and f1￣ contain a waveform for one cycle, and the transmission signals f0 and f0 半 contain a waveform for one and a half cycles. The phase becomes 0 or π.

  Then, transmission data DATA-IN is input following initialization with the reset signal RESET-IN, but since the modulation processing unit 10 is a binary logic sequential circuit, the initialization operation is immediately completed and the operation is stable immediately. The state transition by the decision circuit 13 and the selection of the transmission signal waveform by the waveform selection circuit 14 are performed for each period of the data input clock CLK-DATAIN. Since the states A and B correspond to the phase 0 and π of the data change point, respectively, in the state A, a non-inverted normal signal (f0 or f1) whose starting phase is 0 is selected next, and in the state B, Next, an inverted signal (f0￣ or f1￣) having a starting phase of π is selected. In addition, when a transmission signal (f0 or f0 位相) whose phase changes between the start end and the end is selected, another state is entered, but when a transmission signal (f1 or f1￣) whose phase does not change between the start end and the end is selected. Stay in the same state.

  More specifically (see FIG. 2D), starting from state A, when data value “1” is input in state A, transmission signal f1 is selected and stays in state A. When the value “0” is input, the transmission signal f0 is selected and the state shifts to the state B. When the data value “1” is input in the state B, the transmission signal f1 選 択 is selected and the state B remains. When the data value “0” is input at this time, the process of selecting the transmission signal f0￣ and moving to the state A is repeated. By this processing, if the phase of the data change point is π, the next inverted signal (f0￣ or f1￣) is selected, and if the phase of the data change point is 0, the next non-inverted normal signal (f0 or f1) is selected. ) Is selected, the digital MSK signal MSK-OUT becomes a rectangular wave signal having a continuous phase.

  Therefore, for example, when the data value of the transmission data DATA-IN is “0”, “1”, “1”, “0”, “0”, “1”,... (See FIG. 2E). Accordingly, the state transitions to B, B, B, A, B, B,..., And the digital MSK signal MSK-OUT is transmitted signals f0, f1￣, f1￣, f0￣, f0, f1￣,. Change. This digital MSK signal MSK-OUT is a rectangular wave, but is an appropriate MSK signal because the phase is continuous throughout the entire area. Even when the transmission data DATA-IN has other values, an appropriate MSK signal is generated in the same manner, although the repeated complicated explanation is omitted. This rectangular MSK signal is converted into a sinusoidal MSK signal by the transmitter 20 and transmitted wirelessly.

  Furthermore, with respect to the MSK modulation circuit 10 + 20, the usage mode and operation when the frequency selection condition of the modulation processing unit 10 is switched to the second mode will be described with reference to the drawings. 3A is a frequency selection condition of the second mode, FIG. 3B is an example of frequency selection, FIG. 3C is a basic waveform example, FIG. 3D is a state transition diagram like a deterministic finite automaton, and FIG. It is a time chart of a specific data example and a signal waveform example.

  The switch SW is connected to the power supply voltage side Vcc to satisfy the frequency selection condition of the second aspect described above (see FIG. 3A), and the condition is satisfied for any positive integer. Again, when the case of n = 1 is described (see FIG. 3B), the transmission frequency fH / transmission speed D = 1.00 and the transmission frequency fL / transmission speed D = 0.50. Also, the transmission signals f0 and f0￣ having the frequency fH are assigned to the data value “0” and the transmission signals f1 and f1￣ having the frequency fL are assigned to the data value “1”. Inside (see FIG. 3C), the transmission signals f0 and f0ｆ have a waveform for one cycle, and the transmission signals f1 and f1￣ have a waveform for a half cycle. Or π.

  After the initialization, the operation immediately stabilizes, and the state transition by the state determination circuit 13 and the selection of the transmission signal waveform by the waveform selection circuit 14 are performed every cycle of the data input clock CLK-DATAIN. In the mode (see FIG. 3D), starting from the state A, when the data value “1” is input in the state A, the transmission signal f1 is selected to move to the state B, and in the state A, the data value “ When "0" is input, the transmission signal f0 is selected and stays in the state A. When the data value "1" is input in the state B, the transmission signal f1 is selected and the state A is shifted. When the data value “0” is input, the process of selecting the transmission signal f 0 し て and staying in the state B is repeated. By this process, if the start phase of the data change point is π, the next inverted signal (f0￣ or f1￣) is selected, and if the start phase of the data change point is 0, the next non-inverted normal signal is selected. Since (f0 or f1) is selected, even when the frequency selection condition is the second mode, the digital MSK signal MSK-OUT is a rectangular wave signal having a continuous phase.

  Therefore, also in this case, assuming that the data value of the transmission data DATA-IN is, for example, “0”, “1”, “1”, “0”, “0”, “1”,. Accordingly, the state changes to A, B, A, A, A, B,..., And the digital MSK signal MSK-OUT is transmitted signals f0, f1, f1ｆ, f0, f0, f1,. Change. In this case as well, the digital MSK signal MSK-OUT is a rectangular wave, but is an appropriate MSK signal because the phase is continuous throughout the entire area. Similarly, when the transmission data DATA-IN takes other values, an appropriate rectangular wave MSK signal is generated in the same manner, and the final output becomes a sinusoidal MSK signal.

  Finally, specific examples of practical frequency selection conditions suitable for the ATS-P system will be given. Transmission frequency fH / Transmission speed D: Transmission frequency fL / Transmission speed D is n + 0.50: n As an example of the frequency selection condition of the first aspect, the frequency of the data input clock CLK-DATAIN = transmission speed D = 128 kbps, Examples include transmission frequency fL = 1664 kHz, transmission frequency fH = 1728 kHz, n = 13, fH / D = 13.50, and fL / D = 13.00. Transmission frequency fH / transmission speed D: transmission frequency fL / transmission speed D is n: n−0.50. As an example of the frequency selection condition of the second aspect, transmission speed D = 128 kbps, transmission frequency fL = 1728 kHz, transmission Examples include frequencies fH = 1792 kHz, n = 14, fH / D = 14.00, and fL / D = 13.50. Among these, it can be seen that the frequency selection condition of the first aspect is close to the current occupied band of ATS-P.

  Since the frequency of each signal is selected and applied to the modulation processing unit 10 so as to satisfy such a specific condition, the modulation processing unit 10 includes “1” / “0” including two transmission signals (fL, fH). Therefore, it is possible to generate a phase-continuous digital MSK signal MSK-OUT with a simple IC circuit configuration. Further, the transmission unit 20 can generate a sinusoidal MSK modulation signal with the transmission coil L1 and the resonance capacitors C1 and C2. For this reason, the MSK modulation circuit 10 + 20 has a fast rise from power-on to MSK modulation signal transmission, and can generate a phase-continuous signal in 1 to 2 ms after the power is turned on. Since it can be applied even to a non-powered ground element, it can also be used by being incorporated in a powered ground element or on-vehicle device that is always powered on. In addition, since both the modulation processing unit 10 and the transmission unit 20 have simple circuit configurations, they are advantageous in terms of price and reliability.

  The MSK modulation circuit of the present invention was originally developed for application to an unpowered ground element of the ATS-P system, but its application is not limited to the unpowered ground element. The present invention can also be applied to train control fields such as point control ATS using signal transmission, and other general digital signal transmission.

10 ... modulation processing part (rectangular wave signal processing circuit, main part of MSK modulation circuit),
11 ... rectangular wave generation circuit, 12 ... condition switching circuit,
13 ... State determination circuit, 14 ... Waveform selection circuit,
20: Transmitter (rear circuit, rear part of MSK modulation circuit)

Claims (1)

  A rectangular wave generation circuit that generates two transmission signals having different frequencies in a rectangular wave signal in synchronization with a data input clock that determines the timing of inputting transmission data composed of a binary data string, and a current state and an input value of the transmission data A state determination circuit that determines the next transition state from one of the four signals of the two transmission signals and its inverted signal according to the state of the state determination circuit and the input value of the transmission data. An MSK modulation circuit including a waveform selection circuit for selecting and outputting one, wherein D is a transmission rate corresponding to the frequency of the data input clock, and fL is a lower transmission frequency of the transmission signals. , When the higher transmission frequency of the transmission signals is fH and any one of the positive integers is n, Expression [fH / D = n + 0.50] and Expression [fL / D = n] All Either the frequency selection condition of the first aspect to be performed or the frequency selection condition of the second aspect in which the expression [fH / D = n] and the expression [fL / D = n−0.50] are all established is any frequency. An MSK modulation circuit characterized in that selection conditions are satisfied.

Images