JP2014119710A - Liquid crystal display unit and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display unit capable of suppressing deterioration in reliability and in display quality, and a manufacturing method of the liquid crystal display unit.SOLUTION: The liquid crystal display unit comprises: a first substrate including a first insulation substrate, an insulation film arranged on the first insulation substrate, a pixel electrode formed on the insulation film in an active area for displaying an image, and a first alignment film covering the pixel electrode; a second substrate including a second insulation substrate, and a second alignment film arranged on a side opposite to the first substrate of the second insulation substrate and facing the first alignment film; a first dot-like spacer formed on one substrate and supporting the other substrate of the first substrate and the second substrate, and forming a cell gap between the first alignment film and the second alignment film; a second dot-like spacer formed on the other substrate and spaced apart from the one substrate of the first substrate and the second substrate; and a liquid crystal layer held by the cell gap.

Description

  Embodiments described herein relate generally to a liquid crystal display device and a method for manufacturing the same.

  Liquid crystal display devices are utilized in various fields as display devices for OA equipment such as personal computers and televisions, taking advantage of features such as light weight, thinness, and low power consumption. In recent years, liquid crystal display devices are also used as mobile terminal devices such as mobile phones, display devices such as car navigation devices and game machines.

  In recent years, there has been a demand for reduction of the frame portion in liquid crystal display devices, particularly products for mobile use. In order to meet such a demand for a narrow frame, the alignment accuracy between the array substrate and the counter substrate is improved, the positional accuracy of the sealing material is improved, and the line width of the sealing material is further narrowed. I'm trying to deal with picture frames. For example, as a conventional technique, a technique is proposed in which double spacer walls are formed by depositing and patterning silicon dioxide, and a sealing material is disposed between the spacer walls. On the other hand, a method in which the cell gap between a pair of substrates is controlled by a columnar spacer formed using an organic material on one substrate is mainly used.

  Today's mobile-use liquid crystal display devices have been improved in definition, and there is a demand for a design in which the active area is wider and the frame portion of the peripheral area is narrower. Therefore, in order to ensure the aperture ratio (area contributing to display) per pixel, it is necessary to make the spacer a fine pattern. As the spacer size becomes smaller, it is difficult to control the size (width and height) due to variations in exposure, and the cell gap cannot be controlled sufficiently due to variations in size, which may cause display unevenness. .

  By the way, a material having water permeability may be applied to various organic materials (for example, an alignment film) used for the liquid crystal display device. Moisture permeated through such an organic material may enter the liquid crystal layer and change the quality of the liquid crystal material. Moreover, there is a possibility that the wiring material applied to the liquid crystal display device may be corroded by the influence of moisture that has penetrated. In addition, there is a possibility that the alignment regulating force of the alignment film is reduced due to the influence of the penetrated moisture. Such deterioration of the liquid crystal material, corrosion of the wiring material, and a decrease in alignment regulation power may cause a decrease in reliability and a deterioration in display quality.

JP 2007-219235 A

  An object of the present embodiment is to provide a liquid crystal display device and a method for manufacturing the same that can suppress deterioration in reliability and display quality.

According to this embodiment,
A first insulating substrate; an insulating film disposed on the first insulating substrate; a pixel electrode formed on the insulating film in an active area for displaying an image; a first alignment film covering the pixel electrode; A second substrate comprising: a first substrate including: a second insulating substrate; and a second alignment film disposed on a side of the second insulating substrate facing the first substrate and facing the first alignment film. A dot shape that is formed on one of the substrate and the first substrate and the second substrate, supports the other substrate, and forms a cell gap between the first alignment film and the second alignment film. A first spacer, a dot-shaped second spacer formed on the other of the first substrate and the second substrate and spaced from the one substrate, and a liquid crystal layer held in the cell gap. A liquid crystal display device is provided.

According to this embodiment,
Forming an insulating film on the first insulating substrate; forming a pixel electrode on the insulating film in an active area for displaying an image; forming a first spacer in a dot shape on the pixel electrode or on the insulating film; A first substrate on which a first alignment film covering the pixel electrode is formed is prepared, and a second spacer having a height different from that of the first spacer is formed on the side of the second insulating substrate facing the first substrate in the active area. A second substrate having a second alignment film formed thereon is prepared, the first substrate and the second substrate are bonded together, and the first spacer or the second spacer supports the other substrate. A method for manufacturing a liquid crystal display device is provided in which a cell gap is formed between the first alignment film and the second alignment film.

FIG. 1 is a plan view schematically showing an example of a display panel PNL applicable to the liquid crystal display device of this embodiment. FIG. 2 is a cross-sectional view schematically showing an example of the structure of the display panel PNL shown in FIG. FIG. 3 is a diagram for explaining a manufacturing process of the array substrate AR. FIG. 4 is a diagram for explaining a manufacturing process of the counter substrate CT. FIG. 5 is a cross-sectional view schematically showing another example of the structure of the display panel PNL shown in FIG. FIG. 6 is a plan view showing an example of a photomask applicable to this embodiment.

  Hereinafter, the present embodiment will be described in detail with reference to the drawings. In each figure, the same reference numerals are given to components that exhibit the same or similar functions, and duplicate descriptions are omitted.

  FIG. 1 is a plan view schematically showing an example of a display panel PNL applicable to the liquid crystal display device of this embodiment.

  That is, the display panel PNL is an active matrix type liquid crystal display panel, and includes an array substrate AR, a counter substrate CT arranged to face the array substrate AR, and a liquid crystal held between the array substrate AR and the counter substrate CT. And a layer LQ. The array substrate AR and the counter substrate CT are bonded together with a sealant SE in a state where a predetermined cell gap is formed between them. The cell gap is formed by a columnar first spacer SP1 formed on the array substrate AR or the counter substrate CT. The liquid crystal layer LQ is held on the inner side surrounded by the sealing material SE in the cell gap between the array substrate AR and the counter substrate CT.

  Such a display panel PNL includes an active area ACT for displaying an image inside surrounded by the seal material SE. The active area ACT has, for example, a substantially rectangular shape and includes a plurality of pixels PX arranged in an m × n matrix (where m and n are positive integers).

  The array substrate AR includes a gate line G extending along a first direction X, a source line S extending along a second direction Y orthogonal to the first direction X, a gate line G, and a source A switching element SW connected to the wiring S, a pixel electrode PE connected to the switching element SW, and the like are provided. The counter electrode CE that faces each of the pixel electrodes PE via the liquid crystal layer LQ is provided, for example, on the counter substrate CT, but may be provided on the array substrate AR.

  In the illustrated example, an equivalent circuit of three pixels PX1 to PX3 adjacent in the first direction X is shown. These pixels PX1 to PX3 are color pixels that display different colors. For example, the pixel PX1 is a red pixel, the pixel PX2 is a green pixel, and the pixel PX3 is a blue pixel. That is, the three pixels PX1 to PX3 correspond to main pixels, and each of the pixels PX1 to PX3 corresponds to sub-pixels. In the following description, “pixel” refers to a sub-pixel. In the case of high-definition specifications, the width along the first direction X of the sub-pixel is 20 μm or less.

  In the pixel PX1, the switching element SW1 is connected to the gate line G and the source line S1, and the pixel electrode PE1 is connected to the switching element SW1 and faces the counter electrode CE via the liquid crystal layer LQ. In the pixel PX2, the switching element SW2 is connected to the gate line G and the source line S2, and the pixel electrode PE2 is connected to the switching element SW2 and faces the counter electrode CE via the liquid crystal layer LQ. In the pixel PX3, the switching element SW3 is connected to the gate line G and the source line S3, and the pixel electrode PE3 is connected to the switching element SW3 and faces the counter electrode CE through the liquid crystal layer LQ.

  In the active area ACT, the first spacer SP1 is formed in a dot shape and is disposed between pixels adjacent in the second direction Y. The first spacer SP1 may be arranged in each pixel, but may be arranged every several pixels. In the illustrated example, the first spacers SP1 are arranged every other main pixel in the first direction X and the second direction Y.

  In the active area ACT, the second spacer SP2 is arranged in addition to the first spacer SP1. Unlike the first spacer SP1, the second spacer SP2 does not function mainly for forming a cell gap. Although details will be described later, one of the first spacer SP1 and the second spacer SP2 is formed on the array substrate AR, and the other spacer is formed on the counter substrate CT.

  The second spacers SP2 are formed in a dot shape, are arranged between pixels adjacent in the second direction Y, and are arranged at substantially equal intervals in the first direction X. In the illustrated example, five second spacers SP2 may be arranged on the line between adjacent first spacers SP1, or only a plurality of second spacers SP2 may be arranged on the line. . The layout of the first spacer SP1 and the second spacer SP2 is not limited to the illustrated example.

  A signal supply source for supplying signals necessary for driving the display panel PNL such as the driving IC chip 2 and the flexible printed circuit (FPC) substrate 3 is mounted in the peripheral area PRP outside the active area ACT. . These signal supply sources include a gate driver connected to the gate line G, a source driver connected to the source line S, a power supply unit that supplies a common potential to the counter electrode CE, and the like.

  In the illustrated example, the drive IC chip 2 and the FPC board 3 are mounted on the mounting portion MT of the array substrate AR that extends outward from the substrate end portion CTE of the counter substrate CT. The peripheral area PRP is an area surrounding the active area ACT and includes an area where the sealing material SE is disposed, and is formed in a rectangular frame shape.

  The sealing material SE is formed in a rectangular frame shape surrounding the active area ACT. In the illustrated example, a first bank BK1 and a second bank BK2 are formed in the peripheral area PRP. Although the details of the first bank BK1 and the second bank BK2 will be described later, one bank is formed on the array substrate AR and the other bank is formed on the counter substrate CT. The first bank BK1 and the second bank BK2 are each formed in a rectangular frame shape surrounding the active area ACT. That is, the first bank BK1 and the second bank BK2 are formed in a line along the first direction X and the second direction Y, respectively.

  In the XY plane, the first bank BK1 and the second bank BK2 do not overlap, and a gap is formed between the first bank BK1 and the second bank BK2. The first bank BK1 is located on the panel end side of the peripheral area PRP (that is, the side away from the active area ACT), and the second bank BK2 is the side close to the active area ACT in the peripheral area PRP. (In other words, it is located between the active area ACT and the first bank BK1). The first bank BK1 and the second bank BK2 are not limited to the illustrated example, and a plurality of each may be provided.

  It is desirable that at least one of the first bank BK1 and the second bank BK2 is included in the seal material SE, and a bank located further outside in the peripheral area PRP is included in the seal material SE. In the illustrated example, both the first bank BK1 and the second bank BK2 are included in the sealing material SE.

  Although the detailed configuration of the display panel PNL is not described, a mode that mainly uses a vertical electric field such as a TN (Twisted Nematic) mode, an OCB (Optically Compensated Bend) mode, a VA (Vertical Aligned) mode, and the like, IPS A mode that mainly uses a lateral electric field such as an (In-Plane Switching) mode and an FFS (Fringe Field Switching) mode can be applied. In a configuration in which a mode using a lateral electric field is applied, both the pixel electrode PE and the counter electrode CE are provided on the array substrate AR.

  FIG. 2 is a cross-sectional view schematically showing an example of the structure of the display panel PNL shown in FIG. Here, a cross-sectional view of a configuration example in which the pixel electrode PE is provided on the array substrate AR and the counter electrode CE is provided on the counter substrate CT is illustrated.

  The array substrate AR is formed using a transparent first insulating substrate 10 such as a glass substrate. In the active area ACT, the array substrate AR has a first insulating film 11, a second insulating film 12, a pixel electrode PE, a first spacer SP1, a first alignment on the side of the first insulating substrate 10 facing the counter substrate CT. A film AL1, a switching element (not shown), and the like are provided. In the peripheral area PRP, the array substrate AR has a first insulating film 11 and a second insulating film 12 extending from the active area ACT on the side of the first insulating substrate 10 facing the counter substrate CT, and an outer peripheral wiring W. , A first bank BK1, a first alignment film AL1, and the like.

  The first insulating film 11 is disposed on the first insulating substrate 10. The first insulating film 11 extends not only to the active area ACT but also to the peripheral area PRP. The first insulating film 11 is made of an inorganic material such as silicon oxide (SiO) or silicon nitride (SiN), and may have a single layer structure of an insulating layer made of an inorganic material. In addition, a laminated structure of a plurality of insulating layers made of an inorganic material may be used.

  The outer peripheral wiring W is formed on the first insulating film 11. The outer peripheral wiring W is formed of a wiring material in the same layer as the gate wiring G and the source wiring S. As a wiring material applied to the peripheral wiring W, for example, aluminum (Al), molybdenum (Mo), tungsten (W), titanium (Ti), silver (Ag), or the like, an alloy, or a laminate of a plurality of metals Etc. Here, the outer peripheral wiring W may be a simple wiring having a desired potential, or may be various circuits arranged in the peripheral area PRP.

  The second insulating film 12 is an interlayer insulating film, extends not only to the active area ACT but also to the peripheral area PRP, and is disposed on the first insulating film. The second insulating film 12 covers the outer peripheral wiring W in the peripheral area PRP. More specifically, the second insulating film 12 covers the upper surface and side surfaces of the outer peripheral wiring W. In other words, the outer peripheral wiring W is not exposed to the outside and is not directly exposed to the outside air or moisture contained in the outside air. Such a second insulating film 12 planarizes the surface and is formed of an organic material such as a transparent resin, for example, but is preferably a material with low water permeability. Note that the second insulating film 12 may be formed of an inorganic material having a lower water permeability or a material having a higher packing density. By covering the outer peripheral wiring W with the second insulating film 12 made of such a material, it is possible to suppress corrosion of the outer peripheral wiring W due to moisture permeated through the second insulating film 12.

  The pixel electrode PE is formed on the second insulating film 12 in the active area ACT. The material for forming the pixel electrode PE may be a transparent conductive material such as indium tin oxide (ITO) or a reflective metal material such as aluminum.

  The first bank BK1 is formed on the second insulating film 12 in the peripheral area PRP. In the illustrated example, the first bank BK1 has a reverse tapered cross-sectional shape in which the upper surface on the counter substrate CT side is larger than the bottom surface in contact with the second insulating film 12. Further, although not shown, the first bank BK1 may have a rectangular shape, that is, a cross-sectional shape in which the bottom surface and the top surface are substantially the same shape and face each other with substantially the same area. The first bank BK1 is desirably located in the vicinity of the substrate end 10E of the first insulating substrate 10 in the region on the second insulating film 12. Such first bank BK1 is made of, for example, a resin material.

  The first spacer SP1 may be formed on the pixel electrode PE or the second insulating film 12 in the active area ACT, and a part thereof may be formed on the pixel electrode PE or the second insulating film 12. . In the illustrated example, the first spacer SP1 has a reverse tapered cross-sectional shape in which the upper surface is larger than the bottom surface. Although not shown, the first spacer SP1 may have a rectangular shape, that is, a cross-sectional shape in which the bottom surface and the top surface are substantially the same shape and face each other with substantially the same area, or a forward taper shape, that is, a top surface. The bottom surface may have a cross-sectional shape that is enlarged. That is, the first spacer SP1 may have a cross-sectional shape equivalent to that of the first bank BK1, or may have a different cross-sectional shape. Note that the heights of the first spacer SP1 and the first bank BK1 are substantially the same. Such a first spacer SP1 is formed of, for example, the same resin material as that of the first bank BK1. That is, the first bank BK1 and the first spacer SP1 can be collectively formed in the same process using the same material.

  The first alignment film AL1 covers the pixel electrode PE and is disposed on the second insulating film 12 in the active area ACT. The first alignment film AL1 also extends to the peripheral area PRP and is disposed on the second insulating film 12. Although not described in detail, the first alignment film AL1 is also disposed on the upper surface of the first spacer SP1 and the upper surface of the first bank, but is interrupted on the side surface of the first bank BK1. That is, the first bank BK1 having a reverse tapered cross-sectional shape is not completely covered by the first alignment film AL1, and the portion of the first alignment film AL1 remaining on the upper surface of the first bank BK1 The portion disposed on the second insulating film 12 is divided. The first spacer SP1 may be completely covered with the first alignment film AL1, or, like the first bank BK1, the first alignment film AL1 may be interrupted on the side surface of the first spacer SP1.

  On the other hand, the counter substrate CT is formed using a transparent second insulating substrate 20 such as a glass substrate. In the active area ACT, the counter substrate CT has a black matrix, a color filter 22, an overcoat layer 23, a counter electrode CE, and a second spacer SP2 which are not shown on the side of the second insulating substrate 20 facing the array substrate AR. And the second alignment film AL2. In the peripheral area PRP, the counter substrate CT has a peripheral light shielding layer 24, an overcoat layer 23 extending from the active area ACT, a second bank BK2, a second bank BK2 on the side of the second insulating substrate 20 facing the array substrate AR. A bi-alignment film AL2 is provided.

  The black matrix and the peripheral light shielding layer 24 are formed on the side of the second insulating substrate 20 facing the array substrate AR. The black matrix is formed in a lattice shape in the active area ACT so as to face the wiring portions such as the gate wiring G, the source wiring S, and the switching element SW. The peripheral light shielding layer 24 extends over substantially the entire area of the peripheral area PRP and is connected to the black matrix of the active area ACT. Such a peripheral light shielding layer 24 is formed of, for example, a resin material colored in black or a light shielding metal material such as chromium (Cr).

  The color filter 22 is formed on the side of the second insulating substrate 20 facing the array substrate AR in the active area ACT. Such a color filter 22 is formed of, for example, a resin material colored in red, green, blue, or the like. A red color filter made of a resin material colored in red is arranged in the red pixel, a green color filter made of a resin material colored in green is arranged in the green pixel, and a resin colored blue in the blue pixel A blue color filter made of material is arranged.

  The overcoat layer 23 covers the color filter 22 in the active area ACT, extends to the peripheral area PRP, and covers the peripheral light shielding layer 24. Such an overcoat layer 23 is formed of, for example, a transparent resin material.

  The counter electrode CE is formed on the side of the overcoat layer 23 that faces the array substrate AR in the active area ACT. Such a counter electrode CE is formed of a transparent conductive material such as ITO.

  The second bank BK2 is formed on the overcoat layer 23 in the peripheral area PRP. In the illustrated example, the second bank BK2 has a reverse tapered cross-sectional shape in which the upper surface on the array substrate AR side is larger than the bottom surface in contact with the overcoat layer 23. Further, although not shown, the second bank BK2 may have a rectangular shape, that is, a cross-sectional shape in which the bottom surface and the top surface are substantially the same shape and face each other with substantially the same area. Note that the second bank BK2 is located in the vicinity of the substrate end 20E of the second insulating substrate 20 in the region on the overcoat layer 23, but the active area ACT from the position immediately above the first bank BK1. Located on the side. Such a second bank BK2 is formed of, for example, a resin material, like the first bank BK1. Note that the height of the second bank BK2 is different from the height of the first bank BK1, and in the illustrated example, the height of the second bank BK2 (thickness from the bottom surface contacting the overcoat layer 23 to the top surface). Is lower than the height of the first bank BK1 (the thickness from the bottom surface to the top surface in contact with the second insulating film 12).

  The second spacer SP2 is formed on the counter electrode CE in the active area ACT. In the illustrated example, the second spacer SP2 has a reverse tapered cross-sectional shape in which the upper surface is larger than the bottom surface. Although not shown, the second spacer SP2 may have a rectangular shape, that is, a cross-sectional shape in which the bottom surface and the top surface are substantially the same shape and face each other with substantially the same area, or a forward taper shape, that is, a top surface. The bottom surface may have a cross-sectional shape that is enlarged. That is, the second spacer SP2 may have a cross-sectional shape equivalent to that of the second bank BK2, or may have a different cross-sectional shape. The heights of the second spacer SP2 and the second bank BK2 are substantially the same. Note that the height of the second spacer SP2 is different from the height of the first spacer SP1, and in the illustrated example, the height of the second spacer SP2 (thickness from the bottom surface to the upper surface contacting the counter electrode CE) is It is lower than the height of the first spacer SP1 (thickness from the bottom surface to the top surface in contact with the pixel electrode PE or the second insulating film 12). Such a second spacer SP2 is formed of, for example, the same resin material as that of the second bank BK2. That is, the second bank BK2 and the second spacer SP2 can be collectively formed in the same process using the same material.

  The second alignment film AL2 covers the counter electrode CE in the active area ACT. The second alignment film AL2 also extends to the peripheral area PRP and covers the overcoat layer 23. Although not described in detail, the second alignment film AL2 is also disposed on the upper surface of the second spacer SP2 and the upper surface of the second bank BK2, but is interrupted on the side surface of the second bank BK2. That is, the second bank BK2 having a reverse tapered cross-sectional shape is not completely covered by the second alignment film AL2, and the portion of the second alignment film AL2 remaining on the upper surface of the second bank BK2 The portion covering the overcoat layer 23 is divided. The second spacer SP2 may be completely covered with the second alignment film AL2, or, like the second bank BK2, the second alignment film AL2 may be interrupted on the side surface of the second spacer SP2.

  In the illustrated example, the height of the first spacer SP1 and the first bank BK1 is equivalent to the cell gap between the first alignment film AL1 of the array substrate AR and the second alignment film AL2 of the counter substrate CT. The heights of the second spacer SP2 and the second bank BK2 are smaller than the cell gap. That is, the first spacer SP1 and the first bank BK1 are in contact with the second alignment film AL2, respectively, and function as main spacers that support the counter substrate CT. The second spacer SP2 and the second bank BK2 are not in contact with the first alignment film AL1, and function as sub-spacers spaced from the array substrate AR.

  The magnitude relationship between the height of the first spacer SP1 and the first bank BK1 and the height of the second spacer SP2 and the second bank BK2 may be reversed. That is, each of the second spacer SP2 and the second bank BK2 functions as a main spacer that is in contact with the first alignment film AL1 and supports the array substrate AR, while the first spacer SP1 and the first bank BK1 are each in the second alignment. You may comprise so that it may function as a sub-spacer which is not in contact with film | membrane AL2 and was spaced apart from counter substrate CT.

  The array substrate AR and the counter substrate CT as described above are arranged so that the first alignment film AL1 and the second alignment film AL2 face each other, and are sealed in a state where a predetermined cell gap is formed mainly by the first spacer SP1. The material SE is bonded together. The first bank BK1 and the second bank BK2 are surrounded by the seal material SE. That is, both the side surface of the first bank BK1 and the side surface of the second bank BK2 are covered with the sealing material SE. Further, a seal material SE is interposed between the second bank BK2 and the array substrate AR.

  The liquid crystal layer LQ is enclosed inside surrounded by the seal material SE. The first spacer SP1 and the second spacer SP2 are surrounded by the liquid crystal layer LQ. That is, the side surface of the first spacer SP1 and the side surface of the second spacer SP2 are both covered with the liquid crystal layer LQ. Further, a liquid crystal layer LQ is interposed between the second spacer SP2 and the array substrate AR.

  A first optical element OD1 including a first polarizing plate PL1 is disposed on the outer surface of the first insulating substrate 10. A second optical element OD2 including a second polarizing plate PL2 is bonded to the outer surface of the second insulating substrate 20.

  Next, an example of a method for manufacturing the display panel PNL described above will be described. Note that when manufacturing the display panel PNL, a first mother substrate that collectively forms a plurality of array substrates AR and a second mother substrate that collectively forms a plurality of counter substrates CT are prepared. A method of cleaving into a single display panel PNL after the first mother substrate and the second mother substrate are bonded together may be employed.

  FIG. 3 is a diagram for explaining a manufacturing process of the array substrate AR.

  First, as shown by (a) in the drawing, the first insulating film 11 is formed on the first insulating substrate 10. Thereafter, in the peripheral area PRP, the outer peripheral wiring W and the like are formed on the first insulating film 11, and in the active area ACT, various wirings such as a gate wiring and a source wiring are formed although not shown. Thereafter, the second insulating film 12 is formed. Although not shown, switching elements are also formed at the same time in these manufacturing processes. The second insulating film 12 may be formed of an inorganic material or an organic material. Thereafter, in the active area ACT, the pixel electrode PE is formed on the second insulating film 12 and electrically connected to the switching element.

  Subsequently, the first spacer SP1 and the first bank BK1 are formed by a photolithography process. That is, as shown by (b) in the drawing, the resist R1 is applied on the second insulating film 12 and the pixel electrode PE in the active area ACT and the peripheral area PRP. The method for applying the resist R1 is not particularly limited. For example, a method using a slit coater or a spin coater can be applied. The resist R1 is applied with a relatively thick film thickness, for example, with a film thickness of 3.5 μm. As the resist R1, for example, a negative photoresist that is cured by light irradiation is applicable. After applying such a resist R1, the resist R1 is exposed through a photomask PM1 in which a desired opening pattern is formed. The opening pattern of the photomask PM1 is formed so that, for example, the light irradiation amount in the peripheral portion is lower than that in the central portion. In the resist R1, the region exposed through the opening pattern is cured.

  Subsequently, as shown by (c) in the figure, the resist R1 is developed to form the first spacer SP1 on the pixel electrode PE in the active area ACT and the second in the peripheral area PRP. A first bank BK1 is formed on the insulating film 12. That is, the uncured portion of the resist R1 is removed by the development process, and only the cured portion remains in a shape having a reverse-tapered cross section, and the dot-shaped first spacer SP1 is formed in the active area ACT. In the peripheral area PRP, a line-shaped first bank BK1 surrounding the active area ACT is formed. As an example of the dimensions of the first spacer SP1 formed in this way, the height H1 from the bottom surface in contact with the pixel electrode PE was 3.3 μm, and the width W1 of the top surface was 5 μm. The size of the first bank BK1 was also the same as that of the first spacer SP1.

  Subsequently, as shown by (d) in the drawing, an alignment film material is printed from above the pixel electrode PE, the first spacer SP1, the second insulating film 12, and the first bank BK1. The alignment film material is printed all over the active area ACT and the peripheral area PRP. The thickness of the alignment film material to be printed is, for example, about 0.05 μm to 0.1 μm. The alignment film material printed in this way is disposed on the pixel electrode PE and the second insulating film 12, and is also disposed on the upper surfaces of the first spacer SP1 and the first bank BK1 (in the drawing, the first film The alignment film material on the upper surface of one spacer SP1 and the first bank BK1 is omitted). On the other hand, since not only the first bank BK1 but also the first spacer SP1 is formed in a reverse taper shape, the printed alignment film material is not applied to the side surfaces of the first bank BK1 and the first spacer SP1. Therefore, in the peripheral area PRP, the first alignment film is formed on the inner side (that is, the side adjacent to the active area ACT) and the outer side (the substrate end portion 10E side of the first insulating substrate 10) with the linear first bank BK1 interposed therebetween. AL1 is divided. That is, the first alignment film AL1 located on the inner side surrounded by the first bank BK1 is not connected to the region outside the first bank BK1. The first alignment film AL1 may be subjected to an alignment process as necessary.

  The array substrate AR is manufactured through the above steps.

  Subsequently, as shown by (e) in the drawing, a sealing material SE is formed. The sealing material SE may be drawn using a dispenser or may be printed using a printing plate. Such a sealing material SE is formed in a rectangular frame shape surrounding the active area ACT so as to include the first bank BK1.

  FIG. 4 is a diagram for explaining a manufacturing process of the counter substrate CT.

  First, as shown by (a) in the figure, a black matrix and a color filter 22 (not shown) are formed on the second insulating substrate 20 in the active area ACT, and the peripheral light shielding layer 24 is formed in the peripheral area PRP. After the formation, an overcoat layer 23 is formed. Thereafter, the counter electrode CE is formed on the overcoat layer 23 in the active area ACT.

  Subsequently, the second spacer SP2 and the second bank BK2 are formed by a photolithography process. That is, as shown by (b) in the figure, a resist R2 is applied on the overcoat layer 23. As a method for applying the resist R2, a method similar to the method for applying the resist R1 can be applied. This resist R2 is applied with a film thickness thinner than that of the resist R1, for example, with a film thickness of 3.1 μm. For example, a negative photoresist can be used as the resist R2. After applying such a resist R2, the resist R2 is exposed through a photomask PM2 in which a desired opening pattern is formed. The opening pattern of the photomask PM2 is formed so that, for example, the light irradiation amount in the peripheral portion is lower than that in the central portion. In the resist R2, the region exposed through the opening pattern is cured.

  Subsequently, as shown by (c) in the figure, the resist R2 is developed to form the second spacer SP2 on the counter electrode CE in the active area ACT and overcoat in the peripheral area PRP. A second bank BK2 is formed on the layer 23. That is, the uncured portion of the resist R is removed by the development process, and only the cured portion remains in a shape having a reverse tapered cross section, and the dot-shaped second spacer SP2 is formed in the active area ACT. In the peripheral area PRP, a line-shaped second bank BK2 surrounding the active area ACT is formed. As an example of the dimension of the second spacer SP2 formed in this manner, the height H2 from the bottom surface in contact with the counter electrode CE was 2.9 μm, and the width W2 of the top surface was 5 μm. The size of the second bank BK2 was also the same as that of the second spacer SP2.

  Subsequently, as shown by (d) in the drawing, an alignment film material is printed from above the counter electrode CE, the second spacer SP2, the overcoat layer 23, and the second bank BK2. The alignment film material is printed all over the active area ACT and the peripheral area PRP. The thickness of the alignment film material to be printed is, for example, about 0.05 μm to 0.1 μm. The alignment film material printed in this manner is disposed on the counter electrode CE and the overcoat layer 23, and is disposed on the upper surfaces of the second spacer SP2 and the second bank BK2 (the second spacer in the drawing). The alignment film material on the upper surface of SP2 and the second bank BK2 is omitted). On the other hand, since not only the second bank BK2 but also the second spacer SP2 is formed in a reverse taper shape, the printed alignment film material is not applied to the side surfaces of the second bank BK2 and the second spacer SP2. Therefore, in the peripheral area, the second alignment film AL2 is formed on the inner side (that is, the side adjacent to the active area ACT) and the outer side (the substrate end 20E side) with the line-shaped second bank BK2 interposed therebetween. Is divided. That is, the second alignment film AL2 located on the inner side surrounded by the second bank BK2 is not connected to a region outside the second bank BK2. The second alignment film AL2 may be subjected to an alignment process as necessary.

  The counter substrate CT is manufactured through the above steps.

  Thereafter, the array substrate AR and the counter substrate CT are bonded together. At this time, the first spacer SP1 and the first bank BK1 support the counter substrate CT, and the second spacer SP2 and the second bank BK2 are separated from the array substrate AR. When the array substrate AR and the counter substrate CT are bonded together, for example, a closed loop seal material SE is formed on the array substrate AR, and after the liquid crystal material is dropped inside the seal material SE, the liquid crystal material is bonded to the counter substrate CT. A method may be applied, or a sealing material SE having a liquid crystal injection port is formed on the array substrate AR and bonded to the counter substrate CT, and then a liquid crystal material is injected from the liquid crystal injection port and sealed. You may do it. Thereby, the display panel PNL having the cross-sectional structure as shown in FIG. 2 is manufactured.

  According to the present embodiment, in the active area ACT, the first spacer (main spacer) SP1 for mainly forming a cell gap and the second spacer (sub-spacer) SP2 having a height lower than the first spacer SP1. Are arranged respectively. For this reason, while maintaining the cell gap uniformly by the first spacer SP1, the second spacer SP2 can function and improve the cushioning property when a stress that is pressed from the outside is applied. It is possible to improve the strength against the pressing force. In addition, the first spacer SP1 and the second spacer SP2 are formed on different substrates (for example, the first spacer SP1 is formed on the array substrate AR, and the second spacer SP2 is formed on the counter substrate CT). . For this reason, it is possible to form each spacer with a stable size (height and width) as compared with the case where two types of spacers having different heights are collectively formed. In particular, even when a fine pattern is required for high definition, the first spacer SP1 and the second spacer SP2 can be easily and stably formed in desired sizes. . Therefore, it is possible to suppress deterioration in display quality due to nonuniform cell gaps or uneven cell gaps.

  In addition, even when a large impact is applied from the outside in a low temperature environment with the liquid crystal material contracted, the second spacer SP2 serves as a cushion and can suppress the generation of bubbles (low temperature bubbles) in the liquid crystal layer LQ. It becomes possible. Therefore, it is possible to suppress a decrease in reliability.

  Further, according to the present embodiment, the array substrate AR is discontinuous at the side of the first bank BK1 and the first bank BK1 formed in a line shape having a reverse taper shape or a rectangular cross section in the peripheral area PRP. And a first alignment film AL1. Further, the counter substrate CT includes a second bank BK2 having a reverse tapered shape or a rectangular cross-sectional shape in the peripheral area PRP and formed in a line shape, and a second alignment film AL2 interrupted at the side surface of the second bank BK2. It is equipped with. That is, the first alignment film AL1 is divided between the inside and outside of the first bank BK1, and the second alignment film AL2 is divided between the inside and outside of the second bank BK2.

  As a result, even if the end portions of the first alignment film AL1 and the second alignment film AL2 are exposed to the outside, the moisture penetrating from the end portions of the first alignment film AL1 further inward from the first bank BK1. It is possible to suppress the permeation and further permeation of the water permeated from the end of the second alignment film AL2 to the inner side of the second bank BK2. Therefore, the occurrence of defects due to moisture permeated through the first alignment film AL1 and the second alignment film AL2 (intrusion of moisture into the liquid crystal layer, corrosion of the wiring material, a decrease in the alignment regulating force of the alignment film, etc.) is suppressed. It becomes possible.

  In particular, in recent years, demands for higher definition and narrower frames have increased, and the distance from the sealing material SE to the substrate end portions 10E and 20E has become shorter, so that the array substrate AR and the counter substrate CT are bonded together. In consideration of a margin or the like, the first alignment film AL1 and the second alignment film AL2 are formed by printing only in a desired region (that is, formed so that the end portion of the alignment film is not exposed to the outside). High accuracy is required.

  In order to deal with such a problem, in the present embodiment, the first alignment film AL1 and the second alignment film are printed by printing the alignment film material over the entire surface of the active area ACT and the peripheral area PRP with a relatively rough printing technique. AL2 is formed. Since the printed alignment film material is interrupted at the side surface of the first bank BK1 and the side surface of the second bank BK having an inversely tapered or rectangular cross-sectional shape, the first alignment located on the inner side and the outer side of the first bank BK1. The film AL1 is divided, and the first alignment film AL1 located inside and outside the second bank BK2 is divided. For this reason, it is possible to block the permeation path of moisture permeated from the first alignment film AL1 and the second alignment film AL2. For this reason, it becomes possible to cope with high definition and narrow frame while realizing reduction in reliability and deterioration in display quality.

  Further, since the first bank BK1 and the second bank BK2 are formed in a continuous frame shape surrounding the active area ACT, the first alignment film AL1 and the second alignment film AL2 are formed over the entire circumference surrounding the active area. It is possible to further reduce the moisture permeation path via the.

  The first bank BK1 is located closer to the substrate end 10E side of the array substrate AR than the second bank BK2. That is, the first bank BK1 can block the moisture transmission path at a position closer to the end of the display panel PNL and further suppress the penetration of moisture into the first alignment film AL1. It becomes possible to further suppress the arrival of moisture to the upper peripheral wiring W.

  Further, the first bank BK1 and the first spacer SP1 can be collectively formed using the same material, and the second bank BK2 and the second spacer SP2 are collectively formed using the same material. Therefore, it is possible to suppress an increase in the manufacturing process. Further, when the first bank BK1 and the first spacer SP1 are formed at the same time, the cross-sectional shapes of the first bank BK1 and the first spacer SP1 can be made equal or different depending on the opening pattern of the photomask. It is also possible to The same applies to the second bank BK2 and the second spacer SP2 formed simultaneously.

  Next, another structural example will be described. That is, at least one of the first spacer SP1 and the second spacer SP2 may have a forward tapered cross-sectional shape.

  FIG. 5 is a cross-sectional view schematically showing another example of the structure of the display panel PNL shown in FIG.

  The structural example shown here is different from the structural example shown in FIG. 2 in that both the first spacer SP1 and the second spacer SP2 have a forward tapered cross-sectional shape. That is, in the active area ACT, the first spacer SP1 provided in the array substrate AR has a cross-sectional shape in which the bottom surface contacting the pixel electrode PE or the second insulating film 12 is larger than the top surface facing the counter substrate CT. The second spacer SP2 provided in the counter substrate CT has a cross-sectional shape in which the bottom surface in contact with the overcoat layer 23 is larger than the top surface facing the array substrate AR.

  In the structural example shown here, the array substrate AR is provided with the first spacer SP1 having a forward tapered cross-sectional shape in the active area ACT, while being reversely tapered (or rectangular) in the peripheral area PRP. The first bank BK1 having the following cross-sectional shape is provided. The first spacer SP1 is made of, for example, the same resin material as the first bank BK1. That is, the first bank BK1 and the first spacer SP1 can be collectively formed in the same process using the same material.

  Further, the counter substrate CT includes a second spacer SP2 having a forward tapered cross section in the active area ACT, while a second area having a reverse tapered (or rectangular) cross section in the peripheral area PRP. A bank BK2 is provided. The second spacer SP2 is made of the same resin material as that of the second bank BK2, for example. That is, the second bank BK2 and the second spacer SP2 can be collectively formed in the same process using the same material.

  For example, a photolithography process similar to the manufacturing process described above can be applied here. That is, after applying a negative type photoresist, the photoresist is exposed through a photomask in which a desired opening pattern is formed. Thereafter, by developing the photoresist, the first bank BK1 and the first spacer SP1 are simultaneously formed, and the second bank BK2 and the second spacer SP2 are simultaneously formed. However, it is necessary to devise a photomask applied here.

  Other configurations are the same as those of the structural example shown in FIG. 2, and detailed description thereof is omitted.

  FIG. 6 is a plan view showing an example of a photomask applicable to this embodiment.

  The opening pattern AP1 of the photomask shown in (A) in the drawing is applied to form the first spacer SP1 or the second spacer SP2 in a dot shape. The opening pattern AP1 is a quadrangle in the illustrated example. The periphery of the opening pattern AP1 is shielded from light. The negative photoresist exposed through the opening pattern AP1 is cured around the center of the opening pattern AP1 and developed to develop the first spacer SP1 or the first spacer SP1 having a forward tapered cross-sectional shape. Two spacers SP2 can be formed.

  The opening pattern AP2 indicated by (B) in the drawing is applied to form the first bank BK1 or the second bank BK2 in a line shape. The opening pattern AP2 extends linearly in the illustrated example. The opening pattern AP2 includes a plurality of patterns. That is, the central line-shaped pattern AP21 is relatively wide. The line-shaped pattern AP22 located on both sides of the pattern AP21 has a narrower width than the pattern AP21. A plurality of the patterns AP21 are arranged at intervals in the width direction. For example, the pattern AP21 is formed so that the width becomes narrower as the distance from the pattern AP21 at the center is increased. Accordingly, the opening pattern AP2 is formed so that the light irradiation amount in the peripheral portion is lower than that in the central portion. When a negative photoresist is exposed through such an opening pattern AP2, the following phenomenon occurs. That is, in the photoresist, the region exposed through the pattern AP21 at the center of the opening pattern AP2 is hardened to the center and the region exposed through the pattern AP22 located in the peripheral portion of the pattern AP21. Is hardened only near the surface and hard to harden to the deep part. By developing the photoresist thus exposed, the first bank BK1 or the second bank BK2 having a reverse tapered cross-sectional shape can be formed.

  That is, the negative photoresist is exposed and developed through a single photomask having the opening pattern AP1 shown in FIG. 5A and the opening pattern AP2 shown in FIG. The tapered first bank BK1 and the forward tapered first spacer SP1 can be formed simultaneously. Similarly, the reverse tapered second bank BK2 and the forward tapered second spacer SP2 are formed simultaneously. It is possible.

  Since the first spacer SP1 functioning mainly as a main spacer that forms the cell gap has a forward tapered cross section, the support strength of the substrate compared to the case where the first spacer SP1 having a reverse tapered cross section is applied. Can be improved. Further, since the second spacer SP2 functioning as a sub-spacer has a forward tapered cross section, the strength against external pressing force can be increased as compared with the case where the second spacer SP2 having a reverse tapered cross section is applied. Further improvement is possible.

  As described above, according to the present embodiment, it is possible to provide a liquid crystal display device and a method for manufacturing the same that can suppress a decrease in reliability and a deterioration in display quality.

  In addition, this invention is not limited to the said embodiment itself, In the stage of implementation, it can change and implement a component within the range which does not deviate from the summary. Further, various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, you may combine suitably the component covering different embodiment.

PNL ... Display panel AR ... Array substrate CT ... Counter substrate LQ ... Liquid crystal layer ACT ... Active area PRP ... Peripheral area PE ... Pixel electrode CE ... Counter electrode 11 ... First insulating film 12 ... Second insulating film BK1 ... First bank BK2 ... second bank AL1 ... first alignment film AL2 ... second alignment film W ... peripheral wiring SE ... sealing material

Claims (15)

A first insulating substrate; an insulating film disposed on the first insulating substrate; a pixel electrode formed on the insulating film in an active area for displaying an image; a first alignment film covering the pixel electrode; A first substrate comprising:
A second substrate comprising: a second insulating substrate; and a second alignment film disposed on a side of the second insulating substrate facing the first substrate and facing the first alignment film;
A dot-shaped first that is formed on one of the first substrate and the second substrate, supports the other substrate, and forms a cell gap between the first alignment film and the second alignment film. A spacer;
A dot-shaped second spacer formed on the other of the first substrate and the second substrate and spaced from the one substrate;
A liquid crystal layer held in the cell gap;
A liquid crystal display device comprising:   The first substrate further includes a first bank having a reverse-tapered or rectangular cross-sectional shape in a peripheral area surrounding the active area and formed in a line shape on the insulating film. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is interrupted at a side surface of the first bank.   The liquid crystal display device according to claim 2, wherein the first bank is formed in a continuous frame shape surrounding the active area.   The liquid crystal display device according to claim 2, wherein the first spacer has a cross-sectional shape equivalent to that of the first bank.   The liquid crystal display device according to claim 2, wherein the first spacer has a forward tapered cross-sectional shape.   The second substrate further includes a second bank having a reverse tapered shape or a rectangular cross-sectional shape in a peripheral area surrounding the active area and formed in a line shape, and the second alignment film includes the second alignment film. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is interrupted at a side surface of the bank.   The liquid crystal display device according to claim 6, wherein the second bank is formed in a continuous frame shape surrounding the active area.   The liquid crystal display device according to claim 6, wherein the second spacer has a cross-sectional shape equivalent to that of the second bank.   The liquid crystal display device according to claim 6, wherein the second spacer has a forward tapered cross-sectional shape.   The liquid crystal display device according to claim 6, wherein the first bank is located closer to a substrate end portion of the first substrate than the second bank. Forming an insulating film on the first insulating substrate; forming a pixel electrode on the insulating film in an active area for displaying an image; forming a first spacer in a dot shape on the pixel electrode or on the insulating film; Preparing a first substrate on which a first alignment film covering the pixel electrode is formed;
In the active area, a second substrate having a second alignment film formed with a second spacer having a height different from the first spacer formed in a dot shape on the side of the second insulating substrate facing the first substrate is prepared. ,
The first substrate and the second substrate are bonded together, and the first spacer or the second spacer supports the other substrate to form a cell gap between the first alignment film and the second alignment film. A method for manufacturing a liquid crystal display device. In the photolithography process for forming the first spacer, a first bank having a reverse taper shape or a rectangular cross-sectional shape in a peripheral area surrounding the active area and formed in a line shape on the insulating film is simultaneously formed. The first alignment layer is interrupted at a side surface of the first bank,
In the photolithography process for forming the second spacer, a second bank having an inversely tapered or rectangular cross-sectional shape in the peripheral area and formed in a line shape is simultaneously formed, and the second alignment film is formed by the second alignment film. The method for manufacturing a liquid crystal display device according to claim 11, wherein the liquid crystal display device is cut off at a side of the bank.   The first bank and the second bank are coated with a negative photoresist, and the photoresist is exposed through a photomask having an opening pattern in which a light irradiation amount in a peripheral portion is lower than that in a central portion, The method of manufacturing a liquid crystal display device according to claim 12, wherein the liquid crystal display device is formed by developing a photoresist.   14. The method of manufacturing a liquid crystal display device according to claim 12, wherein the first spacer has a cross-sectional shape equivalent to that of the first bank, and the second spacer has a cross-sectional shape equivalent to that of the second bank.   14. The method of manufacturing a liquid crystal display device according to claim 12, wherein at least one of the first spacer and the second spacer has a forward tapered cross-sectional shape.

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