JP2014116377A - Power supply structure and circuit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power supply structure in which electromagnetic radiation and variation of power supply voltage due to resonance of electromagnetic energy between power supply layers can be prevented, without requiring decoupling capacitors, and a voltage drop occurring between a voltage supply section and a semiconductor integrated circuit is also suppressed, and to provide a circuit board.SOLUTION: A power supply structure 1 including two power supply layers 11, 13, and an interlayer insulating film 15 held between the power supply layers 11, 13 consists of such a structure that at least one of the power supply layers 11, 13 is a conductive particulate dispersion film (a) where conductive particulates are dispersed into an organic material, and bypass wiring 14 provided on the conductive particulate dispersion film (a) via the interlayer insulating film 15 is connected with the conductive particulate dispersion film (a). A circuit board includes the power supply structure 1 of such a structure.

Description

  The present invention relates to a power supply structure and a circuit board, and in particular, has a structure in which a bypass wiring is provided in a power supply structure in which an interlayer insulating film is sandwiched between two power supply layers in the substrate, and a power supply structure of this structure It relates to a circuit board.

  In recent years, electronic devices equipped with IC chips such as computers and mobile communication devices have been increased in speed and mounting density. In such an electronic device, it is an important issue to prevent fluctuations in power supply voltage and generation of electromagnetic noise caused by the switching operation of the semiconductor integrated circuit formed on the IC chip. Therefore, a decoupling capacitor is connected in parallel to the power supply terminal of the IC chip to form a decoupling circuit, and the decoupling capacitor absorbs a sudden change in current caused by the switching operation of the semiconductor integrated circuit, thereby reducing the power supply voltage. Fluctuation and generation of electromagnetic noise are suppressed.

  In the decoupling circuit as described above, the parasitic inductance generated in the path between the IC chip and the decoupling capacitor affects the power supply voltage. For this reason, a flat power layer (hereinafter referred to as a solid power layer) is placed opposite to the inside of the circuit board on which the IC chip is mounted, and this is placed close to the IC chip as a decoupling capacitor, thereby reducing the parasitic inductance. A small holding structure is used. In such a decoupling capacitor, metal plates are provided on both surfaces of a dielectric layer, and this is used as a solid power supply layer (see, for example, Patent Document 1 below).

  However, in a circuit board provided with a solid power supply layer, electromagnetic energy resonates between two solid power supply layers when a high-frequency power supply current flows. This resonance becomes a factor of electromagnetic radiation and a new factor causing fluctuations in the power supply voltage.

  Therefore, as a configuration for preventing this resonance, a configuration in which a plurality of decoupling capacitors corresponding to each frequency band are arranged on the circuit board in a state of being connected in parallel with the IC chip is implemented.

  Further, a power supply structure using a conductive fine particle dispersion film for power supply wiring instead of copper foil has been proposed (see Patent Document 2 below).

JP-A-8-181445 (see paragraphs 0013 to 0014) JP 2012-094843 A

  However, in the configuration in which a plurality of decoupling capacitors corresponding to each frequency band are arranged on the circuit board, the high integration and miniaturization of electronic devices are hindered by the presence of the decoupling capacitors. Moreover, in order to further increase the switching speed of the semiconductor integrated circuit, it is necessary to add a decoupling capacitor corresponding to a higher frequency band. Therefore, the layout design margin of the IC chip and other functional elements on the circuit board is further narrowed. Furthermore, since an actual capacitor has a resistance component and an inductance component, it has a self-resonant frequency, and there is a great technical problem that the impedance does not decrease in a high-frequency region of the GHz order. A semiconductor integrated circuit in the cloud computer generation is required to have a switching speed of 10 GHz or more. However, at present, there is no decoupling capacitor having a resonance point near 10 GHz or higher. Therefore, the speeding up of electronic equipment using a decoupling circuit has reached its limit.

  In addition, when the distance from the voltage supply unit to the semiconductor integrated circuit is long, the power supply wiring length becomes long. Therefore, when the power supply structure is configured using the conductive fine particle dispersion film as the power supply wiring, the DC resistance of the power supply wiring is increased. Becomes higher. As a result, a voltage drop occurs between the voltage supply unit and the semiconductor integrated circuit, and the semiconductor integrated circuit may not be able to supply a voltage required for operation.

  Therefore, the present invention provides a power supply structure and a circuit board capable of preventing fluctuations in electromagnetic radiation and power supply voltage due to resonance of electromagnetic energy between power supply layers without requiring a decoupling capacitor. The purpose is to achieve high integration and miniaturization.

  A power supply structure and a circuit board of the present invention for achieving such an object include an interlayer insulating film and two power supply layers provided in a state of sandwiching the interlayer insulating film, At least one has a conductive fine particle dispersion film in which conductive fine particles are dispersed in an organic material, and the conductive fine particle dispersion film has a structure in which a bypass wiring is connected. In the power supply structure and circuit board of the present invention, the bypass wiring connected to the conductive fine particle dispersion film is provided on the conductive fine particle dispersion film via an interlayer insulating film, or the same as the conductive fine particle dispersion film. It is set as the structure arrange | positioned to one layer.

  The power supply structure and circuit board having such a configuration can be applied to a normal printed wiring board, an LSI package board, a housing having power supply wiring for a power device, and the like.

  In the power supply structure and circuit board configured as described above, at least one of the power supply layers is formed of a conductive fine particle dispersed film. The conduction in the conductive fine particle dispersed film is achieved by ohmic junction at the contact portion between the conductive fine particles contained in the film. Even if the conductive fine particles are not in contact with each other, conduction can be achieved by a tunnel effect or a hot carrier effect. In addition, even when the conductive fine particles are separated from each other, conduction is assisted by many types of near-field effects such as a discharge effect due to electric field concentration and a Schottky effect if the material that disperses the conductive fine particles is a semiconductor. The In the various conductive states as described above, except for the ohmic junction, the time required for the phenomenon change is required for the progress of the electromagnetic energy, which causes a time delay for the progress of the electromagnetic energy.

  In addition, there is a voltage difference corresponding to the interval between the conductive fine particles between the conductive fine particles, and when this voltage difference changes, a displacement current according to the capacity between them flows. That is, capacitive coupling. This not only assists the transmission of electromagnetic energy, but also causes a time delay with respect to the progress of the electromagnetic energy.

  As a more complicated phenomenon, when there is an electric field vector in the traveling direction of electromagnetic energy, an electron density wave corresponding to the electric field appears on the surface of the conductive fine particles. Quantities of this dense wave energy are called plasmons, but the energy exchange phenomenon between plasmons and photons (quantized electromagnetic energy) also assists in the transmission of electromagnetic energy and It becomes a factor causing time delay.

  In the case of using conductive fine particles made of non-oxidizing metal such as silver or gold, or graphite, the ohmic junction component becomes large. On the other hand, even when conductive fine particles made of an oxidizing metal such as copper or aluminum are used, an ohmic junction is ensured to some extent by mechanical oxide film destruction at the contact portion. However, in both cases, the conduction state is maintained by many components that cause a time delay with respect to the progress of electromagnetic energy other than the ohmic junction as described above.

  For this reason, by using a conductive fine particle dispersion film in which conductive fine particles are dispersed in at least one of the two power supply layers, the progress of electromagnetic energy in all frequency bands caused by changing currents and voltages, A time delay is complicated at the infinite number of contacts and non-contact points between the conductive fine particles, and the change gradient of the current voltage becomes gentle (electromagnetic energy time dispersion). This makes it possible to suppress the resonance of electromagnetic energy between the power supply layers in a wide frequency band without using a decoupling capacitor. Moreover, these conduction phenomena other than the ohmic junction do not result in a loss of electromagnetic energy, resulting in an energy efficient time delay dispersion circuit. However, even such an energy efficient conductor has the disadvantage of higher DC resistance than bulk metal.

  Further, by connecting the bypass wiring to the conductive fine particle dispersion film in which the conductive fine particles are dispersed, the direct current resistance of the power supply wiring can be made smaller than that constituted by only the conductive fine particle dispersion film. As a result, by using a circuit board provided with this power supply structure, it is possible to achieve high speed as well as high integration and miniaturization of electronic equipment, and even in power-saving semiconductor integrated circuits with low operating voltage, power wiring It becomes possible to design without being bothered by the voltage drop.

  As described above, according to the power supply structure and the circuit board of the present invention, electromagnetic energy between the power supply layers can be obtained without using a decoupling capacitor by the action of the conductive fine particle dispersion film constituting at least one of the power supply layers. Can be suppressed in a wide frequency band. For this reason, fluctuations in electromagnetic radiation and power supply voltage can be prevented, and the DC resistance of the power supply wiring can be made smaller than that constituted only by the conductive fine particle dispersion film by the structure in which the bypass wiring is connected. As a result, by using a circuit board provided with this power supply structure, it is possible to achieve high speed as well as high integration and miniaturization of electronic equipment, and when the distance from the voltage supply unit to the semiconductor integrated circuit is long, or the operating voltage Even a low-power-consumption type semiconductor integrated circuit can be designed without being bothered by a voltage drop in the power supply wiring.

It is a cross-sectional schematic diagram of the power supply structure of 1st Embodiment. A, B It is a cross-sectional schematic diagram of the power supply structure of 2nd Embodiment. It is a cross-sectional schematic diagram of the circuit board provided with the power supply structure of 3rd Embodiment. It is a cross-sectional schematic diagram of the circuit board provided with the power supply structure of 4th Embodiment. It is a block diagram of the circuit board produced in the Example. It is sectional drawing for demonstrating the layer structure of A and B circuit boards. FIGS. 6A and 6B are schematic cross-sectional views of circuit boards in which wires are connected to the circuit boards of FIGS. 6A and 6B, respectively. A and B are graphs of memory power supply voltage and signal fluctuations measured for the circuit board of FIG. 7A. A, B It is a graph of the power supply voltage and signal fluctuation | variation of the memory measured about the circuit board of FIG. 7B. 7A and 7B are graphs of fluctuations in the IO power supply voltage and signal of the FPGA measured for the circuit board of FIG. 7A. A and B It is a graph of the fluctuation | variation of IO power supply voltage and signal of FPGA measured about the circuit board of FIG. 7B.

Hereinafter, embodiments of the present invention will be described in the following order based on the drawings.
1. First embodiment (first example of power supply structure)
2. Second Embodiment (Second Example of Power Supply Structure)
3. Third embodiment (first example of a circuit board provided with a power supply structure)
4). 4th Embodiment (2nd example of the circuit board provided with the power supply structure)
In each of these embodiments, the structure will be described. The same components are denoted by the same reference numerals, and the description of the overlapping configuration is omitted.

<< 1. First Embodiment >>
<Configuration of power supply structure-1>
FIG. 1 is a schematic cross-sectional view of a power supply structure 1 according to the first embodiment. A power supply structure 1 shown in FIG. 1 includes five power supply layers 11 and 13, a power supply bypass layer 14 that is a bypass layer of the power supply layer 13, and an interlayer insulating film 15 sandwiched therebetween. Structure. The two power supply layers 11 and 13 are connected to different power supplies, and the power supply bypass layer 14 is connected to the power supply layer 13. The power supply bypass layer 14 and the power supply layer 13 are connected at a portion not shown in the cross-sectional view of FIG. Hereinafter, details of these components will be described in the order of the power supply layer 11, the power supply layer 13, the power supply bypass layer 14, and the interlayer insulating film 15. The two power supply layers 11 and 13 are applied as a pair in which a high voltage is applied to one and a low voltage is applied to the other, and they are used as a pair to refer to each other. The The power supply bypass layer 14 is connected to the power supply layer 13. Here, either of the two power supply layers 11 and 13 may be a power supply and which may be a ground. Further, when there are a plurality of such power supply pairs, they are formed in a divided configuration.

  In the power supply structure 1, the power supply layers 11 and 13 and the power supply bypass layer 14 may not be provided on the entire surface of the interlayer insulating film 15. The power supply layers 11 and 13 and the power supply bypass layer 14 may be patterned on both surfaces of the insulating film 15. For example, when used for supplying a plurality of different power supply voltages, at least a power supply layer used as a power supply among the power supply layers 11 and 13 and the power supply bypass layer 14 is patterned into a shape divided into a plurality on the interlayer insulating film 15. Suppose that it is done. If the interlayer insulating film 15 is held between the patterned power supply layers 11 and 13 and the power supply bypass layer 14, both the power supply layers 11 and 13 and the power supply bypass layer 14 are patterned. In this way, a power supply structure having a plurality of power supply structure parts is obtained.

  The power supply layer 11 and the power supply bypass layer 14 are configured as thin films obtained by planarly extending a bulk material. The material constituting the power supply layer 11 is not limited as long as the material has good conductivity. For example, copper (Cu), aluminum (Al), gold (Au), silver (Ag), and An alloy containing these as the main components is used as the metal foil. Here, for example, a power supply layer 11 and a power supply bypass layer 14 made of copper foil are provided.

  The power supply layer 13 has a conductive fine particle dispersed film a in which conductive fine particles are dispersed in an organic material. The conductive fine particles used for the conductive fine particle dispersed film a are made of a material having good conductivity. Such conductive fine particles are configured using gold (Au), silver (Ag), copper (Cu), aluminum (Al), nickel (Ni), or graphite. These materials may be used alone, or may be used as an alloy mainly composed of these materials. Furthermore, conductive fine particles may be formed by mixing a plurality of types of particles made of these materials and particles made of other conductive materials.

  These conductive fine particles are used in the shape of flakes (flakes), spheres, and long particles, and a plurality of shapes may be used in combination.

When graphite is used as the conductive fine particles, disc-shaped graphite particles having a and b surfaces as the bottom are used. The graphite particles are particles in which graphene is laminated in the ab plane direction. Here, copper has a free electron density of 1.3 × 10 ²³ / cm ³ but an electron mobility of only 5.1 × 10 ¹ cm ² / V · s. On the other hand, the a and b surfaces of graphite have a free electron density of only 10 ¹³ / cm ^3, but have a high electron mobility of 1 × 10 ⁴ cm ² / V · s and a long mean free path. Therefore, it is said that the electrical conductivity of the a and b surfaces of graphite is better than that of copper. Note that the c-axis direction of graphite has a large resistance. For this reason, it is desirable to use thin crystalline particles of graphene as the conductive fine particles.

  The shape of the conductive fine particles is mainly, for example, a particle shape having a long side direction of 50 μm or less, a short side direction of 10 μm or less, and a thickness of 5 μm or less. It shall be included in the shape.

  As the organic material for dispersing conductive fine particles as described above, a material capable of dispersing conductive fine particles is used. As such an organic material, for example, an epoxy resin, a polyimide resin, a polyamideimide resin, a BT (bismaleide / triazine) resin, or the like can be appropriately selected and used from commonly used organic insulating materials. Moreover, although the organic insulating material enumerated above is a thermosetting resin, it is also possible to use a thermoplastic resin having a Tg (glass transition point) equal to or higher than the soldering temperature as the dispersion material. For example, there are polycarbonate, ABS, polyamide which is not thermoset.

  The conductive fine particle dispersion film a obtained by dispersing the conductive fine particles as described above in an organic material and then curing the conductive fine particles has an electric resistivity of the bulk material of the material constituting the conductive fine particles. The ratio is preferably 10 times or less, more preferably about 5 times. The electrical resistivity of the conductive fine particle dispersion film a can be lowered by increasing the film thickness.

  The fine particle dispersion film a is formed using a paste in which conductive fine particles are dispersed in an organic material diluted with a solvent. For example, it is formed using a commercially available silver paste. The silver paste is formed by dispersing silver particles in a solution obtained by diluting, for example, a precursor of an epoxy resin as an organic material, a curing agent, and other additives as necessary with a solvent. By forming a thin film using such a silver paste and curing the organic material in the thin film, the conductive particles are brought close to each other or partially in contact with each other up to the distance at which the total action occurs. Thus, the conductive state is maintained, and the conductive fine particle dispersed film a is obtained.

  In such a conductive fine particle dispersed film a, the solvent may be removed from the film in the process of curing or drying the organic material (for example, epoxy resin or polyamideimide resin). The fine particle dispersion film a may contain additives such as a dispersant and a cosolvent for improving the dispersibility of the conductive fine particles.

  Further, the film thicknesses of the power supply layer 11 and the power supply bypass layer 14 made of, for example, copper foil, and the power supply layer 13 made of the conductive fine particle dispersed film a are determined by the current capacity handled by the power supply structure 1. If the power supply structure 1 is used in an electronic circuit, the film thickness of the power supply layers 11 and 13 and the power supply bypass layer 14 is preferably several μm to several tens of μm. If the power supply structure 1 is used in a power circuit, the power supply layers 11 and 13 and the power supply bypass layer 14 have a thickness of several μm to several tens of mm.

  The power supply layer 13 made of the conductive fine particle dispersed film a and the power supply bias layer 14 are connected in at least two places so that these two layers are connected in parallel to reduce resistance. For example, in the interlayer insulating film 15 sandwiched between the power supply layer 13 and the power supply bias layer 14, two or more connection holes that penetrate the interlayer insulating film 15 are provided, and the connection holes are provided as conductors (the same conductor as the power supply bias layer 14). The power supply layer 13 and the power supply bias layer 14 can be connected by being filled with a material or other conductive material.

  The interlayer insulating film 15 sandwiched between the power supply layer 11 and the power supply layer 13 and between the power supply layer 13 and the power supply bypass layer 14 is the same as the organic material constituting the conductive fine particle dispersion film a. It is preferable to use a dilutable organic material for the solvent. In this case, it is only necessary that the precursors before drying or curing the respective organic materials constituting the interlayer insulating film 15 and the fine particle dispersion film a can be diluted or dissolved with the same solvent. For the interlayer insulating film 15, for example, a material similar to the organic material constituting the conductive fine particle dispersed film a is used. For example, when the conductive fine particle dispersion film a in which silver particles are dispersed in an epoxy resin is provided, an epoxy resin, a polyimide resin, a polyamideimide resin, or the like is used for the interlayer insulating film 15. These resins and their precursors can be diluted or dissolved with a solvent such as alcohol, ketone or ester. Other specific examples of solvents that can be diluted or dissolved include N-methylpyrrolidone, γ-butyrolactone, diglyme, cyclopentanone, and ethyl benzoate.

  In the interlayer insulating film 15 made of such an organic insulating film, the solvent may be removed from the film in the course of curing or drying of the organic material.

  Further, the interlayer insulating film 15 is used by adjusting to an appropriate molecular structure and dielectric constant according to the performance required for the power supply structure 1. For example, when the interlayer insulating film 15 made of polyamideimide resin is used, the dielectric constant is adjusted by improving the molecular structure of polyamideimide, or dispersing high dielectric constant powder or low dielectric constant powder in the resin. The

  The film thickness of the interlayer insulating film 15 as described above is set so that a predetermined characteristic impedance can be obtained in the power supply layers 11 and 13. If this power supply structure 1 is used for an electronic circuit, the film thickness of the interlayer insulating film 15 is set to several μm to 200 μm. Moreover, if this power supply structure 1 is used for a power circuit, the film thickness of the interlayer insulating film 15 is set to several μm to several mm. In such a range, the power source layers 11 and 13 have a characteristic impedance of 0.01 to several Ω, which is suitable as a high-speed power source characteristic impedance.

  The power supply structure 1 having such a configuration is used as a circuit board or other applications, for example, a power cable or a bus bar. In this case, for example, it is used by being connected to the substrate extraction electrode. The power supply structure 1 may be used as a configuration embedded in a connector. Further, the power supply structure 1 may have the power supply layers 11 and 13 and the power supply bypass layer 14 covered with an inorganic insulating film or an organic insulating film.

  In addition, when the power supply bypass layer 14 is laminated directly on the power supply layer 13 with respect to the power supply layer 13 made of the conductive fine particle dispersion film a, the interlayer insulating film 15 between the power supply layer 13 and the power supply bypass layer 14 is formed. If the film thickness is too thin, it is affected by the power supply bias layer 14 using a metal film, so that the effect of suppressing the resonance of electromagnetic energy by the conductive fine particle dispersed film a may be weakened. Therefore, the film thickness of the interlayer insulating film 15 between the power supply layer 13 and the power supply bias layer 14 is selected so as to obtain a desired electromagnetic energy resonance suppression effect.

≪2. Second Embodiment >>
<Configuration of power supply structure-2>
2A and 2B are schematic cross-sectional views of the power supply structure 2 according to the second embodiment. The power supply structure 2 shown in FIGS. 2A and 2B is different from the power supply structure of the first embodiment in that the power supply bypass layer 14 is the same layer as the power supply layer 13 configured as the conductive fine particle dispersion film a (that is, The upper layer is covered with the organic insulating film 17. Other configurations are the same as those of the first embodiment. That is, the power supply structure 2 includes a power supply layer 11 made of, for example, copper foil, a power supply layer 13 made of the conductive fine particle dispersion film a, a power supply bypass layer 14, and an interlayer insulating film 15 sandwiched therebetween. It has a four-layer structure composed of the conductive fine particle dispersion film a and the organic insulating film 17 covering the power supply bypass layer 14. In this power supply structure 2, as shown in FIG. 2B, the power supply bypass layer 14 is formed on the power supply layer 13 by partially overlapping the power supply bypass layer 14 on the power supply layer 13 made of the conductive fine particle dispersion film a. Connected. As shown in FIG. 2B, the power supply bypass layer 14 can be connected in parallel to the power supply layer 13 by providing two or more connection portions formed by partially overlapping the power supply bypass layer 14 on the power supply layer 13.

  The organic insulating film 17 is a film having properties similar to those of the organic insulating film constituting the interlayer insulating film 15. That is, the organic insulating film 17 is preferably configured using an organic material that can be diluted or dissolved in the same solvent as the organic material that forms the fine particle dispersion film a. That is, it is only necessary that the precursor before curing the organic materials constituting the organic insulating film 17 and the conductive fine particle dispersion film a and the resin before drying can be diluted or dissolved with the same solvent. Such an organic insulating film 17 is made of, for example, the same material (for example, epoxy resin, polyimide resin, or polyamideimide resin) as the organic material constituting the conductive fine particle dispersion film a. Such an organic insulating film 17 may be thicker than the interlayer insulating film 15.

  Accordingly, the power source structure 2 is configured using an organic material in which the conductive fine particle dispersion film a and the three layers of the interlayer insulating film 15 and the organic insulating film 17 sandwiching the conductive fine particle dispersed film a are diluted or dissolved with the same solvent. It is. In such an organic insulating film 17, the solvent may be removed from the film during the curing of the organic material.

  In the power supply structure 2 according to the second embodiment, a connection portion in which the power supply bypass layer 14 is partially overlapped on the power supply layer 13 made of the conductive fine particle dispersion film a is formed between the power supply bypass layer 14 and the power supply 13. It is only necessary to have a length and an area enough to ensure connection reliability and sufficiently reduce connection resistance. Since such a connection part is formed in a very small part on the power supply layer 13, the influence of the power supply bias layer 14 on the effect of suppressing the resonance of electromagnetic energy by the conductive fine particle dispersion film a as described above is as follows. It is considered to be negligible.

≪3. Third Embodiment >>
<Configuration of circuit board>
FIG. 3 is a schematic cross-sectional view of a circuit board according to the third embodiment. Here, as an example of the circuit board of the present invention, the configuration of the circuit board 3 using the power supply structure 1 described in the first embodiment will be described.

  That is, the circuit board 3 is composed of, for example, a power supply layer 11 and a power supply bypass layer 14 made of copper foil, a power supply layer 13 made of a conductive fine particle dispersed film a, and an interlayer insulating film 15 sandwiched therebetween. A power supply structure 1 having a structure is provided. Here, one of the two power supply layers 11 and 13 (here, the power supply layer 11) is provided as, for example, a ground layer (hereinafter referred to as the ground layer 11).

  The power supply bypass layer 14 is connected to the power supply layer 13 made of the conductive fine particle dispersed film a through a connection hole 17 d provided in the interlayer insulating film 15. This connection hole 17d is one in which the inside is embedded with a conductive material or the inner wall is made conductive by plating.

  Above the power supply bypass layer 14, a power supply wiring 31d and a ground wiring 31g as another wiring are provided. The power supply wiring 31d is connected to the power supply layer 13 made of the conductive fine particle dispersed film a through a connection hole 17d provided in the insulating film 33 and the interlayer insulating film 15. This connection hole 17d is one in which the inside is embedded with a conductive material or the inner wall is made conductive by plating, and the following connection holes are the same. On the other hand, the ground wiring 31 g is connected to the ground layer 11 through a connection hole 17 g provided in the insulating film 33 and the interlayer insulating film 15. The connection hole 17g is disposed inside an opening 13a provided in the power supply layer 13 made of the conductive fine particle dispersed film a, and is insulated from the power supply layer 13. In addition to the power supply wiring 31d and the ground wiring 31g, another wiring 31 including a connection wiring is provided above the power supply bypass layer 14.

  An insulating film 33 is provided on the power supply bypass layer 14 so as to cover the wiring 31, the power supply wiring 31d, and the ground wiring 31g. The material of the insulating film 33 is not limited, and an organic material or an inorganic material is used. Here, it is assumed that it is made of, for example, an organic material. On such an insulating film 33, an upper wiring 35 is provided. Some of these upper-layer wirings 35 are connected to the power supply wiring 31d, the ground wiring 31g, and further to the other wirings 31 through the connection holes 33a provided in the insulating film 33, respectively.

  A part of the upper layer wiring 35 is formed in the shape of an electrode pad for mounting an IC chip. As a result, the IC chip mounted on the upper portion of the circuit board 5 is connected to the power supply layer 13 through the power supply wiring 31d, is connected to the ground layer 11 through the ground wiring 31g, and other IC chips. Are connected to the wiring 31 connected to the upper wiring 35 connected to the external terminal.

  On the other hand, an insulating film 41 is provided on the ground layer 11. The material of the insulating film 41 is not limited, and an organic material or an inorganic material is used. Here, it is assumed that it is made of, for example, an organic material. On such an insulating film 41, a back-side ground wiring 43g and a back-side power supply wiring 43d as another wiring are provided. The back-side ground wiring 43 g is connected to the ground layer 11 through a connection hole 41 g provided in the insulating film 41. On the other hand, the back-side power supply wiring 43 d is connected to the power supply layer 13 made of the fine particle dispersion film a through a connection hole 41 d provided in the insulating film 41 and the interlayer insulating film 15. The connection hole 41 d is disposed inside an opening 11 a provided in the ground layer 11, and is insulated from the ground layer 11. In addition to the above, other wirings 43 including connection wirings are provided on the insulating film 41. Some of these wirings 43 may be connected to the wiring 31 on the organic insulating film 17 through the connection holes 17 a formed in the organic insulating film 17 and the connection holes 41 a formed in the insulating film 41. In this case, the connection hole 41 a is disposed inside the opening 11 a provided in the ground layer 11, and is assumed to be insulated from the ground layer 11. In addition, the connection hole 17 a is disposed inside the opening 13 a provided in the power supply layer 13 and is insulated from the power supply layer 13.

  A part of the backside ground wiring 43g, the backside power supply wiring 43d, and the wiring 43 is formed in the shape of an electrode pad for mounting an IC chip. As a result, the IC chip mounted on the upper portion of the circuit board 4 is connected to the power supply layer 13 through the backside power supply wiring 43d, and is connected to the ground layer 11 through the backside ground wiring 43g. It is configured to be connected to a wiring 43 connected to another IC chip or a wiring 43 connected to an external terminal.

  Note that a part of the back-side ground wiring 43g, the back-side power supply wiring 43d, and the wiring 43 may be formed into the shape of an electrode pad for mounting the circuit board 3 on another substrate.

  In the configuration as described above, the interlayer insulating film 15 between the ground layer 11 and the power supply layer 13 and between the power supply layer 13 and the power supply bypass layer 14 has a smaller thickness than the other insulating films 33 and 41 and is required. It is preferable that it is formed with an appropriate dielectric constant according to the performance to be achieved.

  Further, the circuit board 3 does not need to be provided with the ground layer 11 and the power supply layer 13 over the entire surface of the interlayer insulating film 15. If the interlayer insulating film 15 is sandwiched, both sides of the interlayer insulating film 15 are provided. The ground layer 11 and the power supply layer 13 may be patterned.

  For example, another signal wiring configured using the same layer as the ground layer 11 may be provided on one surface of the interlayer insulating film 15, and the power supply layer 13 may be provided on the other surface of the interlayer insulating film 15. Other signal wirings configured using the same layer may be provided. That is, the circuit board 3 uses, as the ground layer 11 and the power supply layer 13, a part of two wiring layers provided across the interlayer insulating film 15 having a predetermined dielectric constant among the plurality of wiring layers constituting the circuit board 3. The configuration used may be used.

  Further, the power supply structure 2 provided on the circuit board 3 has a shape in which at least the power supply layer 13 of the ground layer 11 and the power supply layer 13 is divided into a plurality of parts on the interlayer insulating film 15 according to the power supply voltage. The patterning is the same as described in the configuration of the power supply structure.

<< 4. Fourth Embodiment >>
<Configuration of circuit board>
FIG. 4 is a schematic cross-sectional view of a circuit board according to the fourth embodiment. Here, as an example of the circuit board of the present invention, the configuration of the circuit board 4 using the power supply structure 2 described in the second embodiment will be described.

  The circuit board 4 shown in FIG. 4 is different from the circuit board of the third embodiment in that the power supply bypass layer 14 is disposed in the same layer as the power supply layer 13 configured as the conductive fine particle dispersion film a. The upper part is covered with the organic insulating film 17. Other configurations are the same as those of the third embodiment. That is, the power supply structure 2 includes a power supply layer 11 made of, for example, copper foil, a power supply layer 13 made of the conductive fine particle dispersion film a, a power supply bypass layer 14, and an interlayer insulating film 15 sandwiched therebetween. It has a four-layer structure composed of the conductive fine particle dispersion film a and the organic insulating film 17 covering the power supply bypass layer 14.

  That is, the circuit board 4 includes, for example, a power supply layer 11 made of copper foil, a power supply bypass layer 14, a power supply layer 13 made of the conductive fine particle dispersion film a, an interlayer insulating film 15 sandwiched between them, and conductive fine particles. A power supply structure 2 having a four-layer structure including a dispersion film a and an organic insulating film 17 covering the power supply bypass layer 14 is provided. Here, one of the two power supply layers 11 and 13 (here, the power supply layer 11) is provided as, for example, a ground layer (hereinafter referred to as the ground layer 11).

≪Experiment 1≫
<Configuration of circuit board>
In the configuration shown in FIG. 5, a circuit board to which a power supply layer made of a conductive fine particle dispersed film is applied and a circuit board having a conventional configuration are manufactured. These circuit boards are equipped with an FPGA chip with a core power supply voltage of 1.2 V and an IO power supply voltage of 1.5 V, and four DDR3 memories with an operating voltage of 1.5 V. Data is input / output between the FPGA chip and the DDR3 memory, and all the wirings are designed to be connected with an equal length. Therefore, there is no signal delay due to the difference in wiring length, and the four memories are operated simultaneously.

  6A is a cross-sectional view illustrating the layer structure of the circuit board of sample S31, and FIG. 6B is a cross-sectional view illustrating the layer structure of the circuit board of sample C4. Hereinafter, the layer configuration of each circuit board will be described.

<Layer configuration of sample S31>
The circuit board of the sample S31 shown in FIG. 6A has eight conductive layers from the first conductive layer L1 to the eighth conductive layer L8. Among these, the 2nd conductive layer L2 and the 7th conductive layer L7 are comprised with Cu foil (18 micrometers thickness), and are used as a ground layer (GND). The third conductive layer L3 and the sixth conductive layer L6 are composed of a conductive fine particle dispersed film a (film thickness 10 to 15 μm) and are used as a power supply layer (VDD). This conductive fine particle dispersion film a is a layer formed by coating using an Ag paste (solvent: N-methyl-2-pyrrolidone) containing flaky Ag particles, and the average particle diameter of Ag particles is 7 μm. The content is 85% by weight. Other than this, the first conductive layer L1, the fourth conductive layer L4, the fifth conductive layer L5 and the eighth conductive layer L8 are made of Cu foil (18 μm thick).

  Between the first conductive layer L1 to the eighth conductive layer L8, there are nine insulating layers from the first insulating layer R1 to the ninth insulating layer R9. Among these, the second insulating layer R2, the third insulating layer R3, the seventh insulating layer R7, and the eighth insulating layer that are disposed with the conductive fine particle dispersed film a of the third conductive layer L3 and the sixth conductive layer L6 interposed therebetween. R8 is composed of an organic insulating film made of PAI (1) by applying solvent-soluble polyamideimide (PAI) using N-methyl-2-pyrrolidone as a solvent and drying it. The relative dielectric constant of PAI (1) after completion of curing or drying is 2.9. The first conductive layer L1 and the eighth conductive layer L8 are covered with a solder resist layer SR.

  Other than this, the first insulating layer R1, the fourth insulating layer R4, the fifth insulating layer R5, the sixth insulating layer R6, and the ninth insulating layer R9 are made of glass cloth base epoxy resin (heat resistance grade FR-4). Is done. In addition, two layers of the third insulating layer R3 and the fourth insulating layer R4 are arranged between the third conductive layer L3 composed of the conductive fine particle dispersed film a and the fourth conductive layer L4, and the conductive layer Two layers of a sixth insulating layer R6 and a seventh insulating layer R7 are disposed between the sixth conductive layer L6 formed of the conductive fine particle dispersion film a and the fifth conductive layer L5. The film thicknesses of the first insulating layer R1 to the ninth insulating layer R9 are as illustrated.

  In the layer configuration as described above, among the first conductive layer L1 to the eighth conductive layer L8, the third conductive layer L3 and the sixth conductive layer L6 made of the conductive fine particle dispersed film a are arranged in a solid film shape on the entire surface. Only the connection through hole and the opening are provided, and the other layers are patterned as signal wiring. However, in the second conductive layer L2 used as the power supply layer (VDD), three power supply layers for applying different power supply voltages VDD are patterned. These power supply layers are formed to be sufficiently wider than other signal wirings.

  In addition, the first insulating layer R1 to the ninth insulating layer R9 are provided with connection holes and connection portions for connecting the upper and lower conductive layers.

  Further, the first conductive layer L1 has a power terminal connected to the third conductive layer L3, a ground terminal connected to the second conductive layer L2, respectively, at the mounting position of the IC chip mounted on the circuit board, and A signal terminal is provided.

<Layer configuration of sample C4>
The circuit board of the sample C4 shown in FIG. 6B is different from the circuit board of the sample S31 shown in FIG. 6A. As shown in the drawing, the third conductive layer L3 and the sixth conductive layer L6 are made of Cu foil (18 μm thickness), The insulating layer is composed of a glass cloth base epoxy resin (heat resistant grade FR-4) as a seven-layer structure of the first insulating layer R1 to the seventh insulating layer R7, and the other structures are the same.

<Evaluation of Circuit Board of Experiment 1>
For each circuit board as described above, the power supply voltage fluctuation is measured when four DDR3 memories are operated simultaneously. At this time, when the operation speed of the memory was 600 Mbps, it operated without any problem. However, when the memory speed was 800 Mbps, the circuit board of the sample S31 had a voltage drop from the voltage supply unit to the chip, and partly malfunctioned.

≪Experiment 2≫
<Configuration of circuit board>
In the circuit board of the sample S31 shown in FIG. 6A, a bypass wiring is provided by connecting the wire W1 to the third conductive layer L3 made of the conductive fine particle dispersed film a in which a voltage drop has occurred, as shown in FIG. 7A. Went. That is, the circuit board shown in FIG. 7A is a circuit board having the configuration of the present invention. As a comparative control, as shown in FIG. 7B, in the circuit board of the sample C4 shown in FIG. 6B, a bypass wiring was provided by connecting the wire W1 to the third conductive layer L3.

  With respect to the circuit board shown in FIG. 7A and the circuit board shown in FIG. 7B, power supply voltage fluctuation is measured when four DDR3 memories are operated simultaneously. For this measurement, an operation command input device to the FPGA was connected to a notebook computer via a USB cable. An oscilloscope WAVE MASTER 8500 manufactured by LeCroy was used as an output signal and power supply voltage measuring device, and a differential probe WA600 manufactured by LeCroy was used as a contact point with the substrate terminal. FIGS. 8 to 9 show the measurement results of changes in power supply voltage and signals with time in the power supply voltage input section of the DDR3 memory when four DDR3 memories are operated simultaneously at 800 Mbps. 8A and 8B are data of the sample S31 shown in FIG. 7A, and FIGS. 9A and 9B are data of the sample C4 shown in FIG. 7B. 10 to 11 show the measurement results of the IO power supply voltage and signal change with time of the FPGA chip. 10A and 10B are data of the sample S31 shown in FIG. 7A, and FIGS. 11A and 11B are data of the sample C4 shown in FIG. 7B. When measuring the power supply voltage of the memory and the IO power supply voltage of the FPGA chip, the Write Enable signal and the CAS (Compare And Swap) signal were also measured at the same time, and the CAS signal was used as a trigger signal.

  As shown in FIGS. 8A and 9A, the power supply voltage fluctuation of the DDR3 memory is as follows. The fluctuation of the power supply voltage of the sample S31 using the conductive fine particle dispersion film a has a maximum amplitude of 79 mV, and the voltage fluctuation is rated −2 The fluctuation of the power supply voltage of the sample C4 not using the conductive fine particle dispersion film a is 207 mV, and the voltage fluctuation is the rated −6.18. % To + 7.62%.

  As shown in FIGS. 10A and 11A, the voltage fluctuation of the IO power supply of the FPGA chip is as follows. The fluctuation of the power supply voltage of the sample S31 using the conductive fine particle dispersion film a has a maximum amplitude of 79 mV, and the voltage fluctuation is rated. Whereas the fluctuation of the power supply voltage of the sample C4 not using the conductive fine particle dispersion film a is −2.7% to + 2.57%, the maximum amplitude is 195 mV, and the voltage fluctuation is rated −6 It was .87% to + 6.17%.

  From this result, in the circuit board of the present invention using the conductive fine particle dispersion film a, the resonance of electromagnetic energy between the power supply layers in the high frequency band was suppressed, and the completeness of the pulse shape of the CAS signal waveform It was confirmed that there was an improvement. In the CAS signal waveform, the circuit board of the present invention shown in FIGS. 8A and 10A has a better pulse fall and surge noise than the comparative circuit board shown in FIGS. 9A and 11A. Has been reduced. Thus, the resonance of electromagnetic energy between the power supply layers in the high frequency band is suppressed, and the completeness of the pulse shape of the CAS signal waveform is improved, thereby stabilizing the power supply voltage in the high-speed operation region. . As a result, it was confirmed that by using the power supply structure of the present invention, it is possible to achieve high speed as well as high integration and miniaturization of electronic equipment. Also, by connecting the bypass wiring to the conductive fine particle dispersion film in which the conductive fine particles are dispersed, the DC resistance of the power supply wiring can be made smaller than that composed only of the conductive fine particle dispersion film. It has been confirmed that even when the distance to the integrated circuit is long, or even in a power-saving semiconductor integrated circuit with a low operating voltage, it is possible to design without being bothered by the voltage drop of the power supply wiring.

  DESCRIPTION OF SYMBOLS 1, 2 ... Power supply structure 3, 4 ... Circuit board 11, 13 ... Power supply layer, 11a, 13a ... Opening, 15 ... Interlayer insulation film, 17 ... Organic insulation film, 17d, 17g ... Connection hole, 31d ... Power supply Wiring (wiring), 31g ... ground wiring (other wiring), 33, 41 ... insulating film, 43 ... backside power wiring (other wiring), 43g ... backside ground wiring (wiring), a ... conductive fine particle dispersion film

Claims (4)

An interlayer insulating film;
Two power supply layers provided with a conductive fine particle dispersed film in which conductive fine particles are dispersed in an organic material, provided in a state of sandwiching the interlayer insulating film;
A power supply structure including a bypass wiring provided on the conductive fine particle dispersion film via an interlayer insulating film and connected to the conductive fine particle dispersion film. An interlayer insulating film;
Two power supply layers provided with a conductive fine particle dispersed film in which conductive fine particles are dispersed in an organic material, provided in a state of sandwiching the interlayer insulating film;
A circuit board having a power supply structure including a bypass wiring provided on the conductive fine particle dispersed film via an interlayer insulating film and connected to the conductive fine particle dispersed film. An interlayer insulating film;
Two power supply layers provided with a conductive fine particle dispersed film in which conductive fine particles are dispersed in an organic material, provided in a state of sandwiching the interlayer insulating film;
A power supply structure including a bypass wiring disposed in the same layer as the conductive fine particle dispersion film and connected to the conductive fine particle dispersion film. An interlayer insulating film;
Two power supply layers provided with a conductive fine particle dispersed film in which conductive fine particles are dispersed in an organic material, provided in a state of sandwiching the interlayer insulating film;
A circuit board having a power supply structure provided with a bypass wiring and disposed in the same layer as the conductive fine particle dispersion film and connected to the conductive fine particle dispersion film.

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