JP2014112885A - Oscillator circuit and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an oscillator circuit having a wide frequency variable range and a semiconductor device including the oscillation circuit.SOLUTION: A resonant oscillator circuit includes: an inductance element connected between a first terminal and a second terminal; an amplifier circuit connected between the first terminal and the second terminal in parallel with the inductance element; and a first capacitive element connected to the first terminal and the second terminal. Two or more lead-out portions are provided in the middle of wiring of the inductance element, and a switch element short-circuiting between the lead-out portions when turning on and a second capacitive element are connected in parallel to each other.

Description

  The present invention relates to an oscillation circuit and a semiconductor device. In particular, the present invention relates to a resonant oscillation circuit having a variable oscillation frequency and a semiconductor device in which the oscillation circuit is formed on a semiconductor substrate.

  In recent years, various high-speed digital wireless systems such as mobile phones, wireless LANs, Bluetooth, and terrestrial digital TV have been put into practical use. Also in a semiconductor integrated circuit that performs digital signal processing, an analog technique similar to that of a radio circuit is used particularly for a circuit that operates at a high speed of GHz or higher. In such a circuit, an on-chip inductor formed on a semiconductor substrate is used as a passive element. This inductor has a shape in which metal wiring on a semiconductor is spirally wound.

  Such an on-chip inductor is often used as a part of a resonance circuit in an analog circuit. The resonance circuit resonates by connecting an inductor and a capacitor in series or in parallel. The resonance frequency f0 is determined by the inductance value L of the inductor and the capacitance value C of the capacitor as shown in equation (1).

  The resonance circuit exhibits effects such as high gain, impedance matching, and oscillation at the resonance frequency f0. However, since such resonance occurs only at a narrow band frequency near the resonance frequency, it is necessary to change the resonance frequency in order to create a circuit that can operate at various frequencies. For this purpose, L or C must be changed. FIG. 9 shows an example of an amplifier using this resonance circuit. As shown in the figure, a load composed of an inductor L31 and a capacitor C31 is connected to the MISFET M31. The gain at this time is expressed by equation (2) when the transconductance of M31 is Gm, the series resistance of the inductor is R31, and the series resistance of the capacitor and the parasitic capacitance other than the capacitor are ignored.

  From the equation (2), the gain of the amplifier decreases as the capacitance increases, and increases as the inductance increases. In general, a method of changing the capacitance is used to change the resonance frequency. This is because the capacitance can be easily realized on the chip by an element such as a varactor using a pn junction. However, the gain decreases on the low frequency side where C increases when the resonance frequency is changed by changing the capacitance while the inductance is fixed from the equation (1). That is, it is difficult to change the resonance frequency significantly only by changing the capacitance.

  Patent Document 1 also proposes a structure in which an inductor and a capacitor are integrated with an on-chip oscillator. The cross-sectional structure is shown in FIG. 10A, and the planar structure is shown in FIG. FIG. 10A shows the structure of the AA cross section of FIG. As shown in FIG. 10, a pn junction formed by p-type silicon and an n well immediately below the inductor wiring L8 is connected to the inductor wiring. As a result, a capacitance corresponding to a pn junction is generated between the inductor wiring and the ground wiring G8 connected to the n-type substrate. Since this capacity exists in the entire inductor wiring, this circuit becomes an oscillator having a transmission line-like circuit as shown in FIG. However, in this circuit, since the oscillation frequency depends on the delay time of the transmission line, the lumped constant LC resonator is not operated. For this reason, there is a problem that many unnecessary harmonics are generated.

  FIG. 3 of Patent Document 2 shows a secondary-side inductance element (L2) which is arranged so as to face the inductance element (L1) constituting the LC oscillation circuit and is mutually inductively coupled in the LC resonance type oscillation circuit. Further, the capacitive element (C2) and the switch element (SW1) are connected in parallel between both terminals of the secondary inductance element. When the switch element is turned off, a capacitive element is connected between both terminals of the secondary inductance element, and the equivalent inductance increases. When the switch element is turned on, the secondary inductance element An oscillation circuit is described that attempts to reduce the change in Q by widening the frequency variable range so that the equivalent inductance can be reduced in a state where both terminals are short-circuited.

JP 2002-319624 A JP 2007-174552 A

  The following analysis is given by the present invention. In the method of reflecting the secondary side inductance change of the transformer on the primary side using the mutual inductance as in Patent Document 2, the change can be caused on the primary side only by the coupling coefficient of the transformer. In particular, when a resonance circuit is formed on a semiconductor substrate, it is difficult to increase the coupling coefficient between the primary side and the secondary side due to loss due to the substrate, and the change in inductance value is limited.

  In the conventional oscillation circuit using an inductor and a capacitor, it is difficult to change the oscillation frequency significantly.

  An oscillation circuit according to one aspect of the present invention includes an inductance element connected between a first terminal and a second terminal, and between the first terminal and the second terminal in parallel with the inductance element. And a first capacitive element connected to the first terminal and the second terminal, wherein the inductance element is a first lead portion. A first inductance element provided with a second inductance element provided with a second lead portion, and a first switch element between the first lead portion and the second lead portion And the second capacitor element are connected in parallel.

  In the semiconductor device according to another aspect of the present invention, the oscillation circuit is formed on a semiconductor substrate.

  According to the present invention, since the inductor and the capacitor can be switched simultaneously with one switch, the oscillation frequency can be changed in a wide range. Further, a semiconductor device incorporating a resonance type oscillation circuit having a wide oscillation frequency range can be obtained.

It is a block diagram of the oscillation circuit by Example 1 of this invention. 1 is an example of a circuit diagram illustrating a detailed configuration of an oscillation circuit according to Embodiment 1. FIG. It is a circuit diagram of the oscillation circuit of a comparative example. 6 is a block diagram of an oscillation circuit according to Embodiment 2. FIG. 6 is a block diagram of an oscillation circuit according to Embodiment 3. FIG. In Example 4, it is a schematic diagram which shows the cross-section of a switch element and a 2nd capacitive element. FIG. 10 is a block diagram of an oscillation circuit according to a fifth embodiment. FIG. 10 is a block diagram of an oscillation circuit according to a sixth embodiment. It is an equivalent circuit diagram explaining an amplifier using a resonance circuit. (A) The figure which shows the structure in the AA cross section which shows the structure of the conventional distributed constant type | mold resonant circuit, (b) The figure which shows a planar structure. It is an equivalent circuit diagram of a conventional distributed constant type resonance circuit.

  First, an outline of an embodiment of the present invention will be described, and thereafter, a detailed description will be given based on each example. In the description of the outline, the drawings and the reference numerals of the drawings are shown as examples of the embodiments, and the variations of the embodiments according to the present invention are not limited thereby.

  As shown in FIG. 1, FIG. 2, and FIG. 4 to FIG. 8, an oscillation circuit according to an embodiment of the present invention is connected between a first terminal and a second terminal (OUTT and OUTB). An inductance element (1, 1A, 1B), an amplifier circuit 2 connected in parallel with the inductance element (1, 1A, 1B) between a first terminal and a second terminal (OUTT and OUTB); 1 is a resonance type oscillation circuit including a first capacitor element (V1, C1) connected to a first terminal and a second terminal, and 2 in the middle of the wiring of the inductance element (1, 1A, 1B). More than two drawers (A, B, C, E, F, H, I, J, K, T) are provided, and two or more drawers (A, B, C, E, F, H, I , J, K, T), switch elements (M1, M2, M21) that short-circuit between the lead portions when turned on When, a second capacitive element (V2, C2, V21, V22), are connected in parallel.

  As shown in FIG. 7 and FIG. 8 as an example, in the oscillation circuit of one embodiment of the present invention, the inductance element is connected in parallel between the first terminal and the second terminal (OUTT and OUTB). A plurality of inductance elements (1A, 1B) may be included.

  In addition, as shown in FIGS. 1, 2, and 5 to 8, the inductance elements (1, 1A, 1B) have the same characteristics when viewed from the first and second terminals (OUTT and OUTB). In addition to being arranged symmetrically, n sets of lead portions (n is a natural number) are provided, and n switch elements and n number of second capacitor elements are connected in parallel to the n sets of lead portions, The drawers (B and C in FIGS. 1, 2 and 6; H and K in FIG. 5, I and J; E and F in FIG. 7) are turned on when each switch element is turned on and off. The first and second terminals (OUTT and OUTB) are arranged symmetrically so that the characteristics are the same. By arranging the inductance element and the lead portion symmetrically in this way, each switch element is connected at the midpoint of the inductor when the switch element is turned on. Since the potential at this point does not fluctuate during oscillation, the influence on the oscillation frequency due to the parasitic capacitance of the switch element can be eliminated.

  Further, as shown in FIG. 4, a part T of the lead portion may be provided at the end of the inductance element 1. However, it is not preferable to connect a switch element to both ends of the inductance because oscillation cannot be maintained when the switch element is turned on. Therefore, in this case, the drawer portions cannot be arranged symmetrically.

  In addition, as shown in FIG. 7, the inductance elements (1 </ b> A, 1 </ b> B) include a first inductance element 1 </ b> A provided with the first lead portion E and a second lead portion F provided with the second lead portion F. The switch element M1 and the second capacitor element V2 may be connected in parallel between the first lead part E and the second lead part F, including the inductance element 1B.

  Further, as shown in FIG. 8 as an example, the inductance elements (1A, 1B) include a first inductance element 1A and a second inductance element 1B provided with a plurality of lead portions (H, I, J, K), respectively. A plurality of lead portions (H, I) provided in the first inductance element and a plurality of lead portions (J, K) provided in the second inductance element 1B, respectively. The switching elements (M1 and M2) and a plurality of second capacitive elements (V21 and V22) may be connected in parallel.

  Further, as shown in FIGS. 1 and 4 to 8 as an example, at least one capacitance value of the first and second capacitance elements may be variable. In addition to changing the inductance and the capacitance value by turning on and off the switch element, by changing the capacitance value, the variable range of the frequency can be expanded and the oscillation frequency can be finely adjusted. It is more preferable to make both the first and second capacitive elements variable, but the effect can be obtained by making at least one of them variable. However, the second capacitor element has an effect of making the capacitance value variable only when the switch element connected in parallel with the capacitor element is turned off.

  As shown in FIG. 6 as an example, in the semiconductor device of the present invention, the oscillation circuit can be formed on a semiconductor substrate PS21. That is, the inductance element, the amplifier circuit, the capacitor element, and the switch element of the oscillation circuit can all be formed on the semiconductor substrate. Therefore, it is possible to realize a semiconductor integrated circuit that incorporates the oscillation circuit together with other circuits.

  Further, as an example, a pn junction capacitor in which the capacitor element is formed on the semiconductor substrate PS21 as shown in FIG. 6 may be used. In FIG. 6, a capacitance element in which a pn junction capacitance between the source / drain portion D21 and the p well PW21 and a pn junction capacitance between the p well PW21 and the source / drain portion S21 are connected in series is connected between the extraction portion B and the extraction portion C. Provided.

  Further, as shown in FIG. 6 as an example, the switch element may be a MISFET. In FIG. 6, MISFET (M21) is used as a switching element.

  Further, as shown in FIG. 6 as an example, the capacitor element may be a pn junction capacitor formed in the source / drain portion (D21, S21) of the MISFET. In FIG. 6, the pn junction capacitance between the source / drain portion (D21, S21) and the p well PW21 is used as a capacitive element.

  As an example, as shown in FIG. 6, a MISFET (M21) is formed on the surface of the well PW21 provided on the surface of the semiconductor substrate PS21, and the capacitance value of the capacitive element is made variable by controlling the potential of the well PW21. can do. In FIG. 6, although the potential of the well PW21 is fixed by the potential supplied from the terminal WCONT in terms of DC, it is considered that the potential is not fixed in terms of AC. Therefore, the pn of the source / drain portion D21 and the P well PW21 The capacitance value of the second capacitance element, which is a junction capacitance and a series-connected capacitance composed of the pn junction capacitance of the p well PW21 and the source / drain portion S21, can be made variable.

  The description of the outline has been completed, and the embodiments of the present invention will be described in detail below with reference to the drawings.

  FIG. 1 is a block diagram of an oscillation circuit according to the first embodiment. In FIG. 1, an OUTT terminal and an OUTB terminal are input / output terminals of the oscillation circuit. An oscillation waveform is output between the OUTT terminal and the OUTB terminal. An inductance element 1 and an amplifier circuit 2 are connected in parallel between the OUTT terminal and the OUTB terminal. The amplifier circuit 2 in FIG. 1 includes an inverter circuit INV1 having an input connected to the OUTB terminal and an output connected to the OUTT terminal, and an inverter circuit INV2 having an input connected to the OUTT terminal and an output connected to the OUTB terminal. The amplifier circuit 2 is not limited to the configuration shown in FIG. 1, and may be any amplifier circuit as long as the amplifier circuit amplifies and maintains resonance between the OUTB terminal and the OUTT terminal due to the inductor and the capacitor. Good. However, it is desirable that the configuration be symmetric when viewed from the OUTB terminal and the OUTT terminal. Further, the capacitive element V1 is connected to the OUTT terminal and the OUTB terminal. The capacitive element V1 is a varactor, and the capacitance value can be made variable.

  In the middle of the wiring of the inductance element 1, lead portions B and C are provided, and between the lead portions B and C, a capacitive element V2 and a switch element M1 are connected in parallel. The capacitive element V2 is also a varactor like the capacitive element V1, and the capacitance value can be made variable. In FIG. 1, the capacitive elements V1 and V2 are both variable capacitors using varactors, but may be fixed capacitors. However, in order to be able to freely change the oscillation frequency of the oscillation circuit, at least one of them is preferably a variable capacitor in order to be able to change the oscillation frequency range more widely and freely. . The varactor is an example of a variable capacitor, and may be a variable capacitor other than the varactor as long as the variable value can control the capacitance value from an external circuit (not shown). The switch M1 is a MISFET (Metal Insulator Semiconductor Field Effect Transistor) metal-insulated semiconductor field effect transistor, and is controlled to be turned on and off by a control signal LCNT supplied from the outside of FIG.

  The inductance element 1 is constituted by a series connection of an inductor L1, an inductor L2, and an inductor L3 with the lead portions B and C interposed therebetween. Here, it is desirable to provide the inductor L1 and the inductor L3 symmetrically so that the characteristics of the inductance element 1 viewed from the OUTT terminal and the OUTB terminal connected to both ends of the inductance element 1 are equal. In other words, it is desirable that the lead portion B and the lead portion C are provided at symmetrical positions so that the characteristics of the inductance elements viewed from the OUTT terminal and the OUTB terminal are equal.

  Inductors L1 to L3 and varactors V1 and V2 constitute an LC resonance circuit. When the switch element M1 is OFF, the inductance of the LC resonator between the OUTT terminal and the OUTB terminal is the sum of L1, L2, and L3, and the capacitance can be considered as V1 and V2 connected in parallel. When the switch element M1 is on, the inductance of the LC resonator is the sum of L1 and L3, and the capacitance can be regarded as only V1. Further, when the inductor L1 and the inductor L3 are provided symmetrically and the LC resonator is configured symmetrically, the lead portions B and C connected to the MISFET M1 when the switch element is turned on are the midpoints of the inductor. For this reason, the potential at this point does not change during oscillation, and the parasitic capacitance (not shown) of the MISFET connected to this point does not affect the oscillation frequency.

  Next, the characteristics of this oscillation circuit will be analyzed in detail. In FIG. 1, the admittance Y of an oscillator composed of an inductor and a capacitor as seen from the OUTT-OUTB terminal is determined when the switch is off, ignoring the series resistance of inductance and capacitance. Here, the calculation is performed assuming that the capacitance values of V1 and V2 are constant values C1 and C2, respectively. From FIG. 1, the admittance Y is given by equation (3).

In the equation (3), the frequency at which the numerator of admittance Y is 0 is the oscillation frequency of this oscillator. Equation (3) has two resonant frequencies. Since C2 × L2 is sufficiently small if omega ⁴ term is negligible oscillation frequency of the higher it is negligible and the oscillation frequency when the switch is off is expressed by equation (4).

That is, the oscillation frequency of the oscillator can be lowered than when there is no C2 by C2 × L2. That is, C2 substantially behaves as a capacity of equation (5).

  Since both C1 and C2 are variable capacitors, the change in C2 can also contribute to the change in oscillation frequency. Since both ends of L2 and C2 are short-circuited when the switch is on, the capacitance of the entire resonator is C1, the inductance is L1 + L3, and the oscillation frequency is expressed by equation (6).

That is, the inductance value and the capacitance can be increased / decreased simultaneously with one switch element. Further, since the capacitance can be reduced when the inductance value is small, it is possible to suppress the gain reduction when the inductance is reduced. Although the above is calculated with a fixed capacity, since V1 and V2 are variable capacity, f _OFF and f _ON can be increased or decreased by changing the values of C1 and C2, respectively. If the inductor is symmetrical, when the switch element is on, the lead-out portions B and C of the switch element become the midpoint of the inductor. Therefore, when the oscillation circuit composed of INV1 and INV2 in FIG. 1 is symmetric, the voltage at the midpoint of the inductor does not fluctuate during oscillation. For this reason, even if the MISFET as a switching element has a parasitic capacitance, this capacitance does not affect the oscillation frequency when the switching element is on.

Next, consider a case where C2 × L2 is large in the equation (3). At this time, the term of ω ⁴ cannot be ignored. Assuming that ω ² C2L2 >> 1 in equation (3), equation (7) is established.

  Using equation (7), the higher oscillation frequency can be obtained from equation (8).

Here, the higher the oscillation frequency fh is oscillation of fh becomes more dominant than _{f OFF} because the harmonics and fh is constructive of which is the _{f OFF} twice the low more oscillation frequency _{f OFF of,} the oscillation of _{f OFF} I can't get it. The condition under which this occurs is determined by equation (9).

  Since harmonics of f that are three times or more are small, even if these frequencies overlap with fh, no dominant oscillation occurs. Therefore, in order to obtain stable oscillation, it is desirable to select C2 and L2 as shown in equation (10).

  For example, if L2 << L1 + L3 and C2L2 << C1 (L1 + L3), this condition can be satisfied by C1 >> 3C2.

  FIG. 2 is an example of a circuit diagram illustrating a more detailed configuration of the oscillation circuit according to the first embodiment. 2, elements, circuits, terminals, and signals having the same configuration and function as those in FIG. 1 are denoted by the same reference numerals, and redundant description is omitted. In FIG. 2, MISFETs M13 and M11, and M12 and M10 each serve as an inverter circuit, and constitute an amplifier circuit 2 together with a MOSFET MC1 serving as a current source of the inverter circuit. In FIG. 2, both the first capacitor element C1 and the second capacitor element C2 use fixed capacitors. Other configurations are as described with reference to FIG. FIG. 3 is a circuit for comparison with FIG. In the circuit of FIG. 3, the second capacitor C2 is removed from FIG. 2, and the first capacitor C1 is replaced with a fixed capacitor C3 having a larger capacitance value. Other configurations are the same as those in FIG.

  The change in the oscillation frequency due to ON / OFF of the switch element was calculated by SPICE simulation for the circuit of Example 1 in FIG. 2 and the circuit of the comparative example in FIG. The results are shown in Table 1. In the simulation shown in Table 1, the simulation was performed assuming a 90 nm node CMOS. The simulation condition is that the power supply voltage VDD = 1V and the control voltage LCNT of the switch element is 0V (off) or 1V (on). Further, it is assumed that L1 = L3 = 2.5 nH and L2 = 5 nH, and a series parasitic resistance of 10Ω is applied to L1 and L3, and 20Ω is applied to L2. Further, C1 = C2 = 0.1 pF and C3 = 0.15 pF.

  As shown in Table 1, when the embodiment of FIG. 2 is compared with the comparative example of FIG. 3, it can be seen that a greater change in oscillation frequency is obtained in the embodiment of FIG. That is, it can be understood that the range in which the oscillation frequency changes can be broadened by not only providing the switch element M1 but also connecting the second capacitor element C2 in parallel to the switch element M1.

  FIG. 4 is a block diagram of an oscillation circuit according to the second embodiment. 4, elements, circuits, terminals, and signals having the same configuration and function as those in FIG. 1 are denoted by the same reference numerals, and redundant description is omitted. In FIG. 4, lead portions A and T are provided in the inductance element 1. As with the lead portions B and C in FIG. 1, the lead portion A is provided between a plurality of inductors connected in series constituting the inductance element 1, but the lead portion T is provided at the end of the inductance element 1. It has been. A MISFET M1 functioning as a switch element and a varactor V2 serving as a second capacitor element are connected in parallel between the lead portions A and T. In FIG. 4, since the lead portion T is provided at the end of the inductance element 1, the positions of the lead portions A and T are not symmetrical when viewed from the OUTT terminal and the OUTB terminal, but the parasitic capacitance of the MISFET M1 that is a switch element. If the influence on the oscillation frequency is not a problem, there is no problem with the configuration shown in FIG. In Example 2 of FIG. 4 as well, since the inductance and capacitance value of the LC resonator can be changed simultaneously by turning on / off one switch element M1, the oscillation frequency range can be widened.

  FIG. 5 is a block diagram of an oscillation circuit according to the third embodiment. In FIG. 5, lead portions H, I, J, and K are provided at four locations in the middle of the wiring of the inductance element 1, and the inductance element 1 includes five inductors L1, L2, L3, L4, and L5. It can be thought of as an inductance element connected in series. Here, it is desirable that the inductors L1 and L5, and L2 and L4 are arranged symmetrically so that the characteristics viewed from the terminals OUTT and OUTB connected to the ends of the inductance element 1 are equivalent. In other words, the lead portions I and J and the lead portions H and K are arranged so as to be symmetric when viewed from the terminals OUTT and OUTB, respectively. A switch element M1 and a capacitive element V21 are connected in parallel to the lead portions I and J, and a switch element M2 and a capacitive element V22 are connected in parallel to the lead portions H and K, respectively. The switch elements M1 and M2 are configured by MISFETs, and the capacitive elements V1, V21, and V22 are configured by varactors that are variable capacitive elements. The capacitive elements V1, V21, and V22 may be fixed capacitors. However, in order to take a wide frequency variable range and freely change the frequency, some of the capacitive elements V1, V21, and V22 It is preferable that the capacitive element, more desirably, all the capacitive elements are constituted by variable capacitive elements.

  Here, when the switch elements M1 and M2 are off, the inductance of the LC resonator is the sum of L1 to L5, and the capacitance can be regarded as V1 and V21, V22 connected in parallel. When the switch element M1 is on, the inductance of the LC resonator is the sum of L1, L2, L4, and L5, and the capacitance can be regarded as a parallel connection of V1 and V21. When the switch element M2 is on, the inductance of the LC resonator is the sum of L1 and L5, and the capacitance is only V1. If the inductance element 1 and the lead portions H to K are arranged so that the LC resonator is symmetric, the lead portions I and J to which the MISFET M1 is connected when the switch element M1 is on are the midpoints of the inductor. It becomes. For this reason, the potential at this point does not fluctuate during oscillation, and the parasitic capacitance (not shown) of the MISFET connected to this point does not affect the oscillation frequency. Further, when the switch element M2 is on, the lead-out portions H and K to which the MISFET M2 is connected become the midpoint of the inductor. For this reason, the potential at this point does not fluctuate during oscillation, and the parasitic capacitance (not shown in the figure) of the MISFET M2 connected to this point and the inner M1 does not affect the oscillation frequency.

  FIG. 6 is a schematic diagram illustrating a cross-sectional structure of a switch element and a second capacitor element that form an oscillation circuit in the semiconductor device of the fourth embodiment. Example 4 is an example of a semiconductor device in which the oscillation circuit of Example 1 shown in FIG. 1 is formed on a semiconductor substrate. The configuration of the oscillation circuit of the fourth embodiment is basically the same as that of the oscillation circuit of the first embodiment shown in FIG. However, a specific example is shown in which the switch element M21 (corresponding to the switch element M1 in FIG. 1) and the variable capacitance element V2 are formed on the semiconductor substrate. The switch element M21 is formed as an n-type MISFET on a semiconductor substrate.

  In FIG. 6, the n-type MISFET M21 is formed on the surface of the p-well PW1 provided on the surface of the deep n-well DNW1 provided on the surface of the p-type substrate PS1. The lead portions B and C provided at both ends of the inductor L2 are connected to the source and drain portions D21 and S21 serving as the drain and source of the n-type MISFET M21, respectively. A control signal LCNT is connected to the gate electrode of the n-type MISFET M21. The p-type substrate PS21 is connected to the ground potential, and the deep n-well DNW21 is connected to the power supply potential VDD. Note that the potential of the DNW 21 is not limited to the power supply potential VDD, and can take an arbitrary value higher than that of the p well PW 21. Here, if the control signal LCNT connected to the gate of the n-type MISFET M21 is less than or equal to the threshold value of the n-type MISFET M21, M21 is turned off, and the inductance of the LC resonator is the sum of L1, L2, and L3. On the other hand, if LCNT is equal to or greater than the threshold value, M21 is turned on, and the inductance of the LC resonator is the sum of L1 and L3. Further, the source / drain portions S21 and D21 form a pn junction between the p well PW21 and have a capacitance. This capacitance is between S21-PW1 and between D21-PW1, but if the source-drain of MISFET is symmetrical and the voltage of PW1 is kept constant, the capacitance in which both capacitances are connected in series is between S21-D21. It can be regarded as being. Since this capacitance is formed by a pn junction, the capacitance value can be changed by changing the potential of PW1 by the WCONT terminal. That is, substantially the same function as the variable capacitor V1 of FIG. 1 can be achieved.

  FIG. 7 is a block diagram of an oscillation circuit according to the fifth embodiment. In the oscillation circuit of the fifth embodiment shown in FIG. 7, the inductance element 1A and the inductance element 1B are connected in parallel between the OUTT terminal and the OUTB terminal. In addition, a lead portion E is provided in the middle of the wiring of the inductance element 1A, and a lead portion F is provided in the middle of the wiring of the inductance element 1B. Further, the switch element M1 and the second capacitor element V2 are connected in parallel between the lead portion E and the lead portion F. The switch element M1 is a MISFET, and the second capacitor element V2 is a varactor. With this configuration, an LC resonance circuit including inductors L11 to L13 and L21 to L23, capacitive elements V1 and V2, and a switch element M1 is formed. Here, when the switch element M1 is off, the capacitance of the second capacitive element V2 affects the resonance frequency of the resonators OUTT and OUTB as in the case of FIG. 1, but when the switch element M1 is turned on, the influence disappears. That is, as in FIG. 1, the inductance and the capacitance can be switched simultaneously by turning on and off the switch. Also in this embodiment, it is desirable that the shapes of the inductance elements 1A and 1B and the positions of the lead portions E and F are symmetrically arranged so that the characteristics viewed from the OUTT terminal and the OUTB terminal are equal.

  FIG. 8 is a block diagram of an oscillation circuit according to the sixth embodiment. In FIG. 8, the number of lead portions provided in the inductance elements 1A and 1B is further increased, and the number of switch elements and capacitive elements connected in parallel is increased, compared to the oscillation circuit of the fifth embodiment described in FIG. The inductance element 1A is provided with lead portions H and I, and the inductance element 1B is provided with lead portions J and K. Further, the switch element M1 and the second capacitor element V21 are connected in parallel between the lead portion H and the lead portion K, and the switch element M2 and the second capacitor element V21 are connected between the lead portion I and the lead portion J. Capacitive elements V22 are connected in parallel. Control signals LCNT1 and LCNT2 are connected to the gates of the switch elements M1 and M2 formed of MISFETs. Other configurations are the same as those of the other embodiments. With the above configuration, an LC resonator including inductors L11 to L15, L21 to L25, capacitive elements V1, V21, V22, and switch elements M1, M2 is formed. Although the case where there are two switch elements M1 and M2 is shown here, a configuration having three or more switch elements can also be manufactured.

  Here, when the switches M1 and M2 are off, the capacities of V21 and V22 affect the resonance frequency of the resonators OUTT and OUTB as in the case of FIG. 1, but when M1 is turned on, the effect of V21 disappears. When M2 is turned on, the influence of V22 disappears. Both M1 and M2 can be turned on, and four inductance and capacitance states can be realized by a combination of M1 and M2. Also in this embodiment, the shapes of the inductance elements 1A and 1B and the positions of the lead portions H and K and I and J are symmetrically arranged so that the characteristics viewed from the OUTT terminal and the OUTB terminal are equal. It is desirable.

  Although the embodiments have been described above, the present invention is not limited only to the configurations of the above embodiments, and of course includes various modifications and corrections that can be made by those skilled in the art within the scope of the present invention. It is.

DESCRIPTION OF SYMBOLS 1, 1A, 1B: Inductance element 2: Amplifier circuit INV1, INV2: Inverter circuit M1, M2, M21: MISFET (Metal Insulator Semiconductor Field Effect Transistor) Metal insulation semiconductor field effect transistor (switch element)
M10, M11, M12, M13, M15, M31: MISFET
L1 to L5, L11 to L15, L21 to L25, L31: Inductor V1: First capacitor (variable capacitor; varactor)
V2, V21, V22: second capacitor element (variable capacitor; varactor)
C1: First capacitor element (fixed capacitor; capacitor)
C2: Second capacitor element (fixed capacitor; capacitor)
A, B, C, E, F, H, I, J, K, T: Lead-out part OUTT, OUTB, VDD, IN, OUT: Terminals LCNT, LCNT1, LCNT2, WCONT: Control signal PW21: p-well DNW21: deep n-well PS21: p-type substrate S21, D21: source / drain portion C31: fixed capacitance R31: resistor G8: ground wiring L8: inductor wiring

Claims (10)

An inductance element connected between the first terminal and the second terminal;
An amplifier circuit connected between the first terminal and the second terminal in parallel with the inductance element;
A first capacitor connected to the first terminal and the second terminal;
A resonance type oscillation circuit comprising:
The inductance element is
A first inductance element provided with a first lead portion and a second inductance element provided with a second lead portion;
An oscillation circuit, wherein a first switch element and a second capacitor element are connected in parallel between the first lead portion and the second lead portion. The first inductance elements are arranged symmetrically so that the characteristics seen from the first and second terminals are equal;
The second inductance elements are also arranged symmetrically so that the characteristics seen from the first and second terminals are equal,
The first lead portion and the second lead portion are arranged symmetrically so that the characteristics viewed from the first and second terminals when the first switch element is turned on and off are equal. The oscillation circuit according to claim 1, wherein: The first inductance element is provided with a third lead portion different from the first lead portion,
The second inductance element is provided with a fourth lead portion different from the second lead portion,
A second switch element and a third capacitor element are connected in parallel between the third lead portion and the fourth lead portion,
The third lead portion and the fourth lead portion are arranged symmetrically so that the characteristics viewed from the first and second terminals when the second switch element is turned on and off are equal. The oscillation circuit according to claim 2.   3. The oscillation circuit according to claim 1, wherein a capacitance value of at least one of the first and second capacitive elements is variable.   4. The oscillation circuit according to claim 3, wherein at least one of the first, second, and third capacitance elements has a variable capacitance value.   6. A semiconductor device, wherein the oscillation circuit according to claim 1 is formed on a semiconductor substrate.   The semiconductor device according to claim 6, wherein the capacitive element is a pn junction capacitor formed on the semiconductor substrate.   8. The semiconductor device according to claim 6, wherein the switch element is a MISFET.   9. The semiconductor device according to claim 6, wherein the capacitive element is a pn junction capacitor formed in a source / drain portion of a MISFET.   The semiconductor device according to claim 9, wherein the MISFET is formed on a surface of a well provided on a surface of a semiconductor substrate, and a capacitance value of the capacitive element is made variable by controlling a potential of the well.

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