JP2014107287A - Image pickup element and image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem of an image pickup element using a shared structure, in which the two-dimensional form of photodiodes is made as much symmetrical as possible to enable each of pixels sharing a transistor to receive light evenly, with the transistor being disposed in a shared region in which parts of each pixel region are put together, that extension of a photodiode region is limited even when such a shared structure is employed.SOLUTION: Provided is an image pickup element in which a first pixel having a first photodiode region for a unit pixel region and a second pixel having a second photodiode region smaller than the first photodiode region are included, and at least one transistor used for reading out a pixel signal of at least the first pixel is provided in a unit region for the second pixel.

Description

  The present invention relates to an imaging element and an imaging apparatus.

A shared structure is known in which a plurality of pixels are shared by a plurality of pixels in an image sensor in which a plurality of pixels are arranged in a matrix.
[Prior art documents]
[Patent Literature]
[Patent Document 1] Japanese Patent Application Laid-Open No. 2001-298177

  An image sensor that employs a shared structure is configured so that the two-dimensional shape of the photodiode is as symmetric as possible so that each pixel sharing the transistor can receive light uniformly, and the transistor is arranged in a shared region where a part of each pixel region is gathered. Is arranged. Even if such a shared structure is adopted, there is a limit to the expansion of the photodiode region.

  The imaging device according to the first aspect of the present invention includes a first pixel having a first photodiode region with respect to a unit pixel region, and a second pixel having a second photodiode region smaller than the first photodiode region. In addition, at least one transistor used for reading out the pixel signal of at least the first pixel is provided in the unit region of the second pixel.

  An imaging device according to a second aspect of the present invention includes the above-described imaging device and an image processing unit that processes an output signal from the imaging device.

  It should be noted that the above summary of the invention does not enumerate all the necessary features of the present invention. In addition, a sub-combination of these feature groups can also be an invention.

It is a figure explaining the structure of the digital camera which concerns on embodiment of this invention. It is a conceptual diagram which represents notably the mode that a part of imaging device was expanded. It is a figure which shows the circuit structure of one pixel. It is a figure which shows the circuit structure in the case of employ | adopting a shared structure. It is a figure which shows the layout of a basic lattice notionally. It is a figure which shows the example of another layout. It is a figure which shows the example of another layout. It is a figure explaining the example of another basic lattice, and a pixel block. It is a figure explaining the example of another basic lattice. It is a figure explaining the example of another basic lattice. It is a figure explaining the example of another basic lattice. It is a figure explaining the sensitivity difference of a parallax pixel and a parallax pixel, and its adjustment. It is a figure which shows the circuit structure of a shared structure provided with an amplifier. It is a figure which shows the example of a layout provided with an amplifier.

  Hereinafter, the present invention will be described through embodiments of the invention, but the following embodiments do not limit the invention according to the claims. In addition, not all the combinations of features described in the embodiments are essential for the solving means of the invention.

  The digital camera according to the present embodiment, which is one form of the imaging device, is configured to generate images with a plurality of viewpoints for one scene by one shooting. Each image having a different viewpoint is called a parallax image. In the present embodiment, a case where a right parallax image and a left parallax image from two viewpoints corresponding to the right eye and the left eye are generated will be described. The digital camera in the present embodiment can generate a parallax-free image without parallax from the central viewpoint together with the parallax image.

  FIG. 1 is a diagram illustrating the configuration of a digital camera 10 according to an embodiment of the present invention. The digital camera 10 includes a photographic lens 20 as a photographic optical system, and guides a subject light beam incident along the optical axis 21 to the image sensor 100. The photographing lens 20 may be an interchangeable lens that can be attached to and detached from the digital camera 10. The digital camera 10 includes an image sensor 100, a control unit 201, an A / D conversion circuit 202, a memory 203, a drive unit 204, an image processing unit 205, a memory card IF 207, an operation unit 208, a display unit 209, and an LCD drive circuit 210. .

  As shown in the figure, the direction parallel to the optical axis 21 toward the image sensor 100 is defined as the Z-axis plus direction, the direction toward the back of the paper surface on the plane orthogonal to the Z-axis is the X-axis plus direction, and the upward direction on the paper surface is Y. The axis is defined as the plus direction. In the following several figures, the coordinate axes are displayed so that the orientation of each figure can be understood with reference to the coordinate axes of FIG.

  The taking lens 20 is composed of a plurality of optical lens groups, and forms an image of a subject light flux from the scene in the vicinity of its focal plane. In FIG. 1, for convenience of explanation, the photographic lens 20 is represented by a single virtual lens arranged in the vicinity of the pupil. The image sensor 100 is disposed near the focal plane of the photographic lens 20. The image sensor 100 is an image sensor such as a CMOS sensor in which a plurality of photoelectric conversion elements are two-dimensionally arranged. The image sensor 100 is timing-controlled by the drive unit 204, converts the subject image formed on the light receiving surface into a pixel signal, and outputs the pixel signal to the A / D conversion circuit 202.

  The A / D conversion circuit 202 converts the pixel signal output from the image sensor 100 into a digital image signal and outputs the digital image signal to the memory 203. The image processing unit 205 performs various image processing using the memory 203 as a work space, and generates image data.

  In addition, the image processing unit 205 also has general image processing functions such as adjusting image data in accordance with the selected image format. The generated image data is converted into a display signal by the LCD drive circuit 210 and displayed on the display unit 209. The data is recorded on the memory card 220 attached to the memory card IF 207.

  FIG. 2 is a conceptual diagram conceptually showing a state in which a part of the image sensor is enlarged. In the pixel area, usually 100,000 or more pixels are arranged in a matrix. In the present embodiment, four adjacent pixels of 2 pixels × 2 pixels form one basic lattice 110. The basic grid 110 adopts a Bayer array in which a green filter (G filter) is arranged for the upper left pixel and the lower right pixel among the four pixels, a red filter (R filter) is arranged for the lower left pixel, and a blue filter (B filter) is arranged for the upper right pixel. To do. Among these, the lower left pixel and the upper right pixel are non-parallax pixels, and the upper left pixel and the lower right pixel are parallax pixels.

  The parallax pixel is a pixel that receives a partial light beam that is deviated from the optical axis among incident light beams that pass through the photographing lens 20. The parallax pixel is provided with an aperture mask having a deviated opening that is deviated from the center of the pixel so as to transmit only the partial light flux. For example, the opening mask is provided so as to overlap the color filter. In the present embodiment, the parallax Lt pixel defined so that the partial light beam reaches the left side with respect to the pixel center and the parallax specified so that the partial light beam reaches the right side with respect to the pixel center by the aperture mask. There are two types of Rt pixels. In the basic grid 110, the upper left pixel is a parallax Lt pixel, and the lower right pixel is a parallax Rt pixel. In the present embodiment, as will be described later, the parallax pixels are formed by shifting the photodiode region in accordance with the incident range of the partial light flux. On the other hand, the non-parallax pixel is a pixel that is not provided with an aperture mask, and is a pixel that receives the entire incident light beam that passes through the photographing lens 20, not limited to a certain portion.

  FIG. 3 is a diagram illustrating a circuit configuration of one pixel when the shared structure is not employed. Here, although described as a pixel without parallax 300, even in the case of a parallax pixel, the circuit configuration for functioning as a pixel is substantially the same for a parallax pixel. Differences will be described later.

  FIG. 3A is a diagram illustrating a circuit configuration of the non-parallax pixel 300. The non-parallax pixel 300 in the present embodiment has a so-called four-transistor pixel structure.

  The photodiode 301 is connected to a transfer transistor 302, and the gate of the transfer transistor 302 is connected to a TX wiring 307 to which a transfer pulse is supplied. The drain of the transfer transistor 302 is connected to the source of the reset transistor 303. A floating diffusion 311 is formed between the drain of the transfer transistor 302 and the source of the reset transistor 303. The floating diffusion 311 is connected to the gate of the amplification transistor 304.

  The drain of the reset transistor 303 is connected to a VDD wiring 309 supplied with a power supply voltage, and the gate thereof is connected to a reset wiring 306 supplied with a reset pulse. The drain of the amplification transistor 304 is connected to a VDD wiring 309 to which a power supply voltage is supplied. The source of the amplification transistor 304 is connected to the drain of the selection transistor 305. The gate of the selection transistor is connected to a decoder wiring 308 to which a selection pulse is supplied. The source of the selection transistor 305 is connected to the output wiring 310.

  The load current source 312 supplies current to the output wiring 310. That is, when the selection transistor 305 is turned on, the source of the amplification transistor is connected to the load current source 312 and operates as a source follower. The load current source 312 is provided as a common element for a plurality of pixels sharing the output wiring 310.

  Here, the flow from the start of charge accumulation to pixel output after the end of accumulation will be described. When a reset pulse is applied to the reset transistor 303 through the reset wiring 306 and at the same time a transfer pulse is applied to the transfer transistor 302 through the TX wiring 307, the potentials of the photodiode 301 and the floating diffusion 311 are reset.

  The photodiode 301 converts incident light to be received into electric charges and accumulates them. Prior to the signal reading of the photodiode, a reset pulse is applied to the reset transistor 303 through the reset wiring 306 to reset the floating diffusion 311. Then, the selection pulse is applied to the selection transistor 305 through the decoder wiring 308, the reset potential is transmitted to the output wiring through the amplification transistor 304 and the selection transistor 305, and is read out as a reset signal by a subsequent circuit portion (not shown). . After reset, the reset pulse is released and the reset transistor 303 is turned off. Thereafter, when a transfer pulse is applied to the transfer transistor 302, the accumulated charge is transferred to the floating diffusion 311, and the potential of the floating diffusion 311 changes from the reset potential to the signal potential after charge accumulation. When a selection pulse is applied to the selection transistor 305 again through the decoder wiring 308, the signal potential after charge accumulation is transmitted to the output wiring 310. A signal potential after charge accumulation is read out by a circuit unit at a later stage (not shown), and a pixel signal corresponding to the optical signal incident on the pixel is obtained by taking a difference from the already read out reset potential.

  FIG. 3B is a diagram schematically showing the circuit diagram of FIG. The same elements are denoted by the same reference numerals. The concept of the shared structure will be described using this schematic diagram.

  FIG. 4 is a diagram illustrating a circuit configuration when a shared structure is employed. FIG. 4A shows a circuit configuration in the case where two pixels of the first pixel and the second pixel are made one pixel block. A pixel block refers to a group of a plurality of pixels sharing at least some of the transistors.

  Charge accumulation in the photodiode 301a of the first pixel is controlled by the first transfer transistor 302a. The charge accumulation of the photodiode 301b of the second pixel is controlled by the second transfer transistor 302b. That is, the transfer transistor is provided individually corresponding to each pixel. On the other hand, one reset transistor 303, amplification transistor 304, and selection transistor 305 are provided for these two pixels. That is, these transistors are connected to a shared wiring shared by the first pixel and the second pixel. Specifically, the drain of the first transfer transistor 302a and the drain of the second transfer transistor 302b are connected to a shared wiring, and the shared wiring is connected to the source of the reset transistor 303 and the gate of the amplification transistor 304. Other connections are the same as those described with reference to FIG.

  FIG. 4B shows a circuit configuration when four pixels from the first pixel to the fourth pixel are used as one pixel block. The photodiode 301a of the first pixel is the first transfer transistor 302a, the photodiode 301b of the second pixel is the second transfer transistor 302b, the photodiode 301c of the third pixel is the first transfer transistor 302c, and the photodiode of the fourth pixel. Charge accumulation of the diode 301d is controlled by the fourth transfer transistor 302d. That is, the transfer transistor is provided individually corresponding to each pixel.

  On the other hand, one reset transistor 303, amplification transistor 304, and selection transistor 305 are provided for these four pixels. That is, these transistors are connected to a shared wiring shared by the first pixel to the fourth pixel. Specifically, the drains of the first transfer transistor 302a, the second transfer transistor 302b, the third transfer transistor 302c, and the fourth transfer transistor 302d are connected to a shared wiring, and the shared wiring is amplified with the source of the reset transistor 303. Connected to the gate of transistor 304. Other connections are the same as those described with reference to FIG.

  Next, the relative positional relationship between each transistor and the light receiving region of the photodiode 301 will be described. FIG. 5 is a diagram conceptually showing the layout of the basic lattice 110.

  As described above, the non-parallax pixel 300 in the basic grid 110 is the upper right pixel in which the B filter is arranged and the lower left pixel in which the R filter is arranged. The light receiving area of the photodiode 301b of the upper right pixel is provided at the center of the unit pixel area occupied by one pixel on the light receiving surface of the image sensor 100. Similarly, the light receiving area of the photodiode 301d of the lower left pixel is also provided at the center of the unit pixel area. In the figure, a square indicated by a solid line represents a photodiode region as a light receiving region.

  In the parallax Lt pixel 600, a light receiving region of the photodiode 301a is provided at a position displaced to the left with respect to the center of the unit pixel region. In the figure, a rectangle indicated by a solid line represents a photodiode region as a light receiving region. For example, the photodiode region of the photodiode 301a is provided in a region corresponding to the left half of the photodiode region of the photodiode 301b (301d) with respect to the unit pixel region. Note that the function of the photodiode 301a is the same as that of the photodiode 301 described above.

  When the photodiode region is provided in this way, an extra space is generated in the right half region. The surplus space is also a space adjacent to the upper right pixel that is a non-parallax pixel. Therefore, a shared structure is adopted in which the upper left pixel and the upper right pixel are the pixel blocks 111, and the transistors that drive the two pixels are collectively arranged in this surplus space. Here, “driving a pixel” is a concept including the meaning of “reading out a pixel signal of a pixel”.

  Specifically, a first transfer transistor 302a connected to the photodiode 301a, a second transfer transistor 302b connected to the photodiode 301b, a reset transistor 303 shared by two pixels, an amplification transistor 304, and a selection transistor 305 Arranged in the surplus area. Note that the periphery of the photodiode region is covered with a light-shielding film, so that the subject luminous flux does not directly enter these transistors.

  In the parallax Rt pixel 500, a light receiving region of the photodiode 301c is provided at a position shifted to the right side with respect to the center of the unit pixel region. In the figure, a rectangle indicated by a solid line represents a photodiode region as a light receiving region. For example, the photodiode region of the photodiode 301c is provided in a region corresponding to the right half of the photodiode region of the photodiode 301b (301d) with respect to the unit pixel region. Note that the function of the photodiode 301c is similar to the function of the photodiode 301 described above.

  When the photodiode region is provided in this way, an extra space is generated in the left half region. The surplus space is also a space adjacent to the lower left pixel that is a non-parallax pixel. In view of this, a shared structure in which two pixels, the lower left pixel and the lower right pixel, are used as the pixel block 112 is adopted, and the transistors that drive the two pixels are collectively arranged in the surplus space.

  Specifically, the first transfer transistor 302c connected to the photodiode 301c, the second transfer transistor 302d connected to the photodiode 301d, the reset transistor 303 shared by the two pixels, the amplification transistor 304, and the selection transistor 305 include this Arranged in the surplus area. Note that the periphery of the photodiode region is covered with a light-shielding film, so that the subject luminous flux does not directly enter these transistors.

  As described above, since the transistors in the shared structure can be collectively arranged in the surplus space, none of the transistors is provided in the unit pixel region of the non-parallax pixel 300 in the example of FIG. Therefore, the light receiving area of the photodiode 301d can be expanded accordingly. That is, the aperture ratio can be set high. If the aperture ratio can be set high, the light receiving efficiency increases, so the image sensor 100 can output a good pixel signal even in a darker shooting environment.

  In the example of FIG. 5, the basic lattice 110 that is a periodic pattern formed by a combination of an array of color filters and an array of parallax pixels and non-parallax pixels includes two pixel blocks 111 and 112. It was. As for the relationship between the basic lattice and the pixel block, the basic lattice may include a plurality of pixel blocks as described above, or one basic lattice may form one pixel block. Alternatively, a plurality of basic lattices may form one pixel block. In addition, the pixel block may be formed including a part of each of the adjacent basic lattices.

  FIG. 6 is a diagram illustrating another layout example. The figure shows one pixel block 111. The pixel block 111 includes, as the non-parallax pixel 300, an upper right pixel provided with a B filter, a lower right pixel provided with a G filter, and a lower left pixel provided with an R filter, and the G filter is provided as a parallax pixel 400. Including the upper left pixel. That is, the pixel block 111 has a shared structure with four pixels.

  The parallax pixel 400 is the parallax Lt pixel 600, and the light receiving region of the photodiode 301a is provided at a position displaced to the left with respect to the center of the unit pixel region. Therefore, as in the example of FIG. 5, an extra space is generated in the right half region of the unit pixel region. In this example, the first transfer transistor 302a connected to the photodiode 301a, the reset transistor 303, the amplification transistor 304, and the selection transistor 305 shared by the four pixels are arranged in this surplus region.

  On the other hand, the second transfer transistor 302b connected to the photodiode 301b is disposed in the unit pixel region of the upper right pixel where the photodiode 301b is disposed. Similarly, the third transfer transistor 302c connected to the photodiode 301c is within the unit pixel region of the lower right pixel where the photodiode 301c is disposed, and the fourth transfer transistor 302d connected to the photodiode 301d is the photodiode. Each pixel is arranged in the unit pixel area of the lower left pixel where 301d is arranged.

  As described above, when the transfer transistor 302 is arranged in each unit pixel region, the number of transistors to be arranged in the surplus space can be suppressed. Therefore, a high aperture ratio is achieved in the parallax pixel 400 while reducing the pixel pitch. Can be secured. There is an advantage that the positional relationship between the corresponding photodiodes 301b to 301d and the transfer transistors 302b to 302d can be easily arranged. In addition, in order to arrange the transfer transistors 302b to 302d in each unit pixel region, the shape of the light receiving region of the photodiodes 301b to 301d may be an irregular shape different from a square as shown in the figure. Even in this case, it is preferable that the light receiving region of the photodiode 301a is maintained in a rectangular shape as in the upper left pixel in the example of FIG.

  6 shows the pixel block 111 including the parallax Lt pixel 600, the pixel block 112 including the parallax Rt pixel 500, which is paired with the pixel block, is also arranged on the image sensor 100. For example, the pixel block 112 includes, as the non-parallax pixel 300, an upper left pixel in which a G filter is disposed, an upper right pixel in which a B filter is disposed, and a lower left pixel in which an R filter is disposed. Includes the lower right pixel. In this case, since a surplus space is generated in the left half region of the lower right pixel, the reset transistor 303, the amplification transistor 304, the selection transistor 305, and the like shared by the four pixels are arranged in this surplus region.

  FIG. 7 is a diagram showing still another layout example. In the example of FIG. 6, the shape of the light receiving region of the photodiodes 301 b to 301 d is an irregular shape, and the transfer transistors 302 b to 302 d corresponding to the respective shapes are arranged, but in the example of FIG. Transistors are not placed in the region.

  That is, the pixel block 111 has a shared structure of four pixels as in the example of FIG. 6, but the transfer transistors 302a to 302d and the reset transistor 303, the amplification transistor 304, and the selection transistor 305 shared by the four pixels are , All are arranged in the surplus space of the parallax Lt pixel 600. The transfer transistors 302b to 302d are connected to the photodiodes 301b to 301d, respectively, across the unit pixel region.

  If the transistors are arranged in this way, the aperture ratio can be set high while keeping the light receiving areas of the photodiodes 301b to 301d of the non-parallax pixel 300 in a square shape. From the viewpoint of this, it is preferable. Also in this example, as in the example of FIG. 6, a pair of pixel blocks 112 including the parallax Rt pixels 500 are also arranged on the image sensor 100.

FIG. 8 is a diagram illustrating another example of the basic grid 120 and the pixel block 121. The basic grid 120 includes four Bayer arrays having four pixels as a basic unit, four in the Y-axis direction and four in the X-axis direction, and is composed of 64 pixels. Pixels in the basic grid 120 are denoted by _PIJ . For example, the upper left pixel is _{P 11,} the upper right pixel is _{P 81.} As shown in the figure, the parallax pixels are arranged as follows.
P ₁₁ : Parallax Lt pixel + G filter (= G (Lt))
P ₅₁ ... Parallax Rt pixel + G filter (= G (Rt))
P ₃₂ ... Parallax Lt pixel + B filter (= B (Lt))
P ₈₃ ... Parallax Rt pixel + R filter (= R (Rt))
P ₁₅ ... Parallax Rt pixel + G filter (= G (Rt))
P ₅₅ ... Parallax Lt pixel + G filter (= G (Lt))
P ₇₆ ... Parallax Rt pixel + B filter (= B (Rt))
P ₄₇ ... Parallax Lt pixel + R filter (= R (Lt))

  The other pixels are non-parallax pixels, and are any of the non-parallax pixel + R filter, the non-parallax pixel + G filter, and the non-parallax pixel + B filter. When viewed as a whole of the image sensor 100, the parallax pixels are divided into one of a first group having a G filter, a second group having an R filter, and a third group having a B filter. Includes at least one parallax Lt pixel and parallax Rt pixel belonging to each group. As in the example of the figure, these parallax pixels and non-parallax pixels may be arranged with randomness in the basic grid 120. By arranging with randomness, RGB color information can be acquired as the output of the parallax pixels without causing bias in the spatial resolution for each color component, so higher-quality parallax image data Is obtained.

  Here, in the basic grid 120, pixel blocks 121 are formed in units of 8 pixels, which are 4 pixels in the Y-axis direction and 2 pixels in the X-axis direction. Therefore, the basic grid 120 includes two 8-pixel blocks in the Y-axis direction and four in the X-axis direction.

  As described above, when the shared structure of 8 pixels is adopted, each pixel block 121 is laid out so as to include at least one of the 8 pixels as a parallax pixel. When one pixel block is laid out so as to include a plurality of non-parallax pixels and at least one parallax pixel, an extra space is generated in the unit pixel area of the parallax pixel, and is used for pixel signal readout in the pixel block 121. Transistors can be placed together in the excess space. Note that each transfer transistor 302 may be arranged in a unit pixel area of each non-parallax pixel as in the example of FIG.

FIG. 9 is a diagram for explaining another example of the basic lattice 120. The basic grid 120 is composed of 64 pixels as in the example of FIG. As shown in the figure, the parallax pixels are arranged as follows.
P ₃₂ ... Parallax Lt pixel + B filter (= B (Lt))
P ₁₃ ... Parallax Lt pixel + G filter (= G (Lt))
P ₅₃ ... Parallax Rt pixel + G filter (= G (Rt))
P ₈₃ ... Parallax Rt pixel + R filter (= R (Rt))
P ₇₆ ... Parallax Rt pixel + B filter (= B (Rt))
P ₁₇ ... Parallax Rt pixel + G filter (= G (Rt))
P ₄₇ ... Parallax Lt pixel + R filter (= R (Lt))
P ₅₇ ... Parallax Lt pixel + G filter (= G (Lt))

  The other pixels are non-parallax pixels, and are any of the non-parallax pixel + R filter, the non-parallax pixel + G filter, and the non-parallax pixel + B filter. Also in this example, the parallax pixels and the non-parallax pixels are arranged with randomness in the basic lattice 120.

  Also in this example, as in the example of FIG. 8, the basic lattice 120 includes pixel blocks 122 in units of 8 pixels of 4 pixels in the Y-axis direction and 2 pixels in the X-axis direction. Therefore, the basic grid 120 includes two 8-pixel blocks in the Y-axis direction and four in the X-axis direction.

  Also in this example, a shared structure with 8 pixels is adopted, and each pixel block 122 is adjusted to include at least one pixel among the 8 pixels as a parallax pixel. Moreover, in each pixel block 122, the parallax pixel is arranged adjacent to the center C of the pixel block 122. Thus, when the parallax pixel is arranged closer to the center C of the pixel block 122 than at least one non-parallax pixel, each transistor and each non-parallax pixel arranged in the extra space of the parallax pixel The connection wiring with the photodiode 301 can be short. If the connection wiring can be shortened, the transmission efficiency of the pixel signal can be expected. Note that each transfer transistor 302 may be arranged in a unit pixel area of each non-parallax pixel as in the example of FIG.

FIG. 10 is a diagram for explaining another example of the basic lattice 120. The basic grid 120 is composed of 64 pixels as in the example of FIG. However, the arrangement of the color filters is different from the Bayer arrangement in the examples of FIGS. 8 and 9, and in accordance with the position of the parallax pixels, two G filters, one B each in a unit of four pixels on the top, bottom, left and right. The filter and the R filter are appropriately replaced and arranged. As shown in the figure, the parallax pixels are arranged as follows.
P ₁₁ : Parallax Lt pixel + G filter (= G (Lt))
P ₆₁ ... Parallax Rt pixel + G filter (= G (Rt))
P ₃₂ ... Parallax Lt pixel + B filter (= B (Lt))
P ₈₂ ... Parallax Rt pixel + B filter (= B (Rt))
P ₃₃ ... Parallax Lt pixel + R filter (= R (Lt))
P ₈₃ ... Parallax Rt pixel + R filter (= R (Rt))
P ₁₄ Parallax Lt pixel + G filter (= G (Lt))
P ₆₄ ... Parallax Rt pixel + G filter (= G (Rt))
P ₂₅ ... Parallax Rt pixel + G filter (= G (Rt))
P ₅₅ ... Parallax Lt pixel + G filter (= G (Lt))
P ₄₆ ... Parallax Rt pixel + B filter (= B (Rt))
P ₇₆ ... Parallax Lt pixel + B filter (= B (Lt))
P ₄₇ ... Parallax Rt pixel + R filter (= R (Rt))
P ₇₇ ... Parallax Lt pixel + R filter (= R (Lt))
P ₂₈ ... Parallax Rt pixel + G filter (= G (Rt))
P ₅₈ ... Parallax Lt pixel + G filter (= G (Lt))

  The other pixels are non-parallax pixels, and are any of the non-parallax pixel + R filter, the non-parallax pixel + G filter, and the non-parallax pixel + B filter. Also in this example, the parallax pixels and the non-parallax pixels are arranged with randomness in the basic lattice 120.

  Here, in the basic lattice 120, the pixel block 123 is formed in units of four pixels of two pixels in the Y-axis direction and two pixels in the X-axis direction. Accordingly, the basic grid 120 includes four 16-pixel blocks in the Y-axis direction and four in the X-axis direction.

  As described above, when the shared structure of four pixels is adopted, each pixel block 123 is adjusted to include at least one of the four pixels as a parallax pixel. In addition, in each pixel block 123, the light receiving region of the photodiode 301 of the parallax pixel is arranged so as to be shifted outward from the center C so that the center C of the pixel block 123 and the extra space are adjacent to each other. With such an arrangement, the connection wiring between each transistor arranged in the surplus space and the photodiode 301 of each non-parallax pixel can be shortened. If the connection wiring can be shortened, the transmission efficiency of the pixel signal can be expected. Note that each transfer transistor 302 may be arranged in a unit pixel area of each non-parallax pixel as in the example of FIG.

FIG. 11 is a diagram for explaining another example of the basic lattice 130. The basic grid 130 includes 6 pixels in the Y-axis direction and 6 pixels in the X-axis direction, and is composed of 36 pixels. The arrangement of the color filters is different from the Bayer arrangement in the examples of FIGS. 8 and 9, and according to the position of the parallax pixels, two G filters, one B filter, The R filters are arranged with appropriate replacement. As shown in the figure, the parallax pixels are arranged as follows.
P ₁₁ : Parallax Lt pixel + G filter (= G (Lt))
P ₁₂ ... Parallax Rt pixel + R filter (= R (Rt))
P ₄₂ ... Parallax Lt pixel + B filter (= B (Lt))
P ₆₃ ... Parallax Rt pixel + G filter (= G (Rt))
P ₃₄ ... Parallax Lt pixel + G filter (= G (Lt))
P ₁₅ ... Parallax Rt pixel + B filter (= B (Rt))
P ₄₅ ... Parallax Lt pixel + R filter (= R (Lt))
P ₄₆ ... Parallax Rt pixel + G filter (= G (Rt))

  The other pixels are non-parallax pixels, and are any of the non-parallax pixel + R filter, the non-parallax pixel + G filter, and the non-parallax pixel + B filter. Also in this example, the parallax pixels and the non-parallax pixels are arranged in the basic lattice 130 with randomness.

  Here, in the basic lattice 130, pixel blocks 124 are formed in units of 6 pixels of 2 pixels in the Y-axis direction and 3 pixels in the X-axis direction. Therefore, the basic grid 130 includes three 6-pixel blocks in the Y-axis direction and two in the X-axis direction.

  As described above, when the 6-pixel shared structure is employed, each pixel block 124 is laid out so as to include at least one of the 6 pixels as a parallax pixel. When one pixel block is laid out so as to include a plurality of non-parallax pixels and at least one parallax pixel, an extra space is generated in the unit pixel area of the parallax pixel, so that a transistor that reads out a pixel signal in the pixel block 121 Can be arranged together in the surplus space. Note that each transfer transistor 302 may be arranged in a unit pixel area of each non-parallax pixel as in the example of FIG.

  As described above, the photodiode 301 in the parallax pixel 400 has a light receiving region formed in accordance with the incident range of the partial light flux. Therefore, the photodiode 301 in the parallax pixel has a smaller light receiving area than the photodiode 301 in the non-parallax pixel 300, and the output signal for the same scene is smaller than the output signal of the non-parallax pixel. Therefore, an amplifier not provided in the non-parallax pixel 300 may be added to the parallax pixel 400 to increase the amplification factor of the output signal.

  FIG. 12 is a diagram illustrating the sensitivity difference between the non-parallax pixel 300 and the parallax pixel 400 and the adjustment thereof. The horizontal axis represents the light input amount per unit time corresponding to the entire subject luminous flux that passes through the photographing lens 20, and the vertical axis represents the signal output with respect to the light input amount.

  The parallax pixel output line 901 shows the behavior of the output signal when the parallax pixel 400 is not provided with an amplifier, and the non-parallax pixel output line 902 shows the behavior of the output signal from the non-parallax pixel 300. When the light beam from the same subject passing through the photographing lens 20 is received, the parallax pixel 400 is formed with a small light receiving area of the photodiode 301 so as to receive a limited part of the light beam. This is smaller than the signal output of the non-parallax pixel 300. That is, it can be said that the parallax pixel 400 without the amplifier is less sensitive than the non-parallax pixel 300.

  Therefore, in the following embodiment, an amplifier is provided in the unit pixel area of the parallax pixel 400. The amplifier amplifies the signal output so as to reduce the sensitivity difference caused by the difference in size between the light receiving region of the photodiode 301 and the light receiving region of the photodiode 301. The amplification factor of the amplifier is set so that, for example, the parallax pixel output line 901 and the non-parallax pixel output line 902 coincide.

  In addition, the non-parallax pixel 300 has slightly different sensitivity characteristics depending on the type of color filter provided. Therefore, for example, if the color filter provided in the parallax pixel 400 is a G filter, the amplification factor of the amplifier may be set in accordance with the output characteristics of the non-parallax pixel provided with the G filter. That is, the amplification factor of the amplifier may be set according to the type of the color filter provided.

  FIG. 13 is a diagram illustrating a circuit configuration of a shared structure including the amplifier 802. Specifically, a circuit configuration in which an amplifier 802 is incorporated in the two-pixel shared structure described with reference to FIG.

  The amplifier 802 is incorporated between the selection transistor 305 and the output wiring 310. However, in the shared structure of this embodiment, since the non-parallax pixel 300 and the parallax pixel 400 are mixed in the pixel block, the switch 801 is provided so as to amplify only the signal output from the parallax pixel 400. . If the output signal from the selection transistor 305 is a signal output from the non-parallax pixel 300, the switch 801 turns off the amplifier 802 side and turns on the short-circuit line 803 side to the output wiring 310.

  The switch 801 operates in conjunction with the transfer transistor 302. That is, when the transfer transistor 302 for the non-parallax pixel 300 operates, the switch 801 turns on the short-circuit line 803 side, and when the transfer transistor 302 for the parallax pixel 400 operates, the switch 801 turns on the amplifier 802 side. .

  FIG. 14 is a diagram illustrating an example of a layout including the amplifier 802. As shown in the figure, a switch 801 and an amplifier 802 are additionally arranged in the surplus space with respect to the layout example of FIG. Of course, it can be applied to the other layout examples described above in consideration of the surplus space.

  Note that since the amplifier 802 amplifies the signal output of the parallax pixel 400, it is preferably not arranged in the unit pixel region of the non-parallax pixel 300. On the other hand, according to the example of FIG. 14, the amplifier 802 is disposed so as to be within the unit pixel region of the parallax pixel 400, but at least a part thereof may be disposed within the unit pixel region. For example, if the two adjacent parallax pixels 400 are adjacent to each other, the amplifier 802 can be disposed across the two unit pixel regions. The configuration of the amplifier 802 is arbitrary. For example, a configuration including a load current source for causing the previous stage amplification transistor 304 to perform a source follower operation, an amplification transistor having an amplification function, and a capacitive coupling unit that determines an amplification factor can be considered.

  As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above-described embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

  The order of execution of each process such as operations, procedures, steps, and stages in the apparatus, system, program, and method shown in the claims, the description, and the drawings is particularly “before” or “prior to”. It should be noted that the output can be realized in any order unless the output of the previous process is used in the subsequent process. Regarding the operation flow in the claims, the description, and the drawings, even if it is described using “first”, “next”, etc. for convenience, it means that it is essential to carry out in this order. It is not a thing.

10 digital camera, 20 photographing lens, 21 optical axis, 100 image sensor, 110, 120, 130 basic lattice, 111, 112, 121, 122, 123, 124 pixel block, 201 control unit, 202 A / D conversion circuit, 203 Memory, 204 drive unit, 205 image processing unit, 207 memory card IF, 208 operation unit, 209 display unit, 210 LCD drive circuit, 300 non-parallax pixel, 301 photodiode, 302 transfer transistor, 303 reset transistor, 304 amplification transistor, 305 selection transistor, 306 reset wiring, 307 TX wiring, 308 decoder wiring, 309 VDD wiring, 310 output wiring, 311 floating diffusion, 312 load current source, 400 parallax pixel, 500 parallax t pixels, 600 parallax Lt pixels 801 switch, 802 amplifier, 803 short-circuit line, 901 disparity pixel output lines, 902 disparity no pixel output line

Claims (10)

A first pixel having a first photodiode region with respect to a unit pixel region, and a second pixel having a second photodiode region smaller than the first photodiode region;
An image sensor in which at least one transistor used for reading out a pixel signal of the first pixel is provided in the unit pixel region of the second pixel.   A first displaced pixel having the second photodiode region displaced in a first direction with respect to a pixel center; and the second photodiode region displaced in a second direction opposite to the first direction. The imaging device according to claim 1, comprising at least two types of the second pixels of the second displacement pixels.   The imaging device according to claim 1, wherein the transistor includes a common transistor that is also used for reading a pixel signal of the second pixel.   4. The transistor according to claim 1, wherein the transistor is used for pixel signal readout of all the first pixels in a pixel block formed by a plurality of the first pixels and one second pixel. 5. Image sensor.   The image sensor according to claim 4, wherein the second pixel is disposed closer to at least one of the first pixels with respect to a center of the pixel block.   The imaging device according to claim 1, wherein no transistor is provided in the unit pixel region of the first pixel.   The imaging device according to claim 1, wherein a transistor other than a transfer transistor used for reading a pixel signal of the first pixel is not provided in the unit pixel region of the first pixel.   The imaging device according to claim 1, wherein the second pixel is provided with an amplifier that is not provided in the first pixel so that at least a part of the second pixel is included in the unit pixel region. .   The imaging device according to claim 8, wherein the amplifier amplifies an output signal of the second photodiode region included in the same unit pixel region. The imaging device according to any one of claims 1 to 9,
An imaging apparatus comprising: an image processing unit that processes an output signal from the imaging element.

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