JP2014103175A - Silicon carbide semiconductor device and silicon carbide semiconductor device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a silicon carbide semiconductor device and a silicon carbide semiconductor device manufacturing method, which can improve capacitance-voltage characteristics of an insulation film and achieve high initial characteristics and high reliability.SOLUTION: The silicon carbide semiconductor device manufacturing method comprises: first, selectively forming an element isolation insulation film 2 on a surface of an n-type SiC substrate 1; subsequently conducting thermal oxidation on the surface of the n-type Si substrate 1 in a halogen atom-containing or halogen compound-containing dry oxygen gas atmosphere thereby to form a thermally oxidized film 3 which functions as a gate insulation film thereby to remove carbon atoms near a boundary surface between the n-type SiC substrate 1 and the thermally oxidized film 3; subsequently conducting a heat treatment for densifying the thermally oxidized film 3 in an Ar gas atmosphere thereby to recover insulation characteristics of the thermally oxidized film 3; and subsequently depositing a polycrystalline silicon film 4 which functions as a gate electrode on the surface side of the n-type SiC substrate 1 so as to cover the thermally oxidized film 3 thereby to form a MOS capacitor composed of the N-type SiC substrate 1, the thermally oxidized film 3 and the polycrystalline silicon film 4.

Description

  The present invention relates to a silicon carbide semiconductor device and a method for manufacturing a silicon carbide semiconductor device.

Conventionally, a semiconductor substrate made of silicon carbide (SiC) (hereinafter referred to as a SiC substrate) or an insulating film such as a silicon oxide (SiO ₂ ) film is provided on the surface of an SiC layer epitaxially grown on the SiC substrate. In the SiC semiconductor device, when the SiO ₂ film is formed by thermal oxidation, carbon (C) contained in the SiC substrate (or SiC layer on the SiC substrate, which will be described below as an example in which the SiC substrate is thermally oxidized). Atoms segregate near the interface between the SiC substrate and the SiO ₂ film. For this reason, there is a problem in that interface states are formed at the interface between the SiC substrate and the SiO ₂ film and the carrier mobility is lowered despite having high mobility due to the characteristics of SiC itself. .

The SiO ₂ film has high insulation characteristics due to the wide bandgap and the formation of a high energy barrier at the interface with the semiconductor or metal electrode. For this reason, it has been widely studied to apply the SiO ₂ film as an insulating film also in the SiC semiconductor device using the SiC substrate. Such a SiO ₂ film forming method includes a thermal oxidation method by exposing a high temperature SiC substrate to an oxidizing atmosphere, and a chemical vapor deposition (CVD) method by thermally decomposing a source gas such as an organosilane. In addition, there is a physical vapor deposition (PVD) method such as a sputtering method, but a thermal oxidation method is advantageous from the viewpoint of insulation characteristics such as a leakage current and an interface state.

An example in which a SiC semiconductor device including a MOS (metal-oxide film-semiconductor) capacitor is manufactured (manufactured) by thermal oxidation will be described. 18 and 19 are cross-sectional views showing a state in the middle of manufacturing a conventional SiC semiconductor device. First, an element isolation insulating film 102 made of an SiO ₂ film is formed on the front surface of an n-type SiC substrate 101 by a LOCOS (Local Oxidation of Silicon) method. Next, the element isolation insulating film 102 is selectively removed to expose the front surface of the n-type SiC substrate 101 in a portion corresponding to the element structure formation region 100a. Next, the front surface of the n-type SiC substrate 101 is thermally oxidized (dry oxidation) in a dry oxygen (O ₂ ) gas atmosphere to form a thermal oxide film (SiO ₂ film) 103 to be a gate insulating film. The state up to here is shown in FIG.

  Next, a polycrystalline silicon film 104 to be a gate electrode is deposited on the front surface side of the n-type SiC substrate 101. Next, the polycrystalline silicon film 104 is patterned by etching (photographic etching method) to form a gate electrode that covers the thermal oxide film 103. At this time, the polycrystalline silicon film 104 is patterned so that a portion of the polycrystalline silicon film 104 covering a part of the element isolation insulating film 102 from the element structure formation region 100a to the element isolation region 100b remains as the electrode extraction region 105. . As a result, a MOS capacitor composed of polycrystalline silicon film 104, thermal oxide film 103, and n-type SiC substrate 101 is formed. The state up to here is shown in FIG. Thereafter, another element structure is formed by a general method, thereby completing the MOS type semiconductor device.

  In such a MOS type semiconductor device, a DC voltage (gate voltage) in which a high frequency AC voltage of 1 MHz is superimposed on the gate electrode (polycrystalline silicon film 104) with a potential of, for example, about 30 mV with respect to the potential of the n-type SiC substrate 101 is applied. As a result, the generation / annihilation of minority carriers responds, and the overall capacitance C of the MOS capacitor changes based on the response of minority carriers near the front surface of the n-type SiC substrate 101. Specifically, when the gate voltage is positive and sufficiently large, electrons which are majority carriers are accumulated near the front surface of the n-type SiC substrate 101, and the entire capacitance C of the MOS capacitor is reduced to the gate insulating film (thermal oxidation). The storage capacitor Cox reflects the dielectric constant of the film 103).

  Thereafter, by gradually changing the gate voltage from the positive voltage to the negative voltage, a depletion layer spreads on the front surface of the n-type SiC substrate 101, and the overall capacitance C of the MOS capacitor decreases. As described above, the entire capacitance C of the MOS capacitor changes in accordance with the gate voltage V (CV characteristics of the MOS capacitor), so that the vicinity of the interface between the gate insulating film (thermal oxide film 103) and the n-type SiC substrate 101 The electrical characteristics of can be evaluated. That is, the interface state formed at the interface between the thermal oxide film 103 and the n-type SiC substrate 101 and the fixed charge in the thermal oxide film 103 can be evaluated by the CV characteristics of the MOS capacitor.

As another method of forming the SiO ₂ film by thermal oxidation, a step of cleaning the surface of a semiconductor layer made of a wide band gap semiconductor using a gas containing a halogen group element, and an oxide layer on the surface of the semiconductor layer A method including a forming step has been proposed (see, for example, Patent Document 1 and Non-Patent Document 1 below).

JP 2007-053227 A

M. Morita, 3 others, Florin-Enhanced Thermal Oxidation of Silicon in the Presence of NF3 (Fluorine-enhanced thermal oxidation of the liters of IP) ), (USA), American Institute of Physics, December 15, 1984, Vol. 45, No. 12, p. 1312-1314

  However, as a result of evaluating the CV characteristics of the above-described conventional MOS capacitor by the inventors, it has been confirmed that there are the following problems. FIG. 17 is a characteristic diagram showing CV characteristics of a semiconductor device manufactured by a conventional manufacturing method. The vertical axis in FIG. 17 indicates the ratio C / Cox of the total capacitance C of the MOS capacitor to the capacitance Cox of the gate insulating film (thermal oxide film 103). As shown in FIG. 17, in the CV characteristics of the conventional MOS capacitor, there is a hysteresis that shifts in the positive direction with respect to the transition of the gate voltage from 0V → 4V → −1V → 0V. Since it is not in a state, it can be seen that there are many charges trapped in the thermal oxide film 103.

  Further, since the slope of the increase curve of the overall capacitance C of the MOS capacitor when the gate voltage is around 1 V is small, the interface state density formed at the interface between the thermal oxide film 103 and the n-type SiC substrate 101 is high, and the heat It can be seen that charges are transferred between oxide film 103 and n-type SiC substrate 101. Further, since the entire CV characteristic curve of the MOS capacitor is shifted in the positive direction of the gate voltage, it is suggested that negative charges are trapped in the thermal oxide film 103. All of the characteristics obtained from the CV characteristics of these conventional MOS capacitors suggest that the initial characteristics and the reliability are low. Therefore, in order to commercialize a conventional MOS capacitor, improvement in initial characteristics and reliability is required.

  In order to solve the above-described problems caused by the prior art, the present invention improves the capacitance-voltage characteristics of an insulating film, and manufactures a silicon carbide semiconductor device and a silicon carbide semiconductor device capable of realizing high initial characteristics and reliability. It aims to provide a method.

  In order to solve the above-described problems and achieve the object, the present inventors have conducted extensive research, and as a result, when forming an insulating film by thermally oxidizing a SiC substrate, C atoms contained in the SiC substrate are converted into SiC. The CV characteristics of the MOS capacitor are improved by preventing segregation near the interface between the substrate and the insulating film, and by removing C atoms segregating in the vicinity of the interface between the SiC substrate and the insulating film or in the insulating film. It was found that initial characteristics and reliability were obtained. The present invention has been made based on such knowledge.

  Further, in order to solve the above-described problems and achieve the object of the present invention, a method for manufacturing a silicon carbide semiconductor device according to the present invention comprises thermally oxidizing a silicon carbide semiconductor substrate in an oxidizing gas atmosphere containing halogen atoms, A first insulating film forming step of forming a first insulating film containing the halogen atom on the surface of the silicon carbide semiconductor substrate;

  The method for manufacturing a silicon carbide semiconductor device according to the present invention is characterized in that, in the above-described invention, in the first insulating film forming step, silicon atoms in the first insulating film are terminated by the halogen atoms. .

  In the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-described invention, the halogen atoms in the first insulating film are removed at a predetermined ratio by a heat treatment after the first insulating film forming step. The method further includes a step.

  In the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-described invention, the halogen atom is a component constituting a halogen compound, and the halogen compound is a halogen nitride, a halogen carbide, or a halogen hydride. It is characterized by being.

  The method for manufacturing a silicon carbide semiconductor device according to the present invention is characterized in that, in the above-described invention, the halogen compound is nitrogen fluoride, carbon chloride or hydrogen chloride.

  In the method for manufacturing a silicon carbide semiconductor device according to the present invention as set forth in the invention described above, the halogen atom is a fluorine atom, a chlorine atom or a bromine atom.

  The method for manufacturing a silicon carbide semiconductor device according to the present invention is characterized in that, in the above-described invention, the halogen atom content concentration is 1% or less with respect to the oxidizing gas in the oxidizing gas atmosphere. To do.

  In addition, the method for manufacturing a silicon carbide semiconductor device according to the present invention is characterized in that, in the above-described invention, the thickness of the first insulating film is 10 nm or less.

  In addition, the method for manufacturing a silicon carbide semiconductor device according to the present invention is characterized in that, in the above-described invention, thermal oxidation is performed at an oxidation temperature of 1200 ° C. or lower in the first insulating film forming step.

  According to the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-described invention, in the first insulating film forming step, the trench is formed in the silicon carbide semiconductor substrate along the inner wall of the trench. The first insulating film is formed.

  In the method of manufacturing a silicon carbide semiconductor device according to the present invention, in the above-described invention, in the first insulating film forming step, the first insulation that electrically isolates elements formed on the silicon carbide semiconductor substrate. A film is formed.

  According to another aspect of the present invention, there is provided a method for manufacturing a silicon carbide semiconductor device according to the above-described invention, wherein the second insulating film is formed on the surface of the silicon carbide semiconductor substrate before the first insulating film forming step. Perform the process. In the first insulating film forming step, the first insulating film is formed at an interface between the silicon carbide semiconductor substrate and the second insulating film.

  In the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-described invention, a second insulating film forming step of forming a second insulating film on a surface of the first insulating film after the first insulating film forming step. Is further included.

  In addition, the method for manufacturing a silicon carbide semiconductor device according to the present invention is characterized in that, in the above-described invention, the thickness of the first insulating film is 5 nm or less.

  In the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-described invention, in the second insulating film forming step, the silicon carbide semiconductor substrate is heated in a gas atmosphere containing a component other than a halogen atom or a halogen compound. The second insulating film is formed by oxidation.

  In the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-described invention, in the second insulating film forming step, the second insulating film is formed by chemical vapor deposition or physical vapor deposition. It is characterized by that.

  In addition, the method for manufacturing a silicon carbide semiconductor device according to the present invention is characterized in that, in the above-described invention, the second insulating film made of a metal oxide is formed in the second insulating film forming step.

  In the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-described invention, in the second insulating film forming step, the second insulation for electrically separating elements formed on the silicon carbide semiconductor substrate. A film is formed.

  In order to solve the above-described problems and achieve the object of the present invention, a silicon carbide semiconductor device according to the present invention has the following characteristics. An insulating film is provided on the surface of the silicon carbide semiconductor substrate so as to be in contact with the silicon carbide semiconductor substrate. The insulating film contains a halogen atom.

  In the silicon carbide semiconductor device according to the present invention, the halogen atom in the insulating film terminates the silicon atom in the insulating film on the surface of the silicon carbide semiconductor substrate side in the above-described invention. Features.

  The silicon carbide semiconductor device according to the present invention is the above-described invention, wherein the carbon atoms in the silicon carbide semiconductor substrate near the interface between the silicon carbide semiconductor substrate and the insulating film are isolated from the silicon carbide semiconductor substrate. Fewer than carbon atoms in the silicon carbide semiconductor substrate away from the interface with the film.

  Further, the silicon carbide semiconductor device according to the present invention is the above-described invention, wherein the metal film provided on the surface of the insulating film, and the insulating gate structure including the metal film, the insulating film, and the silicon carbide semiconductor substrate, Is further provided.

  In the silicon carbide semiconductor device according to the present invention as set forth in the invention described above, the insulating film electrically isolates elements provided on the silicon carbide semiconductor substrate.

  According to the above-described invention, the carbon atoms are removed from the vicinity of the interface between the silicon carbide semiconductor substrate and the insulating film or from the insulating film, or the carbon atoms are moved away from the vicinity of the interface between the silicon carbide semiconductor substrate and the insulating film. The interface state density at the interface between the silicon carbide semiconductor substrate and the insulating film can be reduced. In addition, the fixed charge density in the insulating film can be reduced.

  According to the silicon carbide semiconductor device and the method for manufacturing the silicon carbide semiconductor device according to the present invention, it is possible to improve the capacity-voltage characteristics of the insulating film and achieve high initial characteristics and reliability.

FIG. 6 is a cross-sectional view showing a state in the middle of manufacturing the semiconductor device according to the first embodiment; FIG. 6 is a cross-sectional view showing a state in the middle of manufacturing the semiconductor device according to the first embodiment; FIG. 6 is a characteristic diagram showing CV characteristics of the semiconductor device manufactured by the manufacturing method according to the first embodiment; FIG. 6 is a cross-sectional view showing a state during the manufacture of the semiconductor device according to the second embodiment; FIG. 6 is a cross-sectional view showing a state during the manufacture of the semiconductor device according to the second embodiment; FIG. 6 is a cross-sectional view showing a state during the manufacture of the semiconductor device according to the second embodiment; FIG. 10 is a cross-sectional view showing a state during the manufacture of the semiconductor device according to the fourth embodiment; FIG. 10 is a cross-sectional view showing a state during the manufacture of the semiconductor device according to the fourth embodiment; FIG. 10 is a cross-sectional view showing a state during the manufacture of the semiconductor device according to the fourth embodiment; FIG. 10 is a cross-sectional view showing a state in the middle of manufacturing a semiconductor device according to a fifth embodiment; FIG. 10 is a cross-sectional view showing a state in the middle of manufacturing a semiconductor device according to a fifth embodiment; FIG. 10 is a cross-sectional view showing a state in the middle of manufacturing a semiconductor device according to a fifth embodiment; FIG. 10 is a characteristic diagram illustrating carrier mobility characteristics of a semiconductor device according to a fifth embodiment; FIG. 10 is a cross-sectional view showing a state in the middle of manufacturing a semiconductor device according to a sixth embodiment; FIG. 10 is a cross-sectional view showing a state in the middle of manufacturing a semiconductor device according to a sixth embodiment; FIG. 10 is a cross-sectional view showing a state in the middle of manufacturing a semiconductor device according to a sixth embodiment; It is a characteristic view which shows the CV characteristic of the semiconductor device manufactured with the conventional manufacturing method. It is sectional drawing which shows the state in the middle of manufacture of the conventional SiC semiconductor device. It is sectional drawing which shows the state in the middle of manufacture of the conventional SiC semiconductor device.

  Exemplary embodiments of a silicon carbide semiconductor device and a method for manufacturing the silicon carbide semiconductor device according to the present invention will be explained below in detail with reference to the accompanying drawings. In the present specification and the accompanying drawings, it means that electrons or holes are majority carriers in layers and regions with n or p, respectively. Further, + and − attached to n and p mean that the impurity concentration is higher and lower than that of the layer or region where it is not attached. Note that, in the following description of the embodiments and the accompanying drawings, the same reference numerals are given to the same components, and duplicate descriptions are omitted.

(Embodiment 1)
The semiconductor device according to the first embodiment will be described by taking as an example a case where a MOS capacitor is manufactured (manufactured) using a semiconductor substrate (SiC substrate) made of silicon carbide (SiC). 1 and 2 are cross-sectional views illustrating a state in the process of manufacturing the semiconductor device according to the first embodiment. FIG. 2 shows a state after the completion of the semiconductor device according to the first embodiment. As shown in FIG. 2, the semiconductor device according to the first embodiment electrically connects between an element structure forming region 10 a where an element structure of a device is formed and a plurality of devices provided on an n-type SiC substrate 1. And an element isolation region 10b for insulation isolation. The element isolation region 10b surrounds the element structure formation region 10a.

In the element isolation region 10b, the element isolation insulating film 2 is selectively provided on the front surface of the n-type SiC substrate 1 serving as an n-type drift region. In element structure formation region 10a, a thermal oxide film (SiO ₂ film) 3 serving as a gate insulating film is provided on the front surface of n-type SiC substrate 1. The thickness of the thermal oxide film 3 can be variously changed according to the design specifications such as the capacitance of the MOS capacitor, and may be about 40 nm, for example. Further, the thermal oxide film 3 contains halogen atoms at a predetermined ratio and substantially does not contain carbon (C) atoms.

  The number of C atoms in the n-type SiC substrate 1 in the vicinity of the interface between the n-type SiC substrate 1 and the thermal oxide film 3 is smaller than that in the portion away from the interface with the thermal oxide film 3. On the surface of the thermal oxide film 3, a polycrystalline silicon film 4 to which phosphorus (P) serving as a gate electrode is added is provided. The polycrystalline silicon film 4 extends on the element isolation insulating film 2 from the element structure formation region 10a side to the element isolation region 10b. These polycrystalline silicon film 4, thermal oxide film 3 and n-type SiC substrate 1 constitute a MOS capacitor.

Next, a method for manufacturing the semiconductor device according to the first embodiment will be described. First, an n-type semiconductor substrate (hereinafter referred to as an n-type SiC substrate) 1 made of SiC and having a specific resistance of about 5 Ωcm to 50 Ωcm is prepared. The main surface of the n-type SiC substrate 1 may be, for example, a (0001) Si surface, and both main surfaces are mirror-polished. Next, an element isolation insulating film 2 made of an SiO ₂ film is formed on the front surface of the n-type SiC substrate 1 by the LOCOS method. Next, the element isolation insulating film 2 is selectively removed to expose the front surface of the n-type SiC substrate 1 in a portion corresponding to the element structure formation region 10a. Thereby, the element isolation insulating film 2 remains in the element isolation region 10 b on the front surface of the n-type SiC substrate 1.

Next, the front surface of the n-type SiC substrate 1 is thermally oxidized (dry oxidation) in a dry oxygen (O ₂ ) gas atmosphere containing a halogen atom or a halogen compound to form a thermal oxide film (SiO ₂ ) that becomes a gate insulating film. Film) 3 is formed. The state up to here is shown in FIG. Next, as POA (post oxidation annealing), for example, heat treatment for densifying the thermal oxide film 3 is performed at a temperature of about 1000 ° C. in an argon (Ar) gas atmosphere. Next, a polycrystalline silicon film 4 to which phosphorus (P) is added is deposited on the front surface side of the n-type SiC substrate 1 so as to cover the thermal oxide film 3.

  Next, the polycrystalline silicon film 4 is patterned by etching to form a gate electrode that covers the thermal oxide film 3. At this time, the polycrystalline silicon film 4 is patterned so that a portion of the polycrystalline silicon film 4 covering a part of the element isolation insulating film 2 from the element structure forming region 10a to the element isolation region 10b remains as the electrode extraction region 5. . Thereby, a MOS capacitor composed of polycrystalline silicon film 4, thermal oxide film 3, and n-type SiC substrate 1 is formed. The state up to this point is shown in FIG. Thereafter, another element structure is formed by a general method, thereby completing the MOS type semiconductor device.

For example, fluorine (F), chlorine (Cl), and bromine (Br) may be used as halogen atoms added to the gas atmosphere used to form the thermal oxide film 3. Examples of the halogen compound added to the gas atmosphere used for forming the thermal oxide film 3 include halogen nitrides such as nitrogen fluoride (NF ₃ ), halogen carbides such as carbon chloride (CCl ₄ ), and hydrogen chloride (HCl). The halogen hydride of may be used. By adding a halogen atom or a halogen compound to the gas atmosphere used to form the thermal oxide film 3, the oxidation rate can be increased as compared with the case where they are not added.

  Further, by adding a halogen atom or a halogen compound to the gas atmosphere used to form the thermal oxide film 3, the halogen atom contained in the gas atmosphere and the carbon (C) constituting the n-type SiC substrate 1 in the reaction furnace. Atoms combine to produce molecules with high vapor pressure. Thereby, the degree of vacuum in the reaction furnace can be increased, and the generation of particles can be suppressed. Further, by adding a halogen atom or a halogen compound to the gas atmosphere used for forming the thermal oxide film 3, the vicinity of the interface between the n-type SiC substrate 1 and the thermal oxide film 3 and the thermal oxide film are formed when the thermal oxide film 3 is formed. Excess C atoms generated in 3 can be removed. Specifically, when the thermal oxide film 3 is formed, C atoms constituting the n-type SiC substrate 1 are combined with halogen atoms in the vicinity of the interface between the n-type SiC substrate 1 and the thermal oxide film 3 to form a reaction furnace. Diffused outward.

Further, when the thermal oxide film 3 is formed, silicon (Si) atoms constituting the thermal oxide film 3 are terminated by halogen atoms. For example, when NF ₃ is added to the gas atmosphere used for forming the thermal oxide film 3, the Si—O—Si bond in the thermal oxide film 3 (SiO ₂ film) is cut, and the bond on the surface of the thermal oxide film 3 is Terminate with Si-F bond. Thereby, outward diffusion of C atoms is promoted in the thermal oxide film 3. Further, since the Si atoms constituting the thermal oxide film 3 are terminated by halogen atoms, the network structure of the bond of the thermal oxide film 3 becomes loose, and from the vicinity of the interface between the thermal oxide film 3 and the n-type SiC substrate 1. C atoms can be kept away. As described above, the interface state at the interface between the n-type SiC substrate 1 and the thermal oxide film 3 is removed by removing C atoms in the vicinity of the interface between the n-type SiC substrate 1 and the thermal oxide film 3 and in the thermal oxide film 3. Density can be reduced. Further, the fixed charge density in the thermal oxide film 3 can be reduced. Accordingly, the mobility of carriers can be improved.

  The oxidation temperature when forming the thermal oxide film 3 may be, for example, 400 ° C. or more and 1200 ° C. or less in accordance with design specifications such as the capacitance of the MOS capacitor. The reason is as follows. When the oxidation temperature is higher than 1200 ° C., the oxidation rate increases, but the effect of, for example, F atoms contained in the gas atmosphere used for forming the thermal oxide film 3 becomes significant, and the front surface of the n-type SiC substrate 1 This is because the etching proceeds simultaneously with the oxidation. Further, when the oxidation temperature is lower than 400 ° C., the oxidation rate becomes slow, and the oxidation of the front surface of the n-type SiC substrate 1 hardly proceeds.

The content concentration of the halogen atom or halogen compound is preferably less than 1% with respect to the gas atmosphere (oxidizing gas) used for forming the thermal oxide film 3. The reason is that the halogen atom concentration in the thermal oxide film 3 is increased, and the insulating characteristics of the thermal oxide film 3 are deteriorated. For example, when the F atom content concentration is too high with respect to the oxidizing gas, the etching speed of the thermal oxide film 3 increases and the thickness of the thermal oxide film 3 does not increase. SiC has a slower oxidation rate than silicon (Si), and the etching rate by F atoms is almost the same between SiC and Si. For this reason, in SiC, the fall of the oxidation rate accompanying the increase in the content concentration of F atoms appears remarkably. Specifically, for example, an oxidizing gas atmosphere containing NF ₃ at 200 ppm, that is, 0.02% may be used as the gas atmosphere used for forming the thermal oxide film 3.

When the halogen atom concentration in the thermal oxide film 3 is high, the insulating properties of the thermal oxide film 3 deteriorate as described above. For this reason, after the thermal oxide film 3 is formed, a heat treatment for densifying the thermal oxide film 3 is performed to remove halogen atoms in the thermal oxide film 3 at a predetermined ratio, and the insulating characteristics of the thermal oxide film 3 are improved. It is good to recover. Specifically, in the heat treatment for densifying the thermal oxide film 3, halogen atoms that terminate Si atoms are removed from the surface of the thermal oxide film (SiO ₂ film) 3 to form Si—O—Si bonds. to repair. The gas atmosphere in the heat treatment for increasing the density of the thermal oxide film 3 is not limited to the Ar gas atmosphere described above, but, for example, a gas containing a small amount of nitrogen (N ₂ ), oxygen (O ₂ ), and vapor (H ₂ O). It may be an atmosphere. Moreover, the effect is acquired by performing the heat processing for densifying the thermal oxide film 3 at the temperature of 600 degreeC or more and 1200 degrees C or less.

Example 1
Next, the CV characteristics of the MOS capacitor according to the first embodiment were verified. FIG. 3 is a characteristic diagram illustrating CV characteristics of the semiconductor device manufactured by the manufacturing method according to the first embodiment. First, in accordance with the method for manufacturing a semiconductor device according to the first embodiment described above, a MOS capacitor was manufactured (hereinafter referred to as a first example). Specifically, in the first embodiment, the thermal oxidation treatment for forming the thermal oxide film 3 was performed at a temperature of 1000 ° C. in a dry oxygen gas atmosphere containing NF ₃ at a ratio of 200 ppm. The thickness of the thermal oxide film 3 was 40 nm. The heat treatment for densifying the thermal oxide film 3 was performed at a temperature of about 1000 ° C. in an Ar gas atmosphere.

  FIG. 3 shows a result (CV characteristic curve) of the first example in which the gate voltage V is changed and the total capacitance C of the MOS capacitor according to the change of the gate voltage V is measured. FIG. 3 also shows the CV characteristic curve of the conventional example shown in FIG. The conventional example is a MOS type semiconductor device including a MOS capacitor manufactured according to a conventional method for manufacturing a semiconductor device. Specifically, in the conventional example, the thermal oxidation treatment for forming the thermal oxide film 103 was performed at a temperature of 1200 ° C. in a dry oxygen gas atmosphere. Heat treatment for increasing the density of the thermal oxide film 103 is not performed. Other configurations of the conventional example are the same as those of the first embodiment.

  As shown in FIG. 3, in the CV characteristics of the first embodiment, the flat band voltage is almost 0 V (flat band state), which is close to the theoretical value. Further, with respect to the transition of the gate voltage from 0V → 4V → −1V → 0V, the hysteresis confirmed in the conventional example is hardly seen. Further, in the first embodiment, the slope of the increase curve of the total capacitance C of the MOS capacitor near the flat band voltage (gate voltage = 0V) is larger than that of the conventional example, and the change of the total capacitance C of the MOS capacitor is the conventional example. Steeper than. Therefore, it can be seen that the first example has a lower interface state density than the conventional example.

  As described above, according to the first embodiment, C atoms are removed from the vicinity of the interface between the n-type SiC substrate and the thermal oxide film or from the thermal oxide film, or between the n-type SiC substrate and the thermal oxide film. By moving C atoms away from the vicinity of the interface, the interface state density at the interface between the n-type SiC substrate and the thermal oxide film can be reduced. In addition, the fixed charge density in the thermal oxide film can be reduced. Thereby, the capacitance-voltage characteristic of the insulating film is improved, and the carrier mobility can be improved. Therefore, high initial characteristics and reliability can be realized in all semiconductor devices having an element structure having a thermal oxide film obtained by thermally oxidizing a SiC semiconductor.

(Embodiment 2)
A semiconductor device according to the second embodiment will be described. 4-6 is sectional drawing which shows the state in the middle of manufacture of the semiconductor device concerning Embodiment 2. FIGS. FIG. 6 shows a completed state of the semiconductor device according to the second embodiment. The semiconductor device according to the second embodiment is different from the semiconductor device according to the first embodiment in that an oxide film (hereinafter referred to as a deposited oxide film) 13b is deposited by a CVD method or a PVD method, and then heat is further generated by thermal oxidation. By forming an oxide film (hereinafter referred to as an additional oxide film) 13a, a stacked gate insulating film 13 having a stacked structure including an additional oxide film 13a and a deposited oxide film 13b is provided.

As shown in FIG. 6, on the front surface of the n-type SiC substrate 1, an additional oxide film (SiO ₂ film) 13a and a deposited oxide film 13b to be a stacked gate insulating film 13 are sequentially stacked. The thicknesses of the additional oxide film 13a and the deposited oxide film 13b can be variously changed according to the design specifications such as the capacitance of the MOS capacitor. Specifically, the thickness of the additional oxide film 13a is thinner than the thermal oxide film of the first embodiment, and is preferably 10 nm or less, for example. The reason will be described later. The thickness of the deposited oxide film 13b may be about 40 nm, for example.

  A polycrystalline silicon film 4 to which phosphorus (P) to be a gate electrode is added is provided on the surface of the deposited oxide film 13b. C atoms in n-type SiC substrate 1 are less in the region near the interface with additional oxide film 13a than in the region away from the interface with additional oxide film 13a. Further, similar to the thermal oxide film of the first embodiment, the additional oxide film 13a contains halogen atoms at a predetermined ratio and does not substantially contain carbon (C) atoms.

Next, a method for manufacturing the semiconductor device according to the second embodiment will be described. First, similarly to the first embodiment, an n-type SiC substrate 1 is prepared, and an element isolation insulating film 2 is selectively formed on the front surface of the n-type SiC substrate 1. Next, by CVD, for example, the n-type SiC substrate 1 in the element structure formation region 10a is formed at a temperature of 800 ° C. in a mixed gas atmosphere of silane (SiH ₄ ) gas and nitrogen oxide (N ₂ O) gas. A deposited oxide film (SiO ₂ film) 13b to be the laminated gate insulating film 13 is formed on the front surface. The deposited oxide film 13b may be formed by thermal oxidation in a gas atmosphere not containing a halogen atom or a halogen compound. The deposited oxide film 13b may be formed by a CVD method using an organic silane-based gas other than the SiH ₄ gas or a PVD method such as a sputtering method. The state up to this point is shown in FIG.

  Next, the front surface of the n-type SiC substrate 1 is thermally oxidized in a dry oxygen gas atmosphere containing a halogen atom or a halogen compound, and a laminated gate insulating film is interposed between the n-type SiC substrate 1 and the deposited oxide film 13b. An additional oxide film 13a to be 13 is formed. The state up to here is shown in FIG. Next, in the same manner as in the first embodiment, the thermal oxide film, that is, the heat treatment for increasing the density of the additional oxide film 13a is performed, and then the steps from the formation process of the polycrystalline silicon film 4 to be the gate electrode are performed. By doing so, the MOS type semiconductor device shown in FIG. 6 is completed.

  The thermal oxidation conditions for forming the additional oxide film 13a are the same as those of the first embodiment except that a thermal oxide film having a smaller thickness than that of the first embodiment is formed. The reason why the thickness of the additional oxide film 13a is 10 nm or less is as follows. When the additional oxide film 13a is thicker than 10 nm, as described above, the halogen concentration in the deposited oxide film 13b formed in the process before the additional oxide film 13a increases, and the insulating characteristics of the deposited oxide film 13b deteriorate. To do. Therefore, it is necessary to perform heat treatment for increasing the density of the additional oxide film 13a for a long time and to recover the insulating characteristics of the deposited oxide film 13b.

  As described above, according to the second embodiment, even when the gate insulating film has a laminated structure in which the thermal oxide film and the deposited oxide film are laminated, the same effect as in the first embodiment is obtained. be able to.

(Embodiment 3)
The semiconductor device according to the third embodiment will be described with reference to FIGS. 4 to 6 as in the second embodiment. The semiconductor device according to the third embodiment is different from the semiconductor device according to the second embodiment in that a deposited oxide film (hereinafter referred to as a deposited metal oxide film) 13b made of a metal oxide is provided. That is, in the third embodiment, the laminated gate insulating film 13 has a laminated structure of the additional oxide film 13a and the deposited metal oxide film 13b.

Examples of the deposited metal oxide film 13b include an aluminum oxide (Al ₂ O ₃ ) film, an oxide film containing aluminum (Al), hafnium (Hf), titanium (Ti) or lanthanum (La), an oxynitride film, and these A compound with Si may be provided. The thickness of the deposited metal oxide film 13b can be variously changed according to the design specifications such as the capacitance of the MOS capacitor. Specifically, the thickness of the deposited metal oxide film 13b may be about 40 nm, for example.

Next, a method for manufacturing the semiconductor device according to the third embodiment will be described. First, similarly to the second embodiment, an n-type SiC substrate 1 is prepared, and an element isolation insulating film 2 is selectively formed on the front surface of the n-type SiC substrate 1. Next, by the CVD method, for example, the n-type in the element structure formation region 10a at a temperature of 200 ° C. in a mixed gas atmosphere containing triethylaluminum (TEA: C ₆ H ₁₅ Al) gas and water vapor (H ₂ O) gas. A deposited metal oxide film (for example, Al ₂ O ₃ film) 13b to be the laminated gate insulating film 13 is formed on the front surface of the SiC substrate 1 (FIG. 4). The deposited metal oxide film 13b may be formed by a CVD method using an organometallic compound other than TEA, or a PVD method such as a sputtering method. Thereafter, as in the second embodiment, an additional oxide film 13a to be the laminated gate insulating film 13 is formed between the n-type SiC substrate 1 and the deposited oxide film 13b (FIG. 5). By performing the steps after the heat treatment for densification, the MOS type semiconductor device shown in FIG. 6 is completed.

  As described above, according to the third embodiment, the same effect as in the first and second embodiments can be obtained.

(Embodiment 4)
A method for manufacturing a semiconductor device according to the fourth embodiment will be described. 7-9 is sectional drawing which shows the state in the middle of manufacture of the semiconductor device concerning Embodiment 4. FIGS. FIG. 9 shows a completed state of the semiconductor device according to the fourth embodiment. The semiconductor device manufacturing method according to the fourth embodiment is different from the semiconductor device manufacturing method according to the second embodiment in that a deposited oxide film 23b is formed by a CVD method or a PVD method after the thermal oxide film 23a is formed by thermal oxidation. It is a point to deposit. The configuration of the semiconductor device according to the fourth embodiment is the same as that of the semiconductor device according to the second embodiment.

First, similarly to the second embodiment, an n-type SiC substrate 1 is prepared, and an element isolation insulating film 2 is selectively formed on the front surface of the n-type SiC substrate 1. Next, as in the first embodiment, a thermal oxide film (SiO ₂ film) 23a to be a laminated gate insulating film 23 is formed on the front surface of the n-type SiC substrate 1 in the element structure formation region 10a (FIG. 5). 7). Next, a deposited oxide film (SiO ₂ film) 23b to be the laminated gate insulating film 23 is formed on the surface of the thermal oxide film 23a by CVD or PVD (FIG. 8). Thereafter, similarly to the second embodiment, the MOS semiconductor device shown in FIG. 9 is completed by performing the steps after the heat treatment for densifying the thermal oxide film 23a.

  The method for forming the thermal oxide film 23a is the same as the method for forming the thermal oxide film in the first embodiment, except that a thermal oxide film having a smaller thickness than that in the first embodiment is formed. The method for forming the deposited oxide film 23b is the same as the method for forming the deposited oxide film in the second embodiment. Further, similarly to Embodiment 3, a deposited oxide film 23b made of a metal oxide may be formed. The thicknesses of the thermal oxide film 23a and the deposited oxide film 23b can be variously changed according to the design specifications such as the capacitance of the MOS capacitor.

  Specifically, the thickness of the thermal oxide film 23a may be 5 nm or less, for example. The reason is that when the thickness of the thermal oxide film 23a is thicker than 5 nm, C atoms in the thermal oxide film 23a are deposited by the heat treatment for increasing the density of the thermal oxide film 23a performed after the formation of the deposited oxide film 23b. This is because it may be diffused into the oxide film 23b and the reliability of the deposited oxide film 23b may be reduced. The thickness of the deposited oxide film 23b may be about 40 nm, for example.

  As described above, according to the fourth embodiment, the same effects as in the first to third embodiments can be obtained.

(Embodiment 5)
The semiconductor device according to the fifth embodiment will be described by taking an insulated gate field effect transistor (MOSFET) having a planar gate structure as an example. 10 to 12 are cross-sectional views illustrating a state in the middle of manufacturing the semiconductor device according to the fifth embodiment. FIG. 12 shows a completed state of the semiconductor device according to the fifth embodiment. The semiconductor device according to the fifth embodiment differs from the semiconductor device according to the first embodiment in that, in addition to the thermal oxide film 35 serving as a gate insulating film, an n ⁻ -type SiC substrate 31 and an element isolation insulating film 32 A thermal oxide film (hereinafter referred to as an additional oxide film) 36 is also provided at the interface.

As shown in FIG. 12, the semiconductor device according to the fifth embodiment includes an element structure formation region 30a in which an element structure of a device is formed on an n ⁻ type SiC substrate 31 serving as an n ⁻ type drift region, and an element structure formation. And an element isolation region 30b surrounding the region 30a. In the element isolation region 30b, an element isolation insulating film 32 is provided on the front surface of the n ⁻ -type SiC substrate 31. An additional oxide film (SiO ₂ film) 36 is provided at the interface between the n ⁻ -type SiC substrate 31 and the element isolation insulating film 32. The configuration of the additional oxide film 36 is the same as that of the additional oxide film of the second embodiment.

In element structure formation region 30 a, a p-well region (p base region) 33 is selectively provided on the front surface layer of n ⁻ -type SiC substrate 31. The p well region 33 is in contact with the additional oxide film 36. An n ⁺ source region 34 is selectively provided inside the p well region 33. On the surface of the portion of the p-well region 33 sandwiched between the n-type drift region and the n ⁺ source region 34, a thermal oxide film (SiO ₂ film) 35 serving as a gate insulating film is provided. The configuration of the thermal oxide film 35 is the same as that of the thermal oxide film of the first embodiment. On the surface of the thermal oxide film 35, a polycrystalline silicon film 37 to which phosphorus serving as a gate electrode is added is provided. Source electrode 38 is in contact with p well region 33 and n ⁺ source region 34. The drain electrode 39 is provided on the entire back surface of the n ⁻ -type SiC substrate 31.

Next, a method for manufacturing the semiconductor device according to the fifth embodiment will be described. First, similarly to the first embodiment, an n ⁻ -type SiC substrate 31 is prepared, and an element isolation insulating film 32 is selectively formed on the front surface of the n ⁻ -type SiC substrate 31. Next, a p-well region 33 is selectively formed in the surface layer of the front surface of the n ⁻ -type SiC substrate 31 by ion implantation of a p-type impurity such as Al. Next, a mask oxide film (not shown) for ion implantation having an opening corresponding to the formation region of the n ⁺ source region 34 is formed on the front surface of the n ⁻ type SiC substrate 31. Next, an n ⁺ source region 34 is selectively formed inside the p well region 33 by ion implantation of an n-type impurity such as phosphorus (P) using the mask oxide film as a mask. Then, the mask oxide film is removed. The state up to here is shown in FIG.

Next, as in the first embodiment, a thermal oxide film (SiO ₂ film) 35 serving as a gate insulating film is formed on the front surface of the n ⁻ -type SiC substrate 31 in the element structure formation region 30a. At this time, an additional oxide film 36 is formed at the interface between the n ⁻ -type SiC substrate 31 and the element isolation insulating film 32. The thermal oxidation conditions for forming the thermal oxide film 35 are the same as those of the thermal oxide film of the first embodiment. Next, similarly to the first embodiment, a heat treatment for increasing the density of the thermal oxide films 35 and 36 and a polycrystalline silicon film 37 to be a gate electrode are formed. The state up to this point is shown in FIG.

Next, an interlayer insulating film (not shown) that covers the front surface of n ⁻ -type SiC substrate 31 is formed. Next, the interlayer insulating film and the thermal oxide film 35 are selectively removed by etching to form a source contact that selectively exposes the p well region 33 and the n ⁺ source region 34. Next, after covering the front surface side of the n ⁻ -type SiC substrate 31 with, for example, an Al film so as to be embedded in the source contact, the Al film is patterned to form a source electrode 38. Thereafter, a drain electrode 39 made of, for example, an Al film is formed on the back surface of the n ⁻ type SiC substrate 31 to complete the planar gate structure MOSFET shown in FIG.

  In the manufacturing method described above, a deposited oxide film or a deposited metal oxide film may be provided instead of the thermal oxide film 35. In this case, as in the second and third embodiments, after the deposited oxide film or the deposited metal oxide film is deposited, thermal oxidation for forming the additional oxide film 36 is performed. That is, instead of the thermal oxide film 35, a stacked gate insulating film in which a deposited oxide film (deposited metal oxide film) and an additional oxide film 36 are stacked is formed.

(Example 2)
Next, the carrier mobility characteristics of the semiconductor device according to the fifth embodiment were verified. FIG. 13 is a characteristic diagram illustrating carrier mobility characteristics of the semiconductor device according to the fifth embodiment. First, in accordance with the method for manufacturing a semiconductor device according to the fifth embodiment described above, a MOSFET having a planar gate structure was manufactured (hereinafter referred to as a second example). Specifically, in the second embodiment, the thermal oxidation process for forming the thermal oxide film 35 was performed at a temperature of 1000 ° C. in a dry oxygen gas atmosphere containing NF ₃ at a ratio of 200 ppm. The thickness of the thermal oxide film 35 was 40 nm. The heat treatment for densifying the thermal oxide film 35 was performed at a temperature of about 1000 ° C. in an Ar gas atmosphere.

FIG. 13 shows the result of measuring the carrier mobility for the second example. FIG. 13 also shows carrier mobility in the above-described conventional example (in which a thermal oxide film serving as a gate insulating film is formed only in a dry oxygen gas atmosphere). As shown in FIG. 13, in the conventional example, it was confirmed that there were many interface states at the interface between the SiC substrate and the gate oxide film (thermal oxide film) and the carrier mobility was low. On the other hand, in the second embodiment, carrier mobility is improved by reducing the interface state at the interface between the n ⁻ -type SiC substrate and the gate oxide film (thermal oxide film). Recognize. As a result, in the second embodiment, the on-resistance of the MOSFET is reduced, and high efficiency can be realized.

As described above, according to the fifth embodiment, even in a semiconductor device having a planar gate structure, by forming a gate oxide film by thermal oxidation using an oxidizing gas atmosphere containing a halogen atom or a halogen compound, The same effect as in the first to fourth embodiments can be obtained. Further, according to the fifth embodiment, the interface state at the interface between the n ⁻ type SiC substrate and the element isolation insulating film is formed by forming the additional oxide film at the interface between the n ⁻ type SiC substrate and the element isolation insulating film. Can be reduced. In addition, trapping of charges in the element isolation insulating film can be suppressed. As a result, the formation of a channel between the n ⁻ type SiC substrate and the element isolation insulating film can be suppressed, and malfunction of the semiconductor device can be suppressed.

(Embodiment 6)
A semiconductor device according to the sixth embodiment will be described. 14-16 is sectional drawing which shows the state in the middle of manufacture of the semiconductor device concerning Embodiment 6. FIGS. FIG. 16 shows a state after the completion of the semiconductor device according to the sixth embodiment. The semiconductor device manufacturing method according to the sixth embodiment is different from the semiconductor device manufacturing method according to the second embodiment in that a stacked gate insulating film 46 having a double structure including an additional oxide film 46a and a deposited oxide film 46b is provided. The trench gate structure MOSFET is provided.

As shown in FIG. 16, the semiconductor device according to the sixth embodiment includes an element structure formation region 40a in which an element structure of a device is formed on an n ⁻ type SiC substrate 41 serving as an n ⁻ type drift region, and an element structure formation. And an element isolation region 40b surrounding the region 40a. In the element isolation region 40 b, an element isolation insulating film 42 is provided on the front surface of the n ⁻ -type SiC substrate 41. In element structure formation region 40 a, a p-well region (p base region) 43 is selectively provided on the front surface layer of n ⁻ -type SiC substrate 41. An n ⁺ source region 44 is selectively provided inside the p well region 43. A trench 45 is provided from the front surface of n ⁻ type SiC substrate 41 through n ⁺ source region 44 and p well region 43 and in contact with the n ⁻ type drift region.

An additional oxide film 46 a is provided along the inner wall of the trench 45 inside the trench 45. In addition, a deposited oxide film 46b is provided inside the trench 45 along the inner wall of the trench 45 inside the additional oxide film 46a. The additional oxide film 46a and the deposited oxide film 46b constitute a stacked gate insulating film 46. The configurations of the additional oxide film 46a and the deposited oxide film 46b are the same as those in the second embodiment. In addition, inside the trench 45, a polycrystalline silicon film 47 to which phosphorus serving as a gate electrode is added is provided inside the deposited oxide film 46b. Source electrode 48 is in contact with p well region 43 and n ⁺ source region 44. The drain electrode 49 is provided on the entire back surface of the n ⁻ -type SiC substrate 41.

Next, a method for manufacturing the semiconductor device according to the sixth embodiment will be described. First, similarly to the fifth embodiment, an n ⁻ type SiC substrate 41 is prepared, and an element isolation insulating film 42, a p well region 43 and an n ⁺ source region 44 are formed. Next, the n ⁻ type drift region penetrates the n ⁺ source region 44 and the p well region 43 on the front surface of the n ⁻ type SiC substrate 41 by dry etching using a fluorocarbon (CF ₆ ) gas. A trench 45 in contact with is formed. Next, a deposited oxide film 46 b to be the stacked gate insulating film 46 is formed inside the trench 45 along the inner wall (side wall and bottom surface) of the trench 45 by CVD. The state up to here is shown in FIG.

Next, an additional oxide film 46a to be the laminated gate insulating film 46 is formed along the inner wall of the trench 45 at the interface between the trench 45 and the deposited oxide film 46b by thermal oxidation. Next, heat treatment for increasing the density of the additional oxide film 46a is performed. Next, a polycrystalline silicon film 47 doped with phosphorus is formed on the front surface of the n ⁻ -type SiC substrate 41 so as to be embedded in the trench 45. The method of forming the deposited oxide film 46b and the additional oxide film 46a is the same as that in the second embodiment. Next, the polycrystalline silicon film 47 covering the front surface of the n ⁻ -type SiC substrate 41 is removed by etch back, and the polycrystalline silicon film 47 serving as a gate electrode is left inside the trench 45. The state up to here is shown in FIG.

Next, an interlayer insulating film (not shown) that covers the front surface of n ⁻ -type SiC substrate 41 is formed. The interlayer insulating film, the deposited oxide film 46b, and the additional oxide film 46a are selectively removed by etching to form a source contact that selectively exposes the p well region 43 and the n ⁺ source region 44. Next, after covering the front surface side of the n ⁻ -type SiC substrate 41 with, for example, an Al film so as to be embedded in the source contact, the Al film is patterned to form a source electrode 48. Thereafter, a drain electrode 49 made of, for example, an Al film is formed on the back surface of the n ⁻ -type SiC substrate 41 to complete the trench gate structure MOSFET shown in FIG.

  As described above, according to the sixth embodiment, even in a semiconductor device having a trench gate structure, a gate oxide film is formed by thermal oxidation using an oxidizing gas atmosphere containing a halogen atom or a halogen compound. Thus, the same effect as in the first to fifth embodiments can be obtained.

  As described above, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention. For example, in each of the embodiments described above, the dimensions of the thermal oxide film and the deposited oxide film, the gas composition at the time of forming these, and the like are variously set according to the required specifications. In the above-described embodiment, the element isolation insulating film is formed by the LOCOS method. However, the present invention is not limited to this, and the element isolation insulating film may be formed by a deposition method such as a CVD method or a PVD method.

  Further, for example, the present invention can be applied to an insulated gate bipolar transistor (IGBT) by forming a p-type region on the back surface of an n-type SiC substrate. In each embodiment, the first conductivity type is n-type and the second conductivity type is p-type. However, in the present invention, the first conductivity type is p-type and the second conductivity type is n-type. It holds.

  As described above, the silicon carbide semiconductor device and the method for manufacturing the silicon carbide semiconductor device according to the present invention are useful for a power semiconductor device having a MOS gate structure.

1 n-type SiC substrate 2, 32, 42 element isolation insulating film 3, 23a, 35 thermal oxide film 4, 37, 47 polycrystalline silicon film 5 electrode extraction region 10a, 30a, 40a element structure formation region 10b, 30b, 40b element Isolation region 13, 23, 46 Laminated gate insulating film 13a, 36, 46a Additional oxide film 13b, 23b, 46b Deposited oxide film, deposited metal oxide film 31, 41 n ^- type SiC substrate 33, 43 p well region 34, 44 n ⁺ Source region 38,48 source electrode 39,49 drain electrode 45 trench

Claims (23)

  Including a first insulating film forming step of thermally oxidizing the silicon carbide semiconductor substrate in an oxidizing gas atmosphere containing halogen atoms to form the first insulating film containing the halogen atoms on the surface of the silicon carbide semiconductor substrate. A method for manufacturing a silicon carbide semiconductor device, comprising:   2. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein in the first insulating film forming step, silicon atoms in the first insulating film are terminated by the halogen atoms.   3. The silicon carbide semiconductor according to claim 1, further comprising a removing step of removing the halogen atoms in the first insulating film at a predetermined ratio by a heat treatment after the first insulating film forming step. Device manufacturing method. The halogen atom is a component constituting a halogen compound,
The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the halogen compound is a halogen nitride, a halogen carbide, or a halogen hydride.   The method for manufacturing a silicon carbide semiconductor device according to claim 4, wherein the halogen compound is nitrogen fluoride, carbon chloride, or hydrogen chloride.   The said halogen atom is a fluorine atom, a chlorine atom, or a bromine atom, The manufacturing method of the silicon carbide semiconductor device as described in any one of Claims 1-5 characterized by the above-mentioned.   The silicon carbide semiconductor device manufacturing method according to claim 1, wherein the halogen atom concentration is 1% or less with respect to the oxidizing gas in the oxidizing gas atmosphere. Method.   The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein a thickness of the first insulating film is 10 nm or less.   The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein in the first insulating film forming step, thermal oxidation is performed at an oxidation temperature of 1200 ° C. or less.   The said 1st insulating film formation process WHEREIN: The said 1st insulating film is formed in the inside of the trench formed in the said silicon carbide semiconductor substrate along the inner wall of the said trench. A method for manufacturing a silicon carbide semiconductor device according to claim 1.   The said 1st insulating film formation process WHEREIN: The said 1st insulating film which isolate | separates the elements formed in the said silicon carbide semiconductor substrate electrically is formed. The manufacturing method of the silicon carbide semiconductor device of description. A second insulating film forming step of forming a second insulating film on the surface of the silicon carbide semiconductor substrate before the first insulating film forming step;
The said 1st insulating film formation process WHEREIN: The said 1st insulating film is formed in the interface of the said silicon carbide semiconductor substrate and the said 2nd insulating film, The Claim 1 characterized by the above-mentioned. A method for manufacturing a silicon carbide semiconductor device.   12. The method according to claim 1, further comprising a second insulating film forming step of forming a second insulating film on a surface of the first insulating film after the first insulating film forming step. A method for manufacturing a silicon carbide semiconductor device.   The method for manufacturing a silicon carbide semiconductor device according to claim 13, wherein the thickness of the first insulating film is 5 nm or less.   13. The second insulating film forming step, wherein the silicon carbide semiconductor substrate is thermally oxidized in a gas atmosphere containing a component other than a halogen atom or a halogen compound to form the second insulating film. 14. The method for manufacturing a silicon carbide semiconductor device according to claim 14.   15. The silicon carbide according to claim 12, wherein, in the second insulating film formation step, the second insulating film is formed by chemical vapor deposition or physical vapor deposition. A method for manufacturing a semiconductor device.   The method for manufacturing a silicon carbide semiconductor device according to claim 16, wherein, in the second insulating film forming step, the second insulating film made of a metal oxide is formed.   The said 2nd insulating film formation process WHEREIN: The said 2nd insulating film which electrically isolates the elements formed in the said silicon carbide semiconductor substrate is formed. The manufacturing method of the silicon carbide semiconductor device of description. An insulating film provided on the surface of the silicon carbide semiconductor substrate so as to be in contact with the silicon carbide semiconductor substrate;
The silicon carbide semiconductor device, wherein the insulating film contains a halogen atom.   The silicon carbide semiconductor device according to claim 19, wherein the halogen atoms in the insulating film terminate silicon atoms in the insulating film on a surface on the silicon carbide semiconductor substrate side.   The carbon atoms in the silicon carbide semiconductor substrate in the vicinity of the interface between the silicon carbide semiconductor substrate and the insulating film are more than the carbon atoms in the silicon carbide semiconductor substrate away from the interface between the silicon carbide semiconductor substrate and the insulating film. 21. The silicon carbide semiconductor device according to claim 19, wherein the silicon carbide semiconductor device is less. A metal film provided on the surface of the insulating film;
An insulated gate structure comprising the metal film, the insulating film, and the silicon carbide semiconductor substrate;
The silicon carbide semiconductor device according to claim 19, further comprising:   The silicon carbide semiconductor device according to any one of claims 19 to 21, wherein the insulating film electrically isolates elements provided on the silicon carbide semiconductor substrate.

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