JP2014055576A - Semiconductor device and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent disappearance of a silicon oxide film layer directly under a thin film part while preventing stiction between the thin film part and a movable part.SOLUTION: A semiconductor device is provided with: a thin film part 21 formed on a substrate 11 via a silicon oxide film layer 13; and a movable part 23 arranged on the thin film part 21 by facing the thin film part 21. A movable range of the movable part 23 is regulated by the thin film part 21. The thin film part 21 consists of single crystal silicon to which pattern processing is performed by crystal anisotropic etching by using alkali solution, has a (100) surface on an upper surface 21a, has a (111) surface on a side surface 21c, and has a V-shaped groove 21d formed by the crystal anisotropic etching on the upper surface 21a. On a cross-section of the thin film part 21, relation of (W1<W2-(d/tanθ)×2) is satisfied when an angle to be formed by the (100) surface and the (111) surface is considered as θ, a thickness dimension of the thin film part 21 is considered as d, a width dimension of the upper surface 21a is considered as W1, and a width dimension of the lower surface 21b is considered as W2.

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, and in particular, a thin film portion formed on a substrate via a silicon oxide film layer, a movable portion disposed on the thin film portion so as to face the thin film portion, And a method of manufacturing the same.

  There is a micropump as a device that infuses or conveys a microfluid. The micro pump changes the volume of the pressurizing chamber by driving an actuator composed of a piezoelectric element or the like provided on a thin film (membrane), and guides the fluid sucked from the suction port to the discharge port. The micropump includes thin film portions such as asymmetrical valves and valve seats before and after the pressurizing chamber so that the fluid does not flow backward.

  In order to accurately form the thickness of thin film parts such as micropump membranes, valves, valve seats, etc., thin film parts are obtained by subjecting SOI (Silicon on Insulator) wafers to crystal anisotropic etching of single crystal silicon. Is already known (see, for example, Patent Document 1).

  FIG. 13 is a schematic cross-sectional view for explaining the configuration of the micropump. In addition, the vertical / horizontal scale ratio and the film thickness ratio in the figure are not questioned. The same applies to the drawings described below.

  The micropump includes a valve wafer 1, a valve wafer 3, and a membrane wafer 5. The wafer 1 and the wafer 3 are bonded via a sacrificial layer 7 made of a silicon oxide film. The wafer 3 and the wafer 5 are bonded via a sacrificial layer 9 made of a silicon oxide film.

  Wafers 1, 3, and 5 are obtained by performing double-sided processing on an SOI wafer on which a support layer 11, a BOX layer 13 and an active layer 15 are laminated. The support layer 11 and the active layer 15 are formed of single crystal silicon. The BOX layer 13 is formed of a silicon oxide film.

  The valve wafers 1 and 3 include a suction port 17 and a discharge port 19 formed by processing the support layer 11, and a valve seat 21 and a valve flap 23 formed by processing the active layer 15. In the valve wafer 3, the thickness of the support layer 11 is adjusted by grinding or polishing from the back surface side, and the thickness of the support layer 11 is smaller than that of the valve wafer 1.

  The membrane wafer 5 includes a membrane 25 and a liquid chamber 27. The membrane 25 is formed of the active layer 15 in a region where the support layer 11 is removed. The liquid chamber 27 is formed by a recess formed on the surface of the active layer 15 at the position where the membrane 25 is formed.

  The valve wafers 1 and 3 are bonded so that the active layers 15 face each other. The membrane wafer 5 and the valve wafer 3 are arranged so that the liquid chamber 27, the suction port 17, and the discharge port 19 face each other.

  A piezoelectric element or the like (not shown) is disposed on the membrane 25 of the membrane wafer 5. In the micro pump, the membrane 25 is driven as an actuator by the operation of a piezoelectric element or the like, and the valve flaps 23 asymmetrically arranged in the laminated structure of the valve wafers 1 and 3 by the pressure generated in the liquid chamber 27 are alternately and passively. Opened and closed. Thereby, a liquid flow is generated only in the forward direction from the suction port 17 to the discharge port 19.

  14, FIG. 15 and FIG. 16 are schematic cross-sectional views for explaining an example of a manufacturing process of the micropump shown in FIG. The parentheses for each step described below correspond to the parentheses in FIGS. 14, 15 and 16.

(1) An SOI wafer having a support layer 11, a BOX layer 13, and an active layer 15 is prepared. The support layer 11 and the active layer 15 are single crystal silicon. The BOX layer 13 is a silicon oxide film. The surface of the support layer 11 and the surface of the active layer 15 are (100) planes. An etching mask 29 made of a silicon oxide film is formed on the surface of the support layer 11 and the surface of the active layer 15. The etching mask 29 is a thermal oxide film, for example. The etching mask 29 on the active layer 15 is patterned by photolithography and etching techniques.

(2) An etching mask 31 is formed on the entire surface. The etching mask 31 protects the etching mask 29. The etching mask 31 is a silicon nitride film, for example.

(3) The etching masks 29 and 31 on the support layer 11 are patterned by photolithography and etching techniques.

(4) Crystal anisotropic etching of single crystal silicon using an alkaline solution is performed. The support layer 11 where the etching masks 29 and 31 are opened in the step (3) is subjected to crystal anisotropic etching. Etching proceeds at an angle of about 54.7 ° from the openings of the etching masks 29 and 31, and the (111) plane of the support layer 11 is exposed. Crystal anisotropic etching is performed until the BOX layer 13 is reached. Thereby, the suction port 17 and the discharge port 19 are formed.

(5) The etching mask 31 is entirely removed using hot phosphoric acid or the like. The etching mask 29 on the active layer 15 and a part of the surface of the active layer 15 are exposed.

(6) Perform crystal anisotropic etching again. Etching proceeds at an angle of about 54.7 ° from the opening of the etching mask 29 on the active layer 15. Crystal anisotropic etching is performed until the BOX layer 13 is reached. Thereby, the valve seat 21 and the valve flap 23 are formed.

(7) Wet etching is performed using, for example, hydrofluoric acid. The etching mask 29 and the portion of the BOX layer 13 exposed by crystal anisotropic etching are removed. Thereby, the valve wafers 1 and 3 are formed.

(8) A sacrificial layer 7 is formed on the surfaces of the valve wafers 1 and 3. For example, a thermal oxide film is used for the sacrificial layer 7.

(9) Two valve wafers 1 and 3 are prepared, and one wafer is turned upside down to join the valve wafers 1 and 3. At this time, the sacrificial layers 7 are bonded to each other at the bonding interface 33.

(10) Grinding and polishing the bonded valve wafers 1 and 3 from the support layer 11 side of the valve wafer 3 to adjust the thickness of the valve wafer 3.

(11) The membrane wafer 5 is bonded to the polished surface of the polished valve wafer 3. A sacrificial layer 9 made of a silicon oxide film is formed on the surface of the membrane wafer 5. At the time when the membrane wafer 5 is bonded, the membrane 25 and the liquid chamber 27 are formed.

(12) This will be described with reference to FIG. The sacrificial layer 7 is etched. At this time, the sacrificial layer 9 is also etched. By removing the sacrificial layer 7 present at the bonding interface 33, the valve seat 21 and the valve flap 23 are peeled off. Sacrificial layer etching is performed by vapor phase etching using, for example, hydrofluoric acid. Thereafter, a piezoelectric element or the like (not shown) is pasted on the membrane 25 to complete the micropump. In FIG. 13, the sacrificial layer 7 of the valve seat 1 and the sacrificial layer 7 of the valve seat 3 are illustrated integrally.

  As described in the above steps (4) and (6), the BOX layer 13 is used as an etching stop layer in the crystal anisotropic etching of the support layer 11 or the active layer 15. That is, the silicon etching amounts of the support layer 11 and the active layer 15 are determined by the thickness of the support layer 11 and the active layer 15 of the SOI wafer managed with high accuracy. Therefore, the finished thickness dimensions of the valve seat 21 and the valve flap 23 are not easily affected by variations in etching rate and wafer thickness.

In FIG. 13, it is preferable to reduce the area of the upper surface of the valve seat 21 in order to prevent the valve seat 21 and the valve flap 23 from being stuck by stiction.
However, if the area of the upper surface of the valve seat 21 is too small, the BOX layer 13 directly under the valve seat 21 may be lost.

  FIG. 17 is a schematic process cross-sectional view showing an enlarged peripheral structure of the valve seat for explaining the problems of the conventional technology. The numbers in parentheses in FIG. 17 correspond to the above steps and the numbers in FIGS. 15 and 16. This will be described with reference to FIG.

  As described in the above steps (1) to (5), the suction port 17 is formed in the support layer 11 of the SOI wafer by crystal anisotropic etching. In this crystal anisotropic etching, overetching is performed so that the support layer 11 does not remain at the bottom of the suction port 17. Therefore, a part of the BOX layer 13 made of a silicon oxide film on the support layer 11 side is also etched (see FIG. 17 (5)).

  Next, as described in step (6) above, crystal anisotropic etching is performed on the active layer 15 to form the valve seat 21. In this crystal anisotropic etching, overetching is performed so that the active layer 15 does not remain at a position overlapping the bottom of the suction port 17. Therefore, a part of the BOX layer 13 on the active layer 15 side is also etched (see FIG. 17 (6)). Since the etching of the silicon oxide film with the alkaline solution is isotropic, a part of the BOX layer 13 directly under the valve seat 21 is also etched.

  Next, as described in the step (7), the BOX layer 13 made of a silicon oxide film and the etching mask 29 are removed by wet etching using hydrofluoric acid or the like. Here, the silicon oxide film etching may be vapor phase etching using, for example, hydrofluoric acid. Since these silicon oxide film etchings are isotropic, a part of the BOX layer 13 directly under the valve seat 21 is also etched (see FIG. 17 (7)).

  Next, as described in the above steps (8) and (9), the sacrificial layer 7 made of a silicon oxide film is formed, and the valve seats 1 and 3 made of two processed SOI wafers are bonded at the bonding interface 33. (See FIG. 17 (9).) Thereafter, as described in the above steps (10) and (11), the valve wafer 3 is adjusted in thickness, and the membrane wafer 5 is bonded to the valve wafer 3.

  Next, as described in the above step (12), the sacrificial layer 7 at the bonding interface 33 is removed by vapor phase etching using hydrofluoric acid or the like. Here, the silicon oxide film etching may be wet etching using, for example, hydrofluoric acid. Since these silicon oxide film etchings are isotropic, a part of the BOX layer 13 directly under the valve seat 21 is also etched (see FIG. 17 (12)).

  By utilizing the BOX layer 13 of the SOI wafer, the thickness control of the valve seat 21 and the valve flap 23 is facilitated. However, in the valve seat 21, the active layer 15 and the support layer 11 are formed of the BOX layer 13 as shown in FIG. It becomes a structure that gets stuck through.

  However, during the single-crystal silicon anisotropic etching of the active layer 15 in the step (6), when removing the etching mask 29 and the BOX layer 13 in the step (7), and during the sacrificial layer etching step in the step (12), The interface of the BOX layer 13 is exposed. Therefore, in the BOX layer 13 immediately below the valve seat 21, the etching proceeds inward from the cross-sectional dimension of the lower surface of the valve seat 21.

  Furthermore, depending on the microvoids at the time of bonding the active layer 15 in the process of creating the SOI wafer itself, the film quality of the BOX layer 13 itself, the film quality of the sacrificial layer 7 itself, and the bonding quality at the time of bonding the valve wafers 1 and 3, The etching rate of the BOX layer 13 may be faster than the etching rate of the bonding interface 33 during the sacrificial layer etching process in the step (12).

  For this reason, as shown in FIG. 17 (12), the BOX layer 13 directly under the valve seat 21 may disappear partially or completely after the sacrifice layer 7 is etched. When the BOX layer 13 immediately below the valve seat 21 is partially lost, the liquid flows backward from the lost portion even if the valve flap 23 is closed, causing a leak. Further, when the BOX layer 13 immediately below the valve seat 21 is completely lost, the valve seat 21 is lifted and does not function as a valve stopper. Thus, the BOX layer 13 directly under the valve seat 21 may be partially or completely lost, resulting in a pump function being impaired.

  In order to suppress such a problem, it is conceivable to increase the width dimension of the lower surface of the valve seat 21 and increase the width dimension of the BOX layer 13 immediately below the valve seat 21. Here, the width dimension of the lower surface of the valve seat 21 has a certain relationship with the width dimension of the upper surface.

The relationship between the upper surface width dimension and the lower surface width dimension of the valve seat 21 will be described with reference to FIG. The angle θ formed by the upper and lower surfaces ((100) surface) and side surfaces ((111) surface) of the valve seat 21 is about 54.7 °. When the thickness of the valve seat 21 is the dimension d, in the cross section of the valve seat 21, the upper surface dimension W1 and the lower surface width dimension W2 are expressed by the following equations.

W1 = W2- (d / tan θ) × 2

Therefore, in order to increase the width dimension of the lower surface of the valve seat 21, the width dimension of the upper surface of the valve seat 21 must be increased.
However, as described above, when the width dimension of the upper surface of the valve seat 21 is increased, there is a problem that the valve seat 21 and the valve flap 23 are fixed by stiction.

  The time when the BOX layer 13 immediately below the valve seat 21 disappears is not limited to the time when the sacrificial layer 7 is etched in the step (12). The partial or complete disappearance of the BOX layer 13 directly under the valve seat 21 may occur during the silicon oxide film etching in the step (7) or the crystal anisotropic etching in the step (6).

  Further, the occurrence of the above-described problems is not limited to the formation of the valve seat of the micropump. A problem as described above is that a semiconductor device including a thin film portion formed on a base material via a silicon oxide film layer, and a movable portion disposed on the thin film portion so as to face the thin film portion. This may occur when a thin film portion is formed by performing crystal anisotropic etching using an alkaline solution on a single crystal silicon layer formed on a substrate via a silicon oxide film layer during manufacturing.

  The present invention includes a thin film portion in which a single crystal silicon layer formed on a substrate via a silicon oxide film layer is patterned by crystal anisotropic etching, and a movable portion disposed on the thin film portion. An object of the semiconductor device and the manufacturing method thereof is to prevent the disappearance of the silicon oxide film layer immediately below the thin film portion while preventing stiction between the thin film portion and the movable portion.

A semiconductor device according to the present invention includes a thin film portion formed on a substrate via a silicon oxide film layer, and a movable portion disposed on the thin film portion so as to face the thin film portion, and the movable device described above. The part is disposed so as to be in contact with the thin film part, and the movable range is regulated by the thin film part. The thin film part is made of single crystal silicon, and is patterned by crystal anisotropic etching using an alkaline solution. One or a plurality of V-shaped grooves which are processed, have a (100) plane on the top surface, a (111) plane on the side surface, and are formed by the crystal anisotropic etching on the top surface. And the angle θ formed by the (100) plane and the (111) plane, the thickness dimension d of the thin film portion, and the top surface of the thin film portion in a cross section perpendicular to the (100) plane. Width dimension 1, when the lower surface of the width W2,
W1 <W2- (d / tan θ) × 2
It satisfies the relationship.

A method for manufacturing a semiconductor device according to the present invention uses a mask forming step of forming an etching mask on a (100) plane of a single crystal silicon layer formed on a substrate via a silicon oxide film layer, and an alkaline solution. A silicon etching step for patterning the single crystal silicon layer using the etching mask as a mask by crystal anisotropic etching to form a thin film portion; a mask removing step for removing the etching mask; and a thin film portion on the thin film portion. A movable part placement step of placing the movable part opposite to the thin film part,
In the mask formation step, the opening width dimension S is S <(d / tan θ) × 2 in the thin film portion formation scheduled region with respect to the single crystal silicon layer having the thickness dimension d.
(Θ is an angle formed by the (100) plane and the (111) plane of the single crystal silicon layer)
Forming the etching mask so as to have one or more openings satisfying the relationship:
In the silicon etching step, the upper surface has a (100) surface, the side surface has a (111) surface, and the upper surface has one or more V-shaped grooves formed by the crystal anisotropic etching. The thin film portion is formed.

In the semiconductor device of the present invention, a V-shaped groove formed by crystal anisotropic etching is formed on the upper surface of the thin film portion.
In the method of manufacturing a semiconductor device according to the present invention, by performing crystal anisotropic etching using the etching mask having the opening, a V-shaped groove formed by crystal anisotropic etching is formed on the upper surface of the thin film portion. The
The thin film portion having the V-shaped groove has a smaller ratio (W1 / W2) of the upper surface width dimension W1 to the lower surface width dimension W2 than in the case where the V-shaped groove is not formed.
That is, in the semiconductor device and the manufacturing method of the present invention, when the width dimension of the upper surface of the thin film portion is set to be the same as that of the conventional technique, the width dimension of the lower surface of the thin film portion can be increased as compared with the conventional technique. The etching tolerance of the silicon oxide film layer can be increased.
Therefore, the semiconductor device and the manufacturing method of the present invention can prevent the disappearance of the silicon oxide film layer immediately below the thin film portion while preventing stiction between the thin film portion and the movable portion.

It is a schematic sectional drawing for explaining one example of a semiconductor device. It is a schematic plan view for demonstrating the Example. It is the schematic sectional drawing which showed the whole Example. It is a schematic sectional drawing for demonstrating one Example of the manufacturing method of a semiconductor device. FIG. 5 is a schematic cross-sectional view for explaining a step subsequent to FIG. 4. FIG. 6 is a schematic cross-sectional view for explaining a step subsequent to FIG. 5. It is a top view which shows the etching mask and sacrificial pattern part which were formed on the active layer. It is a schematic sectional drawing for demonstrating the other Example of a semiconductor device. It is a schematic sectional drawing for demonstrating the etching mask used in the other Example of the manufacturing method of a semiconductor device. It is a schematic sectional drawing for demonstrating other Example of a semiconductor device. It is a schematic sectional drawing for demonstrating the etching mask used in the further another Example of the manufacturing method of a semiconductor device. It is a schematic sectional drawing for demonstrating the etching mask used in the further another Example of the manufacturing method of a semiconductor device. It is a schematic sectional drawing for demonstrating the structure of a micropump. It is a schematic sectional drawing for demonstrating an example of the manufacturing process of the micropump shown by FIG. FIG. 15 is a schematic cross-sectional view for explaining a step subsequent to FIG. 14. FIG. 16 is a schematic cross-sectional view for explaining a step subsequent to FIG. 15. It is a schematic process sectional drawing for demonstrating the malfunction of a prior art.

  FIG. 1 is a schematic cross-sectional view for explaining an embodiment of a semiconductor device. FIG. 2 is a schematic plan view for explaining the embodiment. The cross section in FIG. 1 corresponds to the A-A ′ position in FIG. 2. In FIG. 2, the valve flap is not shown. In this embodiment, the semiconductor device of the present invention is applied to a micropump. 1 and 2 are enlarged views of a microvalve portion of the micropump. FIG. 3 is a schematic sectional view showing the whole of the embodiment. 1 to 3, the same parts as those in FIG. 13 are denoted by the same reference numerals, and description of those parts is omitted.

  The micropump includes a valve wafer 1, a valve wafer 3, and a membrane wafer 5. The micropump of this embodiment is different in the shape of the valve seat 21 from the prior art micropump shown in FIG.

  The microvalve formed by the valve wafer 1 and the valve wafer 3 includes a valve seat 21 (thin film portion) formed on the support layer 11 (base material) via a BOX layer 13 (silicon oxide film layer), and a valve seat 21 The valve flap 23 (movable part) arrange | positioned facing on the valve seat 21 is provided.

  The valve flap 23 is disposed so as to come into contact with the valve seat 21, and the movable range of the valve flap 23 is regulated by the valve seat 21.

  The valve seat 21 is made of single crystal silicon and is patterned by crystal anisotropic etching using an alkaline solution. The valve seat 21 has a (100) surface on the upper surface 21a and the lower surface 21b, and a (111) surface on the side surface 21c. Further, the valve seat 21 has two V-shaped grooves 21d and 21d formed on the upper surface 21a by the crystal anisotropic etching.

  The V-shaped groove 21d is disposed adjacent to the side surface 21c in the groove width direction. The boundary between the V-shaped groove 21d and the side surface 21c is located closer to the lower surface 21b than the upper surface 21a. The wall surface of the V-shaped groove 21d is a (111) plane. The depths of the two V-shaped grooves 21d and 21d may be the same or different from each other.

In the cross section of the valve seat 21 perpendicular to the (100) plane of the valve seat 21 (see FIG. 1), the angle θ formed by the (100) plane and the (111) plane of the valve seat 21 When the thickness dimension d, the width dimension W1 of the upper surface 21a, and the width dimension W2 of the lower surface 21b,
W1 <W2- (d / tan θ) × 2
Meet the relationship.

  In the valve seat 21 having the V-shaped groove 21d, the width dimension W1 of the (100) plane of the upper surface 21a and the lower surface 21b are compared with the case where the V-shaped groove 21d is not formed (see FIG. 17 (6)). The ratio (W1 / W2) of the width dimension W2 is small. That is, when the width dimension of the upper surface 21a of the valve seat 21 is set to the same dimension as that of the prior art, the width dimension of the lower surface 21b can be made larger than that of the prior art, and the allowable amount of etching of the silicon oxide film layer directly below the valve seat 21 Can be increased. Therefore, this embodiment can prevent the BOX layer 13 immediately below the valve seat 21 from disappearing while preventing stiction between the valve seat 21 and the valve flap 23.

  4, 5, and 6 are schematic cross-sectional views for explaining an embodiment of a method for manufacturing a semiconductor device. 4, 5 and 6 correspond to the microvalve portion of the micropump shown in FIG. The parentheses for each step described below correspond to the parentheses in FIGS. 4, 5, and 6. The entire manufacturing process of the micro pump is the same as that of FIGS. 14, 15 and 16 except for the patterning of the etching mask. This embodiment will be described with reference to FIGS. 14, 15 and 16 as well.

(1) An SOI wafer having a support layer 11, a BOX layer 13, and an active layer 15 is prepared. The support layer 11 and the active layer 15 are single crystal silicon. The BOX layer is a silicon oxide film. For example, the thickness d of the active layer 15 is 20.0 μm. The surface of the support layer 11 and the surface of the active layer 15 are (100) planes.

  An etching mask made of a silicon oxide film is formed on the surface of the support layer 11 and the surface of the active layer 15. The film type of the etching mask is not particularly limited as long as it can be used as an etching mask with a high selectivity with respect to silicon at the time of crystal anisotropic etching.

  The etching mask on the active layer 15 is patterned by photolithography and etching techniques to form an etching mask 29a and a sacrificial pattern portion 29b. The etching mask 29a and the sacrificial pattern portion 29b are disposed in the thin film portion formation scheduled region. An opening 29c of the etching mask is formed by the arrangement of the etching mask 29a and the sacrificial pattern portion 29b. The etching mask 29 on the support layer 11 is not patterned at this point.

  FIG. 7 is a plan view showing an etching mask 29 a and a sacrificial pattern portion 29 b formed on the active layer 15.

  The etching mask 29a, the sacrificial pattern portion 29b, and the opening 29c are each formed in an annular shape. Sacrificial pattern portions 29b are respectively disposed inside and outside the etching mask 29a. The etching mask 29a and the sacrificial pattern portion 29b are arranged with a space therebetween, and an opening 29c is formed between the etching mask 29a and the sacrificial pattern portion 29b.

  For example, the width dimension X1 of the etching mask 29a is 5.0 μm, the width dimension X2 of the sacrificial pattern portion 29b is 1.0 μm, and the width dimension S of the opening 29c is 20.0 μm. The thickness dimensions of the etching masks 29 and 29a and the sacrificial pattern portion 29b are, for example, 0.3 μm.

The width dimension X1 of the etching mask 29a is set to a value at which the etching mask 29a does not disappear during the crystal anisotropic etching process in step (6) described later.
The width dimension X2 of the sacrificial pattern portion 29b is set to a value at which the sacrificial pattern portion 29b disappears during the crystal anisotropic etching process in step (6) described later. The width dimension X2 of the inner sacrificial pattern portion 29b and the width dimension X2 of the outer sacrificial pattern portion 29b with respect to the etching mask 29a may be the same value or different values.

  The thickness dimensions of the etching mask 29a and the sacrificial pattern portion 29b are set to values at which the etching mask 29a does not disappear during the crystal anisotropic etching process in step (6) described later.

The width dimension S of the opening 29c is
S <(d / tan θ) × 2
(D is the thickness dimension of the active layer 15, and θ is the angle formed by the (100) plane and the (111) plane of the active layer 15).
It is set to a value that satisfies the relationship.

(2) An etching mask 31 is formed on the entire surface. The etching mask 31 protects the etching masks 29 and 29a and the sacrificial pattern portion 29b. The film type of the etching mask 31 is desired to be a film that has a high selection ratio during crystal anisotropic etching and is hardly etched. For example, a silicon nitride film by LP-CVD (Low Pressure-Chemical Vapor Deposition) method is used.

(3) The etching masks 29 and 31 on the support layer 11 are patterned by photolithography and etching techniques. An opening corresponding to the formation position of the suction port 17 and the discharge port 29 is formed.

(4) Crystal anisotropic etching of single crystal silicon using an alkaline solution is performed. A general alkaline chemical solution (for example, KOH, TMAH, etc.) is used for this crystal anisotropic etching. The support layer 11 where the etching masks 29 and 31 are opened in the step (3) is subjected to crystal anisotropic etching. At this time, the silicon oxide film is also etched at an etching rate slower than that of single crystal silicon. This silicon oxide film etching is isotropic.

  Etching proceeds at an angle of about 54.7 ° from the openings of the etching masks 29 and 31, and the (111) plane of the support layer 11 is exposed. Crystal anisotropic etching is performed until the BOX layer 13 is reached. Thereby, the suction port 17 and the discharge port 19 are formed.

  In this crystal anisotropic etching, overetching is performed so that the support layer 11 does not remain at the bottoms of the suction port 17 and the discharge port 19. Therefore, a part of the BOX layer 13 made of a silicon oxide film on the support layer 11 side is also etched.

(5) The etching mask 31 is entirely removed using hot phosphoric acid or the like. The etching mask 29a and sacrificial pattern portion 29b on the active layer 15 and a part of the surface of the active layer 15 are exposed.

(6) Perform crystal anisotropic etching again. Etching proceeds at an angle of about 54.7 ° from the openings of the etching mask 29a and the sacrificial pattern portion 29b on the active layer 15, and the (111) plane of the active layer 15 is exposed. Crystal anisotropic etching is performed until the BOX layer 13 is reached. Thereby, the valve seat 21 and the valve flap 23 are formed.

  In this crystal anisotropic etching, overetching is performed so that the active layer 15 does not remain at a position overlapping the bottom of the suction port 17. Therefore, a part of the BOX layer 13 on the active layer 15 side is also etched.

  Since the etching of the silicon oxide film with the alkaline solution is isotropic, a part of the BOX layer 13 directly under the valve seat 21 is also etched. In addition, the etching mask 29 a and the sacrificial pattern portion 29 b on the active layer 15, the etching mask 29 on the support layer 11, a part of the bottom of the suction port 17 and the discharge port 19 on the support layer 11 side of the BOX layer 13 are also etched.

  In this crystal anisotropic etching process, the width dimension S of the opening 29c is set to “S <(d / tan θ) × 2” at the position where the valve seat 21 is formed. A mold groove 21d is formed.

  Since the width dimension X1 of the etching mask 29a is set to a value at which the etching mask 29a does not disappear during the crystal anisotropic etching process, the upper surface 21a of the valve seat 21 is formed with a (100) plane.

  Since the width dimension X2 of the sacrificial pattern portion 29b is set to a value at which the sacrificial pattern portion 29b disappears during the crystal anisotropic etching process, the sacrificial pattern portion 29b disappears during the crystal anisotropic etching process. Etching of the active layer 15 also proceeds from the portion where the sacrificial pattern portion 29b has disappeared. Thus, the V-shaped groove 21d is formed adjacent to the side surface 21c in the groove width direction. Further, the boundary between the V-shaped groove 21d and the side surface 21c is formed on the lower surface 21b side with respect to the upper surface 21a. The side surface 21c of the valve seat 21 and the wall surface of the V-shaped groove 21d are formed by a (111) plane.

  The width dimension S of the opening 29c is determined by considering the horizontal etching amount of the etching mask 29a and the sacrificial pattern portion 29b and the disappearance time of the sacrificial pattern portion 29b in the crystal anisotropic etching process. The value is set so as not to reach the lower surface 21b.

(7) Wet etching is performed using, for example, hydrofluoric acid. The etching mask 29 and the portion of the BOX layer 13 exposed by crystal anisotropic etching are removed. Thereby, the valve wafers 1 and 3 are formed. Since this silicon oxide film etching is isotropic, a part of the BOX layer 13 immediately below the valve seat 21 is also etched, but the BOX layer 13 having a sufficient width can be left immediately below the valve seat 21. Here, the silicon oxide film etching may be vapor phase etching using, for example, hydrofluoric acid.

(8) A sacrificial layer 7 is formed on the surfaces of the valve wafers 1 and 3. For example, a thermal oxide film is used for the sacrificial layer 7.

(9) Two valve wafers 1 and 3 are prepared, and one wafer is turned upside down to join the valve wafers 1 and 3. At this time, the sacrificial layers 7 are bonded to each other at the bonding interface 33.

(10) Grinding and polishing the bonded valve wafers 1 and 3 from the support layer 11 side of the valve wafer 3 to adjust the thickness of the valve wafer 3. At this time, the valve seat 21 and the valve flap 23 are joined at the joining interface 33 by the sacrificial layer 7, and damage due to stress during grinding and polishing is prevented.

(11) The membrane wafer 5 is bonded to the polished surface of the polished valve wafer 3. A sacrificial layer 9 made of a silicon oxide film is formed on the surface of the membrane wafer 5. At the time when the membrane wafer 5 is bonded, the membrane 25 and the liquid chamber 27 are formed. The surface of the support layer 11 and the surface of the active layer 15 are (100) planes.

(12) This will be described with reference to FIG. At the time of the above step (11), the valve seat 21 and the valve flap 23 are joined by the sacrificial layer 7 and are not movable as a valve, so the sacrificial layer 7 is etched. At this time, the sacrificial layer 9 is also etched. By removing the sacrificial layer 7 present at the bonding interface 33, the valve seat 21 and the valve flap 23 are peeled off. Sacrificial layer etching is performed by vapor phase etching using, for example, hydrofluoric acid. The sacrificial layer etching may be wet etching using, for example, hydrofluoric acid.

  Thereafter, a piezoelectric element or the like (not shown) is pasted on the membrane 25 to complete the micropump. In FIG. 3, the sacrificial layer 7 of the valve seat 1 and the sacrificial layer 7 of the valve seat 3 are illustrated in an integrated manner.

  FIG. 8 is a schematic cross-sectional view for explaining another embodiment of the semiconductor device, and is an enlarged view of a microvalve portion of the micropump. The overall configuration of the microvalve in this embodiment is the same as that shown in FIG. 3 except for the shape of the valve seat. In FIG. 8, the same parts as those in FIG. 1 are denoted by the same reference numerals, and description of those parts is omitted.

  The valve seat 21 of this embodiment has one V-shaped groove 21d on the upper surface 21a. The V-shaped groove 21d is disposed at a distance from the side surface 21c. The upper surface 21a of the valve seat 21 is divided into a width dimension W11 portion and a width dimension W12 portion. The width dimension W11 and the width dimension W12 may be the same value or different values.

When the angle θ formed by the (100) surface and the (111) surface of the valve seat 21, the thickness dimension d of the valve seat 21, the width dimension W1 of the upper surface 21a = W11 + W12, and the width dimension W2 of the lower surface 21b,
W1 <W2- (d / tan θ) × 2
Meet the relationship.

  Since the valve seat 21 has the V-shaped groove 21d on the upper surface 21a, in this embodiment, when the width dimension W1 of the upper surface 21a of the valve seat 21 is set to the same dimension as the prior art, the width dimension W2 of the lower surface 21b. As compared with the prior art (W1 = W2− (d / tan θ) × 2), the allowable etching amount of the silicon oxide film layer immediately below the thin film portion can be increased. Therefore, this embodiment can prevent the BOX layer 13 immediately below the valve seat 21 from disappearing while preventing stiction between the valve seat 21 and the valve flap 23.

  FIG. 9 is a schematic cross-sectional view for explaining an etching mask used in another embodiment of the method for manufacturing a semiconductor device, and illustrates the etching mask for forming the valve seat shown in FIG. FIG. FIG. 9 corresponds to the process of FIG.

  This embodiment of the manufacturing method is replaced with the etching mask 29a and the sacrificial pattern portion 29b shown in FIG. 4 (1) in the step (1) of the embodiment of the manufacturing method described with reference to FIGS. Then, the etching mask 29a shown in FIG. 9 is formed. The other steps are the same as the steps (2) to (12) in the embodiment of the manufacturing method described with reference to FIGS.

  In FIG. 9, an opening 29c is formed in an annular etching mask 29a as viewed from above. The opening 29c is formed in an annular shape along the length direction of the etching mask 29a. The etching mask 29a is separated into two by the opening 29c.

  The width dimensions X11 and X12 of the etching mask 29a are set to values at which the etching mask 29a does not disappear during the crystal anisotropic etching process in the step (6). The thickness dimension of the etching mask 29a is set to a value at which the etching mask 29a does not disappear during the crystal anisotropic etching process in the step (6). The width dimensions X11 and X12 may be the same value or different values.

The width dimension S of the opening 29c is
S <(d / tan θ) × 2
(D is the thickness dimension of the active layer 15, and θ is the angle formed by the (100) plane and the (111) plane of the active layer 15).
It is set to a value that satisfies the relationship.

  The width dimension S of the opening 29c is set to a value at which the V-shaped groove 21d does not reach the lower surface 21b in consideration of the horizontal etching amount of the etching mask 29a during the crystal anisotropic etching process in the step (6). Is set.

  The etching mask 29a and the opening 29c shown in FIG. 9 are formed in the above step (1), and then the same steps as the above step (2) to the above step (12) are performed. A micropump having a valve seat 21 is formed.

  FIG. 10 is a schematic cross-sectional view for explaining still another embodiment of the semiconductor device, and is an enlarged view of a microvalve portion of the micropump. The overall configuration of the microvalve in this embodiment is the same as that shown in FIG. 3 except for the shape of the valve seat. In FIG. 10, the same parts as those in FIG. 1 are denoted by the same reference numerals, and description of those parts is omitted.

  The valve seat 21 of this embodiment has two V-shaped grooves 21d and 21d on the upper surface 21a. The two V-shaped grooves 21d and 21d are arranged adjacent to each other in the groove width direction. The boundary between the two V-shaped grooves 21d and 21d is located closer to the lower surface 21b than the upper surface 21a. The V-shaped groove 21d is disposed at a distance from the side surface 21c. The depths of the two V-shaped grooves 21d and 21d may be the same or different from each other.

When the angle θ formed by the (100) surface and the (111) surface of the valve seat 21, the thickness dimension d of the valve seat 21, the width dimension W1 of the upper surface 21a = W11 + W12, and the width dimension W2 of the lower surface 21b,
W1 <W2- (d / tan θ) × 2
Meet the relationship.

  Also in this embodiment, since the valve seat 21 has the V-shaped groove 21d on the upper surface 21a as in the above embodiment, this embodiment prevents stiction between the valve seat 21 and the valve flap 23. The disappearance of the BOX layer 13 immediately below the valve seat 21 can be prevented.

  FIG. 11 is a schematic cross-sectional view for explaining an etching mask used in still another embodiment of the semiconductor device manufacturing method, and illustrates the etching mask for forming the valve seat shown in FIG. It is a figure for doing. FIG. 11 corresponds to the process of FIG.

  This embodiment of the manufacturing method is replaced with the etching mask 29a and the sacrificial pattern portion 29b shown in FIG. 4 (1) in the step (1) of the embodiment of the manufacturing method described with reference to FIGS. Thus, the etching mask 29a and the sacrificial pattern portion 29b shown in FIG. 11 are formed. The other steps are the same as the steps (2) to (12) in the embodiment of the manufacturing method described with reference to FIGS.

  In FIG. 11, when viewed from above, annular etching masks 29a and 29a, a sacrificial pattern portion 29b, and openings 29c and 29c are formed. In order from the inside, an etching mask 29a, an opening 29c, a sacrificial pattern portion 29b, an opening 29c, and an etching mask 29a are arranged.

  The width dimensions X11 and X12 of the etching masks 29a and 29 are set to values at which the etching mask 29a does not disappear during the crystal anisotropic etching process in the step (6). The width dimensions X11 and X12 may be the same value or different values.

The width dimension X2 of the sacrificial pattern portion 29b is set to a value at which the sacrificial pattern portion 29b disappears during the crystal anisotropic etching process in the step (6).
The thickness dimensions of the etching mask 29a and the sacrificial pattern portion 29b are set to values at which the etching mask 29a does not disappear during the crystal anisotropic etching process in the step (6).

The width dimension S of the openings 29c, 29c is:
S <(d / tan θ) × 2
(D is the thickness dimension of the active layer 15, and θ is the angle formed by the (100) plane and the (111) plane of the active layer 15).
It is set to a value that satisfies the relationship. The width dimension S of one opening 29c and the width dimension S of the other opening 29c may be the same value or different values.

  The etching mask 29a and the opening 29c shown in FIG. 11 are formed in the step (1), and then the same steps as the step (2) to the step (12) are performed. A micropump having a valve seat 21 is formed.

  FIG. 12 is a schematic plan view for explaining an etching mask used in still another embodiment of the semiconductor device manufacturing method, and illustrates an etching mask for forming still another shape example of the valve seat. It is a figure for doing. FIG. 12 corresponds to the process of FIG.

In the embodiment described above, the sacrificial pattern portion 29b is formed in a strip shape, but the sacrificial pattern portion 29b may be divided.
For example, as shown in FIG. 12, an opening 29d may be formed in the sacrificial pattern portion 29b shown in FIG.

The width dimension S2 of the opening 29d is:
S2 <(d / tan θ) × 2
(D is the thickness dimension of the active layer 15, and θ is the angle formed by the (100) plane and the (111) plane of the active layer 15).
It is set to a value that satisfies the relationship.

  In the crystal anisotropic etching process in the step (6), the etching of the active layer 15 also proceeds from the opening 29d. Since the opening 29d is set to the width dimension S2, it is formed due to the opening 29d. The V-shaped groove 21d does not reach the lower surface 21b of the valve seat 21.

  The width dimension S2 of the opening 29d takes into account the amount of etching in the horizontal direction of the etching mask 29a and the sacrificial pattern portion 29b and the disappearance time of the sacrificial pattern portion 29b during the crystal anisotropic etching process in the step (6). Thus, the V-shaped groove 21d is set to a value that does not reach the lower surface 21b.

  As mentioned above, although the Example of this invention was described, the numerical value, material, arrangement | positioning, number, etc. in the said Example are examples, This invention is not limited to these, It was described in the claim Various modifications are possible within the scope of the present invention.

  In the above embodiment, the number of V-shaped grooves 21d is arbitrary. For example, the structure of the valve seat 21 shown in FIG. 1 may include only one V-shaped groove 21d disposed adjacent to one side surface 21c. Further, in the structure of the valve seat 21 shown in FIG. 1, the V-shaped groove 21d structure shown in FIG. 10 is combined, and the V-shaped groove 21d disposed adjacent to the side surface 21c is opposite to the side surface 21c. A V-shaped groove disposed adjacent to the V-shaped groove 21d may be further provided.

  Further, the lower surface of the valve seat 21 may not be flat. For example, a concave portion in which a silicon oxide film is embedded or a convex portion made of single crystal silicon may be formed on the lower surface of the valve seat 21.

  Moreover, although the said Example is equipped with the valve seat 21 as a thin film part, and the valve flap 23 as a movable part, in the semiconductor device and manufacturing method of this invention, a thin film part and a movable part are limited to a valve seat and a valve flap. Not.

  A semiconductor device and a manufacturing method of the present invention include a thin film portion formed on a base material via a silicon oxide film layer, and a movable portion disposed on the thin film portion so as to face the thin film portion, The movable part is disposed so as to be in contact with the thin film part, and the movable range is regulated by the thin film part. The thin film part is made of single crystal silicon, and crystal anisotropic etching using an alkaline solution is performed. Is applied to a semiconductor device having a (100) plane on the top surface and a (111) plane on the side surface, and a method for manufacturing the same. For example, the present invention can be applied to MEMS (Micro Electro Mechanical Systems) having such a structure and a manufacturing method thereof.

In the semiconductor device and the manufacturing method of the present invention, the material of the movable part is not limited to the single crystal silicon layer (active layer 15), and may be any material.
Moreover, the thin film part in the semiconductor device of this invention and the etching mask in the manufacturing method of this invention are not limited to what was formed in cyclic | annular form, What kind of planar shape may be sufficient.

  In addition, the semiconductor device and the manufacturing method of the present invention are not limited to the use of an SOI substrate, and a semiconductor device including a thin film portion made of single crystal silicon formed on a base material via a silicon oxide film layer, and Applicable to manufacturing method. In the semiconductor device and the manufacturing method of the present invention, the material of the base material is arbitrary.

  In the method for manufacturing a semiconductor device of the present invention, the material of the etching mask is not limited to the silicon oxide film. The material of the etching mask may be higher or lower than the silicon oxide film with respect to crystal anisotropic etching of single crystal silicon. The etching mask may be a laminated film in which a plurality of material layers are laminated.

  In the method for manufacturing a semiconductor device of the present invention, the silicon oxide film layer may not be isotropically etched after the silicon etching step.

  In the method of manufacturing a semiconductor device according to the present invention, the movable part disposing step includes a step of removing the sacrificial layer after disposing the movable part on the thin film part via a sacrificial layer made of a silicon oxide film. May not be included.

7 Sacrificial layer 13 BOX layer (silicon oxide film layer)
15 Active layer (single crystal silicon layer)
21 Valve seat (thin film part)
21a Valve seat upper surface 21b Valve seat lower surface 21c Valve seat side surface 21d V-shaped groove 23 Valve flap (movable part)
29a Etching mask 29b Etching mask sacrificial pattern portions 29c and 29d Etching mask opening

Special table 2009-5535549 gazette

Claims (10)

A thin film portion formed on a base material via a silicon oxide film layer, and a movable portion disposed on the thin film portion so as to face the thin film portion,
The movable part is disposed so as to be in contact with the thin film part, and the movable range is regulated by the thin film part,
The thin film portion is made of single crystal silicon and patterned by crystal anisotropic etching using an alkaline solution, has a (100) plane on the top surface, a (111) plane on the side surface, And one or more V-shaped grooves formed by the crystal anisotropic etching on the upper surface,
In a cross section of the thin film portion in a direction perpendicular to the (100) plane, an angle θ formed by the (100) plane and the (111) surface, a thickness dimension d of the thin film portion, a width dimension W1 of the upper surface, a lower surface When the width dimension W2 is
W1 <W2- (d / tan θ) × 2
A semiconductor device characterized by satisfying the relationship: The thin film portion has at least the V-shaped groove disposed adjacent to the side surface of the thin film portion in the groove width direction,
The semiconductor device according to claim 1, wherein a boundary between the V-shaped groove and the side surface is located on the lower surface side with respect to the upper surface. The thin film portion has at least two V-shaped grooves arranged adjacent to each other in the groove width direction,
The semiconductor device according to claim 1, wherein a boundary between the two V-shaped grooves is located on the lower surface side with respect to the upper surface. A valve comprising the movable part;
The semiconductor device according to claim 1, further comprising a micropump having a valve seat made of the thin film portion provided in an annular shape. A mask forming step of forming an etching mask on the (100) surface of the single crystal silicon layer formed on the substrate via the silicon oxide film layer;
A silicon etching step of patterning the single crystal silicon layer using the etching mask as a mask by crystal anisotropic etching using an alkaline solution to form a thin film portion;
A mask removing step of removing the etching mask;
A movable part placement step of placing a movable part opposite to the thin film part on the thin film part, and
In the mask formation step, the opening width dimension S is S <(d / tan θ) × 2 in the thin film portion formation scheduled region with respect to the single crystal silicon layer having the thickness dimension d
(Θ is an angle formed by the (100) plane and the (111) plane of the single crystal silicon layer)
Forming the etching mask so as to have one or more openings satisfying the relationship:
In the silicon etching process, the upper surface has a (100) surface, a side surface has a (111) surface, and the upper surface has one or more V-shaped grooves formed by the crystal anisotropic etching. A method of manufacturing a semiconductor device, wherein the thin film portion is formed.   6. The method of manufacturing a semiconductor device according to claim 5, wherein in the mask forming step, the etching mask having a sacrificial pattern portion having a width dimension that disappears during the crystal anisotropic etching process in the etching step is formed. Forming the etching mask made of a silicon oxide film in the mask forming step;
7. The method of manufacturing a semiconductor device according to claim 5, wherein, in the mask removing step, the etching mask is removed by isotropic etching while leaving the silicon oxide film layer immediately below the thin film portion.   8. The method of manufacturing a semiconductor device according to claim 7, wherein the isotropic etching is performed to the extent that the silicon oxide film layer in the region where the surface is exposed in the silicon etching step is removed in the mask removing step.   9. The movable part disposing step includes a step of removing the sacrificial layer after disposing the movable part on the thin film part via a sacrificial layer made of a silicon oxide film. A method for manufacturing a semiconductor device according to one item. A valve comprising the movable part;
10. The method of manufacturing a semiconductor device according to claim 5, wherein a micropump having a valve seat made of the thin film portion provided in an annular shape is formed.

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