JP2014042050A - ポストパッシベーション法を使用した高性能システムオンチップ - Google Patents
ポストパッシベーション法を使用した高性能システムオンチップ Download PDFInfo
- Publication number
- JP2014042050A JP2014042050A JP2013214264A JP2013214264A JP2014042050A JP 2014042050 A JP2014042050 A JP 2014042050A JP 2013214264 A JP2013214264 A JP 2013214264A JP 2013214264 A JP2013214264 A JP 2013214264A JP 2014042050 A JP2014042050 A JP 2014042050A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- electrical contacts
- passivation layer
- conductive
- insulating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013214264A JP2014042050A (ja) | 2013-10-11 | 2013-10-11 | ポストパッシベーション法を使用した高性能システムオンチップ |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013214264A JP2014042050A (ja) | 2013-10-11 | 2013-10-11 | ポストパッシベーション法を使用した高性能システムオンチップ |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001267522A Division JP5683765B2 (ja) | 2001-09-04 | 2001-09-04 | 集積回路チップ及びその形成方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2014042050A true JP2014042050A (ja) | 2014-03-06 |
| JP2014042050A5 JP2014042050A5 (enExample) | 2014-04-17 |
Family
ID=50394010
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013214264A Withdrawn JP2014042050A (ja) | 2013-10-11 | 2013-10-11 | ポストパッシベーション法を使用した高性能システムオンチップ |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2014042050A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116705758A (zh) * | 2023-07-18 | 2023-09-05 | 江苏帝奥微电子股份有限公司 | 一种降低高速开关通道金属寄生电容金属结构及制备工艺 |
-
2013
- 2013-10-11 JP JP2013214264A patent/JP2014042050A/ja not_active Withdrawn
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116705758A (zh) * | 2023-07-18 | 2023-09-05 | 江苏帝奥微电子股份有限公司 | 一种降低高速开关通道金属寄生电容金属结构及制备工艺 |
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| JP5683765B2 (ja) | 集積回路チップ及びその形成方法 | |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20131209 |
|
| A761 | Written withdrawal of application |
Free format text: JAPANESE INTERMEDIATE CODE: A761 Effective date: 20140718 |