JP2014017335A - Printed wiring board and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To develop a technique of easily narrowing a space between terminal parts by preventing anomalous deposition of plated metal and a bridge phenomenon between the terminal parts when forming a coating metal layer as a plated layer on the terminal parts of a conductor pattern of a printed wiring board.SOLUTION: In a printed wiring board, at least one of conductor patterns 16 and 17 on both sides of an insulation material 10 is formed as an embedded pattern which is embedded on one surface side of the insulation material 10. Each of terminal parts 12 of the embedded pattern 16 has a surface 12A at a position depressed from an insulation material principal surface 10A. A coating metal layer 14 as a plated layer for covering the surface 12A has a surface 14A along the insulation material principal surface at a position substantially flush with the insulation material principal surface or depressed from the insulation material principal surface. The printed wiring board includes multilayered conductor patterns on the side opposite to the embedded pattern on the one surface side of the insulation material. Manufacturing methods of the printed wiring boards are also provided.

Description

  The present invention relates to a printed wiring board used for various electronic and electrical devices, in particular, a printed wiring board capable of realizing a reduction in the distance between a plurality of terminal portions of the conductor pattern and a resulting increase in the density of the conductor pattern, and It relates to the manufacturing method.

  For printed wiring boards having terminal portions used for mounting electronic components such as semiconductor chips, a plating layer such as gold plating is provided on the terminal portions for the purpose of ensuring connection reliability such as solder bonding and wire bonding. Has been made to form.

  In such a printed wiring board, finer and higher density conductor patterns have been developed with increasing speed and integration of semiconductor chips. As a result, for the mounting of electronic components, there is a need for a reduction in the distance between adjacent terminal portions and a high density for a plurality of terminal portions formed close to the conductor pattern of the printed wiring board. Yes.

  A conventional method for producing a printed wiring board, in particular, a method for forming a circuit pattern and a conductor pattern (wiring layer) constituting a terminal portion on a sheet-like (including thin plate-like and film-like) insulating material, It is roughly divided into the active method and additive method (full additive method and semi-additive method). In the past, the subtractive method was often applied due to cost and other reasons. However, since the semi-additive method can form a fine conductor pattern more accurately than other methods, recently, When a simple pattern is required, the semi-additive method is often used.

  In the semi-additive method, basically, as shown in, for example, Patent Document 1, first, a thin metal layer (seed layer) such as copper is formed on an insulating material by electroless plating. A plating resist layer is formed in a pattern in which the conductor pattern is inverted. Next, a wiring layer (including a terminal portion) made of a conductive metal such as copper is formed on the portion where the resist layer is not formed by electrolytic plating, and then the plating resist layer is peeled and removed, and further, the portion where the wiring layer is not formed The seed layer is removed by flash etching.

  FIG. 33A schematically shows a cross-sectional structure of a terminal portion forming portion in a printed wiring board manufactured by such a semi-additive method. FIG. 33A shows a cross-sectional structure of a portion of the printed wiring board where a plurality of terminal portions 112 of the conductor pattern 115 are formed. The entire conductor pattern 115 is formed on the seed layer 111 formed so as to cover the upper surface of the insulating material 110, that is, in a state of protruding from the upper surface of the insulating material 110. The plurality of terminal portions 112 of the conductor pattern 115 are also formed in a protruding state on the seed layer 111 on the top surface of the insulating material 110.

  When the semi-additive method is applied, a seed layer in a portion where the conductor pattern 115 (wiring layer) on the upper surface of the insulating material 110 is not formed (for example, a space between adjacent terminal portions 112) is flash-etched as described above. Need to be removed. Here, in the flash etching, actually, the seed layer between the terminal portions 112 is not only removed, but also the terminal portions 112 are slightly etched as shown in FIG. Therefore, the width of the terminal portion 112, particularly the width WA of the flat portion effective for joining with other electronic components on the top surface of the terminal portion 112 is reduced. Therefore, even when the semi-additive method is applied, it is difficult to form a conductor pattern (including the terminal portion) with a high density and high accuracy to some extent.

  Therefore, recently, a printed wiring board in which a conductor pattern including a terminal portion is embedded in the surface of an insulating material made of prepreg or the like to smooth the surface on the side of the conductor pattern has been put into practical use. Such a printed wiring board is shown, for example, in Patent Document 2 or Patent Document 3, and an example of the cross-sectional structure is shown in FIG. In FIG. 34A, the terminal portion 112 of the conductor pattern 115 is embedded in the surface layer portion of the insulating material 110. The surface 112A of the terminal portion 112 is flush with the upper surface 110A of the insulating material 110.

  Various methods for manufacturing a substrate (wiring board) as shown in FIG. 34A are conceivable. Basically, a predetermined method may be used on a support surface by an arbitrary method such as a subtractive method or a semi-additive method. A conductive pattern that protrudes from the surface is formed in a pattern, and a relatively soft insulating material such as a prepreg is pressed on the surface side where the conductive pattern is formed (laminate crimping), and the conductive pattern is pressed into the surface layer of the insulating material. Thereafter, the support is generally removed by an arbitrary method. Hereinafter, in this specification, such a construction method is referred to as a flat filling method, and the substrate thus obtained is referred to as a buried substrate.

  By the way, generally, a part of the wiring layer (conductor pattern) on the surface of the printed wiring board is used as a terminal part for joining other electronic components by wire bonding or flip chip bonding. In such a terminal portion, if the copper of the wiring layer is exposed as it is, the terminal portion can be easily oxidized, and thus there is a possibility that the connection reliability of the electronic component by soldering or the like is lowered.

  Accordingly, the terminal portion is covered with gold (Au) plating by electroless plating or electrolytic plating over the entire outer surface exposed on the surface of the wiring board. In that case, with only gold (Au) plating, the copper (Cu) of the terminal portion (wiring layer) diffuses into the gold (Au) and the bonding strength decreases. In order to prevent the diffusion, nickel (Ni) is the most suitable base for Au plating. In practice, the outer surface of the copper terminal is first plated with Ni by electroless plating or electrolytic plating. In general, Au plating is applied to the outer surface. In some cases, Ni plating is first performed, then palladium (Pd) plating is performed on the outer surface, and Au plating covering the outer surface of the Pd plating layer is performed. Such a plating layer formed on the terminal portion for protecting the terminal portion, represented by Ni / Au plating or Ni / Pd / Au plating, is referred to as a coated metal layer herein. In addition, as said Ni / Au plating or Ni / Pd / Au plating, electroless plating has been frequently used recently.

  In the case where the above-described coated metal layer is formed on the outer surface of the terminal portion, the conventional method has the following problems.

  That is, for a printed wiring board in which the terminal portion 112 is formed by a semi-additive method as shown in FIG. 33 (B), for example, when Ni / Au plating is applied as the covering metal layer 114 for covering the terminal portion 112, Plating metal also deposits on the side surface of the terminal portion 112. For this reason, when the space between the adjacent terminal portions 112 is small, as shown in FIG. 33C, the covering metal layer 114 is connected in a bridge shape between the adjacent terminal portions 112 (bridge). Phenomenon) may occur. If this bridging phenomenon occurs, the coated metal layer 114 continues between the adjacent terminal portions 112 and is electrically connected, resulting in a defective printed wiring board.

  This bridging phenomenon occurs in both electrolytic plating and electroless plating. In the case of electroless plating, abnormal deposition of plated metal on the surface of the insulating material 110 in the space between the adjacent terminal portions 112 causes a bridge phenomenon.

  In electroless plating, in principle, a plating metal can be deposited not only on a metal such as copper but also on an insulating material. Therefore, in order to deposit a plating metal only on the surface of the terminal portion 112 made of copper, the terminal portion Measures are taken such that the catalyst is supported only on the surface 112 or that the plating solution is selective. However, even if such a measure is taken, a phenomenon that the plating metal is slightly deposited on the surface of the insulating material 110 in the space between the adjacent terminal portions 112, that is, abnormal deposition may occur. If such abnormal precipitation occurs, the above-described bridging phenomenon is promoted, and the coated metal layer 114 may be continued between the adjacent terminal portions 112, and electrical conduction may occur.

  And in the printed wiring board in which the conductor pattern is formed by the semi-additive method, if the space between adjacent terminal portions is about 40 μm or less, the bridging phenomenon occurs frequently. Therefore, in the conventional printed wiring board by the semi-additive method, the narrowing of the space between the terminal portions when the covering metal layer is formed on the terminal portions is limited to about 40 μm.

  On the other hand, in the case of the printed wiring board (embedded substrate) by the flat filling method shown in FIG. 34 (A), the terminal portion 112 does not protrude on the insulating material 110. At the time of plating, no plating metal is deposited on the side surface of the terminal portion 112, and therefore, the bridge phenomenon is less likely to occur than in the case of a printed wiring board by a semi-additive method. However, as shown in FIG. 34B, the plated metal is deposited on the surface of the insulating material 110 while protruding in a hill shape so as to cover the surface of the terminal portion 112 which is flush with the surface of the insulating material 110. It is inevitable to extend to some extent along the surface of the insulating material 110 in the horizontal direction.

  Further, in the case of electroless plating, even if a measure is taken such that the catalyst is supported only on the surface of the terminal portion 112 or the plating treatment solution is made selective, the surface of the insulating material 110 between the adjacent terminal portions is not affected. Abnormal precipitation cannot be avoided.

  Therefore, when the space width where the bridge phenomenon starts when the flat filling method is applied is smaller than the space width where the semi-additive method starts, it is necessary to make the space between adjacent terminal portions smaller. Such a phenomenon becomes a problem. Therefore, the minimum space width when using an embedded substrate is limited to about 30 μm.

  As described above, when an embedded substrate in which a conductor pattern is formed by a flat filling method is used, the space between adjacent terminal portions of the conductor pattern is narrowed as compared with the case of the conventional general semi-additive method. Although it was possible, if it was desired to form a higher-definition circuit pattern, it was still inadequate.

JP 2004-335751 A JP-A-5-299816 JP 2010-80568 A

  The present invention was made against the background of the above circumstances, even if the space between adjacent terminal portions of the conductor pattern formed on the main surface as a printed wiring board is 30 μm or less, and even 25 μm or less, Between adjacent terminal parts, it is possible to prevent electrical conduction due to bridging phenomenon and abnormal precipitation phenomenon between adjacent terminal parts of the coated metal layer formed on the terminal part. It is an object of the present invention to provide a printed wiring board that can be further densified.

  In the present invention, basically, a conductive pattern is embedded in one of a pair of main surfaces (main surfaces on both sides) of an insulating material by a flat filling method to form an embedded pattern. And this invention makes the front surface of the terminal part of this embedding pattern the position depressed from the main surface of the insulating material, and the surface of the coating metal layer consisting of the plating layer covering (covering) the terminal part front side is substantially In addition, it is formed so as to be flush with the surface of the insulating material (main surface) or at a position recessed from the surface of the insulating material. As a result, in the present invention, even if the space between the adjacent terminal portions of the conductor pattern is reduced to 30 μm or less, and further to 25 μm or less, the bridging phenomenon or abnormal precipitation of the coated metal layer in the space between the adjacent terminal portions. This can prevent electrical conduction between the terminal portions.

  In the present invention, the covering metal layer is formed in a recess that is recessed from the main surface of the insulating material and has a terminal portion front surface as a bottom surface (hereinafter also referred to as a plating formation recess). In other words, before forming the coating metal layer, there is a recess (plating formation recess) recessed from the main surface of the insulating material on the front side of the terminal portion having the front surface at a position recessed from the main surface of the insulating material. To do. The coating metal layer is formed of a plating metal deposited in the plating formation recess.

  According to the present invention, the plating metal forming the coating metal layer can be retained in the recess for plating formation. For this reason, according to this invention, generation | occurrence | production of the bridge | bridging phenomenon of the coating metal layer between adjacent terminal parts can be prevented. As a result, it is possible to reduce the distance between adjacent terminal portions (narrow the space between the terminal portions).

  The formation of the coating metal layer on the front side of the terminal portion may be performed by electroless plating. In this case, for example, a covering metal layer that covers the terminal portion is formed on the front surface side of the terminal portion by measures such as supporting the catalyst only on the surface on the front surface side of the terminal portion and imparting selectivity to the plating solution. The surface on the front side of the terminal portion where the covering metal layer is formed is located at the bottom of the plating formation recess recessed from the main surface of the insulating material. When the terminal portions are provided at a plurality of locations on the main surface of the insulating material, between the plating forming recesses where these terminal portions are arranged, the wall-shaped portion (hereinafter, It is also divided by the wall between the recesses). For this reason, when the covering metal layer is formed on the front side of the plurality of terminal portions on the main surface of the insulating material, the wall between the recesses of the insulating material causes a bridge phenomenon due to abnormal deposition of plated metal between adjacent terminal portions. It plays a function to prevent the occurrence. As a result, it is possible to prevent electrical conduction between adjacent terminal portions on the main surface of the insulating material due to the bridging phenomenon of the plated metal.

  The first invention is a printed wiring board in which two or more layers of conductor patterns are laminated with an insulating material interposed between the conductor patterns, and at least one of the outermost conductor patterns on both sides of the wiring board is the inner layer side. The embedded pattern is embedded in the insulating material, and the surface of the wiring portion is flush with the main surface of the insulating material in which the embedded pattern is embedded. A terminal portion embedded in a position recessed from the surface, the terminal portion of which the front surface is composed of a plating layer made of a conductive metal and is covered with a covering metal layer, and the covering metal layer is substantially In particular, the present invention provides a printed wiring board having a surface along the insulating material main surface at a position flush with the insulating material main surface or recessed from the insulating material main surface.

  In the second invention, two or more metal patterns are laminated with an insulating material interposed between metal patterns, and the insulating material between the metal patterns of each layer is integrated with the metal patterns on both sides of the insulating material. The metal portion is embedded, and at least one of the pair of outermost metal patterns is a conductor pattern made of a conductive metal, and is an embedded pattern embedded in an insulating material on the inner layer side, and the embedded pattern and the embedded pattern are There is a heat dissipation circuit that connects the heat dissipation pattern provided on the outermost layer metal pattern on the reverse side of the wiring board opposite to the provided wiring board front side through the heat conducting metal part of each layer so that heat conduction is possible. In the embedded pattern, the surface of the wiring portion is arranged flush with the main surface of the insulating material in which the embedded pattern is embedded, and is recessed from the main surface of the insulating material. A terminal portion embedded at a position, and the front surface of the terminal portion is composed of a plating layer made of a conductive metal and is covered with a covering metal layer, and the covering metal layer is substantially insulated from the insulating layer. There is provided a printed wiring board having a surface along the insulating material main surface at a position flush with the material main surface or recessed from the insulating material main surface.

  According to a third invention, in the printed wiring board of the first or second invention, the terminal portion of the embedded pattern has a front main surface along the main surface of the insulating material, and a periphery of the front main surface. And a convex shape having an inclined surface formed so as to approach the back surface of the terminal portion as it goes from the outer periphery of the front side main surface to the direction opposite to the center of the front side main surface, and the covering metal layer is the insulating material in the insulating material The terminal portion is formed so as to cover the front surface of the terminal portion by embedding a gap between the inner wall surface of the recess formed perpendicular to the main surface of the insulating material and the inclined surface of the terminal portion. Provide printed wiring board.

A fourth invention is the printed wiring board according to any one of the first to third inventions,
A sheet formed by impregnating and integrating a cloth-like or paper sheet-like base material with a resin-free base material insulating material integrally formed of one or more of the above insulating materials with an electrically insulating synthetic resin Provided is a printed wiring board characterized by comprising only a composite insulating material obtained by laminating and integrating a prepreg in the form of a resin, or a resin insulating material without a base material.

  According to a fifth invention, in the printed wiring board according to any one of the first to fourth inventions, the covering metal layer protrudes with a protruding dimension of 2 μm or less from the main surface of the insulating material, or the insulating main surface. Provided is a printed wiring board characterized by being formed in a recessed state.

  According to a sixth invention, in the printed wiring board according to any one of the first to fifth inventions, the embedded pattern has a plurality of the terminal portions, and a minimum interval between the terminal portions is 25 μm or less. Provided is a printed wiring board.

  A seventh invention is the printed wiring board according to any one of the first to sixth inventions, wherein the front surface of the terminal portion of the embedded pattern and the main surface on the side where the embedded pattern in the insulating material is provided. The printed wiring board is characterized in that the distance between is in the range of 1 to 7 μm.

  An eighth invention is the printed wiring board according to any one of the first to sixth inventions, wherein the embedding pattern is formed of copper or a copper alloy, and the covering metal layer is a single layer or a plurality of conductor metals different from each other. A printed wiring, characterized in that the metal forming the plating layer forming the coating metal layer is one selected from Ni, Au, Pd, Sn, Ag, and a solder alloy. Provide a board.

  A ninth invention is a method of manufacturing a printed wiring board: a conductor pattern is embedded in an insulating material, and a surface of the conductor pattern is arranged to be flush with a first main surface formed on the insulating material. After the embedded substrate manufacturing step for manufacturing the embedded substrate and the embedded substrate manufacturing step, the terminal portion of the embedded pattern, which is a conductor pattern of the embedded substrate, is etched to make the terminal portion the first insulating material. An etching process for recessing from the main surface, and electrolytic plating and / or electroless plating is applied to the front side of the terminal part after the etching process is completed, and the terminal part front side is covered with one or more plating layers made of a conductive metal. After the covering step for forming the covering metal layer and the embedded substrate manufacturing step, there is a one-layer conductor pattern on the second main surface side opposite to the first main surface of the insulating material. Laminates a plurality of layers of conductor patterns and insulating materials, arranges a plurality of conductor patterns including the embedded pattern with an insulating material interposed between the conductor patterns, and electrically connects the conductor patterns on both sides of the insulating material. In the covering step, the covering metal layer having a surface along the insulating main surface is substantially flush with the first insulating main surface or the first main surface. Provided is a method for manufacturing a printed wiring board, wherein the printed wiring board is formed so as to be located at a position recessed from a surface.

  A tenth aspect of the invention is a method of manufacturing a printed wiring board: a conductor pattern is embedded in an insulating material, and a surface of the conductor pattern extends and is flush with a first main surface formed on the insulating material. After the embedded substrate manufacturing step for manufacturing the embedded substrate and the embedded substrate manufacturing step, the terminal portion of the embedded pattern, which is a conductor pattern of the embedded substrate, is etched to make the terminal portion the first insulating material. An etching process for recessing from the main surface, and electrolytic plating and / or electroless plating is applied to the front side of the terminal part after the etching process is completed, and the terminal part front side is covered with one or more plating layers made of a conductive metal. After the covering step for forming the covering metal layer and the embedded substrate manufacturing step, a single layer metal pattern is formed on the second main surface side of the insulating material opposite to the first main surface. Alternatively, a plurality of metal patterns and insulating materials are laminated, a plurality of metal patterns including the embedded pattern are arranged with an insulating material interposed between the metal patterns, and the metal patterns on both sides of the insulating material are arranged on the metal patterns. Integrated with the heat conducting metal part embedded in the insulating material between the embedded pattern and a heat dissipation pattern formed on the metal pattern on the back side of the wiring board opposite to the front side of the wiring board on which the embedded pattern is provided A heat dissipating circuit forming step that constitutes a heat dissipating circuit connected so as to be capable of heat conduction through the heat conducting metal part, and in the covering step, a covering metal layer having a surface along the insulating material main surface, A method for manufacturing a printed wiring board is provided, wherein the surface is formed so as to be substantially flush with the first main surface of the insulating material or at a position recessed from the first main surface.

  According to an eleventh aspect of the invention, in the printed wiring board manufacturing method of the ninth or tenth aspect of the invention, in the etching step, the terminal portion of the embedded pattern has a front main surface along the insulating material main surface, and the front main surface. Forming a front surface having an inclined surface extending so as to approach the back surface of the terminal portion as it goes from the outer periphery of the front side main surface to the center opposite to the center of the front side main surface, Provided is a method for producing a printed wiring board characterized by having a convex shape.

  According to a twelfth aspect of the present invention, in the printed wiring board manufacturing method according to the tenth aspect of the present invention, the embedded substrate manufacturing step and the heat radiation circuit forming step include heat conduction in which a metal portion for heat conduction made of plated metal is provided on the terminal portion of the metal pattern. After the metal portion projecting step and the heat conducting metal portion projecting step, the heat conducting metal portion embedding step in which the heat conducting metal portion is embedded in an insulating material together with the metal pattern, and the heat conducting metal portion embedding step Performing a metal pattern laminating step one or more times, including electroless plating and electroplating on the insulating material in which the portion is embedded, and forming a metal pattern integrated with the heat conducting metal portion. And providing a method of manufacturing a printed wiring board, which is a step of assembling the heat dissipation circuit.

  According to a thirteenth invention, in the method for manufacturing a printed wiring board according to any one of the ninth to twelfth inventions, one or more of the insulating materials interposed between the conductor patterns or between the metal patterns are entirely electrically insulating. This is a composite insulating material that is made by laminating a sheet-like base material without a base material, which is integrally molded with a synthetic resin, and a sheet-like base material made of cloth or paper and impregnated with resin. The composite insulating material is embedded in a baseless resin insulating material in which a conductor pattern or a metal pattern is pressed and pressed by the prepreg, and the prepreg is provided by thermocompression bonding to the baseless resin insulating material. A method of manufacturing a printed wiring board is provided.

  14th invention is the manufacturing method of the printed wiring board of 9th invention. As a 1 or more of the insulating material interposed between conductor patterns, the whole is integrally molded by the electrically insulating synthetic resin, There is no base material Provided is a method for producing a printed wiring board using a resin insulating material.

  A fifteenth aspect of the invention is the method for manufacturing a printed wiring board according to any one of the ninth to fourteenth aspects, wherein, in the covering step, the covering metal layer protrudes from the main surface of the insulating material with a protruding dimension of 2 μm or less. Or a method of manufacturing a printed wiring board, wherein the printed wiring board is formed in a state of being depressed from the main surface of the insulating material.

  According to a sixteenth aspect of the present invention, in the printed wiring board manufacturing method according to any one of the ninth to fifteenth aspects, the embedded pattern has a plurality of the terminal portions, and a minimum interval between the terminal portions is 25 μm or less. A printed wiring board manufacturing method characterized by the above.

  According to a seventeenth aspect of the present invention, in the printed wiring board manufacturing method according to any one of the ninth to sixteenth aspects, in the etching step, the front surface of the terminal portion of the embedded pattern and the embedded pattern in the insulating material Provided is a method for manufacturing a printed wiring board, characterized in that the distance from the main surface on the side provided with is in the range of 1 to 7 μm.

  According to an eighteenth aspect of the present invention, in the method for manufacturing a printed wiring board according to any one of the ninth to seventeenth aspects, the embedded pattern is formed of copper or a copper alloy. Or a plurality of plating layers made of different conductive metals, and the formation metal of the plating layer is one selected from Ni, Au, Pd, Sn, Ag, and a solder alloy. A method of manufacturing a printed wiring board is provided.

  The first, second, ninth and tenth inventions are basic aspects of the present invention. According to such a basic aspect of the present invention, the terminal portion of the conductor pattern (embedded pattern) embedded in the insulating material is the main surface of the insulating material (the first main surface in the ninth and tenth inventions). It is formed in a depressed state. The covering metal layer that covers the front surface of the terminal portion of the embedded pattern has a surface that is substantially flush with the main surface of the insulating material or is recessed from the main surface of the insulating material. For this reason, generation | occurrence | production of the bridge | bridging phenomenon of the plating metal which forms a coating metal layer between adjacent terminal parts is avoided. Therefore, even if the space between the adjacent terminal portions is narrower than before, it is possible to prevent the adjacent terminal portions from being continuously connected by the plated metal and being electrically connected therebetween. As a result, a printed wiring board having a finer pattern can be obtained by narrowing the space between adjacent terminal portions.

  The surface of the wiring part of the embedded pattern is arranged flush with the main surface of the insulating material. The covering metal layer covering the terminal portion of the embedded pattern is formed so that the surface thereof is substantially flush with the surface of the wiring portion of the embedded pattern or is recessed from the surface of the wiring portion.

  The embedding pattern has a constant embedding depth with respect to the insulating material (distance from the main surface of the insulating material where the surface of the wiring part is aligned flush with the back surface opposite to the front surface side of the embedding pattern). The structure which becomes can be employ | adopted suitably. In this configuration, the embedded pattern has a thickness of the terminal portion smaller than that of the wiring portion (with respect to the embedded pattern, the thickness is a dimension in a direction matching the embedded depth with respect to the insulating material).

  Moreover, the structure formed with the metal material of good electroconductivity, such as copper and a copper alloy, can be employ | adopted suitably for an embedding pattern.

  As a printed wiring board, for example, an embedded pattern formed of copper or a copper alloy is embedded in an insulating material with a constant embedded depth throughout, and the terminal portion of the embedded pattern has one or more plating layers The structure which is covered with the covering metal layer which consists of, and the formation metal of the plating layer of a covering metal layer is one selected from Ni, Au, Pd, Sn, Ag can be employ | adopted suitably.

  In the printed wiring board having this configuration, the covering metal layer functions as a protective metal layer covering the terminal portion. This printed wiring board has a configuration in which the front surface of the terminal portion having a thickness smaller than that of the wiring portion of the embedded pattern is covered with a covering metal layer.

  The basic aspect of the present invention does not include a configuration in which the covering metal layer is formed over a wide range in the wiring portion of the embedded pattern. However, the basic aspect of the present invention is that the coated metal layer is continuously provided from the terminal portion of the embedded pattern to the wiring portion in a range narrower than the total length of the wiring portion in the vicinity of the terminal portion (terminal portion of the wiring portion). (A side end portion) including a configuration extending in a limited manner.

  In general, Ni, Au, Pd, Sn, and Ag are more expensive than copper. Therefore, the configuration in which the covering metal layer is limitedly formed so as to cover at least the terminal portion of the terminal portion and the terminal portion side end of the wiring portion forms the covering metal layer covering the entire surface of the embedded pattern. This is advantageous in terms of cost reduction compared to the above configuration.

  In particular, noble metals such as Au and Ag are inferior to a solder resist in adhesion to an underfill provided after mounting electronic components. Compared to the configuration in which the covering metal layer covering the entire surface of the embedded pattern is formed, the printed wiring board having a configuration in which a limited range of the embedded pattern is covered with the covering metal layer is more secure in terms of securing the underfill adhesion. It is advantageous.

  Further, the printed wiring board according to the present invention can suppress the wiring resistance of the embedded pattern to be lower than that of the configuration in which the covering metal layer covering the entire surface of the embedded pattern is formed.

  That is, a plating layer that uses one of Ni, Au, Pd, Sn, and Ag as a forming metal has higher electrical resistance than a buried pattern formed of copper or a copper alloy. For this reason, for example, the cross-sectional area of the wiring pattern in which the wiring portion of the embedded pattern is covered with the covering metal layer (hereinafter also referred to as the covering wiring portion) and the wiring portion in which the covering metal layer is not formed is the same. The wiring resistance in which the coating metal layer is not formed can be reduced. In other words, since the wiring portion in which the covering metal layer is not formed can suppress the wiring resistance lower than that of the covering wiring portion, it is advantageous for miniaturization (reduction of the line width) compared to the covering wiring portion. It is.

  In recent years, a decrease in driving voltage has progressed in semiconductors. When such a semiconductor with a low driving voltage is mounted on the embedded pattern, it is advantageous that the wiring resistance of the embedded pattern is low in that the semiconductor operates normally.

  According to the third and eleventh inventions, the covering metal layer embeds between the inclined surface of the outer peripheral portion of the front surface of the terminal portion and the inner wall surface (recess inner wall surface) of the recess for plating formation, It is formed in a shape having a surface along the main surface.

  According to the third and eleventh aspects of the invention, for example, compared to the case where the entire front surface of the terminal portion is a flat surface along the main surface of the insulating material, the terminal surface is inclined by the inclined surface of the outer peripheral portion of the front surface of the terminal portion. A large contact area between the portion and the covering metal layer can be secured. As a result, in this invention, the fixed strength with respect to the terminal part of a coating metal layer can be improved, and a coating metal layer can be made hard to peel from a terminal part.

  According to the third and eleventh aspects of the invention, when the formation of the plating layer (electrolytic plating layer or electroless plating layer) on the surface side of the terminal portion is started for the formation of the covering metal layer, The region between the inclined surface and the inner wall surface of the recess can be filled with the plating metal of the plating layer formed on the inclined surface of the terminal portion. In addition, the deposition of the plating metal that forms the plating layer covering the front surface of the terminal portion tends to spread around the front main surface of the terminal portion as the thickness of the plating layer increases. It can also contribute to embedding a region between the inclined surface and the inner wall surface of the recess. In the region between the inclined surface and the inner wall surface of the recess, the film thickness of the plating layer in the depth direction from the main surface of the insulating material is rapidly increased as compared with the plating layer formed on the front surface of the terminal portion. Moreover, in this invention, the deposit metal accompanying formation of a plating layer can be stopped in a recess. As a result, a surface along the insulating material main surface can be formed on the coated metal layer.

  In the fourth and thirteenth inventions, as one or more insulating materials interposed between conductor patterns (or between metal patterns) of a printed wiring board (hereinafter also referred to as inter-pattern insulating materials), A composite insulating material obtained by laminating and integrating a sheet-like prepreg obtained by impregnating and integrating a cloth-like or paper sheet-like base material with a resin is used. For a printed wiring board having only two layers of conductor patterns (or metal patterns), a composite insulating material is used as an insulating material between patterns of only one layer. For a printed wiring board having three or more layers of conductor patterns (or metal patterns), a composite insulating material is used for one or more of two or more layers of inter-pattern insulating materials.

  The base-free resin insulation does not include a base material such as a glass cloth, and the whole is integrally formed into a sheet shape (including a thin plate shape and a film shape) with an electrically insulating synthetic resin. Since the resin insulating material without a base material does not have a base material, the conductive pattern can be embedded more easily and efficiently than a prepreg. A prepreg suppresses a deformation | transformation of the resin insulation material without a base material by being integrated with the resin insulation material without a base material.

  As in the thirteenth aspect of the invention, the composite insulating material is a prepreg in an operation of embedding a conductive pattern or a metal pattern in a baseless resin insulating material by pressing the baseless resin insulating material pressed by the prepreg against the conductive pattern or the metal pattern. It is preferable to assemble and assemble the resin insulating material with no base material by thermocompression bonding. Thereby, it is possible to smoothly embed the conductor pattern or the metal pattern in the baseless resin insulation before the prepreg is integrated, and by the progress of the thermocompression bonding of the prepreg to the baseless resin insulation, It is possible to suppress unnecessarily deformation of the base-free resin insulation.

  As an insulating material used for a conventional printed wiring board, a material using a thermosetting resin such as an epoxy resin or a phenol resin is mainly used. In addition, the conventional insulating material is obtained by impregnating a base material such as a base fabric or paper (sheet-like base material) with a resin in a liquid state, as represented by a so-called glass epoxy substrate in which a glass cloth is impregnated with an epoxy resin. Sheet-like (including thin plate and film-like) prepregs that are solidified and integrated with a base material are widely used.

  In the first to third and ninth to twelfth inventions, an interpattern insulating material made only of a prepreg or a baseless resin insulating material is used, and a conductor pattern or a metal pattern is pressed into the surface layer portion of the prepreg to embed thermocompression bonding. It is also possible.

  However, as the insulating material between patterns, it is advantageous to use the above-mentioned resin insulating material without a base material that does not include a base material such as glass cloth, for the work of embedding and integrating a conductor pattern or a metal pattern.

  For example, when the prepreg is used in an operation of embedding a conductor pattern to produce an embedded substrate, the fluidity of the prepreg forming resin is suppressed by the base material. On the other hand, when the above-described baseless resin insulating material that does not include a base material such as glass cloth is used for the production of the embedded substrate, by the forming resin of the baseless resin insulating material softened by heating, The periphery of the conductor pattern can be smoothly embedded following the shape of the wiring portion and terminal portion. The resin insulation without base material does not contain a base material such as glass cloth, so when heated and softened, the fluidity of the forming resin can be sufficiently secured, and the conductive pattern can be embedded more smoothly than the prepreg. Can be done. In the case of a prepreg, since the fluidity of the prepreg forming resin is lower than that of the resin insulation material without a base material, it is troublesome to embed the conductor pattern with the prepreg forming resin compared to the case of using a resin insulation material without a base material. May occur. In addition, the use of a substrate-free resin insulating material is advantageous over prepregs in terms of uniform embedding of the conductor pattern and high accuracy of the embedding depth.

  Note that here, as an example, the operation of manufacturing an embedded substrate has been described by comparing the baseless resin insulation and the prepreg, but the baseless resin insulation can smoothly embed a conductor pattern or a metal pattern. Advantages compared with embedding in a prepreg are common to embedding conductor patterns or metal patterns other than the embedding pattern constituting the printed wiring board.

  The glass cloth of the glass epoxy substrate generally has a configuration in which a plurality of glass fiber bundles obtained by collecting a plurality of ultrafine glass fibers are crossed. As the base fabric used for the prepreg, one having a configuration in which fiber bundles are crossed is widely used.

  The inventor uses a prepreg using a base fabric configured by intersecting fiber bundles as an insulating material, and when forming a plating layer on a terminal portion of a conductor pattern formed on an insulating material by a semi-additive method or the like, It was grasped that there was a phenomenon in which the plating treatment liquid permeated into the fiber bundle of the base fabric of the insulating material from the portion where the fiber bundle was exposed from the insulating material, and the plated metal was deposited. A prepreg using a base fabric composed of fiber bundles is usually configured by covering the entire base fabric with a resin. Therefore, the fiber bundle of the base fabric is usually entirely covered with resin. However, for example, when an opening hole such as a via hole is formed in the insulating material, the fiber bundle may be exposed in the opening hole, and the plating solution may permeate into the fiber bundle from the exposed portion. For this reason, in the point which avoids the short circuit of the conductor pattern by the plating metal which deposits from a fiber bundle, formation of the conductor pattern in the opening hole vicinity is avoided.

  On the other hand, since the baseless resin insulation used in the fourth, thirteenth and fourteenth inventions does not have a base material, there is a risk of short-circuiting of the conductor pattern due to deposition of plated metal from the fiber bundle of the base fabric. No. For this reason, in the fourth, thirteenth and fourteenth, a conductor pattern can be formed without any problem in the vicinity of the opening hole of the resin insulating material without a base material. In addition, it is possible to increase the degree of freedom of the arrangement positions of the opening holes and the conductor pattern (the degree of freedom in board design).

  In the fifth and fifteenth inventions, the coating metal layer is allowed to slightly protrude from the main surface of the insulating material within a range of 2 μm at the maximum.

  In the first, second, ninth, and tenth inventions, the surface of the covering metal layer is substantially flush with the insulating material main surface of the embedded substrate (the first main surface in the ninth and tenth inventions). Or, in relation to the configuration located in the recessed portion from the main surface of the insulating material, the protruding metal layer protrudes from the main surface of the insulating material, in other words, the coated metal layer when the covering metal layer protrudes from the main surface of the insulating material. It defines the upper limit of the height of the surface from the main surface of the insulating material. That is, in the present invention, if the step between the surface of the coated metal layer and the main surface of the insulating material is 2 μm or less, the surface of the coated metal layer is considered to be substantially flush with the main surface of the insulating material.

  As described above, in the case of a printed wiring board (embedded substrate) by the flat filling method, a covering metal layer is formed on the surface of the terminal portion that is flush with the surface of the insulating material (see FIGS. 34A and 34B). ), The minimum space width between the terminal portions was limited to about 30 μm. As a result of examining this problem in detail, even when the flat filling method is applied, if the step ds (see FIG. 34 (B)) between the surface of the coating metal layer formed of the plating metal and the surface of the insulating material exceeds 2 μm. It has been found that abnormal precipitation is likely to occur and the bridging phenomenon of the plated metal between the terminal portions is likely to occur.

  According to the detailed experiments and examinations by the present inventors, even if the coating metal layer of the plating metal slightly protrudes from the main surface of the insulating material, if the range is 2 μm or less, the adjacent metal layer is formed when forming the coating metal layer. It has been confirmed that there is almost no abnormal precipitation of plated metal on the main surface of the insulating material between the matching terminal portions. The fifth and fifteenth inventions can suppress abnormal deposition of electroless plated metal in the space between adjacent terminal portions, and are effective for narrowing the space between adjacent terminal portions. Contribute.

  According to the present invention, it is possible to easily avoid the plating metal forming the coating metal layer covering the terminal portion front side from being adjacent due to abnormal precipitation or a bridge phenomenon between adjacent terminal portions. Therefore, even if the space between the adjacent terminal portions is made narrower than before, it is possible to prevent the adjacent terminal portions from being electrically connected. As a result, the distance between the terminal portions can be made smaller than before. Further, by shortening (narrowing) the distance between the terminal portions, it is possible to easily realize a high density conductor pattern formed on the insulating material.

It is a figure explaining the fundamental cross-section of the printed wiring board of 1st Embodiment of this invention, Comprising: It is a longitudinal cross-sectional view which shows roughly the structure of the terminal part vicinity of a conductor pattern especially. It is a figure explaining the fundamental cross-sectional structure of the printed wiring board of 2nd Embodiment of this invention, Comprising: It is a longitudinal cross-sectional view which shows roughly the structure of the terminal part vicinity of a conductor pattern especially. It is a schematic diagram which shows the first half of the process of one Embodiment of the manufacturing method of the printed wiring board of this invention in steps and in principle. FIG. 4 is a schematic diagram showing the continuation of the process shown in FIG. 3 in stages and in principle. FIG. 5 is a schematic view showing the continuation of the process shown in FIG. 4 in a stepwise and theoretical manner. FIG. 6 is a schematic diagram showing the continuation of the process shown in FIG. 5 in a stepwise and theoretical manner. FIG. 5 is a schematic diagram showing stepwise and in principle the first half of an example of a method for manufacturing an embedded substrate as a preparation step of a method for manufacturing a printed wiring board according to the present invention. FIG. 8 is a schematic diagram showing the continuation of the process shown in FIG. 7 in stages and in principle. In one embodiment of the method for producing a printed wiring board of the present invention, the step (etching step and covering step) of forming a covered terminal portion having a structure in which the terminal portion shown in FIG. FIG. It is a figure which shows the structure of the covering terminal part (refer FIG.9 (C)) obtained by the process of FIG. It is a schematic diagram which shows the initial process of 3rd Embodiment of the manufacturing method of the printed wiring board of this invention more concretely and in steps. It is a schematic diagram which shows the process following FIG. 11 concretely and in steps. It is a schematic diagram which shows the process following FIG. 12 concretely and in steps. It is a schematic diagram which shows the process following FIG. 13 concretely and in steps. It is a schematic diagram which shows the process following FIG. 14 concretely and in steps. It is a schematic diagram which shows the initial step of 4th Embodiment of the manufacturing method of the printed wiring board of this invention in steps. FIG. 17 is a schematic diagram specifically and step by step showing a process following FIG. 16. FIG. 18 is a schematic diagram specifically and step by step showing a process following FIG. 17. FIG. 19 is a schematic diagram specifically and step by step showing a process following FIG. 18. It is a figure explaining the fundamental cross-section of the printed wiring board of 4th Embodiment of this invention, Comprising: It is a longitudinal cross-sectional view which shows roughly the structure of the terminal part vicinity of a conductor pattern especially. FIG. 21 is a diagram illustrating a modified example of the printed wiring board of FIG. 20, which is a principle cross-sectional structure near a conductor pattern terminal portion of a printed wiring board having a plate-like heat conducting metal portion extending along the back surface of the terminal portion. It is a longitudinal cross-sectional view which shows this roughly. It is a figure explaining the manufacturing method of the printed wiring board of embodiment which concerns on this invention, and is a rough solution explaining an example of the manufacturing method of the printed wiring board (printed wiring board of FIG. 23) which has a metal part for heat conduction. FIG. 23 is a schematic diagram schematically showing a process following FIG. 22. It is a printed wiring board of an embodiment concerning the present invention, and is a figure explaining a fundamental section structure of an example of a printed wiring board which has a heat dissipation circuit and a metal pattern of three or more layers. It is a printed wiring board of an embodiment concerning the present invention, and is a figure explaining a fundamental section structure of an example of a printed wiring board which has an outermost interlayer conduction circuit besides a heat dissipation circuit. A printed wiring board according to an embodiment of the present invention, comprising an outermost interlayer conduction circuit, a printed wiring board having a heat conducting coated metal layer and a heat radiating exposed portion on the front side of the heat conducting coated terminal portion on the wiring board front side It is a figure explaining the fundamental sectional structure of an example. It is the photograph observed with the optical microscope of the cross section of the terminal part vicinity of the conductor pattern of the printed wiring board by this invention Experimental Examples 1-3 and Comparative Experimental Examples 1 and 2. FIG. It is the photograph which observed the plane and cross section about the printed wiring board by this invention experimental example 1 with the scanning electron microscope. It is the photograph which observed the plane and cross section about the printed wiring board by this invention experimental example 2 with the scanning electron microscope. It is the photograph which observed the plane and cross section about the printed wiring board by this invention experimental example 3 with the scanning electron microscope. It is the photograph which observed the plane and cross section about the printed wiring board by the comparative experiment example 1 with the scanning electron microscope. It is the photograph which observed the plane and cross section about the printed wiring board by the comparative experiment example 2 with the scanning electron microscope. It is a schematic sectional drawing which shows the condition of the terminal part vicinity of the conductor pattern of an example of the conventional printed wiring board. It is a rough sectional view showing the situation near the terminal part of the conductor pattern of other examples of the conventional printed wiring board.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 shows principal parts of the printed wiring board according to the first embodiment of the present invention. FIG. 2 shows principal parts of the printed wiring board according to the second embodiment of the present invention.

  In FIGS. 1 and 2, the insulating material 10 is a sheet-like (thin plate-like and film-like including the same below) integrally formed of an electrically insulating synthetic resin (the same applies hereinafter) (resin insulation without a base material). Material). As the resin insulating material without a base material, for example, a resin insulating material whose whole is integrally formed with an electrically insulating thermosetting resin represented by an epoxy resin can be suitably used.

  The printed wiring boards 1A and 1B shown in FIG. 1 and FIG. 2 are on one side of the main surfaces 10A and 10B on both sides of the insulating material 10 (here, the main surface of reference numeral 10A, hereinafter referred to as the first main surface). It has a buried pattern 16 (first conductor pattern) in which a conductor pattern constituting a wiring portion and a terminal portion is buried in an insulating material 10. Further, the printed wiring boards 1 </ b> A and 1 </ b> B have a second conductor pattern 17 formed on the second main surface 10 </ b> B opposite to the first main surface 10 </ b> A of the insulating material 10. The second conductor pattern 17 is formed in a protruding state on the second main surface 10B of the insulating material 10.

  The printed wiring boards 1 </ b> A and 1 </ b> B are double-sided printed wiring boards having conductor patterns 16 and 17 on both sides of the insulating material 10, and one of the conductor patterns on both sides (first conductor pattern 16) is embedded in the insulating material 10. The pattern 16 is configured.

  The conductor patterns 16 and 17 on both sides of the insulating material 10 are formed of a highly conductive material such as metallic copper (Cu) or Cu alloy. Although the thickness of the conductor patterns 16 and 17 is not specifically limited, For example, it is about 10-20 micrometers.

  1 and 2 are cross-sectional views showing the structure of a portion of the printed wiring boards 1A and 1B in which the terminal portions 12 of the embedded pattern 16 are arranged and installed at a plurality of locations on the first main surface 10A of the insulating material 10. .

  The plurality of terminal portions 12 are embedded in the insulating material 10 with a predetermined pattern, a predetermined width W1 or W2, and a predetermined interval (space) S.

  In these drawings, three terminal portions 12 (12-1, 12-2, 12-3) are shown, but among these terminal portions 12-1 to 12-3, the most in the drawing. The terminal portion 12-1 on the left side is assumed to be a terminal portion that performs wire bonding or the like. The central terminal portion 12-2 and the wider right terminal portion 12-3 are lands for mounting components by soldering or the like (in this specification, the land is also a kind of terminal portion). Is assumed. However, the usage modes of these terminal portions 12-1 to 12-3 are merely examples, and of course are not limited to the above description.

  The terminal portion 12 is provided at a position recessed from the first main surface 10 </ b> A of the insulating material 10. That is, the front surface (front surface 12 </ b> A) of the terminal portion 12 is positioned at a predetermined depth D from the position of the first main surface 10 </ b> A of the insulating material 10. As described above, the depth D is preferably in the range of 1 to 7 μm, and more preferably in the range of 2 to 5 μm.

  The wiring portion 16a (see FIGS. 9A to 9C) of the embedded pattern 16 has an insulating material first surface exposed on the insulating material first main surface 10A side (wiring board front side) of the printed wiring board. It is disposed flush with the main surface 10A. As shown in FIGS. 9A to 9C, the terminal portion 12 is an extending portion that is formed integrally with the wiring portion 16a and extends from the wiring portion 16a. This terminal portion 12 is wider along the first insulating main surface 10A than the dimension in the width direction perpendicular to the longitudinal direction of the surface exposed to the first insulating main surface 10A of the wiring portion 16a. It is formed in a pad shape that expands. However, the shape of the terminal portion 12 is not particularly limited, and may be, for example, a disk shape in addition to the generally rectangular plate shape illustrated in FIGS.

  Further, the terminal portion 12 of the embedded pattern is not limited to the one formed at the tip of the wiring portion 16a as illustrated in FIGS. 9A to 9C, FIGS. 10A and 10B. As the terminal portion 12, a configuration in which a plurality of wiring portions 16a are extended in different directions, such as a configuration formed in the middle of the extending direction of the wiring portion 16a, can be employed.

  As shown in FIGS. 1 and 2, the front side of the terminal portion 12 is covered with a covering metal layer 14 that is a plating layer formed on the front side surface of the terminal portion 12. In the embedded pattern 16, a covered terminal portion 120 in which the terminal portion 12 is covered with the covered metal layer 14 is formed.

  The covering metal layer 14 has a surface 14A along the insulating material first main surface 10A.

  The coated metal layer 14 in the printed wiring boards 1A and 1B of the illustrated example has a two-layer structure of, for example, a Ni plating layer (first layer) 14-1 and an Au plating layer (second layer) 14-2. The thickness T of the covering metal layer 14 (specifically, the covering thickness of the portion covering the front surface 12A of the terminal portion 12) is substantially from the insulating material first main surface 10A of the terminal portion front surface 12A. It is equivalent to the dent depth D. Therefore, the position of the surface 14A of the covering metal layer 14 is substantially flush with or lower than the first main surface 10A of the insulating material 10 (depressed from the first main surface 10A). It is in the state which does not protrude substantially from 10A of 1st main surfaces of an insulating material.

  The second conductor pattern 17 is connected to the via hole 11 provided in the opening holes 13A and 13B formed from the second main surface 10B of the insulating material 10 to the back surface 12B of the terminal portion 12 of the embedded pattern 16. The first conductor pattern 16 is connected to be electrically conductive.

  In FIG. 1 and FIG. 2, the opening holes 13A and 13B are specifically the left and right terminal portions 12-1 and 12 excluding the central terminal portion 12-2 on the drawing from the second main surface 10B of the insulating material. -3 to reach the rear surface 12B.

  1 and 2, the insulating material 10 is formed with filled vias in which the inner sides of the opening holes 13A and 13B are filled with plating metal. The via wiring 11 is formed of a plated metal in which the inner sides of the opening holes 13A and 13B are embedded.

  In addition, as the printed wiring boards 1A and 1B, conformal vias in which a plating layer is formed in a layer along the portions facing the opening holes 13A and 13B of the opening holes 13A and 13B and the terminal portion rear surface 12B are formed on the insulating material 10. It is also possible to employ a configuration in which the plated layer is provided as the via wiring 11.

  In addition, as a via provided in the insulating material 10, a plating layer is formed in a layer shape along the portions facing the opening holes 13A and 13B on the inner surfaces of the opening holes 13A and 13B and the terminal portion rear surface 12B, and the inside of the plating layer is electrically conductive A filled via embedded with a conductive material such as a conductive paste, or a filled via with a cover plating covering the conductive material can also be used.

  The second conductor pattern 17 projects the plated metal forming the via wiring 11 to the edge portions of the opening holes 13A and 13B in the insulating material second main surface 10B to form the insulating material second main surface 10B. Land portions 191 and 193 extending along the line are included. The land portions 191 and 193 function as the terminal portions 19 of the second conductor pattern 17. Hereinafter, the land portions 191 and 193 are also referred to as terminal portions.

  The land portions 191 and 193 in FIG. 1 and FIG. 2 are formed not only by the edge portions of the opening holes 13A and 13B in the insulating material second main surface 10B, but also by the plating metal forming the via wiring 11. And is formed in a layer shape covering the mouth edge and the opening holes 13A and 13B inside thereof.

  The printed wiring boards 1A and 1B in FIGS. 1 and 2 are terminals that are part of the second conductor pattern 17 between the land portions 191 and 193 formed on the second insulating main surface 10B so as to be separated from each other. Part 192. The terminal portion 192 is not electrically connected directly to the embedded pattern 16. The insulating material 10 is not provided with via wiring or the like for directly connecting the terminal portion 192 to the embedded pattern 16.

  The entire second conductor pattern 17 including the terminal portions 19 (land portions 191 and 193 and terminal portions 192) is formed in a protruding state on the second insulating main surface 10B.

  The terminal portion 19 (191 to 193) of the second conductor pattern 17 is a part of the second conductor pattern 17 that is a metal layer extending along the second insulating main surface 10B. Connected to the wiring section.

  A covering metal layer 15 is formed on the terminal portion 19 (191 to 193) of the second conductor pattern 17 to cover the entire outer surface exposed from the insulating material 10 of the terminal portion 19. The second conductor pattern 17 is formed with a covered terminal portion 190 in which the terminal portion 19 is covered with the covered metal layer 15.

  In the printed wiring boards 1 </ b> A and 1 </ b> B in the illustrated example, the covering metal layer 15 is formed of the same kind of plated metal as the covering metal layer 14 covering the front side of the terminal portion 12 of the embedded pattern 16. That is, the covering metal layer 15 also has, for example, a two-layer structure of a Ni plating layer (first layer) 15-1 and an Au plating layer (second layer) 15-2.

  Here, FIG. 1 shows a case where the entire front surface 12A of the terminal portion 12 is substantially a flat surface along the first insulating material main surface 10A. The flat front surface 12A is denoted by reference numeral 12H in FIG.

  Moreover, when this inventor advances the etching of the terminal part 12 (described later) to some extent in the manufacturing process of the printed wiring board, as shown in FIG. 2 and FIG. Around the front main surface 12a formed on the flat surface along the first insulating main surface 10A, the terminal portion rear surface 12B approaches the outer side of the front main surface 12a from the outer periphery to the opposite direction from the center of the front main surface 12a. It was confirmed that the inclined surface 12C can be formed. That is, a convex front surface 12A (indicated by reference numeral 12D in FIGS. 2 and 9B) having an inclined surface 12C around the front-side main surface 12a can be formed on the terminal portion 12. The inclined surface 12C is inclined with respect to the first main surface 10A so that the depth of the recess from the insulating first main surface 10A is increased.

  In this case, the terminal portion 12 is formed in a convex shape as a whole, having a recess depth D2 around it that is greater than the recess depth D1 of the front-side main surface 12a (see FIGS. 2 and 9B). As described above, even when the terminal portion 12 has a convex shape, the covering metal layer 14 covered on the front side of the terminal portion has a flat surface (first surface of the insulating material 10) as described later with respect to the manufacturing method. A flat surface that is substantially flush with the main surface 10A, or a flat surface that extends substantially parallel to the first main surface 10A below the main surface 10A. In particular, when electroless plating is applied, the surface can be made flatter.

  In the above description, the surface 14A of the covering metal layer 14 does not substantially protrude from the first insulating material main surface 10A, or the surface 14 of the covering metal layer 14 substantially faces the first insulating material main surface 10A. Although described as being located at a position recessed from one or the first main surface 10A, “substantially flush” means that the surface 14A of the covering metal layer 14 slightly protrudes from the first main surface 10A of the insulating material. It means to allow the case. Its slight protrusion allowance is usually allowed up to +2 μm. That is, if the maximum projecting dimension of the surface 14A of the covering metal layer 14 from the first principal surface 10A of the insulating material exceeds 2 μm, the plating metal is partially between adjacent terminal portions as shown in FIG. There is a risk that it will continue. However, when the protruding dimension is 2 μm or less, there is little possibility that the adjacent terminal portions are partially continuous. Therefore, the position of the surface 14A of the covering metal layer 14 is allowed up to 2 μm from the position of the first main surface 10A of the insulating material. In this specification, including the allowable range, the surface 14A of the covering metal layer 14 is allowed. This position is expressed as being substantially flush with the position of the first main surface 10A of the insulating material or at a position recessed from the first main surface 10A.

  The thickness of the coating metal layer 14 itself is not particularly limited, but the depth D of the terminal portion front surface 12A from the first insulating main surface 10A (see FIGS. 1 and 2; preferably 1 to 7 μm). In view of the relationship with the allowable protrusion height (preferably 2 μm or less) of the covering metal layer 14 from the surface 10A of the insulating material, it is desirable to be within the range of 1-9 μm.

  Furthermore, in the case where the surface 14A of the covering metal layer 14 is located at a place recessed from the first main surface 10A of the insulating material, continuation of the plating metal between the adjacent terminal portions cannot occur in principle. There is no particular limitation on the size of the recess. However, if the recess depth of the surface 14A of the covering metal layer 14 from the first insulating main surface 10A exceeds 10 μm, it becomes difficult to ensure the thickness of the terminal portion 12 to be about 10 μm or more. There is a risk that the resistance of the wiring and the terminal portion due to the will become excessive. For this reason, it is desirable that the recess depth of the coated metal layer surface 14A is 10 μm or less, and more preferably 7 μm or less.

  In the above example, the coating metal layer 14 on the insulating material first main surface 10A side (wiring board front side) is made up of an Ni plating layer (first layer) 14-1 and an Au plating layer (second layer) 14-2. The covering metal layer 15 at the bottom of the opening has been described as a similar two-layer structure, but these covering metal layers are composed of a Ni plating layer (first layer) and a Pd plating layer (second layer). ), And an Au plating layer (third layer), and in some cases, a single-layer structure including only one layer may be used. Also, the type of the plating metal is not particularly limited, and one or more appropriate metals can be selected as the plating metal depending on the metal constituting the terminal part and the type of the mating metal to be joined as the terminal part. That's fine. Specifically, for example, one or more selected from Ni, Au, Pd, Sn, Ag, and a solder alloy can be used as the plating metal.

  Furthermore, in the above embodiment, the terminal portions 19 (191 to 193) of the second conductor pattern 17 are used for mounting a semiconductor chip or other electronic components on the second main surface 10B side (the back side of the wiring board) of the printed wiring board. It can be used for bonding the lead wires from the terminals of these electronic components by soldering or the like (wire bonding), or for soldering when mounting and connecting the printed wiring board itself on the motherboard.

  Here, the covering metal layer 15 covering the terminal portion 19 of the second conductor pattern 17 is not necessarily required, and the covering metal layer 15 may not be formed. In order to prevent copper oxidation and improve connection reliability, it is desirable to form the covering metal layer 15 in the same manner as the surface on the insulating material first main surface 10A side.

  In addition, the plating layer which comprises the covering metal layers 14 and 15 formed in the terminal portions 12 and 19 of the conductor patterns 16 and 17 on both sides of the insulating material 10 realizes electrical connection between the electronic components and the conductor patterns 16 and 17. Therefore, a metal plating layer made of a conductive metal is used.

  Next, about the method of manufacturing the printed wiring board of 2nd Embodiment shown by FIG. 2, (A)-(C) of FIG. 3, (A)-(C) of FIG. 4, (A) of FIG. The principle will be described with reference to (B).

  3A to 5C to 5A and 5B show a continuous process.

  A method for manufacturing the printed wiring board of the first embodiment shown in FIG. 1 will be described after the manufacturing method of the printed wiring board of the second embodiment.

  FIG. 3A shows a substrate (embedded substrate) 18 in a state in which a conductor pattern is already embedded in an insulating material 10 which is a resin insulation material without a base material and is formed as an embedded pattern 16 by an embedded substrate manufacturing process described later. Show.

  In this state, as shown in FIG. 9A, the entire one surface including the terminal portions 12 of the embedded pattern 16 (the front surface for the terminal portions 12) is the first main surface 10A of the insulating material 10. It is arranged flush.

  The specific process of the embedded substrate manufacturing process until the embedded substrate 18 is obtained may be the same as the conventional flat filling method, and a specific example thereof will be described later.

In the present embodiment, as one embodiment of the method for manufacturing a printed wiring board according to the present invention, first, a substrate back surface pattern forming step of forming the second conductor pattern 17 on the second main surface 10B of the insulating material 10 of the embedded substrate 18. (Pattern Laminating Step), and then etching the terminal portion 12 of the embedded pattern 16 from its front side so as to be recessed from the first main surface 10A of the insulating material, and the front side of the terminal portion 12 that has completed the etching step A case where the printed wiring board illustrated in FIG. 1 and FIG. 2 is manufactured by performing a covering step for forming the covering metal layer 14 will be described.
(Substrate back surface pattern formation process)
In the substrate back surface pattern forming step (pattern stacking step) of this embodiment, first, an opening hole forming step is performed on the embedded substrate 18 shown in FIG. 3A (see FIG. 3B). That is, as shown in FIG. 3B, the insulating material 10 has an opening hole 13A that reaches the terminal portion rear surface 12B of the terminal portions 12-1 and 12-3 from the second main surface 10B side (wiring board back side). , 13B (vias) are formed, and the terminal portion back surfaces 12B of the terminal portions 12-1 and 12-3 are exposed at the bottoms of the opening holes 13A and 13B. As this opening hole forming means, it is desirable to apply laser processing, but it may be formed by mechanical drilling.

  Next, as shown in FIG. 3C, the entire surface of the embedded substrate 18 (first and second main surfaces 10A and 10B of the insulating material 10, the front surface 12E of each terminal portion 12, and the opening holes 13A and 13B (vias). ) An electroless plating layer 171 is formed on the inner surface) as a plating seed layer.

  Part of the electroless plating layer 171 (hereinafter also referred to as a plating seed layer) covering the entire inner surface of the opening holes 13A and 13B (vias) is formed in the opening holes 13A and 12A of the terminal part back surface 12B of the terminal parts 12-1 and 12-3. It extends along the portion exposed at the bottom of the 13B hole and covers the entire portion.

  Next, as shown in FIG. 4A, a plating resist 21 (second pattern plating resist) covering the plating seed layer 171 is provided on the entire portion of the embedded substrate 18 where the second conductor pattern 17 is not required to be formed. . The plating resist 21 is not formed in the opening holes 13A and 13B.

  Next, as shown in FIG. 4B, a second metal plating layer 172 made of a plating metal (metal plating layer) is formed on the back surface side (second main surface 10B side) of the embedded substrate 18. The second metal plating layer 172 is formed in a predetermined pattern on the back side of the embedded substrate 18 by being formed on the exposed portion of the plating seed layer 171 (first metal plating layer) without being covered with the plating resist 21. Is done.

  The second metal plating layer 172 (hereinafter also referred to as a pattern plating layer) is formed to be much thicker than the plating seed layer 171. Further, as shown in FIG. 4B, in the step of forming the pattern plating layer 172, the second conductor pattern 17 and the embedded pattern 16 are electrically connected by the plating metal embedded in the opening holes 13A and 13B. A via wiring 11 is also formed.

  In this embodiment, as the plating seed layer 171 and the pattern plating layer 172, metal plating layers formed of the same metal having good conductivity such as a Cu plating layer are formed. The embedded pattern 16 is also formed of the same metal as the plating seed layer 171 and the pattern plating layer 172.

  Next, as shown in FIG. 4C, the plating resist 21 is removed from the embedded substrate 18.

  Next, the embedded substrate 18 is immersed in an etching solution, and the exposed portion of the plating seed layer 171 (first metal plating layer) that is not covered with the second metal plating layer 172 is removed by, for example, flash etching. (See FIG. 5A). As a result, as shown in FIG. 5A, the second conductor pattern 17 including the terminal portion 19 (terminal portions 191 to 193) is completed.

  By forming the second conductor pattern 17, the substrate back surface pattern forming step is completed.

  Further, as shown in FIG. 5A, when the etching removal of the exposed portion of the plating seed layer 171 is completed, the surface of the embedded pattern 16 that is flush with the first main surface 10A of the insulating material is exposed.

  Note that the second conductor pattern 17 may be slightly etched when the exposed portion of the plating seed layer 171 is removed by etching.

  FIGS. 3C to 5A show a case where the second conductor pattern 17 is formed on the second main surface 10B of the insulating material 10 by the semi-additive method. However, the process of forming the second conductor pattern 17 on the embedded substrate 18 is not limited to the above-described configuration, and for example, a full additive method or the like can be employed.

  3C to FIG. 5A, specifically, from two metal plating layers (first metal plating layer 171 and second metal plating layer 172) laminated on the second main surface 10B of the insulating material. A case where the second conductor pattern 17 having the two-layer structure is formed is illustrated.

The plating layer (metal plating layer) for forming the second conductor pattern 17 may be made of a highly conductive material such as metal copper (Cu) or Cu alloy, and is not limited to the Cu plating layer. In addition, the second conductor pattern 17 composed of two or more plating layers has a structure in which the plating layers constituting the second conductor pattern 17 are formed of the same metal, for example, plating made of different metals. A configuration in which two layers or three or more layers are stacked can also be adopted.
(Etching process)
After the substrate back surface pattern forming step is completed, as shown in FIGS. 5B and 5C, the terminal portion 12 is etched from the front side to be recessed with respect to the insulating material first main surface 10A. Apply the process.

  Specifically, in the etching process described here, as shown in FIGS. 5B and 5C, the terminal portions 12 and 19 of the conductor patterns 16 and 17 on both sides of the insulating material 10 are etched to reduce the thickness. The terminal portion 12 of the embedded pattern 16 is recessed from the insulating material first main surface 10A.

  As shown in FIGS. 5B and 9A, this etching process is performed by providing an etching resist layer 23 that covers portions of the insulating material 10 where the conductor patterns 16 and 17 are not etched.

  5B and 9A, the etching resist layer 23 is provided in a laminated state on the insulating material 10 while avoiding the terminal portions 12 and 19 of the conductor patterns 16 and 17. The etching resist layer 23 exposes the front surfaces 12A, 19A of the terminal portions 12, 19 on the side opposite to the insulating material 10.

  5B and 5C, reference numeral 23A is added to the etching resist layer 23 provided on the insulating material first main surface 10A side, and reference numeral 23B is added to the etching resist layer 23 provided on the insulating material second main surface 10B side. To do.

  5B and 9A, a hole 23a for exposing the terminal portion 12 of the embedded pattern 16 is formed in the etching resist layer 23A provided on the first main surface 10A side of the insulating material 10. . The hole 23a passes through the etching resist layer 23A with an axis perpendicular to the first main surface 10A of the insulating material. Further, the hole 23a has a cross section perpendicular to the axis thereof, which is flush with the front surface 12A (indicated by reference numeral 12E in the drawing) which is flush with the first main surface 10A of the insulating material of the terminal portion 12 before etching. It is formed slightly larger. Moreover, the hole 23a secures a slight separation distance from the outer periphery of the terminal portion front surface 12E, and surrounds the terminal portion front surface 12E.

  In FIG. 9A, the hole 23a of the etching resist layer 23A on the insulating material first main surface 10A side is specifically the terminal of the wiring portion 16a of the embedded pattern 16 as well as the terminal portion 12 of the embedded pattern 16. The terminal side end portion which is a portion located in the vicinity of the portion 12 is also formed to be exposed. The terminal-side end exposed in the hole 23a of the wiring part 16a is hereinafter also referred to as a lead-out wiring part 16b.

  The etching resist layer 23A covers the entire portion of the embedded pattern 16 other than the terminal portion 12 and the lead-out wiring portion 16b.

  Note that the etching resist layer 23 </ b> A is not necessarily limited to a configuration that covers the entirety of the embedded pattern 16 other than the terminal portion 12 and the lead-out wiring portion 16 b. The etching resist layer 23A has, for example, a structure in which, in addition to the hole 23a formed corresponding to the terminal portion 12 and the lead-out wiring portion 16b, a hole exposing a part of the embedded pattern 16 is formed at a position separated from the hole 23a. Can also be adopted.

  In FIG. 9A, the illustration of the etching resist layer on the second main surface 10B side is omitted. The same applies to FIG. 9B.

  5B and 5C, the etching resist layer 23B on the second main surface 10B side has a hole 23b (hereinafter also referred to as a terminal portion accommodation hole) for accommodating the terminal portion 19 of the second conductor pattern 17. Is formed.

  The terminal portion receiving hole 23b has a slightly larger cross-section than the front surface 19A of the terminal portion 19, and is formed through the etching resist layer 23B with an axis perpendicular to the insulating second main surface 10B. A clearance is secured between the inner peripheral surface of the terminal portion receiving hole 23b and the terminal portion 19 over the entire inner peripheral surface of the terminal portion receiving hole 23b.

  Not only the terminal portion 19 but also a terminal-side end portion located in the vicinity of the terminal portion 19 of the wiring portion of the conductor pattern 17 exists in the terminal portion receiving hole 23b. The etching resist layer 23B covers the entirety of the conductor pattern 17 except for the terminal portion 19 and the lead-out wiring portion which is a region (terminal side end portion) located in the terminal portion accommodation hole 23b of the wiring portion.

  Note that the etching resist layer 23 </ b> B is not necessarily limited to a configuration covering the entirety of the conductor pattern 17 other than the terminal portion 19 and the lead-out wiring portion. For example, the etching resist layer 23B may have a configuration in which a hole that exposes a part of the conductor pattern 17 is formed at a position separated from the terminal portion accommodation hole.

  After the formation of the etching resist layers 23A and 23B on both sides of the insulating material 10 is completed, the embedded substrate 18 is then immersed in an etching solution, and as shown in FIGS. The terminal portions 12 and 19 of the conductor patterns 16 and 17 are etched.

  This etching is performed using an etching solution for dissolving Cu or Cu alloy constituting the terminal portions 12 and 19, for example, an etching solution made of sodium persulfate and sulfuric acid.

  FIG. 5B shows an initial stage of etching of the terminal portion 12. At this stage, the terminal portion 12 is recessed with a substantially uniform depth with respect to the insulating material first main surface 10A. The terminal portion 12 is formed with a flat front surface 12H extending parallel to the first insulating material main surface 10A at a position recessed with respect to the first insulating material main surface 10A.

  If the etching is further advanced, the terminal portion 12 is largely etched at the outer peripheral portion of the front side surface, and along the insulating material first main surface 10A as shown in FIGS. 5C and 9B. The inclined surface 12C described above is formed around the substantially flat front main surface 12a. That is, the terminal part 12 will be in the state which makes convex shape.

  In this etching step, the lead wiring portion 16b is also etched along with the etching of the terminal portion 12, and the thickness of the lead wiring portion 16b (the dimension in the direction perpendicular to the first main surface 10A of the insulating material) is reduced. That is, as shown in FIG. 9B, the lead-out wiring portion 16b is recessed with respect to the insulating material first main surface 10A together with the terminal portion 12 by etching. As a result, in the embedded pattern 16, a step 16c is formed at the boundary between the lead-out wiring portion 16b and the portion of the wiring portion 16a that is covered with the etching resist layer 23A and is not etched.

  Further, as shown in FIGS. 5B and 5C, in the etching process, the conductor pattern 17 is also subjected to the etching of the terminal portion 12 and the lead wiring portion 16b of the embedded pattern 16, and the terminal portion 19 and the lead wiring portion. Is etched and its thickness is reduced.

5C, 6A, and 6B, reference numeral 19A denotes a front surface 19A of the terminal portion 19 of the second conductor pattern 17 (hereinafter also referred to as a substrate back surface pattern) when the etching process is completed. Add 19H. Further, as shown in FIGS. 5A and 5B, reference numeral 19E is added to the front surface 19A of the terminal portion 19 of the substrate back surface pattern 17 before the etching process is performed.
(Coating process)
The etching process is completed until the terminal portion 12 has a convex shape as shown in FIGS. 5C and 9B.

  Next, as shown in FIGS. 6A and 6B, the front surfaces 12A and 19A of the terminal portions 12 and 19 of the conductor patterns 16 and 17 on both sides of the insulating material 10 are plated with metal (covered metal layers 14 and 15). The plating metal coating process (coating process) is performed.

  In the present embodiment, as shown in FIG. 6A, this plating metal coating step is performed by plating the embedded substrate 18 with a plating solution while the etching resist layer 23 used in the etching step is adhered to the insulating material 10. The metal plating layer covering the surface is formed as the covering metal layers 14 and 15 on the terminal portions 16 and 19 of the conductor patterns 16 and 17 on both sides of the insulating material 10.

  Further, the coated metal layers 14 and 15 are also formed on the lead wiring portions of the conductor patterns 16 and 17 in accordance with the formation of the coated metal layers 14 and 15 on the surfaces of the terminal portions 16 and 19.

  The etching resist layer 23 is used as a plating resist layer, and is removed from the insulating material 10 after the formation of the covering metal layers 14 and 15 is completed (see FIG. 6B).

  In this embodiment, first, Ni plating is applied as the first layer 14-1 to the entire front surface 12D of the terminal portion 12 by electroless plating or electrolytic plating, and then the second layer 14 is formed by electroless plating or electrolytic plating. -2 is plated with Au to form a two-layer coated metal layer 14.

  As shown in FIGS. 9C, 10A, and 10B, the covering metal layer 14 is also formed on the lead-out wiring portion 16b of the embedded pattern 16 as a metal layer continuous from the terminal portion 12.

  In this plating metal coating step, the coated metal is also applied to the entire outer surface of the terminal portion 19 of the second conductor pattern 17 formed in a protruding state on the second main surface 10B of the insulating material together with the terminal portion 12 of the embedded pattern 16. The covering metal layer 15 having the same two-layer structure as the layer 14 is formed, and the terminal portion 19 is covered with the covering metal layer 15. The covering metal layer 15 covering the terminal portion 19 of the second conductor pattern 17 is formed by laminating the second layer 15-2 made of Au plating on the surface of the first layer 15-1 made of Ni plating covering the terminal portion 19. It is a thing of composition.

  The coating metal layer 14 covering the front surface 12D of the terminal portion 12 of the embedded pattern 16 is plated so that the surface 14A thereof is substantially flush with the first main surface 10A of the insulating material 10 (see FIG. In particular, the plating time is appropriately adjusted according to the plating speed.

  In the present embodiment, in the stage before plating shown in FIG. 5C, the terminal portion 12 of the embedded pattern 16 is in a convex shape, but the Ni of the covering metal layer first layer 14-1 In performing plating, in both cases of electroless plating and electrolytic plating, the surface 14-1A of the Ni plating layer (first layer) 14-1 is substantially flat by plating Ni with a certain thickness or more. (See FIG. 6A). Therefore, when performing Au plating as the second layer 14-2 thereafter, the surface 14-2A (corresponding to the coated metal layer surface 14A) is easily made flat by plating with a uniform thickness. Can do. As a result, a printed wiring board similar to the printed wiring board of the second embodiment shown in FIG. 2 can be obtained.

  Here, in the above-described plating metal coating step, in both cases of electroless plating and electrolytic plating, the plating metal (Ni, Au) that forms the coating metal layer 14 covering the terminal portion 12 surface side of the embedded pattern 16 is: It deposits in 10C of plating formations (refer FIG.5 (C) and FIG.9 (B)) which is a recess by which the terminal part 12 is arrange | positioned at the hollow bottom part from 10A of insulating materials. For this reason, the bridge phenomenon of the plating metal does not occur between the adjacent terminal portions 12.

  Further, when electroless plating is applied, even if the surface 14A of the covering metal layer 14 slightly protrudes from the insulating first main surface 10A, the surface 14A of the covering metal layer 14 and the insulating first main surface 10A. Is less than 2 μm, there is almost no occurrence of abnormal precipitation, and the occurrence of bridging phenomenon due to abnormal precipitation can also be prevented.

  For this reason, according to this printed wiring board manufacturing method, even if the space between the adjacent terminal portions 12 is as small as 25 μm or less, the plated metal is continuously electrically connected in the space. Can be avoided. As a result, it is possible to produce a printed wiring board having a conductor pattern formed with high definition and high density, with the space between the terminal portions 12 being 25 μm or less.

  As a result of intensive studies by the present inventors, it has been confirmed that there is no particular problem even if the above-mentioned space is narrowed to a few tens of μm.

  The embedded pattern 16 of the printed wiring board according to the embodiment of the present invention is embedded in the insulating material 10 with a constant embedding depth throughout.

  As shown in FIGS. 10A and 10B, the thickness of the embedded pattern 16 in the wiring portion 16a is made smaller than that of the portion other than the terminal-side end portion 16b so as to be recessed from the insulating material first main surface 10A. For example, the covering metal layer 14 is formed on the terminal portion 12 and the terminal-side end portion 16b. For example, the entire embedding pattern 16 is etched to be recessed from the first main surface 10A of the insulating material, and the entire surface side of the embedding pattern 16 is covered. Compared to the configuration (proportional) in which the metal layer 14 is formed, it is advantageous to suppress (decrease) the wiring resistance of the embedded pattern.

  In the comparative configuration, the cross-sectional area of the covering metal layer 14 formed on the surface of the wiring portion is added to the cross-sectional area of the wiring portion recessed from the insulating first main surface 10A by etching, so that the wiring portion and the covering metal are added. It is possible to ensure a cross-sectional area equivalent to that of the wiring part 16a before etching in the covered wiring part constituted by the layer 14 ("cross-sectional area" indicates the area of the cross section perpendicular to the wiring part extending direction). Point). However, when the embedded wiring portion is a copper layer and the covering metal layer is a metal layer selected from Ni, Au, Pd, Sn, and Ag, Ni, Au having a larger electrical resistance than copper. Since Pd, Sn, and Ag are used, the wiring resistance is increased as compared with a wiring portion that is entirely a copper layer.

  The covering metal layer 14 is formed on the terminal side end portion 16b of the wiring portion 16a and the terminal portion 12 which are recessed from the insulating material first main surface 10A in the embedded pattern, and the portions other than the terminal side end portion 16b of the wiring portion 16a are formed. The configuration in which the surface is flush with the first main surface 10A of the insulating material is advantageous in that the terminal portion 12 can be protected by the covering metal layer 14 and the wiring resistance can be kept low (small).

The configuration in which the embedding pattern 16 is embedded in the insulating material 10 with a constant embedding depth throughout is also common to other embodiments according to the present invention.
(Manufacturing method of the printed wiring board of 1st Embodiment)
The printed wiring board 1A of the first embodiment having the configuration shown in FIG. 1 is a stage shown in FIG. 5B in the manufacturing process of the printed wiring board 1B of the second embodiment, that is, a relatively early stage of the etching process. It can be manufactured by shifting to the covering step at a stage where the terminal portion 12 is not yet in a convex shape.

That is, the manufacturing process (manufacturing method) of the printed wiring board 1A of the first embodiment is only changed in that the etching process is completed at the initial stage in the manufacturing process of the printed wiring board 1B of the second embodiment. However, it is different from the manufacturing process of the printed wiring board 1B of the second embodiment.
(Embedded substrate manufacturing process)
Next, as a principle example of the process of manufacturing the embedded substrate 18 shown in FIG. 3A, that is, the embedded substrate manufacturing process, (A) to (D) of FIG. 7 and (A) to (D) of FIG. A description will be given with reference to D). 7A to 7D to 8A to 8D show a continuous process.

  First, a pattern support 20 as shown in FIG. The pattern support 20 is not particularly limited, but in this embodiment, a sheet-like material is used as a whole in which a nickel film 20B is formed on one surface of the copper foil 20A by plating or the like.

  Next, as shown in FIG. 7B, a plating resist layer 22 is formed on the surface of the pattern support 20 on the nickel film 20B side. The plating resist layer 22 may be a photosensitive resist layer film when a photolithography technique is applied to form a resist layer pattern. Subsequently, as shown in FIG. 7C, a pattern is formed on the plating resist layer 22 by a known photolithography technique or the like.

  After that, as shown in FIG. 7D, a conductive pattern 16 made of a conductive metal such as Cu is formed on the portion where the plating resist layer is not formed on the pattern support 20 by, for example, electrolytic plating. The conductor pattern 16 includes a wiring portion and a terminal portion 12. 7D to 8A to 8D show an area where a plurality of terminal portions 12 of the conductor pattern 16 are arranged on the pattern support 20.

  Thereafter, the plating resist layer 22 is removed by peeling or dissolution to obtain the state of FIG. In this state, the conductor pattern 16 protrudes from the surface of the pattern support 20.

  Thereafter, as shown in FIG. 8B, an insulating material 10 which is a resin insulating material without a base material is prepared, and the surface of the pattern support 20 from which the conductive pattern 16 protrudes the insulating material 10 (in the illustrated example, It is pressed toward the pattern support 20 by pressing toward the surface of the nickel film 20B. Further, in this way, the conductor pattern 16 on the pattern support 20 is pushed and embedded in the insulating material 10.

  As described above, the insulating material 10 is formed in a sheet shape having main surfaces 10A and 10B on both sides thereof. The insulating material 10 is bonded to the surface of the pattern support 20 without any gap by pressing one of the main surfaces 10A, 10B on both sides (the first main surface 10A in the illustrated example) toward the surface of the pattern support 20, and thermocompression bonded. can do.

  Further, the thickness of the insulating material 10 is larger than the protruding dimension of the conductor pattern 16 from the surface of the pattern support 20. The conductor pattern 16 is embedded on the first main surface 10 </ b> A side in the insulating material 10 that is thermocompression bonded to the pattern support 20.

Next, the pattern support 20 is removed by an appropriate means such as etching. As a result, an embedded substrate 18 as shown in FIG. 8D is obtained. In the conductor pattern 16 (embedded pattern), the surface exposed by removing the pattern support 20 is flush with the main surface (first main surface 10A) of the insulating material 10 exposed by removing the pattern support 20. ing.
(Third embodiment)
Next, a third embodiment according to the present invention will be described with reference mainly to (A) to (F) of FIG. 11 to (A) to (C) of FIG.

  In addition, about the structure similar to 1st, 2nd embodiment, a common code | symbol is attached | subjected and the description is simplified or abbreviate | omitted.

  As shown in FIG. 15C, the printed wiring board 1C of this embodiment is a multilayer printed wiring board. In the printed wiring board 1C, the conductor pattern 45 and the insulating material 41 are alternately laminated on the second main surface 10B side of the insulating material 10 of the embedded substrate 18, and the conductive pattern 45 has a plurality of layers (three layers in the illustrated example). The general configuration is provided.

  In this embodiment, the insulating material 10 of the embedded substrate 18 of the printed wiring board 1C and the insulating material 41 on the second main surface 10B side of the insulating material 10 are all without a base material formed in a sheet shape. It is a resin insulating material.

  However, in the printed wiring board according to the embodiment of the present invention, a configuration in which a prepreg is used for one or more of the plurality of insulating materials 10 and 41 constituting the wiring board can also be adopted.

  The printed wiring board 1C illustrated in FIG. 15C includes the embedded pattern 16 of the embedded substrate 18 that is the first conductive pattern from the bottom in FIG. It has a total of 4 conductor patterns (wiring layers).

  In FIG. 15C, the reference numerals 45a, 45b, and 45c are appended to the conductor patterns 45 in the second to third layers from the bottom in order from the shortest distance from the embedded substrate 18.

  Further, on the second main surface 10B side of the insulating material 10 of the embedded substrate 18, the insulating material 41 (interlayer insulating material) disposed between the conductor patterns 45 is arranged in order of 41 a from the closest distance from the embedded substrate 18. , 41b. In this printed wiring board 1 </ b> C, the insulating material 10 of the embedded substrate 18 also functions as an interlayer insulating material positioned between the conductor patterns 16 and 45.

  The second-layer conductor pattern 45a is formed on the second main surface 10B of the insulating material 10 of the embedded substrate 18. The conductor pattern 45 a is electrically connected to the embedded pattern 16 of the embedded substrate 18 through the via wiring 11 formed in the insulating material 10 of the embedded substrate 18.

  The plurality of conductor patterns 45 stacked in multiple stages on the second main surface 10B side of the insulating material 10 of the embedded substrate 18 are electrically connected to the conductor patterns 45 on both sides of the insulating material 41 via the via wiring 11 of the insulating material 41. Thus, the conductor patterns 45 of all layers are electrically connected to each other. The printed wiring board 1C of the illustrated example has a configuration in which the embedded pattern 16 of the embedded substrate 18 and the conductor pattern 45 of all layers are electrically connected to each other.

  The pair of conductor patterns 16 and 45c on the outermost layer includes terminal portions 12 and 46 used for mounting electronic components, wire bonding, and the like, and a wiring portion.

  In this embodiment, of the pair of conductor patterns 16 and 45c in the outermost layer, the embedded pattern 16 of the embedded substrate 18 is treated as a first outermost layer conductor pattern, and the other conductor pattern 45c is treated as a second outermost layer conductor pattern.

  The front sides of the terminal portions 12 and 46 of the outermost conductor patterns 16 and 45 c are covered with covering metal layers 14 and 47 made of a plating layer formed on the terminal portions 12 and 46. The outermost layer conductor patterns 16 and 45c on both sides of the wiring board have covered terminal portions 120 and 460 configured to cover the front sides of the terminal portions 12 and 46 with the covered metal layers 14 and 47, respectively. The covered terminal portions 120 and 460 are composed of the terminal portions 12 and 46 and the covered metal layers 14 and 47 formed on the front side thereof.

  In the printed wiring board 1 </ b> C illustrated in FIG. 15C, the coated metal layers 14 and 47 are formed on the Ni plating layer 14-1 formed as the first layer on the terminal portions 12 and 46, and the Au plating layer as the second layer. It has a two-layer structure in which 14-2 are laminated.

  However, the covering metal layers 14 and 47 are not limited to this configuration. As the covering metal layers 14 and 47, the configuration that can be adopted by the covering metal layer 14 described in the first embodiment can be similarly adopted.

  The front surface 12A of the terminal portion 12 of the embedding pattern 16 (first outermost layer conductor pattern) is located in a place recessed from the insulating material first main surface 10A. The covering metal layer 14 covering the terminal portion 12 of the embedded pattern 16 is a plating layer formed on the terminal portion front surface 12A. This covering metal layer 14 has a surface extending along the first insulating main surface 10A at a position substantially flush with the first insulating main surface 10A or recessed from the first insulating main surface 10A. .

  Note that the front surface 12A of the terminal portion 12 of the embedded pattern 16 is a flat surface extending along the first insulating main surface 10A, similar to the terminal surface 12H described in the first embodiment. Both the surface (see FIG. 1) and the shape having the inclined surface 12C around the front-side main surface 12a can be adopted as with the terminal front surface 12D (see FIG. 2) described in the second embodiment. is there.

  Further, the depth of the depression with respect to the insulating material first main surface 10A of the terminal portion front surface 12A and the covering metal layer surface 14A should be a numerical value range similar to the numerical value range described in the first and second embodiments. Can do. Further, the surface of the wiring portion 16a of the embedded pattern 16 (see FIGS. 9A to 9C) exposed on the insulating material first main surface 10A side (wiring board front side) of the printed wiring board is the insulating material first. It is the same as that of 1st, 2nd embodiment that it is arrange | positioned flush with 10 A of main surfaces.

  The shape of the front surface 12A of the terminal portion 12 of the embedded pattern 16, the depth of the recess with respect to the first main surface 10A of the insulating material, and the position of the surface exposed to the front side of the wiring board of the wiring portion 16a of the embedded pattern 16 are described in the present invention. The same applies to other embodiments according to the above.

  On the other hand, the second outermost layer conductor pattern 45c on the side opposite to the embedded pattern 16 is entirely embedded in the insulating substrate 41b (hereinafter also referred to as an interlayer outermost insulating material) embedded in the embedded substrate 18 that is farthest from the embedded substrate 18. Is formed in a protruding state on the opposite surface (outer main surface 41A). The covering metal layer 47 covering the terminal portion 46 of the conductor pattern 45c covers the front side (the side opposite to the insulating material 41b) of the terminal portion 46 protruding from the outer main surface 41A of the interlayer outermost insulating material 41b. It is formed. For this reason, the surface 47A of the covering metal layer 47 has a thickness of the flat terminal portion 46 along the outer main surface 41A of the outermost interlayer insulating material 41b and a covering thickness of the covering metal layer 47 on the front side of the terminal portion 46. Only the total dimension is at a position separated from the outer main surface 41A of the interlayer outermost insulating material 41b.

The printed wiring board 1C illustrated in FIG. 15C avoids the terminal portions 12 and 46 of the outermost layer conductor patterns 16 and 45c on both sides, and the insulating material first main surface 10A of the embedded substrate 18 and the outermost layer of the interlayer. It also has a solder resist layer 48 formed on the outer main surface 41A of the insulating material 41b. The solder resist layer 48 on both sides of the wiring board is formed with openings 48a that expose the covered terminal portions 120 and 460 of the outermost layer conductor patterns 16 and 45c.
(Manufacturing method of multilayer printed wiring board)
Next, an example of a method for manufacturing the printed wiring board 1C described above will be described as a method for manufacturing a printed wiring board according to an embodiment of the present invention.

  Note that FIGS. 11A to 11F to FIG. 12A and FIG. 12B correspond to an embedded substrate manufacturing process for forming the embedded substrate 18.

  In this embodiment, first, as shown in FIG. 11A, a single-sided copper-clad laminate 30 as a first support and a semi-cured state formed in a sheet shape as a second support. An adhesive layer 32, a small-sized copper foil 34, and a large-sized copper foil 36 are prepared. The adhesive layer 32 is, for example, a prepreg formed by impregnating a base material (sheet-like base material) such as a resin insulation material without a base material or a base fabric with a resin. Then, the single-sided copper clad laminate 30 superimposed on one surface and the two copper foils 34 and 36 superimposed on the other surface are sandwiched between the adhesive layers 32 from both sides, and the adhesive layer 32. To obtain a laminate 38 shown in FIG. The adhesive layer 32 is cured by thermocompression bonding, and the copper foils 34 and 36 are bonded and fixed to the single-sided copper-clad laminate 30.

  The single-sided copper-clad laminate 30 is obtained by integrating a copper foil 30b on only one side of a resin layer 30a made of a resin such as polyimide. This single-sided copper clad laminate 30 is thermocompression bonded to the adhesive layer 32 by pressing the copper foil 30 b side against the adhesive layer 32.

  The two copper foils 34 and 36 are thermocompression-bonded to the adhesive material layer 32 by placing the small copper foil 34 between the adhesive material layer 32 and the large size copper foil 36. The small size copper foil 34 is embedded in the surface layer portion of the second support 32 (adhesive layer) by thermocompression bonding.

  The small size copper foil 34 and the large size copper foil 36 are not bonded. The large size copper foil 36 is thermocompression-bonded with the portion projecting outward from the outer periphery of the small size copper foil 34 in direct contact with the adhesive layer 32.

  Next, as shown in FIG. 11C, a base metal layer 40 for pattern formation (here, Ni layer) is formed on the surface of the large-sized copper foil 36 of the laminate 38 by electrolytic plating or the like. A pattern support 38A for supporting the formation of the conductor pattern 16 is obtained.

  The base metal layer 40 is integrally formed with the large size copper foil 36.

  Thereafter, as shown in FIG. 11E, a plating resist layer 42 is provided on the surface of the pattern support 38A, specifically, the surface of the underlying metal layer 40, and then exposed to a portion where the plating resist layer 42 is not formed. The conductor pattern 16 is formed on the surface of the underlying metal layer 40 by performing electrolytic plating of Cu as a conductor metal (see FIG. 11F). The conductor pattern 16 is embedded in the insulating material 10 in a later process to form an embedded pattern. The conductor pattern 16 includes a wiring portion and a terminal portion 12.

  11F to 15A, 15B, and 15C show cross-sectional structures in a region where a plurality of terminal portions 12 of the conductor pattern 16 are arranged.

  As shown in FIGS. 11D and 11E, in the illustrated example, the plating resist layer 42 is formed on a photosensitive resist layer film 42a laminated on the surface of the base metal layer 40 by a known method such as photolithography. An opening pattern corresponding to the conductor pattern 16 (pattern of a portion where the plating resist layer 42 is not formed) is formed. Next, pattern plating and peeling processes are performed to form a wiring as shown in FIG.

  Next, as shown in FIGS. 12A and 12B, the sheet-like insulating material 10 which is a resin insulating material without a substrate is thermocompression bonded to the surface of the pattern support 38A (the surface of the base metal layer 40), The pattern support 38A is laminated in layers along the surface. Thus, the protruding conductor pattern 16 is embedded in the insulating material 10 on the surface of the pattern support 38A. As a result, an embedded substrate 18 having a configuration in which the conductor pattern 16 is embedded in the insulating material 10 is manufactured. Hereinafter, the conductor pattern 16 embedded in the insulating material 10 is also referred to as an embedded pattern.

  Moreover, the copper foil 44 is thermocompression bonded to the surface (second main surface 10B) of the insulating material 10 opposite to the pattern support 38A.

  The embedded substrate manufacturing process of this embodiment is completed when the embedded substrate 18 is manufactured.

  In the embedded substrate manufacturing process, the sheet-like insulating material 10 is bonded to the surface of the pattern support 38A without any gap by thermocompression to the pattern support 38A.

  The thickness of the insulating material 10 is larger than the protruding dimension of the conductor pattern 16 from the surface of the pattern support 38A. The conductor pattern 16 is embedded in the insulating material 10 on the first main surface 10A side.

12A and 12B, the sheet-like insulating material is thermocompression bonded to the surface of the member on which the conductive pattern is formed in a protruding state, and the conductive pattern is embedded in the insulating material to be integrated and insulated. It can be said that the step of integrating the copper foil on the surface of the material opposite to the member by thermocompression bonding. Hereinafter, this process is also referred to as an insulating material / copper foil pressing process.
(Multilayer substrate assembly process)
When the embedded substrate manufacturing process is completed, the process proceeds to a multilayer substrate assembly process in which a plurality of conductor patterns are laminated on the second main surface 10B side of the insulating material 10 with a layered (sheet-shaped) insulating material interposed between the conductor patterns. To do.

  The multilayer substrate assembly process described here is a build-up process in which a conductor pattern and an insulating material are alternately laminated on the second main surface 10B side of the insulating material 10 to build up.

  In this multilayer substrate assembly process, first, as shown in FIGS. 12C and 12D, the substrate back surface pattern formation for forming the conductor pattern 45 (second conductor pattern 45a) on the second main surface 10B of the insulating material 10 is performed. Perform the process.

  In this substrate back surface pattern forming step, first, as shown in FIG. 12C, the copper foil 44 and the insulating material 10 are penetrated through the copper foil 44 from the side opposite to the pattern support 38A, and the conductor pattern 16 is passed through. An opening hole 43 reaching the terminal portion rear surface 12B of the terminal portion 12 is formed.

  Hereinafter, this process is also referred to as an opening hole forming process.

  Next, as shown in FIG. 12D, a plating resist is formed and electroplated in the opening hole 43 and on the surface of the copper foil 44, followed by electroplating to form a conductor pattern (embedded in the opening hole 43). A via wiring 11 for electrically connecting the pattern 16) and the copper foil 44 is formed. The via wiring 11 is formed by plating metal deposited in the opening hole 43. Then, the conductor pattern 45 and the embedded pattern 16 are electrically connected via the via wiring 11 by plating resist peeling and quick etching (flash etching).

  Hereinafter, this process, that is, the process of forming a conductor pattern electrically connected to the conductor pattern via via wiring on the side opposite to the conductor pattern of the insulating material covering the conductor pattern is formed and connected to the pattern. Also called a process.

  The conductor pattern 45 includes a land portion 451 (terminal portion) for via connection with another conductor pattern 45 provided on the insulating material second main surface 10B side of the embedded substrate 18.

  This is common to the conductor pattern 45 provided on the insulating material second main surface 10B side of the embedded substrate 18.

  In the multilayer substrate assembly process of this embodiment, first, after executing the above-described substrate back surface pattern forming process, the above described insulating material / copper foil pressing process (FIGS. 12A and 12B), opening hole forming process (FIG. 12 (C)), the layer connection process comprising the three processes of the pattern formation / connection process (FIG. 12 (D)) is repeated twice. As a result, as shown in FIG. 13A, a multilayer substrate having a configuration in which a plurality of layers (three layers in the illustrated example) of conductive patterns 45a, 45b, 45c are provided on the insulating material second main surface 10B side of the embedded substrate 18. 52 is assembled.

  In FIG. 13A, the multilayer substrate 52 indicates a portion above the base metal layer 40.

  13A, that is, the state in which the multilayer substrate 52 is assembled, the multilayer substrate assembly process is completed. Further, by assembling the multilayer substrate 52, the multilayer substrate 50 with a support having a configuration in which the pattern support 38A is integrated with the embedded substrate 18 of the multilayer substrate 52 is assembled.

  In the insulating material / copper foil pressure bonding process in the first layer connection process after the substrate back surface pattern forming process is completed, an insulating material 41 separately prepared is thermally bonded to the insulating material second main surface 10B of the embedded substrate 18 for insulation. The conductor pattern 45a protruding from the material second main surface 10B is embedded on one side of the insulating material 41. Further, the copper foil 44 is thermocompression bonded to the side of the insulating material 41 opposite to the embedded substrate 18.

  In the opening hole forming step executed after this insulating material / copper foil crimping step, the opening hole 43 that penetrates the copper foil 44 and reaches the land portion 451 of the formed conductor pattern 45 is formed in the copper foil 44 and the insulating material 41. Form. In the pattern formation / connection step in the lamination connection step, the conductor pattern 45 is formed in a protruding state on the surface of the insulating material 41 opposite to the embedded substrate 18.

  Hereinafter, the conductor pattern 45 provided (laminated) on the insulating material second main surface 10B side with respect to the embedded substrate 18 is also referred to as a laminated conductor pattern.

  In the above-described embodiment, as shown in FIG. 15C, a printed wiring board in which three layers of laminated conductor patterns 45 (45a, 45b, 45c) are provided on the insulating material second main surface 10B side of the embedded substrate 18. In order to obtain 1C, the configuration in which the stacking connection process is repeatedly executed twice after the completion of the substrate back surface pattern forming process is illustrated. However, the number of executions of the laminated connection step can be changed as appropriate according to the number of layers of the laminated conductor pattern of the printed wiring board to be manufactured. That is, in the method for manufacturing a printed wiring board according to the embodiment of the present invention, the multilayer conductor pattern 45 having the number of layers obtained by adding 1 to the number of executions of the multilayer connection step can be provided on the insulating material second main surface 10B side. In the method for manufacturing a printed wiring board according to the embodiment of the present invention, the number of executions of the laminated connection step after the completion of the substrate back surface pattern forming step is not limited to two times, but once or three times or more. It is also possible.

  In this embodiment, the process from the completion of the embedding pattern forming process in FIG. 11F to the process before the multilayer substrate assembling process is the same process as the above-described laminated connection process.

  For this reason, the process from the completion of the embedding pattern forming process of FIG. 11F to the completion of the multilayer substrate assembling process of this embodiment is performed after the embedding pattern forming process of FIG. 11F is completed. It can also be said to be a step of repeatedly executing the connection step three times.

  In this printed wiring board manufacturing method, the same number of laminated conductor patterns as the number of executions of the laminated connection process after the completion of the embedding pattern forming process of FIG. Can be provided on the side. In this manufacturing method, the laminated conductor pattern can be increased by one layer each time the laminated connecting step is executed once after the filling pattern forming step of FIG.

  Therefore, in this manufacturing method, after the embedding pattern forming process is completed, the multilayer connection process is executed as many times as the number of layers of the multilayer conductor pattern provided on the printed wiring board. Accordingly, it is possible to cope with a case where a printed wiring board having two or more laminated conductor patterns on the insulating material second main surface 10B side of the embedded substrate 18 is manufactured.

  The number of executions of the stacking connection process after the completion of the embedding pattern forming process of FIG. 11F may be two or more, and there is no particular limitation.

  Note that the multilayer substrate assembly process is not limited to the build-up process as long as it is a process of stacking two or more laminated conductor patterns on the insulating material second main surface 10B side of the embedded substrate 18.

For the formation of the laminated conductor pattern in the multilayer substrate assembling process, either a method using a subtractive method of processing a copper foil to form a conductor pattern or a method using an additive method can be employed. Further, the multilayer substrate assembly process is not limited to a configuration in which interlayer connection between conductor patterns is performed using a non-penetrating opening hole 43 (see FIG. 12C), for example, a plurality of conductor patterns are penetrated. A structure that realizes electrical connection between conductor patterns by through-hole plating formed on the inner surface of the through-hole can also be employed.
(Processes after the multilayer substrate assembly process)
When the multilayer substrate assembly process is completed, as shown in FIG. 13B, the outer main surface 41A is disposed on the outer main surface 41A side of the outermost interlayer insulating material 41b of the interlayer substrate 50 with support shown in FIG. 13A. And the etching resist 49 which covers the 2nd outermost layer conductor pattern 45c is laminated | stacked. Hereinafter, an etching resist 49 laminated on the support-equipped multilayer substrate 50 is also referred to as a resist multilayer multilayer substrate 51.

  Next, the outer peripheral portion of the resist multilayer multilayer substrate 51 is cut and removed, and further, the portion below the large size copper foil 36 in FIG. 13B is removed to obtain the state shown in FIG.

  As shown in FIG. 14A, the outer peripheral portion of the resist laminated multilayer substrate 51 is cut and removed so that the end surface 51a perpendicular to the insulating material 10 of the embedded substrate 18 is formed on the multilayer substrate 52. The outer peripheral portion of the multilayer substrate 51 is cut and removed over the entire periphery.

  An imaginary line 51b shown in FIG. 13B indicates the formation position of the end surface 51a (cutting position of the resist multilayer multilayer substrate 51) by cutting and removing the outer peripheral portion of the resist multilayer multilayer substrate 51.

  Cutting and removing the outer peripheral portion of the resist multilayer multilayer substrate 51 is performed so that the outer peripheral portion of the small-sized copper foil 34 is cut and removed over the entire periphery, that is, the formation position of the end surface 51a on the outer periphery of the multilayer substrate 52, that is, the resist multilayer multilayer substrate 51. Set the cutting position.

  In FIG. 13B and FIG. 14A, the conductor patterns 16 and 45 of each layer of the multilayer substrate 52 do not exist in the outer peripheral portion where the multilayer substrate 52 is cut and removed, but are cut and removed. It is located in the inner area (main part of the multilayer board). The conductor patterns 16 and 45 of each layer of the multilayer substrate 52 are not cut when the outer peripheral portion of the resist multilayer multilayer substrate 51 is cut and removed.

  13B and 14A, the small-sized copper foil 34 and the large-sized copper foil 36 of the multilayer substrate 50 with the support are not fixed and integrated by, for example, adhesion. For this reason, the multilayer substrate 50 with a support can be easily peeled between the small size copper foil 34 and the large size copper foil 36 when the outer peripheral portion of the resist multilayer multilayer substrate 51 is cut and removed. It becomes a state. Therefore, the small size copper foil 34 and the large size copper foil 36 are separated. FIG. 14A shows the upper side (upper side from the boundary between the small-sized copper foil 34 and the large-sized copper foil 36 in FIG. 13B) thus peeled off. The portion shown in FIG. 14A is used for the subsequent steps.

  14A has a multilayer wiring board 53 corresponding to the multilayer substrate main portion. The multilayer wiring board 53 is configured such that the embedded pattern 16 and the laminated conductor pattern 45c having the longest separation distance from the embedded pattern 16 among the multiple layers of laminated conductor patterns 45 are the outermost conductor patterns. Further, the etching resist 49 provided on the upper side of the multilayer wiring board 53 in FIG. 14A, and the base metal layer 40 and the large size copper foil 36 provided on the lower side are formed on the multilayer wiring board 53 in FIG. It is the thing of the structure which is united.

  After peeling between the small-sized copper foil 34 and the large-sized copper foil 36, the large-sized copper foil 36 below the multilayer wiring board 53 in FIG. (Ni layer here) is removed by etching to the state shown in FIG. Thereafter, the etching resist 49 on the upper side of the multilayer wiring board 53 is removed, and the state shown in FIG.

  Etching removal of the large-sized copper foil 36 is performed by using a first selective etching solution having an etching selectivity that dissolves Cu but hardly dissolves Ni as an etching solution, for example, A process manufactured by Meltex.

  Etching removal of the base metal layer 40 is performed using a second selective etching solution having an etching selectivity that dissolves Ni but hardly dissolves Cu, for example, Melstrip N-950 made by Meltex.

  The etching resist 49 is preferably made of a material that is excellent in alkali resistance and hardly deteriorates even when an etching solution used for etching removal of the large size copper foil 36 and the base metal layer 40 is contacted.

  A multilayer wiring board 53 shown in FIG. 14C has a front surface 12E of the terminal portion 12 embedded in a predetermined pattern in the embedded substrate 18 positioned in the lowermost layer in FIG. The front surface) is exposed to the insulating material first main surface 10A.

  In addition, the terminal portion 46 of the second outermost layer conductor pattern 45c protrudes from the outer main surface 41A of the interlayer outermost insulating material 41b.

  Next, as shown in FIG. 15A, a solder resist layer 48 is formed on the insulating material first main surface 10A side of the embedded substrate 18 of the multilayer wiring board 53 and the outer main surface 41A side of the interlayer outermost insulating material 41b. Then, the outermost layer conductor patterns 16 and 45c of the multilayer wiring board 53 are covered. However, in the portions corresponding to the terminal portions 12 and 46 of the solder resist layer 48, openings 48a that expose the front surfaces 12E and 46E (front surfaces before etching described later) of the terminal portions 12 and 46 are exposed. Secure.

  Then, the entire multilayer wiring board 53 is immersed in an etching solution for dissolving Cu, and the terminal portions 12 and 46 are etched from the front side using the solder resist layer 48 as an etching resist. As shown in FIG. 15B, this causes the terminal portion 12 of the embedded pattern 16 to be recessed from the insulating material first main surface 10A of the embedded substrate 18 (etching step).

  In this embodiment, as shown in FIG. 15B, the terminal portion 46 of the second outermost layer conductor pattern 45c is also etched simultaneously with the terminal portion 12 of the embedded pattern 16.

  The terminal portion 46 of the second outermost layer conductor pattern 45c is etched to reduce its thickness, in other words, the protruding dimension from the outer main surface 41A of the interlayer outermost insulating material 41b.

  In FIG. 15A, among the terminal portions 12 of the embedded pattern 16, the terminal portions 12 on which the covering metal layer 14 is not formed in a later step are covered with a solder resist layer 48.

  Next, as shown in FIG. 15 (C), the surface portions of the terminal portions 12, 46 of the outermost layer conductor patterns 16, 45c are subjected to electroless plating and / or electrolytic plating to cover the terminal portions 12, 46. Metal layers 14 and 47 are formed (covering step).

  By forming the covering metal layers 14 and 47 covering the terminal portions 12 and 46, the manufacturing method of the printed wiring board 1C in this embodiment is completed.

  Here, using the solder resist layer 48 as a plating resist layer, the covering metal layers 14 and 47 covering the front sides of the terminal portions 12 and 46 are formed. The formation of the coating metal layers 14 and 47 (plating layer) is performed, for example, by immersing the entire multilayer wiring board 53 in a plating solution. As a result, the same plated metal and coated metal layers 14 and 47 having a layer structure are formed on the front sides of the terminal portions 12 and 46. At this time, the surface of the covering metal layer 14 covering the terminal portion 12 of the embedded pattern 16 is substantially flush with the first main surface 10A of the insulating material 10 of the embedded substrate 18 or from the first main surface 10A of the insulating material. As described above, the plating thickness is adjusted so as to be located in the recessed portion.

In FIG. 15B, the terminal portion 46 of the second outermost layer conductor pattern 45c uses the solder resist layer 48 formed flush with the front surface 46E in FIG. 15A as an etching resist. Etching.
(Fourth embodiment)
Next, a fourth embodiment according to the present invention will be described mainly with reference to FIGS.

  In addition, about the structure similar to 1st-3rd embodiment, a common code | symbol is attached | subjected and the description is simplified or abbreviate | omitted.

  FIG. 19C shows an example of a printed wiring board 1D of this embodiment, and FIG. 20 shows an example of a state in which electronic components C1 and C2 (for example, semiconductor chips) are mounted on the printed wiring board 1D.

  As shown in FIG. 20, the printed wiring board 1D of this embodiment is soldered to the insulating material 10 of the embedded substrate 18 to the terminal portion 12 (specifically, a heat conducting terminal portion 12F described later) of the embedded pattern 16. The heat conduction metal part 62 for guiding the heat generated by the mounted electronic component C1 to the heat radiation terminal part 61c1 of the metal pattern 61 formed on the second insulating main surface 10B is embedded. ing.

  Hereinafter, the metal pattern 61 on the insulating material second main surface 10B side having the terminal portion 61c1 for heat dissipation is also referred to as a heat dissipation pattern.

  As shown in FIG. 20, the embedded pattern 16 of the embedded substrate 18 has a covered terminal portion 120 in which the front surface 12 </ b> A of the terminal portion 12 is covered with the covered metal layer 14. The structure of the covering metal layer 14 can adopt the same thing as the covering metal layer 14 of the first to third embodiments. Here, Ni / Au plating is adopted.

  Also in the printed wiring board 1D of this embodiment, the configuration of the embedded pattern 16 and the covered terminal portion 120 is the same as that of the printed wiring board exemplified in the first to third embodiments.

  That is, the front surface 12A of the terminal portion 12 of the embedded pattern 16 is located in a place recessed from the first insulating material main surface 10A. Further, the covering metal layer 14 covering the terminal portion 12 is substantially flush with the insulating material first main surface 10A or along the insulating material first main surface 10A at a position recessed from the insulating material first main surface 10A. And has a surface that extends.

  Further, the surface of the wiring portion of the embedded pattern 16 is arranged flush with the insulating material first main surface 10A.

  Note that the front surface 12A of the terminal portion 12 of the embedded pattern 16 is a flat surface extending along the first insulating main surface 10A, similar to the terminal surface 12H described in the first embodiment. Both the surface (see FIG. 1) and the shape having the inclined surface 12C around the front-side main surface 12a can be adopted as with the terminal front surface 12D (see FIG. 2) described in the second embodiment. is there.

  Further, the depth of the depression with respect to the insulating material first main surface 10A of the terminal portion front surface 12A and the covering metal layer surface 14A should be a numerical value range similar to the numerical value range described in the first and second embodiments. Can do.

  Further, as illustrated in FIGS. 10A and 10B, the embedded pattern 16 is formed such that the terminal side end located in the vicinity of the terminal portion 12 of the wiring portion 16a is recessed from the insulating first main surface 10A. A configuration in which the terminal-side end portion is covered with the covering metal layer 14 formed continuously from the terminal portion 12 can also be adopted. The entire surface 14A of the covering metal layer 14 is formed so as to be substantially flush with the insulating material first main surface 10A or at a position recessed from the insulating material first main surface 10A.

  The two electronic components C1 and C2 illustrated in FIG. 20 are electrically connected to the embedded pattern 16 by soldering to the covered terminal portions 120 of the embedded pattern 16 of the embedded substrate 18, respectively.

  Of the two electronic components C1 and C2, the first electronic component C1 in the figure is larger in size than the other (second electronic component C2), and the amount of heat generated by energization is also large. The first electronic component C1 is soldered to the covered terminal portion 120 of the embedded pattern 16 via the solder ball C11 attached to the first electronic component C1, and is electrically connected to the embedded pattern 16. The second electronic component C <b> 2 is electrically connected to the embedded pattern 16 by soldering the solder bump C <b> 21 protruding from the second electronic component C <b> 2 directly in contact with the covered terminal portion 120 of the embedded pattern 16.

  The metal part 62 for heat conduction of the printed wiring board 1D in the illustrated example is along the thickness direction of the layered insulating material 10 (the interval direction between the first and second main surfaces 10A and 10B, hereinafter also referred to as the wiring board thickness direction). It is formed in a solid columnar shape that extends. Further, the heat conducting metal part 62 is formed of a metal material having excellent thermal conductivity such as copper.

  Further, the heat conducting metal part 62 in the illustrated example has a protruding shape that protrudes toward the heat radiation pattern 61 from the terminal part 12 of the covered terminal part 120 of the embedded pattern 16 to which the first electronic component C1 is electrically connected. Is formed. Hereinafter, the covered terminal portion 120 in which the heat conducting metal portion 62 protrudes from the terminal portion 12 is also referred to as a heat conducting covered terminal portion 121.

  In addition, the covered terminal portions 120 other than the thermally conductive covered terminal portions 121 are hereinafter also referred to as electrically conductive covered terminal portions 122. Hereinafter, the terminal portion 12 of the electrically conductive coated terminal portion 122 is also referred to as an electrically conductive terminal portion 12J.

  The second electronic component C <b> 2 is electrically connected to the embedded pattern 16 by soldering the solder bump C <b> 21 to the covered terminal portion 122 for electrical conduction.

  The heat conducting metal part 62 is formed by, for example, forming a thick electrolytic plating on the back surface 12B of the terminal part 12 of the heat conducting coated terminal part 121 (indicated by reference numeral 12F in the figure) using a mask. It is formed integrally with the part 121. A method for producing the heat conducting metal part 62 by electroplating will also be described in a printed wiring board manufacturing method described later.

  The heat radiation pattern 61 of the printed wiring board 1 </ b> D illustrated in FIG. 20 is a conductor pattern formed on the second main surface 10 </ b> B of the insulating material 10. The heat radiation pattern 61 is made of a metal material having excellent thermal conductivity such as copper. The heat radiation pattern 61 includes a terminal portion 61c which is a land portion extending along the second main surface 10B, and a wiring portion (not shown) extending from the terminal portion 61c.

  In addition, the heat radiation pattern 61 in the illustrated example serves as a terminal portion 61c via a connection metal portion 64 (via wiring) formed in a via (opening hole 63) on the second main surface 10B side of the insulating material 10. It has a heat radiating terminal part 61c1 formed integrally with the heat conducting metal part 62, and an electric conducting terminal part 61c2 formed away from the heat radiating terminal part 61c1 and the heat conducting metal part 62.

  The heat radiation pattern 61 in the illustrated example has a configuration in which a pattern plating layer 61b is laminated on a plating seed layer 61a (electroless plating layer) formed on the second main surface 10B of the insulating material 10.

  Further, a coating metal layer 67 is formed on the surface side of the heat radiation pattern 61 opposite to the insulating material 10 side of the terminal portion 61c. As the coating metal layer 67, the thing of the structure similar to the coating metal layer illustrated to 1st-3rd embodiment is employable. Here, Ni / Au plating is adopted as an example.

  Although the plating seed layer 61a and the pattern plating layer 61b of the heat radiation pattern 61 in the illustrated example are copper layers, the metal used to form the plating seed layer 61a and the pattern plating layer 61b may be any metal material having excellent thermal conductivity. Metal materials other than copper may be used.

  Hereinafter, the terminal portion 61c on which the covering metal layer 67 is formed is also referred to as a covering terminal portion 61A. In addition, hereinafter, the coated terminal portion 61A in which the coated metal layer 67 is formed on the surface of the heat radiating terminal portion 61c1 is used as the coated terminal portion in which the coated metal layer 67 is formed on the surface of the coated terminal portion 61A1 for heat radiation and the terminal portion 61c2 for electrical conduction. 61A is also referred to as an electrically conductive coated terminal portion 61A2.

  The portions other than the terminal portion 61 c of the heat radiation pattern 61 are covered with the solder resist layer 54.

  However, as the printed wiring board 1D, the portion near the terminal portion 61c (terminal side end portion) of the wiring portion of the heat radiation pattern 61 is covered with the covering metal layer 67 continuous from the terminal portion 61c. A configuration in which the lead-out wiring portion is exposed without being covered with the solder resist layer 54 can also be adopted.

  The heat dissipating terminal portion 61c1 is formed in the insulating material 10 from the second main surface 10B to the end surface on the second main surface 10B side of the heat conducting metal portion 62. The connecting metal portion 64 is provided in the opening hole 63 formed. And is connected to the heat conducting metal part 62 so as to be able to transfer heat.

  In FIG. 20, the insulating material 10 is formed with a filled via in which the inside of the opening hole 63 is filled with a plating metal. The connecting metal portion 64 (via wiring) of the printed wiring board 1D illustrated in FIG. 20 is formed of a plated metal that fills the inside of the opening hole 63 and forms a filled via.

  The plating metal that forms the connection metal portion 64 illustrated in FIG. 20 is integrated with the plating metal that forms the heat dissipation pattern 61, more specifically, the plating metal that forms the heat dissipation terminal portion 61c1.

  The plating seed layer 61a of the heat radiation pattern 61 is formed not only on the second main surface 10B of the insulating material 10 but also on the entire inner surface of the opening hole 63 including the end surface on the second main surface 10B side of the heat conducting metal portion 62. A part of the plating seed layer 61 a is a plating layer formed along the end surface on the second main surface 10 </ b> B side of the heat conducting metal part 62, and is formed integrally with the heat conducting metal part 62. The pattern plating layer 61b is formed of a plating metal deposited on the surface of the plating seed layer 61a, and is integrated with the plating seed layer 61a. The connecting metal part 64 is constituted by portions of the plating seed layer 61a and the pattern plating layer 61b formed in the opening hole 63.

  Therefore, the heat radiation terminal portion 61 c 1 of the heat radiation pattern 61 is integrated with the heat conducting metal portion 62 via the connection metal portion 64.

  The printed wiring board 1D illustrated in FIG. 20 passes from the heat conducting coated terminal portion 121 of the embedded pattern 16 to the heat radiating coated terminal portion 61A1 of the heat radiating pattern 61 via the heat conducting metal portion 62 and the connecting metal portion 64. A heat dissipation circuit 65 is provided that transfers heat and dissipates heat from the heat dissipation coated terminal portion 61A1. The radiating circuit 65 in the illustrated example is constituted by the heat conducting coated terminal portion 121, the heat conducting metal portion 62, the connecting metal portion 64, and the heat radiating coated terminal portion 61A1 of the embedded pattern 16.

  The printed wiring board 1D guides heat generated from the first electronic component C1 connected to the heat conducting coated terminal portion 121 of the embedded pattern 16 to the back side of the wiring board by the heat radiating circuit 65. Heat can be released from the portion 61A1. Thereby, the temperature rise of the 1st electronic component C1 can be suppressed.

  The heat dissipation circuit 65 employs a configuration in which the covering metal layer 67 is omitted from the heat dissipation covering terminal portion 61A1, that is, the heat dissipation terminal portion 61c1 in which the covering metal layer 67 is not formed in place of the heat dissipation covering terminal portion 61A1. It is good also as the structure which did. The heat radiation circuit 65 employs a configuration in which the coated metal layer 14 is omitted from the heat conducting coated terminal portion 121, that is, a heat conducting terminal portion 12F in which the coated metal layer 14 is not formed in place of the heat conducting coated terminal portion 121. It is good also as the structure which did. The portion of the heat dissipation circuit 65 excluding the covering metal layer 14 covering the heat conducting terminal portion 12F and the covering metal layer 67 covering the heat dissipating terminal portion 61c1 is hereinafter also referred to as a heat dissipating circuit body.

  The covered terminal portion 61A of the printed wiring board 1D illustrated in FIG. 20 has a surface (exposed surface 61d) that is exposed without being covered by the solder resist layer 54 formed on the second main surface 10B. In the heat radiating coated terminal portion 61A1, the exposed surface 61d is a heat radiating surface for radiating heat transmitted from the heat conducting coated terminal portion 121 via the heat conducting metal portion 62. Hereinafter, the exposed surface 61d of the heat dissipation coated terminal portion 61A1 is also referred to as a heat dissipation surface. The heat radiating surface 61 d of the covered terminal portion 61 </ b> A in the illustrated example is the surface of the covered metal layer 67 of the covered terminal portion 61 </ b> A and is formed by the covered metal layer 67.

  The heat radiating coated terminal portion 61A1 radiates heat transferred from the heat conducting coated terminal portion 121 via the heat conducting metal portion 62 from the heat radiating surface 61d to the air in contact with the heat radiating surface 61d.

  The heat radiating coated terminal portion 61A1 has a heat radiating surface 61d that is larger in size than the surface of the coated terminal portion 120 in order to ensure sufficient heat dissipation from the heat radiating surface 61d.

  The printed wiring board 1D is not limited to an air-cooled type that radiates heat from the heat radiating surface 61d to the air in contact with the heat radiating surface 61d. For example, the printed wiring board 1D is for heat radiation such as a heat sink that is brought into contact with the heat radiating surface 61d from the heat radiating surface 61d. It is also possible to dissipate heat to the member.

  The heat conducting metal portion 62 does not project from the terminal portion 12 of the covered terminal portion 120 to which the second electronic component C2 having a smaller calorific value than the first electronic component C1 is electrically connected.

  The printed wiring board 1D illustrated in FIG. 20 includes an embedded pattern 16 having a covered terminal portion 120 on which an electronic component can be mounted, and a heat dissipation circuit 65.

  Conventionally, the fine wiring on which electronic components can be mounted and the heat dissipation circuit are generally manufactured as separate substrates.

  On the other hand, the printed wiring board 1D according to the present invention has a configuration in which both fine wiring (embedded pattern 16) for mounting electronic components and a heat dissipation circuit 65 are formed. For example, space saving can be realized more easily than in the prior art. Also, the printed wiring board 1D can reduce manufacturing effort and labor compared to the case where the fine wiring and the heat dissipation circuit are manufactured as separate substrates, and can easily realize cost reduction.

  FIG. 20 illustrates a configuration in which the heat dissipation coated terminal portion 61A1 of the printed wiring board 1D is used only for heat dissipation. However, since the entire heat dissipation circuit 65 of the printed wiring board 1D is formed of a conductive metal, the printed wiring board 1D may connect the external electronic circuit to the heat dissipation coated terminal portion 61A1 so as to be electrically conductive. Is possible.

  Further, the heat radiation pattern 61 has a circuit pattern portion including an electrically conductive coated terminal portion 61A2 and a wiring portion extending from the electrically conductive coated terminal portion 61A2. The circuit pattern portion is electrically connected to the external electronic circuit by electrically connecting the external electronic circuit to the electrically conductive coated terminal portion 61A2 by soldering or the like.

  The solder resist layer 54 of the printed wiring board 1D illustrated in FIG. 20 is an exposed surface of the covered terminal portion 120 of the embedded pattern 16 that is a metal pattern formed entirely of a conductive metal, and the covered terminal portion 61A of the heat dissipation pattern 61. The insulating material is formed on the first main surface 10A and the second main surface 10B of the embedded substrate 18 so as to avoid 61d.

  The solder resist layer 54 on the first main surface 10 </ b> A of the insulating material covers the entire wiring portion of the embedded pattern 16. In addition, the solder resist layer 54 on the insulating material first main surface 10 </ b> A side has openings (mounting openings 54 a) having a size that exposes the plurality of covered terminal portions 120 of the embedded pattern 16. In the printed wiring board 1D of the illustrated example, the plurality of covered terminal portions 120 of the embedded pattern 16 including the heat conductive covered terminal portions 121 are exposed in the mounting openings 54a of the solder resist layer 54 on the insulating material first main surface 10A side. It has been configured.

  The solder resist layer 54 on the second main surface 10B side has an opening 54b that exposes the surface (exposed surface 61d) of the covered terminal portion 61A.

  Note that the heat radiation pattern is not limited to a configuration having a terminal portion and a wiring portion extending from the terminal portion. For example, there is no wiring portion, and a configuration including only one or a plurality of terminal portions may be employed.

Further, the heat radiation pattern has one or more heat radiation terminal portions. There is no particular limitation on the number of electrical conduction terminal portions of the heat radiation pattern. The heat dissipating pattern may have a configuration in which there is no terminal portion for electrical conduction and only one or a plurality of heat dissipating terminal portions.
(Printed wiring board manufacturing method)
Next, an example of a method for manufacturing the printed wiring board 1D described above will be described as a method for manufacturing a printed wiring board according to an embodiment of the present invention.

  16A to FIG. 17C correspond to an embedded substrate manufacturing process for forming the embedded substrate 18.

  Also, in FIGS. 18A to 19C, illustration of the plating seed layer of the heat radiation pattern 61 is omitted.

  In the present embodiment, first, the embedded substrate 18 is manufactured by executing the steps (embedded substrate manufacturing step) of FIGS.

  Of the steps of FIGS. 16A to 17C, the steps of FIGS. 16A to 16D are simplified from the steps of FIGS. 11A to 11F of the third embodiment. Yes.

  In the printed wiring board manufacturing method described here, first, as shown in FIGS. 16A and 16B, a pattern support 38A is manufactured by the same steps as those in FIGS. 11A to 11C. Next, as shown in FIGS. 16C and 16D, the conductor pattern 12 is formed on the surface of the base metal layer 40 by the same processes as in FIGS. 11D to 11F (see FIG. 16D). .

  16D to 20 show cross-sectional structures in a region where a plurality of terminal portions 12 of the conductor pattern 16 are arranged.

  Next, as shown in FIG. 16E, the heat conducting metal part 62 is formed on the pattern support 38A (in FIG. 16E to FIG. 18B, the upper side is described as the upper side and the lower side as the lower side). A plating resist layer 71 (hereinafter also referred to as a heat conduction portion plating resist layer) for forming (see FIG. 20) is provided.

  Here, a method of forming the heat conductive portion plating resist layer 71 on the pattern support 38A will be described. In order to form the heat conduction portion plating resist layer 71 on the pattern support 38A, first, the plating resist 71a is thermocompression bonded to the upper surface of the pattern support 38A (upper surface of the base metal layer 40), and the upper surface (surface) of the base metal layer 40. And the entire conductor pattern 16 is covered. Next, the pattern support 38A of the terminal portion 12 used as the terminal portion 12F of the coated terminal portion 121 for heat conduction in the conductor pattern 16 (see FIG. 20) is formed on the plating resist 71a from the side opposite to the pattern support 38A. Specifically, an opening hole 71b that exposes the surface opposite to the base metal layer 40) is formed by exposure and development. Thereby, the plating resist layer for the heat conducting part in which only the formation part of the heat conducting metal part 62 with respect to the terminal part 12F of the conductor pattern 16 is exposed through the opening hole 71b in the upper surface (front surface) of the base metal layer 40 and the entire conductor pattern 16. 71 is formed.

  Next, as shown in FIG. 17A, electrolytic plating is performed on the portion exposed by the opening hole 71b of the plating resist layer 71 for the heat conducting portion in the terminal portion 12F of the conductor pattern 16 to form the heat conducting metal portion 62. (Heat conduction metal part projecting step). The heat conducting metal part 62 is formed in a protruding shape protruding from the terminal part 12F by electrolytic plating. The heat conducting metal part 62 is a plating layer formed thick using the heat conducting part plating resist layer 71 as a mask.

  When the formation of the heat conducting metal part 62 is completed, the heat conducting part plating resist layer 71 is removed from the pattern support 38A.

  Next, as shown in FIGS. 17B and 17C, a heat conducting metal portion embedding step is performed in which the heat conducting metal portion 62 is embedded in the insulating material 10 together with the conductor pattern 16.

  Here, as the insulating material 10 of the printed wiring board 1D, a sheet-like prepreg 66b formed by impregnating a base material (sheet-like base material) such as a base fabric with a sheet-like baseless resin insulating material 66a. A case where the laminated composite insulating material 66 is employed will be described.

  As shown in FIGS. 17B and 17C, in this heat conducting metal portion embedding step, first, the baseless resin insulating material 66a is thermocompression bonded to the upper surface of the pattern support 38A (the upper surface of the base metal layer 40). The protruding conductor pattern 16 and the heat conducting metal part 62 are embedded in the upper surface (surface) of the pattern support 38A in the materialless resin insulating material 66a. At this time, a prepreg 66b separate from the substrate-less resin insulation 66a is placed on the surface of the resin insulation 66a without substrate opposite to the pattern support 38A, and a resin insulation without substrate is obtained. 66a is pressed toward the pattern support 38A through the prepreg 66b. Then, thermocompression bonding of the prepreg 66b to the baseless resin insulation 66a is performed together with the thermocompression bonding of the baseless resin insulation 66a to the base metal layer 40.

  The sheet-like base-material-free resin insulation 66a has the same thickness as the protruding dimension of the heat conducting metal part 62 from the pattern support 38A.

  When the thermocompression bonding of the baseless resin insulation 66a to the base metal layer 40 and the thermocompression bonding of the prepreg 66b to the baseless resin insulation 66a are completed, the composite insulation 66 is assembled, and FIG. As shown in FIG. 3, the heat conducting metal part 62 is embedded in the composite insulating material 66. Thereby, the heat conductive metal part embedding process is completed.

  The baseless resin insulating material 66a that does not include a base material such as glass cloth can easily embed the conductor pattern 16 and the heat conducting metal part 62 as compared with the prepreg 66b and adheres to the underlying metal layer 40 by thermocompression bonding. Will also be easier.

  Since the baseless resin insulating material 66a does not include a base material such as a glass cloth, the followability to the conductive pattern 16 and the heat conducting metal portion 62 embedded when thermocompression bonding to the base metal layer 40 is compared with the prepreg 66b. Excellent adhesion. On the other hand, since the resin insulating material 66a without a base material has insufficient rigidity and is brittle, if the insulating material 10 of the printed wiring board 1D is composed only of the resin insulating material 66a without a base material, It is difficult to ensure mechanical properties such as strength.

  The prepreg 66b is integrated with the baseless resin insulating material 66a so as to constitute the insulating material 10 with sufficient mechanical properties as a substrate such as sufficient rigidity. The insulating material 10 in which the prepreg 66b is integrated with the baseless resin insulating material 66a is excellent in followability and adhesion to the conductor pattern 16 and the heat conducting metal portion 62, and can secure sufficient rigidity.

  Note that the insulating material 10 of the printed wiring board 1D has a configuration including only the prepreg 66b, omitting the baseless resin insulating material 66a, depending on the arrangement density of the conductor pattern 16, the size of the heat conducting metal portion 62, and the like. It is also possible to adopt.

  When the heat conducting metal portion embedding process is completed, the fabrication of the embedded substrate 18 is completed. Therefore, the embedded substrate manufacturing process is completed upon completion of the thermally conductive metal portion embedding process.

  Reference numeral 18A in the drawing is added to the embedded substrate 18 in the illustrated example.

  Note that the composite insulating material 66 of the embedded substrate 18A (heat conducting part built-in substrate) can be widely applied as an insulating material provided between conductor patterns in the printed wiring board according to the embodiment of the present invention and the method of manufacturing a printed wiring board. It is. This composite insulating material 66 can also be used as an insulating material provided between the conductor patterns of the first to third embodiments, for example.

  Next, as shown in FIG. 17D, an opening hole 63 reaching the end surface on the insulating material second main surface 10B side of the heat conducting metal portion 62 from the side opposite to the base metal layer 40 of the composite insulating material 66 is formed. The protruding end surface of the heat conducting metal part 62 is exposed at the bottom of the opening hole 63.

  In other words, the end surface on the insulating material second main surface 10B side of the heat conducting metal portion 62 is a projecting end surface of the heat conducting metal portion 62 protruding from the terminal portion 12F of the embedded pattern 16.

  Next, as shown in FIG. 18A, electrolytic plating and / or electroless plating is applied to the second main surface 10B of the insulating material 10 (composite insulating material 66) to be integrated with the heat conducting metal portion 62. The metal pattern forming step for forming the heat radiation pattern 61 (metal pattern) is executed.

  In this metal pattern forming step, first, an electroless plating seed layer 61a (on the inner surface of the opening hole 63 including the second main surface 10B of the insulating material and the protruding end surface of the heat conducting metal portion 62 at the bottom of the opening hole 63). 20). Next, a plating resist (not shown) is provided on the plating seed layer 61a, and the pattern plating layer 61b is formed in a predetermined pattern. Here, the inside of the opening hole 63 is filled with the plating metal of the pattern plating layer 61 b deposited in the opening hole 63 to form the connection metal portion 64.

  Next, the plating resist for pattern plating is removed from the plating seed layer 61a, and the exposed portion of the plating seed layer 61a that is not covered with the pattern plating layer 61b is removed by flash etching. As a result, as shown in FIG. 18A, a patterned plate material 68 having a configuration in which the connecting metal portion 64 and the heat radiation pattern 61 are formed on the embedded substrate 18A is obtained. Further, the formation of the connection metal portion 64 and the heat dissipation pattern 61 integrated with the heat conducting metal portion 62 constitutes a heat dissipation circuit body of the heat dissipation circuit 65.

  In FIG. 18A, the plate member 68 with a pattern indicates a portion above the base metal layer 40. FIG. 18A shows a support-equipped wiring board 50A in which a pattern-equipped board 68 is integrated with a pattern support 38A.

  Next, as shown in FIG. 18B, an etching resist 49 that covers the insulating material second main surface 10B and the heat radiation pattern 61 is laminated on the embedded substrate 18A.

  As a result, a resist laminated wiring board 51A having a configuration in which the etching resist 49 is laminated and integrated on the insulating material second main surface 10 side of the wiring board with support 50A is obtained.

  Next, the outer peripheral portion of the resist laminated wiring board 51A is cut and removed, and further, the portion below the large size copper foil 36 in FIG. 18B is removed to obtain the state shown in FIG.

  As shown in FIG. 18C, the outer peripheral portion of the resist laminated wiring board 51A is cut and removed by forming an end face 51c perpendicular to the insulating material 10 of the embedded substrate 18 on the patterned board 68. The outer peripheral portion of the laminated wiring board 51A is cut and removed over the entire periphery.

  A virtual line 51d shown in FIG. 18B indicates the formation position (cutting position of the resist laminated wiring board 51A) of the end surface 51c of the patterned board 68 by cutting and removing the outer peripheral portion of the resist laminated wiring board 51A.

  Cutting and removing the outer peripheral portion of the resist laminated wiring board 51A is performed so that the outer peripheral portion of the small-size copper foil 34 is cut and removed over the entire circumference, that is, the position where the end surface 51c of the patterned board 68 is formed, that is, the resist laminated wiring board 51A. Set the cutting position.

  18B and 18C, the metal patterns 16 and 61 (conductor pattern) of the patterned plate material 68 do not exist on the outer periphery of the patterned plate material 68 to be cut and removed, but are cut and removed. It is located in the inner area (plate material main part) from the outer periphery. The metal patterns 16 and 61 of the patterned plate material 68 are not cut when the outer peripheral portion of the resist laminated wiring board 51A is cut and removed.

  In FIG. 18B, the small-size copper foil 34 and the large-size copper foil 36 of the wiring board with support 50A are not fixed or integrated by, for example, adhesion. For this reason, 50 A of wiring boards with a support body will be in the state which can be easily peeled between the small sized copper foil 34 and the large sized copper foil 36 by cutting and removing the outer peripheral part. Therefore, the small size copper foil 34 and the large size copper foil 36 are separated. FIG. 18C shows the upper side (upper side of the large size copper foil 36 in FIG. 18B) thus peeled off. The portion shown in FIG. 18C is used for the subsequent steps.

  The part of FIG. 18C is also referred to as a wiring board raw material 68 </ b> A corresponding to the plate main part of the patterned plate material 68. 18C, the etching resist 49 provided on the upper side of the wiring board raw material 68A, and the base metal layer 40 and the large size copper foil 36 provided on the lower side are composed of the wiring board raw material 68A. It is the thing of the structure united with.

  After peeling between the small-sized copper foil 34 and the large-sized copper foil 36, first, the large-sized copper foil 36 under the wiring board raw material 68A in FIG. 40 (here, Ni layer) is removed by etching to obtain the state of FIG.

  Etching removal of the large-sized copper foil 36 is performed by using a first selective etching solution having an etching selectivity that dissolves Cu but hardly dissolves Ni as an etching solution, for example, A process manufactured by Meltex.

  Etching removal of the base metal layer 40 is performed using a second selective etching solution having an etching selectivity that dissolves Ni but hardly dissolves Cu, for example, Melstrip N-950 made by Meltex.

  The etching resist 49 is preferably made of a material that is excellent in alkali resistance and hardly deteriorates even when an etching solution used for etching removal of the large size copper foil 36 and the base metal layer 40 is contacted.

  By removing the base metal layer 40, the wiring board raw material 68 </ b> A has a front surface 12 </ b> E (a front surface before etching described later) exposed flush with the first main surface 10 </ b> A of the insulating material. It will be in a state (refer to Drawing 18 (D)).

  Further, after the removal of the base metal layer 40 is completed, the etching resist 49 is removed. As a result, the terminal portion 61c of the heat radiation pattern 61 protruding from the insulating material second main surface 10B is exposed on the insulating material second main surface 10B.

  Next, as shown in FIG. 19A, a solder resist layer 54 is formed on the insulating material first main surface 10A side and the second main surface 10B of the embedded substrate 18A of the wiring board raw material 68A. However, the surfaces corresponding to the terminal portions 12 and 61c of the solder resist layer 54 are exposed on the front surfaces 12E and 61e (front surfaces before etching described later) of the terminal portions 12 and 61c. The openings 54a and 54b to be secured are secured.

  Then, the entire wiring board raw material 68A is immersed in an etching solution for dissolving Cu, and the terminal portion 12 and the terminal portion 61c are etched from the front side using the solder resist layer 54 as an etching resist. As shown in FIG. 19 (B), the terminal portions 12 of the embedded pattern 16 are thereby recessed from the insulating material first main surface 10A of the embedded substrate 18 (etching step).

  Further, in this embodiment, as shown in FIG. 19B, the terminal portion 61c is also etched simultaneously with the terminal portion 12 of the embedded pattern 16.

  The terminal portion 61c is etched to reduce its thickness, in other words, the projecting dimension from the second insulating main surface 10B.

  In FIG. 19A, the terminal portion 61c has an outer peripheral portion covered with a solder resist layer 54 provided on the insulating material second main surface 10B, and the front surface 61e is exposed at the inner opening 54b. Has been. As shown in FIG. 19B, in the terminal portion 61c, the portion where the surface 61e is exposed at the opening 54b is etched to reduce the thickness of the portion. In FIG. 19B and FIG. 20, reference numeral 61f indicates the front surface of the terminal portion 61c after completion of the etching process.

  Next, as shown in FIGS. 19C and 20, electroless plating and / or electrolytic plating is performed on the front side of the terminal portion 12 and the terminal portion 61c of the embedded pattern 16, and the terminal portion 12 and the terminal portion 61c. Covering metal layers 14 and 67 are formed so as to cover (covering step).

  By forming the covering metal layers 14 and 67 covering the terminal portions 12 and 61c (terminal portion 12 and terminal portion 61c), the manufacturing method of the printed wiring board 1D in this embodiment is completed. Moreover, the heat dissipation circuit 65 is also completed by completing the printed wiring board 1D. Of the manufacturing method of the printed wiring board 1D, the process from the completion of the embedded substrate manufacturing process to the coating process functions as a heat dissipation circuit forming process.

  Here, using the solder resist layer 54 as a plating resist layer, the covering metal layers 14 and 67 that cover the terminal portions 12 and the front surfaces of the terminal portions 61c are formed. Further, the formation of the covering metal layers 14 and 67 (plating layer) is performed, for example, by immersing the entire wiring board raw material 68A in a plating treatment solution. Thus, the same plated metal and covering metal layers 14 and 67 having a layer structure are formed on the front side of the terminal portion 12 and the terminal portion 61c. At this time, the surface of the covering metal layer 14 covering the terminal portion 12 of the embedded pattern 16 is substantially flush with the first main surface 10A of the insulating material 10 of the embedded substrate 18 or from the first main surface 10A of the insulating material. As described above, the plating thickness is adjusted so as to be located in the recessed portion.

  As described above, in FIG. 20 and the like, the heat conducting metal part 62 of the printed wiring board is formed as a solid columnar projecting part projecting from the heat conducting coated terminal part 121 toward the heat radiation pattern 61. Was illustrated.

  However, the heat conducting metal part 62 is not limited to a solid column shape, and is formed in a block-like projecting part projecting from the heat conducting coated terminal part 123 toward the heat radiation pattern 61 as shown in FIG. May be.

  The metal part for heat conduction may be a protrusion protruding from the terminal part for heat conduction of the embedded pattern toward the heat radiation pattern 61, and the specific shape is not particularly limited.

  Next, the printed wiring board 1E illustrated in FIG. 21 will be described.

  This printed wiring board 1E is a modification of the printed wiring board 1D illustrated in FIG. This printed wiring board 1E is different from the printed wiring board 1D illustrated in FIG. 20 in that a block-shaped heat conducting metal portion 62 is employed.

  In FIG. 21, the same reference numerals are given to the same components as those in FIG. 20, and the description thereof will be omitted or simplified.

  In FIG. 21, reference numeral 62 </ b> A is added to the block-shaped heat conducting metal part 62, and reference numeral 65 </ b> A is added to the heat dissipation circuit.

  The embedded pattern 16 of the printed wiring board 1E illustrated in FIG. 21 is different from the embedded pattern 16 illustrated in FIG. 20 in that the conductive terminal portion 12G has a covering recess 12b formed on the front side instead of the heat conductive terminal portion 12F. Is adopted. A reference numeral 16A in FIG.

  The embedded pattern 16A has an electrical conduction terminal portion 12J in the same manner as the embedded pattern 16 illustrated in FIG. 20 in addition to the heat conducting terminal portion 12G.

  Further, the printed wiring board 1E illustrated in FIG. 21 includes an electrically conductive coated terminal portion 122 in which the front surface 12A of the embedded pattern electrically conducting terminal portion 12J is covered with the coated metal layer 14, as shown in FIG. This is common to the printed wiring board 1D exemplified in (1).

  A printed wiring board 1E of FIG. 21 has a heat conductive covering terminal portion 123 having a structure in which a covering metal layer 14 covering the entire bottom surface 12c of the covering concave portion 12b is formed on the heat conductive terminal portion 12G of the embedded pattern 16A.

  In FIG. 21, the heat conducting terminal portion 12G has a flat front surface 12A (indicated by reference numeral 12I in FIG. 21) aligned with the first insulating main surface 10A. The covering recess 12b is formed to be recessed from the front surface 12I of the heat conducting terminal 12G.

  The coated metal layer 14 of the coated terminal portion 122 for electrical conduction has a surface 14A that is flush with the first main surface 10A of the insulating material or at a position that is recessed from the first main surface 10A of the insulating material.

  In FIG. 21, the distance between the coated metal layer 14 of the thermally conductive coated terminal portion 123 and the electrically conductive terminal portion 12J is ensured to be larger than the distance between the electrically conductive terminal portions 12J. Further, a solder resist layer 54 on the front side of the wiring board exists between the covering recess 12b of the heat conducting terminal portion 12G and the electrical conducting terminal portion 12J, and the opening 54c (exposing the heat conducting covering terminal portion 123 is exposed). A first mounting opening) and an opening 54d (second mounting opening) for exposing a plurality of terminal terminals 12J for electrical continuity are formed. For this reason, for example, when the covering metal layer 14 is formed on the inner surface of the covering recess 12b and the electric conduction terminal portion 12J, the portion (between the first and second mounting openings 54c and 54d) of the solder resist layer 54 ( By the partition wall, it is possible to prevent the occurrence of the bridging phenomenon of the plated metal. Therefore, the covering metal layer 14 of the covering terminal portion 123 for heat conduction may protrude with a protruding dimension exceeding 2 μm from the first insulating main surface 10A, and its surface 14A is flush with the first insulating main surface 10A. Or it does not need to be a position depressed from 10 A of insulating material 1st main surfaces.

  Further, the bottom surface 12c of the covering recessed portion 12b of the heat conducting terminal portion 12G is not necessarily required to have the same recess depth from the insulating material first main surface 10A as the electric conducting terminal portion 12J as shown in FIG. The depth may be different from the recess depth of the electrical conduction terminal portion 12J.

  Specifically, the heat conducting metal portion 62A illustrated in FIG. 21 extends along the back surface 12B to the heat conducting terminal portion 12G formed in a pad shape along the first insulating main surface 10A. It is formed in a plate shape (layer shape). The heat conducting metal portion 62A has a maximum dimension in the direction along the heat conducting terminal portion 12G that is larger than the protruding size from the terminal portion back surface 12B.

  The heat conducting metal portion 62A is integrated with and electrically connected to the heat conducting terminal portion 12G.

  A connecting metal portion 64 formed continuously from the heat radiation pattern 61 is integrated with the heat conducting metal portion 62A. The portion of the plating seed layer 61a that forms part of the heat radiation pattern 61 and the connection metal portion 64 is located at the bottom of the opening hole 63 is a plating layer formed on the end surface of the heat conduction metal portion 62A on the back side of the wiring board. . The heat dissipating terminal portion 61c1 constituting the heat dissipating coated terminal portion 61A1 on the back side of the wiring board is integrated with and electrically connected to the heat conducting metal portion 62A via the connecting metal portion 64.

  The heat radiation circuit 65A of the printed wiring board 1E illustrated in FIG. 21 includes a heat conducting cover terminal portion 123, a heat conducting metal portion 62A, a connection metal portion 64, and a heat radiation covering terminal portion 61A1. The heat dissipation circuit 65A has a heat dissipation circuit main body in which the cover metal layer 14 of the heat conductive cover terminal portion 123 and the cover metal layer 67 of the heat dissipation cover terminal portion 61A1 are omitted from the heat dissipation circuit 65A. This heat dissipation circuit body can also function as a heat dissipation circuit.

  The heat dissipation circuit 65A is configured to transfer the heat transmitted from the first electronic component C1 soldered to the covering metal layer 14 of the covering terminal portion 123 for heat conduction to the covering metal layer 14 via the solder balls C11. The heat radiation pattern 61 is led to the heat radiation coated terminal portion 61A1 through the portion 62 and is radiated from the heat radiation coated terminal portion 61A1.

  The heat conducting terminal portion 12G is formed so that the dimension and area in the direction perpendicular to the wiring board thickness direction (wiring board surface direction) are significantly larger than those of the electrical conduction terminal portion 12J.

  The covering concave portion 12b and the covering metal layer 14 (hereinafter also referred to as a mounting portion covering metal layer 14B) of the heat conducting terminal portion 12G are connected to the connecting metal portion 64, more specifically, the connecting metal portion in the wiring board surface direction. 64 and the heat conducting metal part 62A are formed at positions separated from the boundary part (interface). The central portion of the heat dissipation surface 61d of the heat dissipation coated terminal portion 61A1 is separated in the wiring board surface direction from the central portion of the mounting portion coating metal layer 14B of the heat conductive coated terminal portion 123 to which the first electronic component C1 is soldered. In the position. The heat dissipating coated terminal portion 61A1 is formed by shifting the position in the wiring board surface direction with respect to the mounting portion covering metal layer 14B of the heat conducting coated terminal portion 123.

  This printed wiring board 1E wires the heat transmitted from the first electronic component C1 to the mounting portion covering metal layer 14B of the heat conducting coated terminal portion 123 to the mounting portion covering metal layer 14B of the heat conducting covering terminal portion 123. Heat can be radiated from the heat radiating coated terminal portion 61A1 formed by shifting the position in the plate surface direction.

  Note that the heat conductive coated terminal portion 121 (more specifically, the coated metal layer 14) of the printed wiring board 1D illustrated in FIG. 20 is connected via the heat conductive metal portion 62 in the wiring board thickness direction. It is located on the other side. This printed wiring board 1D has a configuration in which the heat-dissipating coated terminal portion 61A1 is formed at a position that substantially coincides with the coated metal layer 14 of the heat conducting coated terminal portion 121 in the wiring board surface direction.

  In FIG. 21, the electrically conductive coated terminal portion 122 provided in the embedded pattern 16 </ b> A is located on the side opposite to the connecting metal portion 64 via the heat conducting coated terminal portion 123 in the wiring board surface direction. Accordingly, in the printed wiring board 1E illustrated in FIG. 21, the heat transmitted from the first electronic component C1 to the covering metal layer 14 of the covering terminal portion for heat conduction 123 in the direction of the wiring board surface, Thus, it is possible to conduct heat to the side opposite to the second electronic component C2 that is soldered and mounted to the electrically conductive coated terminal portion 122 of the embedded pattern 16A.

  In addition, this invention is not limited to the above-mentioned embodiment, A design change is possible suitably.

  In the first, second, and fourth embodiments described above, the embedded pattern 16 is formed on the first main surface 10A side of the insulating material 10, and the conductor is formed so as to protrude from the second main surface 10B on the second main surface 10B side. The double-sided printed wiring board of the structure which has the pattern 17 (2nd conductor pattern) is illustrated.

  The composite insulating material described in the fourth embodiment can also be used as the insulating material in the first to third embodiments.

  In the third embodiment, a configuration in which one or more layers among the inter-pattern insulating materials located between the conductor patterns is a composite insulating material can be employed.

  The first to fourth embodiments can employ a configuration having an insulating material made of only a resin insulating material without a base material or an insulating material made only of a prepreg as an inter-pattern insulating material of one or more layers.

  In addition, as an embodiment according to the present invention, as shown in FIGS. 22 and 23, after completion of the process of FIG. 18A of the fourth embodiment, refer to FIGS. 16E to 18A. The process described below (hereinafter also referred to as a metal pattern lamination process) is executed one or more times to add the heat conducting metal part 62 and the metal pattern 61 (see FIG. 23 as an example), and then the fourth embodiment. 18B to 19C can be used to manufacture a printed wiring board (see FIG. 24 as an example) (printed wiring board manufacturing method).

  The metal pattern laminating step includes a heat conducting metal portion projecting step, a heat conducting metal portion embedding step of embedding the heat conducting metal portion 62 in the insulating material together with the metal pattern after the heat conducting metal portion projecting step, and the heat conducting metal portion. A metal pattern forming step of performing electroless plating and electrolytic plating on the insulating material in which the heat conducting metal portion is embedded in the embedding step to form a metal pattern integrated with the heat conducting metal portion.

  In the heat conducting metal part projecting step, for example, as shown in FIGS. 22 and 23, the back surface of the terminal part formed integrally with the heat conducting metal part via the connecting metal part (the side opposite to the heat conducting metal part) A metal part for heat conduction is projected (newly installed) separately.

  22 and 23, the heat conducting metal parts on both sides (both sides in the thickness direction of the terminal part) through the terminal part, that is, the heat conducting metal parts integrated with each other through the terminal part are shown on the surface of the terminal part. Although the position in the direction is formed so as to coincide with each other, the formation position of the heat conducting metal part is not limited to this. The heat conducting metal parts on both sides via the terminal part may be displaced from each other in the formation position in the surface direction of the terminal part.

  In this printed wiring board manufacturing method, after completing the steps from FIG. 16A to FIG. 18A of the fourth embodiment, the metal pattern lamination step is executed one or more times to assemble the heat dissipation circuit 65B. A plate material with a pattern (for example, a plate material 681 with a multilayer pattern in FIG. 23) is obtained. And about the wiring board with a support body (for example, wiring board 50B with a support body of FIG. 23) of the structure by which the board | substrate material with a multilayer pattern was integrated with the pattern support body 38A, the process after FIG. 18 (B) of 4th Embodiment. To obtain a printed wiring board.

  After obtaining the wiring board with the support, an etching resist covering the outermost metal pattern on the opposite side of the embedded pattern 16 is laminated and integrated on the multilayer pattern board, and the wiring board with the supporting body and the etching resist are formed. The outer peripheral portion is cut and removed, and a printed wiring board is formed in the same process as in the manufacturing method of the fourth embodiment.

  A printed wiring board 1F illustrated in FIG. 24 is a printed wiring board that can be manufactured by the manufacturing method described with reference to FIGS. In this printed wiring board 1F, one metal pattern is added on the back side of the printed wiring board 1D illustrated in FIG. 20, and two metal patterns 61 are formed on the back side of the embedded substrate 18, for a total of three metal patterns. 16, 61, 61.

  24, reference numerals 611 and 612 are added to a plurality (two layers in the illustrated example) of metal patterns 61 (back surface side metal patterns) on the back side of the embedded substrate 18 in order from the back side of the wiring board (upper side in FIG. 24). The outermost layer rear surface side metal pattern 611 is a heat radiation pattern having a heat radiation terminal portion 62c1 in which a connection metal portion 64 integrated with the heat conducting metal portion 62 is projected out of the terminal portion 61c. ing.

  The wiring portion 61c of the inner layer metal pattern 612 located between the pair of outermost metal patterns 16, 611 is not limited to the heat radiation terminal portion 61c1 having a large area to ensure heat radiation efficiency. In order to suppress heat dissipation in the interior as much as possible, a terminal portion having a small area may be used.

  Further, as an embodiment according to the present invention, it is possible to adopt a configuration in which an outer extension portion extending to the outside of the wiring board is secured in the metal pattern of the inner layer, and the outer extension portion functions as a heat dissipation land portion. is there.

  As the printed wiring board and the printed wiring board manufacturing method according to the present invention, the manufacturing method described with reference to FIGS. 22 and 23, and the printed wiring board illustrated in FIG. It is also possible to adopt a configuration that is changed to the heat conducting coated terminal portion 123 illustrated in FIG.

  In addition, as a method for manufacturing a printed wiring board and a printed wiring board using the heat conducting coated terminal portion 123, the heat conducting metal portion 62 is a heat conducting metal portion such as a plate (layer) along the back surface of the heat conducting terminal portion 12G. A configuration that employs (for example, the heat conducting metal portion 65A of FIG. 21) is also employed.

  In addition to the heat dissipation circuit, the printed wiring board having the heat dissipation circuit can also employ a configuration having an outermost layer conduction circuit that ensures electrical connection between the outermost conductor patterns.

  For example, as shown in FIG. 25, in the case of a printed wiring board 1G (double-sided board) having only two layers of conductor patterns, a solid column-shaped metal for electrical conduction on the back surface 12B of the electrical conduction terminal portion 12J of the embedded pattern 16 The terminal portion 61c3 that is integral with the via wiring 61g reaching the electrical conduction metal portion 25 is formed on the conductor pattern 61 on the back side of the wiring board, and the outermost conductor is formed via the electrical conduction metal portion 25. A configuration in which electrical connection between the patterns 16 and 61 is ensured can be employed. The printed wiring board 1G of FIG. 25 has a configuration in which a metal part 25 for electrical conduction and a terminal part 61c3 (terminal part for electrical conduction) integrated with the via wiring 61g are added to the printed wiring board 1E illustrated in FIG. It has become.

  In the printed wiring board 1G, the metal portion 25 for electrical conduction and the via wiring 61g constitute an outermost interlayer conduction circuit that ensures electrical connection between the outermost conductor patterns 16 and 61. In this printed wiring board 1G, the heat conducting metal part 62 and the via wiring 64 that constitute the heat dissipation circuit also constitute the outermost interlayer conduction circuit.

  Further, the printed wiring board 1G has a covered terminal portion 61A3 for electrical conduction having a configuration in which a covered metal layer 67 that covers the terminal portion 61c3 is formed on the terminal portion 61c3. Since the configuration of the electrically conductive coated terminal portion 61A3 in the illustrated example is the same as that of the heat radiating coated terminal portion 61A1, description thereof is omitted here.

  In the case of a printed wiring board having a multilayer structure having three or more conductor patterns, a conductive metal part projecting on the back surface of the terminal part of the conductor pattern on the front side of the wiring board, and the back side of the wiring board Are electrically connected via via wiring that is formed integrally with the terminal portion of the conductive pattern and reaches the metal portion for electrical conduction, and via the metal portion for electrical conduction between each layer and via wiring, and the conductor pattern of the inner layer A configuration that ensures electrical connection between the outermost conductor patterns can be employed.

  In this case, the metal part for electrical conduction between each layer and via wiring, and the conductor pattern of the inner layer constitute the outermost interlayer conduction circuit.

  The printed wiring boards 1A and 1B according to the first and second embodiments constitute the via wiring 11, and the printed wiring board 1C according to the third embodiment constitutes the inner layer conductor patterns 45 and the via wiring 11 constitute the outermost interlayer conduction circuit. In the printed wiring boards 1D and 1E having the heat dissipation circuit, the heat conducting metal portion 62 and the via wiring 64 are provided, and in the printed wiring board 1F, the inner conductive patterns 45, the heat conducting metal portion 62 and the via wiring 64 are provided in the outermost layer. A conduction circuit is configured.

  In addition, as a printed wiring board adopting the heat-conducting coated terminal portion 123 and the heat-conducting metal portion 65A, as shown in FIG. 26, heat radiation that exposes a part of the front side of the heat-conducting coated terminal portion on the front side of the wiring board. A configuration in which the exposed portion 125 is secured can also be employed. However, in this case, a configuration having an outermost layer conduction circuit for electrically connecting the outermost conductor patterns without using the heat conducting metal part is employed.

  In the method of manufacturing a printed wiring board, the electrical conduction metal part can be formed on the back surface side of the terminal part of the embedded pattern by electrolytic plating simultaneously with the heat conduction metal part in the step of forming the heat conduction metal part. . In addition, the via wiring for securing the electrical connection between the metal part for electrical continuity and the conductor pattern, and the terminal part integral with the via wiring are the metal part for heat conduction in the manufacturing method of the printed wiring boards 1D to 1F described above. Can be formed at the same time in the step of forming the via wiring 64 electrically connected to and the terminal portion 61c integral with the via wiring 64. Forming a covering metal layer covering the surface of the terminal portion for electrical conduction can be simultaneously performed in the step of forming the covering metal layer on the heat radiation terminal portion 61c on the back side of the wiring board.

  Therefore, the printed wiring board including the metal part for electrical conduction and the terminal part for electrical conduction is manufactured in the same process without greatly changing the process of the method for manufacturing the printed wiring boards 1D to 1F described above. Is possible.

  This is common to both the double-sided board having only two conductor patterns and the printed wiring board having a multilayer structure having three or more conductor patterns.

  The printed wiring board 1H illustrated in FIG. 26 is the same as the printed wiring board 1G illustrated in FIG. 25 except that the heat-dissipating coated terminal portion 61A1 is omitted, and a part of the front side of the heat conducting coated terminal portion is the solder resist layer 54, etc. The heat radiation exposure part 125 exposed without being covered with is secured.

  The heat conductive coated terminal portion 124 of the printed wiring board 1H of the illustrated example is from the mounting portion covering metal layer 14B on the front surface 12I of the heat conductive terminal portion 12G of the heat conductive coated terminal portion 123 of the printed wiring board 1G of FIG. A heat dissipation coating metal layer 14 (hereinafter, also referred to as a heat dissipation portion coating metal layer 14C) is formed at spaced positions. The heat dissipating portion covering metal layer 14C is provided so as to cover the bottom surface 12e of the covering recess 12d formed at a position separated from the mounting portion covering metal layer 14B on the front surface 12I of the heat conducting terminal portion 12G.

  The printed wiring board 1 </ b> H has a configuration in which the surface 14 </ b> A of the heat radiation portion covering metal layer 14 </ b> C is exposed as the heat radiation exposure portion 125.

  The printed wiring board 1H is configured to dissipate heat transferred from the electronic component C1 to the mounting portion covering metal layer 14B of the heat conducting covering terminal portion 124 via the heat conducting terminal portion 12G and the heat conducting metal portion 62A. The heat is guided to 14C and radiated from the surface 14A (heat radiation exposed portion 125) of the heat radiation portion coating metal layer 14C.

  In addition to the first and second mounting openings 54c and 54d, the solder resist layer 54 on the front side of the wiring board is also formed with an opening 54e (heat radiation opening) that exposes the surface 14A of the heat radiation portion coating metal layer 14C. Has been. The heat conducting coated terminal portion 124 can efficiently dissipate the heat transmitted from the electronic component C1 from the heat radiation exposing portion 125 exposed to the heat radiation opening 54e.

  However, the heat radiating exposed portion 125 is not limited to the heat radiating portion-covered metal layer 14 </ b> C as long as it exposes portions other than the mounting portion covering metal layer 14 </ b> B in the heat conducting coated terminal portion 124. As the heat radiation exposing portion 125, for example, a configuration in which a portion where the coating metal layer 14 is not formed on the front surface 12I of the heat conducting terminal portion 12G is exposed without being covered with a solder resist or the like can be adopted.

  In this regard, as the printed wiring board according to the embodiment of the present invention, a part of the front surface 12I is soldered to the heat conducting terminal portion 12G of the heat conducting coated terminal portion 123 in the printed wiring board 1G of FIG. It is also possible to adopt a configuration in which a heat radiating exposed portion that is exposed without being covered with a resist or the like is secured.

  The configuration in which the heat-dissipating exposed terminal portion is secured to the heat-dissipating terminal portion is not limited to a double-sided printed wiring board having only two layers of conductor patterns. For example, a multilayer structure such as the printed wiring board 1F illustrated in FIG. It can also be applied to other printed wiring boards.

  Hereinafter, experimental examples of the present invention will be described together with comparative experimental examples. Here, in the following experimental examples of the present invention and comparative experimental examples, the effect of the height of the front surface of the conductor pattern terminal portion from the first main surface of the insulating material on the occurrence of abnormal precipitation phenomenon and bridge phenomenon is shown. In any of the experimental examples, the experiment was performed in a state where no opening hole was formed on the second main surface side of the insulating material. In addition, each following experiment example is for confirming the effect of this invention, Comprising: Of course, the conditions described in the experiment example do not limit the technical scope of this invention.

Experimental example 1 of the present invention
In accordance with FIG. 3A, an embedded substrate 18 is prepared in which a conductor pattern 16 (including the terminal portion 12) made of Cu is embedded in a predetermined pattern on the first main surface 10A of the insulating material 10 made of prepreg. did. Here, the cross-sectional width (dimension in the left-right direction in FIG. 3A) of the terminal portion 12 of the conductor pattern 16 was 20 μm, and the interval between adjacent terminal portions (space between patterns) was 14 μm. The front surface of the terminal portion 12 of the conductor pattern 16 of the embedded substrate 18 is etched to a depth of 1 μm with an etching solution made of sodium persulfate and sulfuric acid, and the terminal is connected from the first main surface 10A of the insulating material 10 to the terminal. The front surface of the part 12 was in a depressed state. Next, after degreasing the terminal portion 12 of the conductor pattern 16, a soft etching process with an etching amount of 0.3 μm, a de-smut process, a pre-dip process, and a Pd catalyst application process for electroless plating After performing the post-dip treatment in that order, about 2 μm electroless Ni plating, 0.3 μm electroless Pd plating, and 0.1 μm substitution electroless Au plating are performed, and the surface of the Au plating layer is the first main insulating material. A printed wiring board protruding 1.0 μm from the surface 10A was obtained.

  FIG. 27A shows the result of observing the state of the cross section near the terminal portion of the conductor pattern of the printed wiring board obtained by Experimental Example 1 of the present invention with an optical microscope, and also shows the plane and cross section of the printed wiring board. The result observed with the scanning electron microscope is shown in FIG. In FIGS. 27A to 27E and FIGS. 28 to 32B, symbol A indicates a terminal portion made of Cu, and symbol B indicates a Ni plating layer.

Experimental example 2 of the present invention:
In accordance with FIG. 3A, an embedded substrate 18 is prepared in which a conductor pattern 16 (including the terminal portion 12) made of Cu is embedded in a predetermined pattern on the first main surface 10A of the insulating material 10 made of prepreg. did. Here, the cross-sectional width (dimension in the left-right direction in FIG. 3A) of the terminal portion 12 of the conductor pattern 16 was 20 μm, and the interval between adjacent terminal portions 12 (space between patterns) was 15 μm. The front surface of the terminal portion 12 of the conductor pattern 16 of the embedded substrate 18 is etched to a depth of 1 μm with an etching solution made of sodium persulfate and sulfuric acid, and the terminal is connected from the first main surface 10A of the insulating material 10 to the terminal. The front surface of the portion 12 was depressed, and the etching was continued to make the terminal portion 12 convex. Here, in the etching described above, the front main surface 12a of the front surface 12D of the convex terminal portion 12 (see FIG. 5C for reference) is 4.5 μm from the position of the insulating first main surface 10A. Until it was located at the depth of. In this state, the end of the inclined surface 12C of the convex terminal portion 12 on the back side of the terminal portion was located at a depth of 7.5 μm from the position of the first main surface of the insulating material. Next, after the degreasing treatment is performed on the terminal portion 12, a soft etching treatment with an etching amount of 0.3 μm, a desmutting treatment, a pre-dip treatment, a Pd catalyst application treatment for electroless plating, and a post-dip treatment are performed. Were performed in that order, followed by electroless Ni plating (FIG. 6A). This electroless Ni plating was performed until the top of the surface along the front surface of the convex terminal portion reached a position having a depth of 0.3 μm from the position of the first main surface of the insulating material. It was confirmed that the Ni plating layer was flat as a whole. Further, 0.2 μm electroless Pd plating and 0.1 μm substitution electroless Au plating are performed on the Ni plating layer, and the surface of the Au plating layer is substantially the same position as the first main surface 10A of the insulating material. A printed wiring board was obtained (FIG. 6B, FIG. 2).

  FIG. 27B shows the result of observing the state of the cross section near the terminal portion of the printed wiring board obtained by Experimental Example 2 of the present invention with an optical microscope, and scanning the plane and cross section of the printed wiring board. The result observed with a scanning electron microscope is shown in FIG.

Experimental example 3 of the present invention:
In accordance with FIG. 3A, an embedded substrate 18 is prepared in which a conductor pattern 16 (including the terminal portion 12) made of Cu is embedded in a predetermined pattern on the first main surface 10A of the insulating material 10 made of prepreg. did. Here, the cross-sectional width of the terminal portion 12 (the dimension in the left-right direction in FIG. 3A) was 13 μm, and the interval between adjacent terminal portions (space between patterns) was 22 μm. The front surface of the terminal portion 12 of the conductor pattern 16 of the embedded substrate 18 is etched to a depth of 1 μm with an etching solution composed of sulfuric acid and hydrogen peroxide solution, and then from the first main surface 10A of the insulating material 10. The front surface of the terminal portion 12 was depressed, and etching was continued to make the terminal portion 12 convex. In this etching, the front main surface 12a of the front surface 12D of the convex terminal portion (see FIG. 5C for reference) is 2.5 μm from the position of the first main surface 10A of the insulating material. This was done until the position reached depth. In this state, the lower end of the convex terminal portion was located at a depth of 5.3 μm from the position of the first main surface of the insulating material. Next, the terminal portion 12 was subjected to a degreasing treatment, and then subjected to a soft etching treatment with an etching amount of 0.3 μm and electrolytic Ni plating (FIG. 6A). This electrolytic Ni plating was performed until the top of the surface along the front surface of the convex terminal portion reached a position of 1.4 μm in height from the position of the first main surface 10A of the insulating material. It was confirmed that the Ni plating layer was flat as a whole. Furthermore, 0.1 μm electrolytic Au plating was performed on the Ni plating layer to obtain a printed wiring board in which the Au plating layer surface protrudes 1.5 μm from the first insulating main surface 10A (FIG. 6B). 2).

  FIG. 27C shows the result of observing the state of the cross section near the terminal portion of the printed wiring board obtained in Experimental Example 3 of the present invention with an optical microscope. The results observed with a microscope are shown in FIG.

Comparative experiment example 1:
As shown in FIG. 34A, a conductor pattern (including the terminal portion 112) made of Cu is embedded in a predetermined pattern on the upper surface 110A (hereinafter also referred to as the first main surface) of the insulating material 110 made of prepreg. An embedded substrate was prepared. Here, the cross-sectional width (dimension in the left-right direction in FIG. 34A) of the terminal portion 112 of the conductor pattern was 20 μm, and the interval between adjacent terminal portions (space between patterns) was 15 μm. The surface of the terminal portion 112 of such an embedded substrate is degreased and then subjected to a soft etching process with an etching amount of 0.3 μm, a desmutting process, a pre-dip process, and a Pd catalyst application process for electroless plating. After performing the post-dip treatment in that order, about 3.5 μm electroless Ni plating, 0.2 μm electroless Pd plating, 0.1 μm substitution electroless Au plating were performed, and Ni / Pd / Au coated metal A printed wiring board was obtained in which the surface of the layer (electroless plating layer) 114 protruded 3.5 μm from the first main surface 110A of the insulating material 10 (FIG. 34B).

FIG. 27D shows the result of observing the state of the cross section near the terminal portion of the printed wiring board obtained in Comparative Experimental Example 1 with an optical microscope, and the scanning electron microscope shows the plane and cross section of the printed wiring board. FIG. 31 shows the observation result.
Comparative Experiment Example 2:
As shown in FIG. 33A, a substrate in which a conductor pattern (including the terminal portion 112) made of Cu in a predetermined pattern is formed on the insulating material 110 made of prepreg so as to protrude is prepared by a semi-additive method. Here, the cross-sectional width (the dimension in the left-right direction in FIG. 33A) of the terminal portion 112 was 21 μm, and the interval between adjacent terminal portions (space between patterns) was 30 μm. After the surface of the terminal portion 112 on the insulating material 110 is degreased, a soft etching treatment with an etching amount of 0.3 μm, a desmutting treatment, a pre-dip treatment, and a Pd catalyst for electroless plating are used. After the application process and post-dip process are performed in this order, the terminal protruding on the insulating material 110 is subjected to approximately 2 μm electroless Ni plating, 0.2 μm electroless Pd plating, and 0.1 μm substitution electroless Au plating. A printed wiring board in which the portion 112 was covered with a Ni / Pd / Au covering metal layer (electroless plating layer) 114 was obtained (FIG. 33B).

  FIG. 27E shows the result of observing the state of the cross section near the terminal portion of the printed wiring board obtained in Comparative Experimental Example 2 with an optical microscope, and the scanning electron microscope shows the plane and cross section of the printed wiring board. The result of observation is shown in FIG.

  The following facts were confirmed from the observation results (FIGS. 27A to 27E and FIGS. 28 to 32) of the printed wiring boards according to the experimental examples of the present invention and the comparative experimental examples.

  That is, in the case of Experimental Examples 1 to 3 of the present invention, in any case, abnormal deposition of the plated metal did not occur on the insulating material surface (the first main surface 10A) between the adjacent terminal portions, and accompanying it. There was no bridging phenomenon, and it was confirmed that the adjacent terminal portions were completely separated.

  On the other hand, in the comparative experimental example 1 in which the embedded substrate was applied but the terminal portion was covered with the plated metal without being recessed by etching, as a result of observation with a scanning electron microscope, insulation between adjacent terminal portions was observed. It was confirmed that abnormal plating of the plated metal occurred on the surface of the material and a bridge phenomenon occurred.

  Furthermore, in the case of the comparative experimental example 2 formed with the terminal portion protruding on the insulating material, the plating metal covering not only the upper surface of the terminal portion but also the side surface is continuously formed between the adjacent terminal portions. It was confirmed that the bridging phenomenon occurred.

  Here, Comparative Experimental Example 2 is an example in which a conventional general semi-additive method is applied. In this case, the space S between adjacent terminal portions is 30 μm, and the adjacent terminals due to the bridging phenomenon of the plated metal. The space between the parts was continuous.

  In contrast, in Experimental Examples 1 to 3 of the present invention, the space S between adjacent terminal portions is narrowed to 25 μm or less, and particularly in Experimental Examples 1 and 2 of the present invention, the space S is significantly narrowed to 15 μm or less. Even in the case, no abnormal precipitation or bridging of the plated metal was observed between the adjacent terminal portions. Therefore, according to the present invention, it is apparent that the space between the terminal portions can be reduced to 25 μm or less, and further to 15 μm or less.

  In Comparative Experimental Example 1, the space between the terminal portions is 15 μm. However, because of abnormal precipitation, it is understood that it is practically difficult to narrow down to 25 μm or less, and in particular, narrowing to 15 μm or less Clearly it is impossible.

  1A, 1B, 1C, 1D, 1E, 1F, 1G, 1H ... printed wiring board, 10 ... insulating material, 10A ... first main surface, 10B ... second main surface, 12 ... terminal portion, 12A ... front surface , 13A, 13B ... opening hole, 14 ... covered metal layer, 15 ... covered metal layer, 16, 16A ... conductor pattern, embedded pattern, metal pattern, 17 ... conductor pattern (of the second main surface), 18, 18A ... embedded Substrate, 38A ... pattern support, 41, 41a, 41b ... insulating material (interlayer insulating material), 41A ... outer main surface (of interlayer outermost insulating material), 45, 45a, 45b, 45c ... conductor pattern, 46 ... ( Terminal portion (outermost layer conductor pattern), 61 ... metal pattern, heat radiation pattern, 61A ... covered terminal portion (heat radiation coated terminal portion), 62, 62A ... heat conducting metal portion, 63 ... opening hole, 64 ... connecting metal Part, 65, 65A 65B ... radiator circuit, 66 ... composite insulation material, 67 ... coating metal layer, 120, 121, 122, 123 ... covering the terminal portion.

Claims (18)

A printed wiring board in which two or more layers of conductor patterns are laminated with an insulating material interposed between the conductor patterns,
At least one of the outermost conductor patterns on both sides of the wiring board is an embedded pattern embedded in an insulating material on the inner layer side,
In the embedded pattern, the surface of the wiring portion is arranged flush with the main surface of the insulating material in which the embedded pattern is embedded, and the terminal portion embedded in a position recessed from the main surface of the insulating material is provided. The terminal portion has a front surface made of a plating layer made of a conductive metal and covered with a coating metal layer, and the coating metal layer is substantially flush with the main surface of the insulating material. A printed wiring board having a surface along the main surface of the insulating material at a position recessed from the main surface of the insulating material. Two or more metal patterns are stacked with an insulating material interposed between the metal patterns,
Insulating material between metal patterns of each layer is embedded with a metal part for heat conduction integrated with metal patterns on both sides of the insulating material,
At least one of the pair of outermost metal patterns is a conductor pattern made of a conductive metal, and is an embedded pattern embedded in an insulating material on the inner layer side, and the embedded pattern and the wiring board provided with the embedded pattern A heat dissipation circuit is formed by connecting the heat radiation pattern provided on the outermost layer metal pattern on the back side of the wiring board opposite to the front side so that heat conduction is possible through the heat conduction metal portion of each layer,
In the embedded pattern, the surface of the wiring portion is arranged flush with the main surface of the insulating material in which the embedded pattern is embedded, and the terminal portion embedded in a position recessed from the main surface of the insulating material is provided. The terminal portion has a front surface made of a plating layer made of a conductive metal and covered with a coating metal layer, and the coating metal layer is substantially flush with the main surface of the insulating material. A printed wiring board having a surface along the main surface of the insulating material at a position recessed from the main surface of the insulating material. In the printed wiring board according to claim 1 or 2,
The terminal portion of the embedded pattern has a front surface that extends along the main surface of the insulating material and extends from the outer periphery of the main surface of the front surface around the main surface of the front surface in the direction opposite to the center of the main surface of the front surface. Therefore, it is a convex shape having an inclined surface formed so as to approach the back surface of the terminal portion,
The covering metal layer fills a space between the inner wall of the recess formed perpendicular to the main surface of the insulating material around the terminal portion in the insulating material and the inclined surface of the terminal portion, and covers the front surface of the terminal portion. A printed wiring board characterized by being formed. In the printed wiring board according to any one of claims 1 to 3,
A sheet formed by impregnating and integrating a cloth-like or paper sheet-like base material with a resin-free base material insulating material integrally formed of one or more of the above insulating materials with an electrically insulating synthetic resin A printed wiring board comprising a composite insulating material obtained by laminating and integrating a prepreg in the form of a resin, or a resin insulating material without a base material. In the printed wiring board of any one of Claims 1-4,
The printed metal board is characterized in that the covering metal layer protrudes from the main surface of the insulating material with a protruding dimension of 2 μm or less or is depressed from the main surface of the insulating material. In the printed wiring board according to any one of claims 1 to 5,
The embedded pattern includes a plurality of the terminal portions, and a minimum interval between the terminal portions is 25 μm or less. In the printed wiring board of any one of Claims 1-6,
A printed wiring board characterized in that a distance between a front surface of a terminal portion of the embedded pattern and a main surface of the insulating material on the side where the embedded pattern is provided is within a range of 1 to 7 μm. . In the printed wiring board of any one of Claims 1-6,
The embedded pattern is formed of copper or a copper alloy, and the covering metal layer is formed of a single layer or a plurality of plating layers made of different conductive metals,
The printed wiring board, wherein the metal forming the plating layer constituting the coating metal layer is one selected from Ni, Au, Pd, Sn, Ag, and a solder alloy. A method of manufacturing a printed wiring board comprising:
An embedded substrate manufacturing step of embedding a conductor pattern in an insulating material, and manufacturing an embedded substrate in which the surface of the conductor pattern extends and is flush with a first main surface formed in the insulating material;
After this embedded substrate manufacturing step, an etching step of etching the terminal portion in the embedded pattern, which is a conductor pattern of the embedded substrate, and recessing the terminal portion from the first main surface of the insulating material;
A coating step of performing electrolytic plating and / or electroless plating on the front side of the terminal part that has completed the etching step, and forming a covering metal layer that covers the terminal part front side with one or more plating layers made of a conductive metal; ,
After the embedded substrate manufacturing step, a single layer conductor pattern or a plurality of layers of conductor patterns and an insulating material are laminated on the second main surface side of the insulating material opposite to the first main surface, and the embedded pattern A plurality of conductor patterns including an insulating material interposed between the conductor patterns and electrically connecting the conductor patterns on both sides of the insulating material,
In the covering step, the covering metal layer having a surface along the insulating material main surface is positioned so that the surface is substantially flush with the insulating material first main surface or recessed from the first main surface. A method for producing a printed wiring board, comprising: forming a printed wiring board. A method of manufacturing a printed wiring board comprising:
An embedded substrate manufacturing step of embedding a conductor pattern in an insulating material, and manufacturing an embedded substrate in which the surface of the conductor pattern extends and is flush with a first main surface formed in the insulating material;
After this embedded substrate manufacturing step, an etching step of etching the terminal portion in the embedded pattern, which is a conductor pattern of the embedded substrate, and recessing the terminal portion from the first main surface of the insulating material;
A coating step of performing electrolytic plating and / or electroless plating on the front side of the terminal part that has completed the etching step, and forming a covering metal layer that covers the terminal part front side with one or more plating layers made of a conductive metal; ,
After the embedded substrate manufacturing step, a single-layer metal pattern or a plurality of layers of metal patterns and an insulating material are laminated on the second main surface opposite to the first main surface of the insulating material, and the embedded pattern A plurality of metal patterns including an insulating material between metal patterns, and the metal patterns on both sides of the insulating material are integrated with a heat conducting metal portion embedded in the insulating material between the metal patterns, and the embedded A heat dissipation circuit formed by connecting a pattern and a heat dissipation pattern formed on a metal pattern on the back side of the wiring board opposite to the front side of the wiring board provided with the embedded pattern through the heat conducting metal part A heat dissipating circuit forming step comprising:
In the covering step, the covering metal layer having a surface along the insulating material main surface is positioned so that the surface is substantially flush with the insulating material first main surface or recessed from the first main surface. A method for producing a printed wiring board, comprising: forming a printed wiring board. In the manufacturing method of the printed wiring board according to claim 9 or 10,
In the etching step, the terminal portion of the embedded pattern has a front main surface along the main surface of the insulating material, and the outer periphery of the front main surface around the front main surface in a direction opposite to the front main surface center. A method for manufacturing a printed wiring board, comprising: forming a front surface having an inclined surface extending so as to approach the back surface of the terminal portion, and forming the terminal portion into a convex shape. In the manufacturing method of the printed wiring board according to claim 10,
The embedded substrate manufacturing step and the heat radiation circuit forming step include a heat conducting metal portion projecting step of projecting a heat conducting metal portion made of plated metal on the terminal portion of the metal pattern, and the heat conducting metal portion projecting step, A heat conducting metal part embedding step for embedding the metal part for the metal in the insulating material together with the metal pattern, and applying the electroless plating and the electroplating to the insulating material embedding the heat conducting metal part in the heat conducting metal part embedding step. Manufacturing a printed wiring board characterized in that the heat radiation circuit is assembled by executing a metal pattern lamination step having a metal pattern forming step of forming a metal pattern integrated with a metal part for use one or more times. Provide a method. In the manufacturing method of the printed wiring board of any one of Claims 9-12,
One or more of the insulating materials interposed between the conductor patterns or between the metal patterns are made of a base-less resin insulating material integrally formed of an electrically insulating synthetic resin, and a sheet-like base material made of cloth or paper A baseless resin in which a sheet-like prepreg impregnated and integrated with a resin is laminated, and the composite insulating material is pressed by pressing a conductor pattern or a metal pattern with the prepreg Provided is a method for producing a printed wiring board, wherein the printed wiring board is embedded in an insulating material and the prepreg is thermocompression-bonded to a resin insulating material without a base material.   10. The method for manufacturing a printed wiring board according to claim 9, wherein a resin insulating material without a base material, which is integrally formed of an electrically insulating synthetic resin, is used as one or more insulating materials interposed between conductor patterns. A printed wiring board manufacturing method is provided. In the manufacturing method of the printed wiring board of any one of Claims 9-14,
The printed wiring board is characterized in that, in the covering step, the covering metal layer protrudes from the main surface of the insulating material with a protruding dimension of 2 μm or less or is depressed from the main surface of the insulating material. Production method. In the manufacturing method of the printed wiring board of any one of Claims 9-15,
The method of manufacturing a printed wiring board, wherein the embedded pattern has a plurality of the terminal portions, and a minimum interval between the terminal portions is 25 μm or less. In the manufacturing method of the printed wiring board of any one of Claims 9-16,
In the etching step, the distance between the front surface of the terminal portion of the embedded pattern and the main surface of the insulating material on the side where the embedded pattern is provided is within a range of 1 to 7 μm. A method for producing a printed wiring board. In the manufacturing method of the printed wiring board of any one of Claims 9-17,
The embedded pattern is formed of copper or a copper alloy, and in the covering step, the covering metal layer is formed of one layer or a plurality of plating layers made of different conductor metals,
A method for producing a printed wiring board, wherein a metal forming the plating layer is one selected from Ni, Au, Pd, Sn, Ag, and a solder alloy.