JP2014010587A - Solar power generation system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve maximum power point tracking (MPPT) efficiency in a solar power generation system, and to optimize a velocity of varying an electric current while appropriately maintaining a withstand voltage of a direct current (DC) capacitor in a system provided with a control means for controlling a solar battery electric current to an electric current target value by switching control and an electric current target value variable means and having a detection mode for calculating the electric current target value at a maximum power point by gradually increasing the electric current target value and a normal mode for performing an operation at the calculated electric current target value.SOLUTION: A system comprises: electric current control means for controlling a switching element to control an electric current of a solar battery to a value substantially equal to an electric current target value; and target value variable means for varying an electric current target value. The system includes a detection mode in which power is calculated from time to time to calculate the electric current target value at a maximum power point while gradually increasing the electric current target value from zero and a normal mode in which an operation is performed at the calculated electric current target value. In such a system, a power increase amount in the target value variable means is selected as necessary and an optimal increase amount is calculated in the shortest time.

Description

  The present invention relates to a solar power generation system, and in particular, by detecting a power converter (power conditioner (PCS)) connected to a solar cell, the maximum point of power of the solar cell is detected, and the detected maximum power point It is related with the photovoltaic power generation system which operates a power conditioner.

  A solar power generation system is a system that converts electric power generated by a solar cell into commercial alternating current by a power conditioner and consumes it in a home or reversely flows into a commercial system.

  In FIG. 4, the solid line is a graph showing the characteristics of the output current Ipv and the output voltage Vpv of the solar cell (hereinafter “current-voltage characteristics”), and the broken line is the characteristics of the output current Ipv and the output power Ppv of the solar cell (hereinafter “ It is a graph which shows an electric current-power characteristic ").

  As shown here, the current-voltage characteristic is a non-linear characteristic in which the output current Ipv becomes the short-circuit current Isc when the output voltage Vpv is 0, and the output current Ipv becomes 0 when the output voltage Vpv is the open circuit voltage Voc. is there. Further, the current-power characteristic has a characteristic that the output power Ppv becomes the maximum power point Pmax when the output current Ipv is Ipmax, and the output voltage Vpv at the maximum power point Pmax is Vpmax.

  Since the current-voltage characteristics and current-power characteristics described here vary depending on the sunshine conditions and temperature conditions, in order to efficiently extract power from the solar cell, the maximum power point Pmax is always searched for and the operation of the solar cell. It is necessary to follow-up control the power conditioner so that the point becomes the maximum power point.

  As a method well known as the maximum power tracking control method, there is a hill climbing method. In this hill-climbing method, the input voltage command value of the power conditioner is slightly changed, and it is determined whether the generated power of the solar cell is increased or decreased according to this change. Then, the change direction of the next voltage command value is determined based on the determination result, and the minute change of the command value is repeated. However, this method has a problem that the response is slow and it cannot cope with the double mountain characteristic when a partial shadow occurs.

  Various improvements have been proposed for this, and Patent Document 1 includes a power conditioner having a configuration in which an inductor and a switching element are connected in series to two terminals of a solar cell. At the time of detection, the switching element is kept on and the current flowing through the inductor is changed from zero to short-circuit current. The current-voltage characteristics at this time are scanned to detect the current and voltage at the maximum power point, and the operation of the solar cell A device is disclosed in which a power conditioner is operated so that a point becomes a current and voltage at a maximum power point. By using this method, the entire current-voltage characteristics of the solar cell can be scanned at high speed, so the response is faster than the hill-climbing method, and the maximum power point can be detected reliably even when two-peak characteristics occur. Can move.

On the other hand, in the above scanning method, when the current-voltage characteristics of the solar cell are scanned, the change rate di / dt of the current Ipv flowing through the choke coil L of the power conditioner is maintained by keeping the switching element in an on state.
di / dt = Vpv / L (Formula 1)
Ipv is changed by using

  As can be seen from Equation 1, since the current change rate di / dt is inversely proportional to the inductance value (L value) of the choke coil, in order to scan the change of Ipv with high accuracy, the A of the AD converter of the measured voltage and the measured current The current change rate di / dt needs to be suppressed to an appropriate value in accordance with the / D conversion performance, and the L value has a lower limit value. For this reason, the choke coil needs to have an inductance value equal to or higher than the lower limit value. As a result, the scanning method has a problem that it is difficult to reduce the volume of the choke coil and improve the tradeoff between detection accuracy.

  As a method for solving this problem, there is a method disclosed in Patent Document 2. In this method, by appropriately turning on the switching element and controlling the current flowing through the choke coil, it is possible to reduce the size of the inductor of the choke coil, and it is possible to configure a system with a higher degree of freedom. .

  Another example is the method disclosed in Patent Document 3. In this method, the output voltage and current of the solar cell are changed, a plurality of power peaks are detected, and the conditions are set to be the maximum power point.

Japanese Patent No. 4294346 PCT / JP2011 / 069327 JP-A-8-76865

  Although the method of Patent Document 2 can obtain an accurate maximum power, it has a problem that it cannot be controlled at the maximum power point while scanning the current-voltage characteristics of the solar cell.

  Therefore, in order to minimize the time for scanning the current-voltage characteristic, it is conceivable to increase the current at a higher speed. However, at this time, the output voltage increases rapidly due to the switching operation of the switching element, and the output stage There was a risk of exceeding the withstand voltage of the capacitor. As an example, referring to FIG. 1, an excessive voltage may be applied to the capacitor 11 (Cpn) which is the output stage of the switching element 9 (S1). In particular, when the grid interconnection inverter 12 stops operating or suppresses output power, the above phenomenon occurs.

  Normally, the switching operation is stopped in such a case. However, if this phenomenon occurs during the scan of the current-voltage characteristic, it is impossible to follow the maximum power appropriately. The control under various conditions was not disclosed.

  The problem to be solved by the present invention is that when the maximum power tracking control method as described above is applied to a solar power generation system that is always operating, the capacitor voltage of the output stage is appropriately maintained, and the current-voltage characteristic is An object of the present invention is to provide a method capable of stably performing a scan.

  In order to solve the above problems, a solar power generation system according to the present invention is a solar power generation system including a solar cell and a power conditioner that converts a DC voltage output from the solar cell into an AC voltage and outputs the AC voltage. The power conditioner boosts the input voltage to the power conditioner, input current detection means for detecting an input current to the power conditioner, input voltage detection means for detecting an input voltage to the power conditioner, and A switching element; output voltage detecting means for detecting an output voltage from the power conditioner; and a control circuit for controlling the switching element so that the input current is substantially equal to a current target value. The control circuit increases the current target value output by the target value varying means while increasing the current target value sequentially from substantially zero. A detection mode for operating a switching element, calculating a power at that time from the input current and the input voltage each time, and storing a current target value at which the power is maximized in a maximum value determination circuit, and the maximum value And a steady mode in which the switching element is operated using the current target value stored in the determination circuit, and the target variable means in the detection mode when the output voltage is smaller than a first voltage threshold value. When the output voltage is larger than the first voltage threshold, the current target value output by the target variable means is maintained.

  According to the present invention, it is possible to stably scan the current-voltage characteristic while appropriately maintaining the capacitor voltage of the output stage.

The figure which shows the circuit structure of one Example. Each part waveform showing circuit operation of one embodiment Example of circuit configuration of input filter of FIG. Graph showing current-voltage characteristics and current-power characteristics of solar cells Example of timing chart in one embodiment PAD diagram for obtaining optimum current output in one embodiment

  A photovoltaic power generation system according to an embodiment will be described with reference to FIGS.

  FIG. 1 is a diagram illustrating a circuit configuration of the photovoltaic power generation system according to the present embodiment. In FIG. 1, 1 is a solar cell panel, 2 is a power conditioner, 3 is a commercial system, and an input filter 4, a DC-DC converter 7, a grid interconnection inverter 12, and a control circuit are provided inside the power conditioner 2. There are 14. In the DC-DC converter 7, 8 is a choke coil, 9 is a power MOSFET which is a switching element, 10 is a boost diode, 11 is a capacitor, 13 is a current sensor, and 15a and 15b are voltage dividing resistors. In the control circuit 14, 16 is a target value variable means, 17 is a mode switch, 18 is a subtractor, 19 is a PI control block, 20 is a multiplier, and 21a is an AD converter (input voltage detection). ), 21b is an AD converter (input current detector) for detecting an input current, 22 is a PWM circuit, and 23 is a maximum value determination circuit.

  As shown in FIG. 1, both ends of the solar cell panel 1 are connected to the input side terminal of the input filter 4 inside the power conditioner 2, and the output side terminal of the input filter 4 is the input of the DC-DC converter 7. The output side terminal of the DC-DC converter 7 is connected to the input side terminal of the grid interconnection inverter 12. The output side terminal of the grid interconnection inverter 12 is connected to the commercial system 3 outside the power conditioner 2.

  Here, the inside of the DC-DC converter 7 will be described in detail. The input side terminal of the choke coil 8 is connected to the positive output side terminal of the input filter 4, and the output side terminal of the choke coil 8 is connected to the drain of the power MOSFET 9. Further, the negative output side terminal of the input filter 4 and the source of the power MOSFET 9 are connected. Further, in the DC-DC converter 7, a series body of voltage dividing resistors 15 a and 15 b is connected to both ends of the output side terminal of the input filter 4. The anode of the boost diode 10 is connected to the drain of the power MOSFET 9. A capacitor 11 is connected between the cathode of the boost diode 10 and the source of the power MOSFET 9. Both ends of the capacitor 11 are connected to the grid interconnection inverter 12 outside the DC-DC converter 7.

  Next, the inside of the control circuit 14 will be described in detail. The AD converter 21 a is connected to the midpoint of the voltage dividing resistors 15 a and 15 b in the DC-DC converter 7 and outputs the input voltage Vin of the DC-DC converter 7. The AD converter 21b is connected to the current sensor 13 inside the DC-DC converter 7, and outputs an average value ILave of the current IL of the choke coil 8. The multiplier 20 receives the output Vin of the AD converter 21 a and the output ILave of the AD converter 21 b, and outputs Ppv obtained by multiplying them to the maximum value determination circuit 23. Also, ILave is input to the minus side input terminal of the subtractor 18, and the output Iref of the mode switch 17 is input to the plus side input terminal. The output of the subtracter 18 is input to the PI control block 19. In addition, Iref is input to the maximum value determination circuit 23. The output of the PI control block 19 is input to the PWM circuit 22. The output of the PWM circuit 22 is connected to the gate of the power MOSFET 9 in the DC-DC converter 7 as an S1 control signal. Further, the output terminal IrefM of the maximum value determination circuit 22a is connected to the steady side terminal of the mode switch 17, and the output of the target value varying means 16 is connected to the detection side terminal.

  Next, the circuit operation of this embodiment will be described with reference to FIG. FIG. 2 is a diagram showing operation waveforms of each part of the circuit of FIG. 1 with the horizontal axis as time, and FIG. 2A shows whether the DC-DC converter 7 is in a steady mode or a detection mode. FIG. 2B shows “Vpv” showing the voltage waveform at both ends of the solar cell panel 1, and FIG. 2C shows “the current target value Iref” showing the output of the mode switch 17. 2 (d) is an “S1 control signal” indicating the gate waveform of the power MOSFET 9, the solid line in FIG. 2 (e) is “IL” indicating the current of the choke coil 8, and the broken line is an average value of IL “ILave” FIG. 2F is “DC-DC converter 7 output power” indicating the power output from the DC-DC converter 7 to the grid interconnection inverter 12. Here, the detection mode is a mode for detecting the maximum power point of the solar battery panel 1, and the steady mode is for operating the power conditioner 2 so that the current at the maximum power point obtained in the detection mode is obtained. It is a mode to make it.

  FIG. 3 is a diagram showing an example of the inside of the input filter 4 of FIG. In FIG. 3, 5a and 5b are common mode chokes, 6a, 6b, 6c, 6d and 6e are filter capacitors, and 27 is a normal mode choke. In FIG. 3, a filter capacitor 6a is connected to both ends of the input side terminal of the input filter 4, and an input side terminal of the common mode choke 5a is connected to both ends of the filter capacitor 6a. The output side terminal of the common mode choke 5a is connected to a series body of filter capacitors 6b and 6c. The midpoint of the filter capacitors 6b and 6c is connected to the frame ground. Both ends of the filter capacitor 6d are connected to both ends of the series body of the filter capacitors 6b and 6c. Both ends of the filter capacitor 6d are connected to the input side terminals of the common mode choke 5b. A normal mode choke 27 is connected to one of output terminals of the common mode choke 5b, and a filter capacitor 6e is connected between the normal mode choke 27 and the other terminal of the common mode choke 5b. Then, both terminals of the filter capacitor 6 e become the converter side terminals and are drawn out of the input filter 4.

  Next, operation | movement of the power conditioner 2 of a present Example is demonstrated.

  First, the steady mode will be described. In the steady mode, the mode switch 17 in FIG. 1 is connected to the steady mode side, and the current target value Iref is IrefM output from the maximum value determination circuit 23. Hereinafter, as shown in FIGS. 2A and 2C, IrefM in the preceding steady mode period is defined as IrefM (n−1), and IrefM in the next steady mode period is defined as IrefM (n). In the preceding steady mode period, the current IL (solid line) flowing through the choke coil 8 (L) pulsates due to the switching of the power MOSFET 9, but the average value ILave (dashed line) is IrefM (n-1) by the control described later. Is consistent with As a method for extracting the average value ILave from the pulsating current IL, a method of providing a first-order lag filter for attenuating the switching frequency component of the power MOSFET 9 (S1) in the current sensor 13, or a capturing timing of the AD converter 22a is set to a PWM cycle. There is a method of always sampling the central value of the pulsation in synchronization with the signal, and any method may be used.

  As shown in FIG. 1, the subtractor 18 outputs a power error obtained by subtracting the average value ILave from the current target value Iref. In the steady mode, the current target value Iref = IrefM (n−1). Therefore, the current error is (IrefM (n−1) −ILave). This current error is input to the PI control block 19 and is subjected to proportional integration calculation. The output of the PI control block 19 is a duty ratio, and this duty ratio is input to the PWM circuit 22 to generate a PWM pulse (S1 control signal) shown in FIG. The S1 control signal is a PWM control signal that increases the ON width when the current error is positive and decreases the ON width when the current error is negative. The S1 control signal is input to the gate of the power MOSFET 9 (S1) to drive the power MOSFET 9 (S1) ON / OFF.

  When the power MOSFET 9 (S1) is turned on, a closed circuit of the solar cell panel 1-input filter 4-choke coil 8 (L) -power MOSFET 9 (S1) -input filter 4-solar cell panel 1 is formed. Is stored in the choke coil 8 (L). On the other hand, when the power MOSFET 9 (S1) is turned OFF, the circuit of the solar cell panel 1-input filter 4-choke coil 8 (L) -diode 10 (D1) -capacitor 11 (Cpn) -input filter 4-solar cell panel 1 is obtained. The excitation energy formed and stored in the choke coil 8 (L) is released to the capacitor 11 (Cpn). In this way, by switching the circuit in the DC-DC converter 7 in accordance with ON / OFF of the S1 control signal, the pulsating current IL (solid line) that increases when the S1 control signal is ON and decreases when it is OFF. Can be obtained.

  If the current error output from the subtractor 18 is positive, the ON width of the S1 control signal is widened to increase the ON time of the power MOSFET 9 (S1), and the excitation energy stored in the choke coil 8 (L) is increased. Thus, the current error (current target value IrefM−average value ILave) can be brought close to zero. On the other hand, when the current error output from the subtractor 18 is negative, the ON width of the S1 control signal is narrowed to shorten the ON time of the power MOSFET 9 (S1) and the excitation energy stored in the choke coil 8 (L) is reduced. Thus, the current error (current target value IrefM−average value ILave) can be brought close to zero. The control circuit 14 controls the power MOSFET 9 (S1) so that the average value ILave of the current IL flowing through the choke coil 8 matches the current target value Iref. In the steady mode, the current target value Iref is fixed to IrefM. Therefore, the average value ILave is held at a constant value equal to IrefM.

  At this time, in the input filter 4 of FIG. 3, the pulsation component of IL due to the switching of the power MOSFET 9 (S1) is cut mainly by the normal mode choke 27 and the filter capacitor 6e, and flows into the DC-DC converter 7 from the solar cell panel 1. The current Ipv is approximately the same DC value as ILave. On the other hand, regarding the voltage, the DC component of the voltage Vpv of the solar cell panel 1 input to the input filter 4 and the output voltage Vin of the input filter 4 are substantially equal, and Vin includes a high-frequency component accompanying switching.

  As a result, DC power of Ipv and Vpv flows from the solar cell panel 1 to the DC-DC converter 7, and the loss of the DC-DC converter 7 can be subtracted from the DC-DC converter 7 to the grid-connected inverter 12. Electric power is output. In the grid-connected inverter 12, the DC power input from the DC-DC converter 7 is converted into a sine wave current synchronized with the voltage phase of the commercial system 3 and output to the commercial system 3.

  Next, the detection mode will be described. When the steady mode has passed for a certain period of time, the mode switch 17 is switched to the detection mode side, and the mode is changed to the detection mode. At this time, since the initial value output by the target value varying means 16 is zero, the switch 17 outputs the current target value Iref = zero. The subtracter 18 subtracts the average value ILave from the current target value Iref = zero, and outputs a current error (−ILave). This current error is input to the PI control block 19 and is subjected to proportional integration calculation. The output of the PI control block 19 is a duty ratio, and this duty ratio is input to the PWM circuit 22 to generate a PWM pulse (S1 control signal) shown in FIG. The S1 control signal is input to the gate of the power MOSFET 9 (S1) to drive the power MOSFET 9 (S1) ON / OFF. Since the DC-DC converter 7 is current controlled so that the current error (−ILave) becomes zero, the average value ILave of the current flowing through the choke coil 8 (L) becomes zero, and the current output from the solar cell panel 1. Ipv is also zero.

  As shown in the current-voltage characteristics (solid line) in FIG. 4, when Ipv is zero, Vpv rises to the open circuit voltage Voc. This change is also shown in FIG. 2, and when the average value ILave (broken line) falls to zero as shown in FIG. 2 (e), Vpv rises to Voc as shown in FIG. 2 (b).

  When ILave becomes zero and Vpv becomes Voc, the current target value Iref is gradually increased from zero with a slope di / dt, as shown in FIG. As shown in FIG. 1, this is achieved by increasing the current target value Iref output by the target value varying means 16 by a minute amount ΔIref every predetermined time tx. Thereby, Iref increases with a slope of di / dt = ΔIref / tx. At this time, as shown in FIG. 2E, ILave also rises following the rise of Iref. As described above, the current Ipv flowing from the solar cell panel 1 to the DC-DC converter 7 becomes almost the same DC value as ILave by the function of the input filter 4, so that Ipv gradually increases from zero in the detection mode. Will increase.

  Although an example in which the initial value output by the target value varying means 16 is set to zero has been introduced here, a method of stopping the switching of the power MOSFET 9 for a certain time may be used. In this case, control equivalent to the detection mode shown in FIG. 2C can be performed by restarting switching of the power MOSFET 9 at an appropriate timing.

When Ipv changes, Vpv also changes according to the current-voltage characteristics (solid line) in FIG. The AD converters 21a and 21b in the control circuit 14 sample ILave, which can be regarded as Ipv, and Vin, which can be regarded as Vpv, at a period ts (ts <tx). The multiplier 20 outputs the power Ppv obtained by multiplying ILave and Vin. The maximum value determination circuit 23 can store Ppv output from the multiplier 20 and Iref at that time as a set of (Ppv, Iref), and Ppv is the maximum among the sets of (Ppv, Iref) that are sequentially input. Ppv is stored as Pmax, and Iref at that time is stored as IrefM. Since Iref having an initial value of zero increases with a slope of di / dt = ΔIref / tx, it reaches Isc shown in FIG. 4 after elapse of tx * Isc / ΔIref. As is clear from the current-voltage characteristics (solid line) in FIG. 4, Vpv gradually decreases from Voc as Ipv increases, and becomes 0 when Isc. During this time, since the maximum power point (Pmax, Ipmax) shown in the current-power characteristic (broken line) passes, the maximum value determination circuit 23 has (Pmax, IrefM) = (Pmax, Ipmax) at the time of Iref = Isc. It will be remembered. The detection mode shown in FIG. 2 is executed for a period of Ts,
tx * Isc / ΔIref <Ts
Since ΔIref is set so as to satisfy the condition, the current target value Iref reaches Isc within the Ts period. When Iref is equal to or greater than Isc, the power MOSFET 9 is operated with a maximum on-time width (for example, a time ratio of 100%) preset by the PWM circuit 22.

  As a result, (Pmax, Ipmax) is stored as (Pmax, IrefM) in the maximum value determination circuit 23 at the end of the detection mode, that is, at the time when the time Ts has elapsed from the start of the detection mode.

  Therefore, in the next steady mode, the maximum value determination circuit 23 outputs Ipmax as IrefM. As described above, in the steady mode, the mode switch 17 is again connected to the steady side, and Iref = IrefM (n) = Ipmax, and the current is controlled so that the average IL value ILave becomes Ipmax. At this time, in the steady mode, the maximum power value is always obtained based on the detected voltage and current.

  The steady mode time T is sufficiently longer than the detection mode time Ts. For example, Ts is on the order of 1 ms to several tens of ms, and T is on the order of 1 s to several tens of minutes. In addition, the inductance value of the choke coil 8 used at this time is approximately between 100 μH and 1 mH, and can be mounted on a printed circuit board.

  In this way, in the present embodiment, the maximum power point of the solar cell panel is detected every predetermined time, and the power conditioner 2 can be operated at the detected maximum power point. As shown in FIG. 2, even in the detection mode, the electric power of the solar cell panel 1 is output from the DC-DC converter 7 and is output to the commercial system 3 side via the system interconnection inverter 12. Therefore, di / dt is reduced to improve detection accuracy, that is, the loss of power from the solar panel can be minimized even if the detection mode is slowed down by slowing the rate of increase in current change. .

  Hereinafter, in the configuration of the present embodiment, the DC voltage Vpn of the output stage capacitor 11 (Cpn) (the output voltage of the power conditioner 2) is equal to or higher than a predetermined control voltage suitable for connecting to the commercial system 3. A method of scanning the current-voltage characteristics by executing the detection mode while appropriately maintaining a voltage equal to or lower than the withstand voltage of the capacitor 11 (Cpn) will be described with reference to FIGS.

  First, the control loop will be described with reference to FIG. In step S100, the current target value Iref is initialized to zero. In step S101, steps S102 to S105 are executed until Iref reaches the open current Isc of the solar cell.

  In step S102, it is determined whether the DC voltage Vpn exceeds the pause voltage (first voltage threshold).

  If the DC voltage Vpn does not exceed the pause voltage (first voltage threshold value), it is determined that the DC voltage Vpn is normal, and the current target value obtained by adding ΔIref to the current current target value Iref is determined in step S105. The current target value Iref is set to step S102 again. On the other hand, if the DC voltage Vpn exceeds the pause voltage (first voltage threshold value), it is determined that the DC voltage Vpn is abnormal, and whether or not the switching operation of the power MOSFET 9 is stopped is determined in step S103. Judgment is made based on whether Vpn exceeds the stop voltage (second voltage threshold).

  If the DC voltage Vpn does not exceed the stop voltage (second voltage threshold), step S102 is performed again while maintaining the current current target value Iref. On the other hand, if the DC voltage Vpn exceeds the stop voltage (second voltage threshold), the switching operation of the power MOSFET 9 is stopped in step S104, and the control loop is ended.

  FIG. 5 shows the operation transition of the DC voltage Vpn, the current target value Iref, the solar cell power Ppv, the DC-DC converter 7 and the grid interconnection inverter 12 in time series.

  The start time of FIG. 5 is when the DC-DC converter 7 is in the detection mode and the grid-connected inverter 12 is stopped. When the scan operation is continued, the DC voltage Vpn reaches the stop voltage (second voltage threshold). Is the case. At this time, as shown in FIG. 6, the switching operation of the power MOSFET 9 is stopped in step S104.

  On the other hand, when the converter is in the detection mode and the grid interconnection inverter 12 is operating, the DC voltage Vpn is controlled by the grid interconnection inverter 12 and therefore does not immediately reach the stop voltage as in the above-described conditions. . However, when the grid interconnection inverter 12 is controlled with an output smaller than the maximum power of the solar cell panel 1 under some conditions, the DC voltage Vpn may rise to a pause voltage (first voltage threshold). At this time, as shown in FIG. 6, control is performed in step S103 so as not to increase the current target value Iref.

  In the present embodiment, it is also effective to use a gate drive circuit between the PWM circuit 22 and the power MOSFET 9. The power MOSFET 9 may be replaced with another switching element such as IGBT or SiC-MOSFET. It is also effective to apply a Sic device to the diode 10. The configuration of the DC-DC converter 7 is preferably the step-up converter shown in FIG. 1, but may be other non-insulated converters or isolated converters. Further, the input filter 4 may have other functions as long as it has a similar function, that is, a circuit configuration that prevents the current of the switching component from flowing to the solar cell panel side and reduces common mode noise. Further, the control circuit 14 may be constituted by an analog circuit having a similar function. Although the PWM circuit 22 is a circuit that performs pulse width modulation control, it can be replaced by pulse frequency modulation control (PFM), pulse density modulation control (PDM), or the like. Further, the PI control block 19 is a block that performs proportional-integral control, but may be configured by an analog circuit such as an operational amplifier as described above, or may be replaced with PID (proportional-integral delay) control or the like.

  The present embodiment described above can be applied to a solar power generation system interconnected with a commercial system 3 for home use. Further, the present invention can be applied to a large-scale solar power generation system such as a solar power generation system such as a DC power supply system that is not connected to the grid, a solar battery system for a remote island or a mountain hut, a solar battery system for a smart grid, or a mega solar system.

1: Solar panel 2: Power conditioner 3: Commercial system 4: Input filter 5a, 5b: Common mode chokes 6a, 6b, 6c, 6d: Filter capacitor 7: DC-DC converter 8: Choke coil 9: Power MOSFET
10: Boost diode 11: Capacitor 12: Grid interconnection inverter 13: Current sensor 14: Control circuits 15a, 15b: Voltage dividing resistor 16: Target value changing means 17: Mode switch 18: Subtractor 19: PI control block 20: Multipliers 21a, 21b: AD converter 22: PWM circuit 23: Maximum value determination circuit 25: Diode 26: Signal processing circuit 27: Normal mode choke 28: Control block

Claims (3)

In a solar power generation system having a solar cell and a power conditioner that converts the DC voltage output from the solar cell into an AC voltage and outputs the AC voltage,
The inverter is
An input current detection means for detecting an input current to the power conditioner;
An input voltage detecting means for detecting an input voltage to the power conditioner;
A switching element that boosts an input voltage to the power conditioner;
An output voltage detecting means for detecting an output voltage from the power conditioner;
A control circuit for controlling the switching element such that the input current is substantially equal to a current target value;
And having
The control circuit includes:
The switching element is operated while sequentially increasing the current target value output by the target value varying means from substantially zero, and the power at that time is calculated from the input current and the input voltage each time, and the power becomes maximum. Detection mode for storing the current target value stored in the maximum value determination circuit;
A steady mode in which the switching element is operated using a current target value stored in the maximum value determination circuit;
And having
In the detection mode,
When the output voltage is smaller than the first voltage threshold, the current target value output by the target variable means is sequentially increased,
When the output voltage is greater than a first voltage threshold, the current target value output by the target variable means is maintained. In the photovoltaic power generation system according to claim 1,
A second voltage threshold greater than the first voltage threshold is defined;
When the output voltage is smaller than the second voltage threshold, the switching means is operated,
When the output voltage is larger than a second voltage threshold, the switching unit is stopped. The solar power generation system according to claim 1 or 2,
The detection mode is on the order of 1 ms to several tens of ms,
The steady mode is an order of 1 s to several tens of minutes.