JP2013232053A - External storage device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a data transfer rate with an external device reflecting a data transfer rate of a storage medium.SOLUTION: An external storage device provided with a cuboidal casing is provided with a plurality of interfaces and a plurality of connectors corresponding to the respective interfaces, and the plurality of connectors are provided on the same side of the casing.

Description

  The present invention relates to an external storage device having an interface for transferring data to and from a main device, and more particularly to an external storage device having a plurality of interfaces and a plurality of connectors corresponding to each interface.

  The SSD (Solid State Drive) using a nonvolatile semiconductor memory as a storage medium in which the flash memory is preferably used has a remarkably fast writing / reading speed of the flash memory, and has a movable part such as an HDD (Hard Disc Drive). There are advantages such as having no impact and excellent impact resistance, and the adoption as an external storage device provided in a personal computer (PC) is progressing.

  According to the latest standard ONFI 3.0 established by the ONFI (Open NAND Flash Interface) working group that determines the data transfer rate and the like of a flash memory chip alone, the data transfer rate of a flash memory chip alone will reach 400 MB / s in the future. If a configuration for transferring data in parallel and almost simultaneously (in parallel) to the eight flash memory chips is adopted, the total data is 400 × 8 = 3.2 GB / s (= 25.6 Gbps). Transfer speed can be obtained. A data transfer rate of 200 MB / s is obtained even with ONFI 2.1 / 2.2 currently implemented.

  On the other hand, SSDs are designed and manufactured as HDD replacement applications, and external interfaces with PCs are also used in HDDs, such as SATA (Serial Advanced Technology Attachment). However, in SATA3, which is currently widely used, the data transfer rate is 6 Gbps at the maximum, and even if the data transfer rate of the flash memory chip is increased, the data transfer rate of the external interface is in a rate-limiting state. There are many. For this reason, even if the data transfer speed of the flash memory chip is increased, it is difficult to expect a higher speed than the data transfer speed of the external interface.

  A technique has already been proposed in which a single storage device and a host device are connected by a plurality of interfaces, and the host device simultaneously accesses the storage device using a plurality of interfaces (see Patent Document 1). In the technology disclosed in Patent Document 1, the plurality of interfaces are different types of interfaces, and are not intended to increase the speed of data access.

JP 2003-303471 A

  The present invention has been made in view of the above-described problems, and an object thereof is to realize an external storage device capable of obtaining a data transfer rate with an external device reflecting the data transfer rate of the storage medium.

  The present invention is applied to an external storage device having an interface for performing data transfer with a main device. The external storage device includes a plurality of interfaces and a plurality of connectors corresponding to each interface, and also includes a rectangular parallelepiped housing, and the plurality of connectors are provided on the same side surface of the housing. Features.

  Since the external storage device of the present invention includes a plurality of interfaces and a plurality of connectors corresponding to the respective interfaces, it is possible to transfer data to and from the main device using these interfaces and connectors.

  Here, the plurality of interfaces may be the same type of interface. Furthermore, the external storage device of the present invention may include two interfaces and two connectors, and the two connectors may be provided adjacent to each other in the lateral direction on the same side surface of the housing. In this case, one of the two connectors may be a pair of connectors for signal lines and power lines conforming to the SATA standard, and the other connector may be a connector for signal lines conforming to the SATA standard. In addition, the signal line connector of one connector and the signal line connector of the other connector may be provided adjacent to each other.

  The external storage device of the present invention may have a 2.5 inch form factor conforming to the SFF Committee.

  Since the external storage device of the present invention includes a plurality of interfaces and a plurality of connectors corresponding to the respective interfaces, it is possible to transfer data to and from the main device using these interfaces and connectors. Therefore, compared to an external storage device having only one normal interface, a data transfer rate exceeding the data transfer rate of a single interface can be realized. As a result, it is possible to realize the data transfer rate of the entire external storage device that is closer to the data transfer rate of the flash memory, and to obtain the data transfer rate with the external device that reflects the data transfer rate of the storage medium. A storage device can be realized.

1 is a perspective view showing an external configuration of an external storage device according to an embodiment of the present invention. It is a perspective view which shows the internal structure of the external storage device of one Embodiment. It is a top view which shows the internal board | substrate of the external storage device of one Embodiment. It is a reverse view which shows the internal substrate of the external storage device of one Embodiment. It is a top view which shows the connector of the external storage device of one Embodiment. It is a front view showing a connector of an external storage device of one embodiment. It is a figure which shows the pin arrangement | positioning of the connector of the external storage device of one Embodiment. It is a block diagram which shows schematic structure of the external storage device of one Embodiment. It is a figure which shows the data transfer procedure in the external storage device of one Embodiment. It is a figure which shows the connector part of the 2.5-inch form factor external storage device based on SFF Committee.

Hereinafter, an external storage device according to an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a perspective view showing an external configuration of an external storage device according to an embodiment of the present invention. The external storage device of this embodiment is a 2.5-inch SSD device. A feature of the external storage device of the present embodiment is that it conforms to the SFF-8201 standard defined by the Small Form Factor (SFF) Committee, in other words, a 2.5-inch disk drive (which is a disk drive but also applies to an SSD). In this form factor, a SATA standard signal line connector is further added next to a connector compliant with the SATA standard. As a result, the external storage device of this embodiment includes two SATA interfaces.

  FIG. 10 is a diagram showing an example of a form factor of a 2.5-inch disk drive defined in the SFF-8201 standard. In FIG. 10, reference numeral 1 denotes a rectangular parallelepiped housing having a rectangular shape in plan view. On one side of the short side of the housing 1, a connector 2 conforming to the SATA standard, specifically a signal line connector 2a and A power line connector 2b is provided. The signal line connector 2a is provided at a constant interval between the long side surface of the housing 1 and a connector is provided between the signal line connector 2a and the long side surface of the housing 1. A region A that is not provided is formed. The external storage device of the present embodiment is obtained by adding a SATA standard signal line connector to this area A.

  Returning to FIG. 1, reference numeral 10 denotes a housing of the external storage device of the present embodiment, which has a rectangular parallelepiped shape having a rectangular shape in plan view, which has a 2.5-inch disk drive form factor defined in the SFF-8201 standard. Is formed. On the side of the short side of the housing 10, a connector 11 conforming to the SATA standard, more specifically, at a position determined by a 2.5-inch disk drive form factor conforming to the SFF-8201 standard. A signal line connector 11a and a power line connector 11b are provided. A signal line connector 12 conforming to the SATA standard is provided at a position shown in a region A in FIG. Hereinafter, the signal line connector 12 is appropriately referred to as an additional signal line connector 12 in order to distinguish from the signal line connector 11a. Therefore, the signal line connector 11 a and the additional signal line connector 12 are provided adjacent to each other in the lateral direction on the same side surface of the housing 10.

  2 to 4 are diagrams showing a substrate provided in the external storage device of the present embodiment, in which FIG. 2 is a perspective view of the internal substrate, FIG. 3 is a plan view of the internal substrate, and FIG. It is a reverse view of a board | substrate. In these drawings, reference numerals 11a, 11b, and 12 denote a signal line connector, a power line connector, and an additional signal line connector that comply with the SATA standard described above. Reference numeral 13 denotes an internal substrate, 14 an SSD controller chip, 15 a DRAM cache chip, 16 a power supply IC, 17 a NAND flash chip, and 18 an electric double layer capacitor. In this embodiment, eight NAND flash chips 17 are provided.

  In the present embodiment, as shown in detail in FIG. 3, the signal line connector 11 a and the additional signal line connector 12 are connected to the SSD controller 14. In addition, the electric double layer capacitor 18 acts as a temporary backup power source when an instantaneous power interruption occurs. The electric double layer capacitor 18 of the present embodiment has a rectangular shape in a plan view formed by sealing with an aluminum laminate film. The internal substrate 13 at a position where the electric double layer capacitor 18 is provided is cut out except for both end portions which are electrode positions of the electric double layer capacitor 18, that is, a position where the electric double layer capacitor 18 is provided. The internal substrate 13 is formed with a notch 13a. Since the electric double layer capacitor 18 of the present embodiment sealed with the aluminum laminate film tends to expand in the thickness direction when the temperature rises during operation, the entire electric double layer capacitor 18 is placed on the internal substrate 13. When placed, there is a possibility of being sandwiched between the housing 10 and the internal substrate 13 during expansion. Therefore, a cutout 13a is provided in the internal substrate 13 in order to provide a margin during expansion.

  5 and 6 are diagrams showing details of the signal line connector 11a, the power supply line connector 11b, and the additional signal line connector 12. FIG. 5 is a plan view and FIG. 6 is a front view. As shown in these drawings, the signal line connector 11a, the power line connector 11b, and the additional signal line connector 12 have dimensions, shapes, and pin arrangements conforming to the SATA standard. Specifically, the signal line connector 11a includes signal lines S1 to S7, the power line connector 11b includes power lines P1 to P15, and the additional signal line connector 12 includes signal lines S1 to S7. FIG. 7 shows the pin arrangement of the signal line connector 11a, the power line connector 11b, and the additional signal line connector 12.

  In the present embodiment, the signal line connector 11a and the additional signal line connector 12 have substantially the same shape, but the signal line connector 11a and the additional signal line connector 12 are formed point-symmetrically with an intermediate point therebetween as a reference point. ing. This is because when the external storage device of the present embodiment is attached to a host device such as a PC, the connection between the signal line connector 11a and the additional signal line connector 12 is not mistaken.

  FIG. 8 is a block diagram showing a schematic configuration of hardware of the external storage device according to the present embodiment. In FIG. 8, 20 is an external storage device of this embodiment, 21 is an SSD controller, 22 is a DRAM cache, 23 is a DC-DC converter, and 24 is a flash memory.

  The SSD controller 21 includes a CPU 25 that controls the entire external storage device 20, a flash controller 26 that controls data writing / reading with respect to the flash memory 24, a SATA controller 27 that performs data transmission / reception control over the SATA interface, and a SATA controller. 27 is provided with a SATA PHY 28 for converting the data transmission / reception by 27 into an electrical signal in the actual signal line connectors 11a, 12 and these are connected by a common bus.

  As already described, in this embodiment, two signal line connectors 11a and 12 conforming to the SATA standard are provided, and two sets of the SATA controller 27 and SATA PHY 28 are provided correspondingly. For convenience, data transmission / reception using the signal line connector 11a and the corresponding SATA controller 27 and SATA PHY 28 is performed using the port A, and the additional signal line connector 12 and the corresponding SATA controller 27 and SATA PHY 28 are used. Data transmission / reception using the port B is referred to as data transmission / reception using the port B.

  The DRAM cache 22 is used for temporarily caching data when data is transmitted / received by the SSD controller 21. The DC-DC converter 23 converts the power supply voltage supplied from the power supply line connector 11 b into a power supply voltage suitable for each hardware constituting the external storage device 20 and supplies the power supply voltage. In the present embodiment, the flash memory 24 is configured by stacking four flash memory dies.

  In FIG. 8, reference numeral 30 denotes a host device (main device) to which the external storage device 20 of the present embodiment is connected. The host device 30 includes a CPU 31 that controls the entire host device 30, and the external storage device 20. Are provided with a SATA controller 32 and SATA PHY 33 for writing / reading data to / from the power source, and a power supply 34 for supplying a power supply voltage to the external storage device 20. Since the external storage device 20 of this embodiment includes two SATA interfaces as described above, the host device 30 also includes two sets of SATA controllers 32 and SATA PHYs 33 corresponding thereto. Although not shown in FIG. 8, the host device 30 also includes a signal line, a power line connector, and an additional signal line connector compliant with the SATA standard, like the external storage device 20 of the present embodiment.

  Next, a data transfer procedure in the external storage device 20 of this embodiment will be described with reference to FIG. When the host device 30 instructs the external storage device 20 to read data, the CPU 25 reads the corresponding data from the flash memory 24 and temporarily caches it in the DRAM cache 22 (a). Next, the CPU 25 adds the header and number data to the data in the DRAM cache 22 and sends it to the port A or port B, and sequentially transfers this data from the port A or port B that is vacant at the time of sending (b). The number data to be added to the data is, for example, natural number data that is valid only at the time of reading data once, and is given in ascending order from 0 in the data transfer cycle order. Further, the “vacant port” means that a port that cannot perform data transfer at that time due to data retransmission as a result of CRC (Cyclic Redundancy Check) detection is avoided. In this way, the data sequentially transferred using the port A and the port B is stored in the host device 30 using the number data as a key (c). In the case of writing data to the external storage device 20, data writing is performed using the reverse procedure of the procedure shown in FIG.

  Therefore, according to the present embodiment, since two SATA interfaces are provided in the external storage device 20 and data is written / read using these two SATA interfaces, an SSD having only one normal SATA interface is used. Compared to the device, it is possible to realize a data transfer rate exceeding the data transfer rate of the SATA interface alone. As a result, the data transfer speed of the entire external storage device that is closer to the data transfer speed of the flash memory can be realized.

  Further, in the external storage device 20 of the present embodiment, the connector 11 conforming to the SATA standard and the long-side side surface of the housing 10 in the form factor of the 2.5 inch disk drive defined in the SFF-8201 standard. The extension signal line connector 11c is provided in a region A between which no connector or the like is provided. Therefore, it is possible to attach the external storage device 20 to a host device such as a PC with almost no change in the mounting structure for a normal SSD device. It is possible to easily replace the external storage device 20 in the form.

  The details of the external storage device of the present invention are not limited to the above-described embodiments, and various modifications are possible. As an example, in the above-described embodiment, the DRAM cache 22 is used as the cache of the external storage device 20 that is an SSD. However, the present invention is not limited to this, and a known cache memory such as a NOR cache memory can be used. . In addition, by replacing the DRAM cache 22 with a non-volatile memory such as MRAM, FRAM (registered trademark), PRAM, or FeRAM, an internal power source (electric double layer capacitor 18) for maintaining the cache contents is not required. It becomes possible to do.

DESCRIPTION OF SYMBOLS 10 Case 11 Connector 11a Signal line connector 11b Power line connector 12 Extension signal line connector 13 Internal board 14 SSD controller chip 15 DRAM cache chip 16 Power supply IC
17 NAND flash chip 18 Electric double layer capacitor 20 External storage device 21 SSD controller 22 DRAM cache 23 DC-DC converter 24 Flash memory 25 CPU
26 Flash Controller 27 SATA Controller 28 SATA PHY
A area

Claims (6)

In an external storage device having an interface for transferring data to and from the main unit,
The external storage device includes a plurality of interfaces and a plurality of connectors corresponding to the interfaces,
The external storage device includes a rectangular parallelepiped housing,
The external storage device, wherein the plurality of connectors are provided on the same side surface of the housing.   2. The external storage device according to claim 1, wherein the plurality of interfaces are the same type of interface. 3. The external storage device includes two interfaces and two connectors, and the two connectors are provided adjacent to each other in the lateral direction on the same side surface of the housing. External storage device. Of the two connectors, one of the connectors is a pair of connectors for signal lines and power lines compliant with the SATA standard, and the other connector is a connector for signal lines compliant with the SATA standard. The external storage device according to claim 3. 5. The external storage device according to claim 4, wherein the signal line connector of one of the connectors and the signal line connector of the other connector are provided adjacent to each other. The external storage device according to any one of claims 1 to 5, wherein the external storage device has a 2.5 inch form factor conforming to SFF Committee.

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