JP2013206919A - Thin film transistor, manufacturing method of the same and display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a thin film transistor which can be applied to a transparent display and the like and which has higher initial characteristics and reliability than in the past.SOLUTION: A thin film transistor 10 has a bottom-gate configuration in which a gate electrode 2, a gate insulation film 3, an oxide semiconductor film 4, a source electrode 5S and a drain electrode 5D, and a protection film 6 are stacked on a substrate 1 in this order. The oxide semiconductor film 4 is formed in a region including the gate electrode 2 and a near-field region in an island shape and includes a channel region between the source electrode 5S and the drain electrode 5D. The drain electrode 5D extends to on the gate insulation film 3 on an outer side of the oxide semiconductor film 4 to form a distribution line 5L. On a surface of the distribution line 5L, a low-resistance distribution line 7 is formed and electrically connected with the distribution line 5L. On a surface of the protection film 6 above the oxide semiconductor film 4, a light shielding film 8 is formed so as to cover the oxide semiconductor film 4.

Description

  The present disclosure relates to a thin film transistor (TFT) using an oxide semiconductor, a manufacturing method thereof, and a display device using the thin film transistor.

  Oxide semiconductors such as zinc oxide or oxides containing oxygen and indium have excellent properties as active layers of semiconductor elements, and have recently been aimed at application to electronic devices such as TFTs, light-emitting devices, and transparent conductive films. Research and development has become active.

In order to improve the reliability of an oxide semiconductor TFT, it has been proposed to form a protective film made of Al ₂ O ₃ or the like on a source electrode and a drain electrode made of aluminum, molybdenum, ITO, or the like. (For example, refer nonpatent literature 1, patent literature 1, and patent literature 2.).

  Further, as a feature of the oxide semiconductor, since the channel itself is an oxide, it can be said that the contact between the semiconductor film and the oxide transparent electrode is possible. This can be expected to realize a completely transparent display. The transparent display realizes a high transmittance by making not only the TFT but also the flattening film and the electrode transparent. On the other hand, light emitted from an EL element or the like as a backlight directly enters the TFT because each layer is transparent as described above. In particular, when the wavelength of incident light is in the ultraviolet region, the operation of the oxide semiconductor element is destabilized. Therefore, in order to realize a highly reliable transparent display, it is necessary to block the incident light to the above-described TFT. As the light shielding film, for example, it has been proposed to form a planarization film on the source electrode and the drain electrode and form an electrode thereon to form a light shielding film (see, for example, Non-Patent Document 2).

  Further, when a transparent conductive film is used as a wiring of an active matrix display device, it has been proposed to draw a low resistance wiring made of Al or the like as a main part of the wiring for the purpose of reducing wiring resistance (for example, Patent Document 3). reference.).

JP 2011-187506 A JP 2012-4371 A JP 2010-98280 A

Toshiaki Arai et al. SID 10 Digest, (2010) C.S.Chuang et al.SID 08 Digest, (2008)

  However, the initial characteristics and reliability of such a thin film transistor applicable to a conventional transparent display or the like cannot be said to be high.

  Therefore, the problem to be solved by the present disclosure is to provide a thin film transistor that can be applied to a transparent display or the like and has higher initial characteristics and higher reliability than conventional ones.

  Another problem to be solved by the present disclosure is to provide a method of manufacturing a thin film transistor that can be applied to a transparent display or the like and can obtain a thin film transistor having higher initial characteristics and higher reliability than conventional ones.

  Still another problem to be solved by the present disclosure is to provide a high-performance display device using the above-described excellent thin film transistor.

In order to solve the above problems, the present disclosure provides:
A gate electrode;
A gate insulating film provided so as to cover the gate electrode;
An oxide semiconductor film provided over the gate insulating film;
A source electrode and a drain electrode made of a transparent conductive oxide provided on the oxide semiconductor film;
A protective film made of a metal oxide provided on the source electrode and the drain electrode;
A light shielding film provided on the protective film,
In the thin film transistor, the distance between the oxide semiconductor film and the light-shielding film is 2 nm or more and 400 nm or less.

In addition, this disclosure
Forming a gate electrode on the substrate;
Forming a gate insulating film so as to cover the gate electrode;
Forming an oxide semiconductor film over the gate insulating film;
Forming a channel protective film on the oxide semiconductor film;
Forming a source electrode and a drain electrode made of a transparent conductive oxide on the oxide semiconductor film,
A protective film made of a metal oxide is formed on the source electrode and the drain electrode,
Forming a light shielding film on the protective film,
In this method, the distance between the oxide semiconductor film and the light-shielding film is 2 nm or more and 400 nm or less.

In addition, this disclosure
The substrate includes a thin film transistor and a pixel,
The thin film transistor
A gate electrode;
A gate insulating film provided so as to cover the gate electrode;
An oxide semiconductor film provided over the gate insulating film;
A source electrode and a drain electrode made of a transparent conductive oxide provided on the oxide semiconductor film;
A protective film made of a metal oxide provided on the source electrode and the drain electrode, and a light-shielding film on the protective film;
In the display device, a distance between the oxide semiconductor film and the light-shielding film is 2 nm or more and 400 nm or less.

The transparent conductive oxide constituting the source electrode and the drain electrode is not basically limited as long as it is a transparent oxide having conductivity, but preferably has high conductivity and further has high light transmittance. More preferred. The transparent conductive oxide typically includes a transparent conductive oxide semiconductor. Specific examples of the transparent conductive oxide semiconductor are n-type semiconductors such as zinc oxide (ZnO), indium oxide (In ₂ O ₃ ), tin oxide (SnO ₂ ), and gallium oxide (Ga ₂ ). O ₃ ), tellurium oxide (TeO ₂ ), germanium oxide (GeO ₂ ), cadmium oxide (CdO), tungsten oxide (WO ₃ ), molybdenum oxide (MoO ₃ ), and the like. The Ga ₂ O _3, is preferably a β-Ga ₂ O ₃ having the most stable structure. Here, as what uses ZnO as a base material, AZO, GZO, IZO, FZO etc. are mentioned, for example. Further, the In ₂ O ₃ as a base material, for example, ITO, FTO and the like. Further, those of the SiO ₂ as a base material, ATO, FTO and the like. In addition, in the case of a p-type semiconductor, specifically, for example, those using CuAlO ₂ , LaCuOS, LaCuOSe, SrCu ₂ O ₂ , NiO, etc. as a base material can be mentioned. It is not limited to those listed.

  The thicknesses of the source electrode and the drain electrode are basically not limited, but are preferably as thin as possible. Specifically, the thickness of the source electrode and the drain electrode is preferably, for example, 1 nm to 200 nm, more preferably 100 nm to 200 nm, and most preferably 150 nm to 200 nm. However, it is not limited to these. Further, the thickness of the source electrode and the thickness of the drain electrode may be the same or different, but are preferably the same.

The metal oxide constituting the protective film is basically not limited, but is preferably a highly electrically insulating material, and more preferably a stable material. Metal oxides also include metal oxynitrides. Specific examples of the metal oxide include aluminum oxide (Al ₂ O ₃ ), titanium oxide (TiO ₂ ), zinc oxide (ZnO), indium oxide (In ₂ O ₃ ), and tin oxide (SnO ₂ ). Gallium oxide (Ga ₂ O ₃ ), tellurium oxide (TeO ₂ ), germanium oxide (GeO ₂ ), cadmium oxide (CdO), tungsten oxide (WO ₃ ), molybdenum oxide (MoO ₃ ), and the like. TiO ₂ is preferably a rutile type which is the most stable structure. The Ga ₂ O _3, is preferably a β-Ga ₂ O ₃ is the most stable structure. Specific examples of the metal oxynitride include aluminum oxynitride and titanium oxynitride, but the metal oxide is not limited to these.

  The thickness of the protective film is not basically limited, but is preferably as thin as possible. Specifically, the thickness of the protective film is preferably 1 nm or more and 200 nm or less, more preferably 100 nm or more and 200 nm or less, and most preferably 150 nm or more and 200 nm or less. It is not limited to.

  According to the present technology, since the protective film made of the metal oxide is provided on the source electrode and the drain electrode, it can be applied to a transparent display or the like, and a thin film transistor having higher initial characteristics and reliability than the conventional one can be obtained. it can. In addition, a high-performance display device using the above-described excellent thin film transistor can be obtained.

It is sectional drawing which shows the thin-film transistor which concerns on 1st Embodiment of this indication. 7 is a cross-sectional view illustrating a method of manufacturing the thin film transistor according to the first embodiment of the present disclosure in the order of steps. FIG. 7 is a cross-sectional view illustrating a method of manufacturing the thin film transistor according to the first embodiment of the present disclosure in the order of steps. FIG. 7 is a cross-sectional view illustrating a method of manufacturing the thin film transistor according to the first embodiment of the present disclosure in the order of steps. FIG. 7 is a cross-sectional view illustrating a method of manufacturing the thin film transistor according to the first embodiment of the present disclosure in the order of steps. FIG. It is sectional drawing which shows the thin-film transistor which concerns on 2nd Embodiment of this indication. It is sectional drawing showing the manufacturing method of the thin-film transistor which concerns on 2nd Embodiment of this indication to process order. It is sectional drawing showing the manufacturing method of the thin-film transistor which concerns on 2nd Embodiment of this indication to process order. It is sectional drawing showing the manufacturing method of the thin-film transistor which concerns on 2nd Embodiment of this indication to process order. Is a schematic diagram showing _a, V _g -I _d characteristics of the thin film transistor according to the second embodiment of the present disclosure. Is a schematic diagram showing _a, V _g -I _d characteristics of the thin film transistor according to a comparative example 1 of the present disclosure. It is a top view showing the circuit structure of the display apparatus by 3rd Embodiment. It is an equivalent circuit diagram which shows an example of the pixel drive circuit in the circuit structure of the display apparatus by 3rd Embodiment. It is a perspective view which shows the television to which the display apparatus by 3rd Embodiment is applied. It is a perspective view which shows the digital camera to which the display apparatus by 3rd Embodiment is applied. It is a perspective view which shows the notebook type personal computer to which the display apparatus by 3rd Embodiment is applied. It is a perspective view which shows the video camera to which the display apparatus by 3rd Embodiment is applied. It is a perspective view which shows the mobile telephone to which the display apparatus by 3rd Embodiment is applied. It is a perspective view which shows the digital single-lens reflex camera to which the display apparatus by 3rd Embodiment is applied. It is a perspective view which shows the head mounted display to which the display apparatus by 3rd Embodiment is applied.

  In order to solve the above-described problems, the present inventors have conducted intensive research. Therefore, attention is paid to the problem that the initial characteristics and reliability of an oxide semiconductor TFT in which a low-resistance wiring is routed on a wiring made of a transparent conductive oxide film are deteriorated as compared with a conventional oxide semiconductor TFT. I found several factors that lead to this problem. The outline is described below.

  First, the first factor is that the conductivity of the source electrode and the drain electrode becomes unstable due to the direct contact between the transparent conductive oxide film and the low-resistance wiring. When a low resistance wiring made of Al or the like is routed around a transparent conductive oxide film that is a wiring of an oxide semiconductor TFT, the low resistance wiring and the transparent conductive oxide film are generally laminated. At this time, the transparent conductive oxide film and the low resistance wiring are in direct contact. In particular, when the low resistance wiring is made of metal, oxygen in the transparent conductive oxide film diffuses into the low resistance wiring when the transparent conductive oxide film and the low resistance wiring are in direct contact. As a result, the oxygen concentration in the transparent conductive oxide film is reduced to cause instability of the conductive characteristics. In addition, in the contact region between the source and drain electrodes and the oxide semiconductor, the insulative conductivity is caused by the exchange of oxygen. As described above, it is considered that the initial characteristics and reliability of the oxide semiconductor TFT are deteriorated by destabilization of the conductivity of the source electrode and the drain electrode.

  In addition, as a second factor, the step of drawing a low-resistance wiring in the transparent conductive oxide film in manufacturing the oxide semiconductor TFT damages the oxide semiconductor TFT body. Since the low resistance wiring is provided on the transparent conductive oxide film, different patterning is required in each layer. If it does so, the patterning process in manufacture will increase. Etching by plasma or the like performed in the patterning process causes physical and chemical damage to the TFT body. For this reason, an increase in the number of patterning steps increases physical and chemical damage to the etching stopper film of the TFT. As described above, it is considered that the initial characteristics and reliability of the TFT are deteriorated also by increasing the damage to the TFT body at the time of manufacture.

  Furthermore, the present disclosure has also paid attention to problems in the light shielding film in the conventional thin film transistor. In general, an oxide semiconductor TFT is provided with a light-shielding film that blocks light in order to prevent deterioration due to light entering the oxide semiconductor. Since the light shielding film generally uses an anode electrode or the like on a planarizing film, a certain distance is generated between the light shielding film and the channel region. The planarization film becomes very thick to fill the step when the source electrode, the drain electrode, and the like are thick, or when the low resistance wiring is provided on the source electrode or the drain electrode. Then, the distance between the light-shielding film and the channel region becomes very large, and light leaked from the anode end enters the channel region, causing deterioration of the characteristics of the oxide semiconductor. This is considered to deteriorate the initial characteristics and reliability of the oxide semiconductor TFT.

  In order to solve the problems caused by these factors, the present inventors have further studied. Therefore, the present inventor has found that the above problem can be solved by providing a protective film, which is a thin film made of a metal oxide, on the transparent conductive oxide film and providing a light shielding film on the protective film. did.

Hereinafter, modes for carrying out the invention (hereinafter referred to as “embodiments”) will be described. The description will be given in the following order.
1. First Embodiment (Thin Film Transistor and Manufacturing Method Thereof)
2. Second embodiment (thin film transistor and manufacturing method thereof)
3. Third embodiment (display device)

<1. First Embodiment>
[Thin film transistor]
FIG. 1 is a cross-sectional view showing the thin film transistor according to the first embodiment. As shown in FIG. 1, in this thin film transistor 10, a gate electrode 2, a gate insulating film 3, an oxide semiconductor film 4, a source electrode 5S and a drain electrode 5D, and a protective film 6 are laminated on a substrate 1 in this order. It has a bottom gate type configuration. The oxide semiconductor film 4 is provided in an island shape in a region including the gate electrode 2 and the vicinity thereof, and is provided so as to have a channel region between the source electrode 5S and the drain electrode 5D. Further, the drain electrode 5 </ b> D extends on the gate insulating film 3 outside the oxide semiconductor film 4 to form a wiring 5 </ b> L. On the surface of the wiring 5L, a low resistance wiring 7 is provided and electrically connected. The wiring 5L may be an extension of the source electrode 5S, and the low resistance wiring 7 is similarly provided on the surface of the wiring 5L. The wiring 5L can be used as a pixel electrode. Further, the wiring 5L may be formed on both sides of the thin film transistor 10 by extending both the source electrode 5S and the drain electrode 5D, but it is preferable to form the wiring 5L only on one side of the thin film transistor 10. In the case where the wiring 5L is formed on both sides of the thin film transistor 10, the low resistance wiring 7 may be provided only on one side or on both sides, but is preferably provided only on one side. A light shielding film 8 is provided on the surface of the protective film 6 above the oxide semiconductor film 4, that is, above the channel layer so as to cover the oxide semiconductor film 4. The low resistance wiring 7 and the light shielding film 8 are provided apart from each other, and the low resistance wiring 7 and the light shielding film 8 are provided electrically independently of each other. That is, the low resistance wiring 7 and the light shielding film 8 are electrically isolated.

  The material constituting the substrate 1 is basically not limited as long as it is an electrically insulating material, but is preferably transparent. Specific examples of the material constituting the substrate 1 include a transparent inorganic material and a transparent resin material. Examples of the glass material include quartz glass, borosilicate glass, phosphate glass, and soda glass. If it is a transparent resin material, for example, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polybutylene terephthalate (PBT), acetyl cellulose, tetraacetyl cellulose, polyphenylene sulfide, polycarbonate (PC), polyethylene (PE) , Polypropylene (PP), polyvinylidene fluoride, brominated phenoxy, amides, polyimides such as polyetherimide, polystyrenes, polyarylates, polysulfones such as polyestersulfone, polyolefins and the like. Moreover, the board | substrate 1 may be comprised only from 1 type of material chosen from the group which consists of the above-mentioned material, and may be comprised from 2 or more types of materials. A specific example of the substrate 1 made of two or more kinds of materials includes a laminate, but is not limited thereto.

  The shape of the substrate 1 is not basically limited, but is preferably a planar shape. Specific examples of the shape of the substrate 1 include a flat plate shape, a curved plate shape, and a film shape.

  The material constituting the gate electrode 2 is basically not limited as long as it is a conductive material, but is preferably a highly conductive and inexpensive material. Specifically, as a material constituting the gate electrode 2, for example, platinum (Pt), titanium (Ti), aluminum (Al), ruthenium (Ru), molybdenum (Mo), copper (Cu), tungsten (W ) And nickel (Ni) or at least one metal selected from the group consisting of nickel (Ni), alloys or polycrystalline silicon.

  The shape of the gate electrode 2 is not basically limited, but the vertical cross section is preferably a trapezoidal shape, and more preferably an isosceles trapezoidal shape. In the case where the vertical cross section of the gate electrode 2 is a trapezoid or an isosceles trapezoid, it is preferably a trapezoid having a gentle side. Then, the angle between the side and the bottom of the trapezoid is preferably, for example, 10 ° or more and 80 ° or less, more preferably 20 ° or more and 60 ° or less, and 30 ° or more and 50 ° or less. Most preferably it is.

  The gate electrode 2 may be a single layer or a laminate of a plurality of layers, but is preferably a single layer. When laminating a plurality of layers, the same material may be laminated, or a plurality of materials may be laminated in combination, and the material constituting the gate electrode 2 is appropriately selected from the materials listed above. .

  The material constituting the gate insulating film 3 is basically not limited as long as it is a material having electrical insulation, but a material having high electrical insulation is preferable. Specific examples of the material constituting the gate insulating film 3 include silicon oxide, silicon nitride, aluminum oxide, and aluminum nitride. The gate insulating film 3 may be a film composed of one type selected from the group consisting of the materials listed above, or may be a film composed of two or more types.

  The gate insulating film 3 may be basically provided in any manner as long as the gate electrode 2 and the oxide semiconductor film 4 are electrically insulated. For example, the gate insulating film 3 is configured to cover the gate electrode 2. The gate insulating film 3 is preferably provided in a stacked manner. The gate insulating film 3 may be a single film or a laminate of a plurality of films, but is preferably a single film. In the case of laminating a plurality of films, the same material may be laminated, or a plurality of materials may be laminated in combination, and the material constituting the gate insulating film 3 is appropriately selected from the materials listed above. It is.

  The thickness of the gate insulating film 3 is basically not limited, but is preferably as thin as possible. The specific film thickness of the gate insulating film 3 is preferably, for example, 50 nm or more and 1 μm or less, more preferably 100 nm or more and 600 nm or less, and most preferably 200 nm or more and 400 nm or less. Moreover, it is preferable that the film thickness of the gate insulating film 3 is uniform.

  The material forming the oxide semiconductor film 4 is basically not limited as long as it is an oxide semiconductor. Here, an oxide semiconductor is a compound containing oxygen and an element such as indium (In), gallium (Ga), zinc (Zn), tin (Sn), or zirconium (Zr). Examples of the oxide semiconductor include an amorphous oxide semiconductor and a crystalline oxide semiconductor. In the case of an amorphous oxide semiconductor, for example, indium gallium zinc oxide (IGZO) may be used. In the case of a crystalline oxide semiconductor, zinc oxide (ZnO), indium zinc oxide (IZO (registered trademark)), indium gallium oxide (IGO), and the like can be given.

  The oxide semiconductor film 4 may be basically provided in any manner as long as it has a function as an active layer of the thin film transistor 10. However, the oxide semiconductor film 4 may be provided on the gate insulating film 3 above the gate electrode 2. It is preferable to be laminated on the surface. The oxide semiconductor film 4 preferably has a stacked structure of an amorphous film and a crystallized film. The source electrode 5S and the drain electrode 5D are provided in contact with the crystallized film. Specifically, the oxide semiconductor film 4 has a stacked structure in which an amorphous film and a crystallized film are stacked in this order from the gate electrode 2 side. Thereby, uniform and good electrical characteristics of the thin film transistor 10 can be obtained.

  The thickness of the oxide semiconductor film 4 is not basically limited, but is preferably determined in consideration of oxygen supply by annealing after the oxide semiconductor film 4 is formed. The film thickness is preferably, for example, 5 nm or more and 100 nm or less, more preferably 20 nm or more and 80 nm or less, and most preferably 40 nm or more and 60 nm or less, but is not limited thereto. .

  Although the material which comprises the source electrode 5S and the drain electrode 5D will not be limited fundamentally if it is a transparent conductive oxide, For example, what has high electroconductivity and is cheap is preferable. The source electrode 5S and the drain electrode 5D may be composed of one type of material selected from the group consisting of the materials listed above as the transparent conductive oxide, or may be composed of a combination of two or more types of materials. It may be. Further, the source electrode 5S and the drain electrode 5D may be made of the same type of material, or may be made of different materials. The reason why the material constituting the source electrode 5S and the drain electrode 5D is a transparent conductive oxide is that the electrical characteristics of the thin film transistor 10 can be stabilized first. That is, when the oxide semiconductor film 4 comes into contact with a metal that easily extracts oxygen, oxygen is desorbed and crystal defects are formed, so that the electrical characteristics of the thin film transistor 10 become unstable. Therefore, the source electrode 5S and the drain electrode 5D that are in contact with the oxide semiconductor film 4 are films made of a transparent conductive oxide containing oxygen. Then, oxygen desorption from the oxide semiconductor film 4 can be suppressed, and the electrical characteristics of the thin film transistor 10 are stabilized. Second, the source electrode 5S and / or the drain electrode 5D are shaped to extend to the gate insulating film 3 outside the oxide semiconductor film 4 to form a wiring 5L, and the wiring 5L is a pixel electrode. This is because a substantially transparent thin film transistor can be obtained.

  Although the shape of the source electrode 5S and the drain electrode 5D is not basically limited, for example, a film shape is preferable. The film constituting the source electrode 5S and the drain electrode 5D may be a single film or a laminate of a plurality of films, but is preferably a single film. In the case of laminating a plurality of films, the same material may be laminated, or a plurality of materials may be combined and laminated, and the transparent conductive oxide is appropriately selected from the materials listed above.

  The film thickness of the source electrode 5S and the drain electrode 5D is basically not limited, but for example, the thicknesses listed above as the thicknesses of the source electrode 5S and the drain electrode 5D can be appropriately selected.

  The material constituting the protective film 6 is not basically limited as long as it is a metal oxide, and for example, it can be appropriately selected from the materials listed above as the metal oxide constituting the protective film. The protective film 6 is particularly preferably made of aluminum oxide or titanium oxide, but is not limited thereto.

  The protective film 6 may be basically any film as long as it has a function as a passivation film, and may be a single film or a laminate of a plurality of films. However, a single film is preferable. When laminating a plurality of films, the same material may be laminated, or a plurality of materials may be laminated in combination, and the metal oxide is appropriately selected from the materials listed above.

  Although the film thickness of the protective film 6 is not fundamentally limited, For example, the thickness quoted above can be selected suitably as thickness of a protective film. Since the protective film 6 has a small film thickness of the source electrode 5S and the drain electrode 5D, the protective film 6 can have sufficient coverage even if the film thickness is small. This is because the step difference due to the source electrode 5S and the drain electrode 5D is small, and thus the decrease in coverage at the step portion is small even if the protective film 6 is formed along the element surface.

  The material constituting the low resistance wiring 7 is basically not limited as long as it is a conductive material. For example, the conductivity of the low resistance wiring 7 is higher than that of at least one of the source electrode 5S and the drain electrode 5D. It is preferable that it is comprised with such a material. Examples of the material constituting the low resistance wiring 7 include a simple metal, a metal compound, and an alloy. As a simple metal, for example, silver (Ag), copper (Cu), gold (Au), aluminum (Al), magnesium (Mg), tungsten (W), cobalt (Co), zinc (Zn), nickel (Ni ), Potassium (K), lithium (Li), iron (Fe), platinum (Pt), tin (Sn), chromium (Cr), lead (Pb), titanium (Ti), tantalum (Ta), molybdenum (Mo ), Vanadium (V), niobium (Nb), hafnium (Hf), zirconium (Zr), ruthenium (Ru), iridium (Ir), and lanthanum (La). Examples of the metal compound include metal oxides, metal carbides, metal nitrides, metal cyanides, and the like. Specifically, for example, a metal metal selected from the group consisting of those listed above as a single metal Compound etc. are mentioned. Examples of the alloy include a binary or higher alloy. Examples of the binary or higher alloy include an alloy made of at least two kinds of metals selected from the group consisting of the above metals as a single metal.

  The low resistance wiring 7 is not basically limited as long as it is provided so as to be electrically connected to at least one of the source electrode 5S and the drain electrode 5D. For example, at least one of the source electrode 5S and the drain electrode 5D is used. It is preferable to be provided by laminating. Further, it is preferably provided in a region other than above the channel region, and more preferably provided in a region as close as possible to the channel region other than the above region. Then, the region where the low resistance wiring 7 is provided is, for example, parallel to the edge of the oxide semiconductor film 4 at a distance of 100 nm to 100 μm from the edge of the oxide semiconductor film 4 on the side where the wiring 5L is formed. However, the present invention is not limited to this. However, the present invention is not limited to this, but is preferably the region of 750 nm to 100 μm.

  The shape of the low resistance wiring 7 is not basically limited, but is preferably a film shape, for example. The film constituting the low resistance wiring 7 may be a single film or a laminate of a plurality of films, but is preferably a single film. In the case of laminating a plurality of films, the same material may be laminated, or a plurality of materials may be laminated in combination. For example, the material of the low resistance wiring 7 is appropriately selected from those listed above It is. When the low-resistance wiring 7 is a laminated film, it is preferable to laminate three or more layers, but the present invention is not limited to this.

  The film thickness of the low resistance wiring 7 is preferably thick from the viewpoint of ensuring conductivity, and is preferably thin from the viewpoint of thinning the entire element. Therefore, there is an optimum range for the film thickness of the low resistance wiring 7. Then, the film thickness of the low resistance wiring 7 is preferably, for example, 300 nm or more and 2 μm or less, more preferably 600 nm or more and 1.5 μm or less, and most preferably 800 nm or more and 1.2 μm or less. It is not limited to these.

  The material constituting the light shielding film 8 is basically not limited as long as it is a material having a light shielding property, but a material having conductivity is preferable. As a material constituting the light shielding film 8, for example, the materials listed above as the material of the low resistance wiring 7 can be appropriately selected.

  The light shielding film 8 is basically not limited as long as it is provided on the surface of the protective film 6 above the oxide semiconductor film 4 so as to block light incident on the oxide semiconductor film 4. For example, the light shielding film 8 is preferably provided on the protective film 6 so as to cover the oxide semiconductor film 4. The light shielding film 8 is preferably provided, for example, electrically isolated from the low resistance wiring 7. Further, it is preferably provided in the same layer as the low-resistance wiring 7. Specifically, for example, the upper surface of the end portion of the light shielding film 8 and the upper surface of the low-resistance wiring 7 are in the same plane. It is done.

  The light shielding film 8 may be a single film or a laminate of a plurality of films, but is preferably a laminate film. In the case of laminating a plurality of films, the same material may be laminated, or a plurality of materials may be laminated in combination. For example, the material of the low resistance wiring 7 is appropriately selected from those listed above It is. When the light-shielding film 8 is a laminated film, it is preferable to laminate three or more layers, but the invention is not limited to these.

  The thickness of the light shielding film 8 is preferably thick from the viewpoint of ensuring light shielding properties, and is preferably thin from the viewpoint of thinning the entire element. For this reason, the film thickness of the light shielding film 8 has an optimum range. Then, the thickness of the light shielding film 8 is preferably, for example, 300 nm or more and 2 μm or less, more preferably 600 nm or more and 1.5 μm or less, and most preferably 800 nm or more and 1.2 μm or less. It is not limited to this.

  Thus, since the light shielding film 8 is provided on the surface of the protective film 6 above the oxide semiconductor film 4 so as to cover the oxide semiconductor film 4, the oxide semiconductor film is compared with the conventional thin film transistor. The light shielding property to 4 is significantly increased. The reason is that the light shielding material is formed closer to the oxide semiconductor film 4 than in the case where light shielding is performed by the pixel electrode in the conventional thin film transistor. In addition, a light shielding film 8 is provided along the shape of the oxide semiconductor film 4.

  As an example of the distance between the surface of the oxide semiconductor film 4 and the light-shielding film 8, the distance in the present embodiment with respect to the distance between the surface of the oxide semiconductor film in the conventional thin film transistor and the pixel electrode is 1/10. It becomes. As described above, it is considered that the light shielding property with respect to the oxide semiconductor film 4 is significantly improved by forming the light shielding film 8 at a location much closer to the channel region than in the past.

According to the thin film transistor of the first embodiment, the following various effects can be obtained. In other words, since all the layers in contact with the oxide semiconductor film 4 are made of oxide, oxygen desorption from the oxide semiconductor film 4 to the source electrode 5S and the drain electrode 5D can be effectively suppressed. Further, the desorption of oxygen from the source electrode 5S and the drain electrode 5D to the protective film 6 can be effectively suppressed. In addition, since the low resistance wiring 7 electrically connected to at least one of the source electrode 5S and the drain electrode 5D is provided, even if the thickness of the source electrode 5S and the drain electrode 5D is reduced, the low resistance wiring 7 Conductivity can be ensured. In addition, since the low resistance wiring 7 is provided apart from the contact portions of the source electrode 5S and the drain electrode 5D, oxygen desorption in the oxide semiconductor film due to the low resistance wiring 7 can be reduced, and the thin film transistor is deteriorated. Can be suppressed. Further, since the thickness of the source electrode 5S and the drain electrode 5D is reduced, the step is reduced, and the coverage can be increased even if the protective film 6 is formed thin. In addition, since the light shielding film 8 is provided on the protective film 6 above the oxide semiconductor film 4 so as to cover the oxide semiconductor film 4, and the protective film 6 is formed thinly along the element surface, the conventional flat The distance between the surface of the oxide semiconductor film 4 and the light shielding film is smaller than that of the pixel electrode formed on the conversion film. Accordingly, the light shielding property to the oxide semiconductor film is significantly increased. In addition, since the low-resistance wiring 7 and the light shielding film 8 are electrically isolated, the protective film 6 and the oxide semiconductor film 4 are not adversely affected by the flow of electricity. In addition, since the source electrode 5S and / or the drain electrode 5D are shaped to extend to the gate insulating film 3 outside the oxide semiconductor film 4, the wiring 5L is formed, and the wiring 5L is a pixel electrode. Transparent thin film transistor can be obtained.
[Thin Film Transistor Manufacturing Method]

  This thin film transistor can be manufactured, for example, as follows.

2-5 is sectional drawing which shows the manufacturing process of the thin-film transistor 10. As shown in FIG.
First, a metal film as a material for the gate electrode 2 is formed on the front surface of the substrate 1. Examples of the method for forming the metal film include a method of forming the gate electrode 2 by a vapor deposition method, a sputtering method, or the like using the materials listed above as the material of the gate electrode 2, but the method is not limited to these methods.

  Next, as shown in FIG. 2A, the metal film formed on the substrate 1 is patterned to form the gate electrode 2. For patterning, for example, a photolithography method or the like is used, but the method is not limited to this method.

  Next, as shown in FIG. 2B, a gate insulating film 3 is formed on the surface of the gate electrode 2. The formation method of the gate insulating film 3 is not basically limited. For example, the gate insulating film 3 may be formed by the plasma CVD method, the sputtering method, or the like using the above-described materials. . As the plasma CVD method, for example, a method of forming a silicon nitride film using a gas such as silane, ammonia, or nitrogen as a source gas, or a silicon oxide film using a gas such as silane or dinitrogen monoxide as a source gas. These methods may be used, and these films may be stacked. Moreover, as a sputtering method, for example, reactive plasma sputtering is preferable. Specifically, as reactive plasma sputtering, for example, silicon is used as a sputtering target, and sputtering is performed using oxygen, water vapor, nitrogen, or the like in a discharge atmosphere, thereby forming a silicon oxide film or a silicon nitride film. Is mentioned. Further, a method of forming an aluminum oxide film or an aluminum nitride film by sputtering in the same manner using aluminum as a sputtering target may be used. Further, at least two or more selected from the group consisting of the films listed above may be laminated, but the present invention is not limited to these.

  Next, as illustrated in FIG. 2C, the oxide semiconductor film 4 is formed over the gate insulating film 3. Although the formation method of the oxide semiconductor film 4 is not basically limited, for example, the oxide semiconductor film 4 is formed by a sputtering method, a CVD method, a vapor deposition method, or the like using the materials described above as the material of the oxide semiconductor film 4.

When the oxide semiconductor film 4 is made of, for example, indium gallium zinc oxide (IGZO), for example, a DC sputtering method using a ceramic of indium gallium zinc oxide as a target is used, and a mixed gas of argon (Ar) and oxygen is used. The oxide semiconductor film 4 can be formed on the gate insulating film 3 by plasma discharge. Before the plasma discharge, the vacuum vessel is evacuated until the degree of vacuum becomes 1 × 10 ⁻⁴ Pa or less, and then a mixed gas of argon and oxygen is introduced.

  When the oxide semiconductor film 4 is made of, for example, ZnO, for example, an RF sputtering method using a ZnO ceramic target, or a gas atmosphere containing argon (Ar) and oxygen using a zinc metal target. The oxide semiconductor film 4 can be formed by a sputtering method using a DC power source. At this time, the carrier concentration in the oxide semiconductor film 4 serving as a channel can be controlled by changing the flow rate ratio of argon and oxygen in forming the oxide.

  Next, as shown in FIG. 3A, the oxide semiconductor film 4 is patterned into a desired shape. The shape of the oxide semiconductor film 4 is basically not limited. For example, the oxide semiconductor film 4 is formed by patterning in an island shape in a region including the gate electrode 2 and the vicinity thereof.

  Although the patterning method of the oxide semiconductor film 4 is not fundamentally limited, for example, a method of patterning by etching after performing a photolithography process, or the like can be given. Regarding the etching method, the oxide semiconductor constituting the oxide semiconductor film 4 is preferably wet etching because it is easily dissolved in acid, alkali, and the like, but is not limited thereto, and is not limited to dry etching. Etching may be used.

  In the case where the oxide semiconductor film 4 is made of, for example, ZnO, In, Ga, Zr, Sn, etc., and is made of a crystalline material in which the ratio of In, Sn is larger than that of other constituent elements, the oxide semiconductor It is preferable to subject the surface to a crystallization annealing treatment after the film 4 is formed. By this treatment, resistance to the etching solvent can be improved.

  Next, as shown in FIG. 3B, a transparent conductive oxide film 5 is formed on the oxide semiconductor film 4 and the gate insulating film 3. The film thickness of the transparent conductive oxide film 5 is not basically limited, but is preferably as thin as possible in order to reduce the level difference on the element surface. The film thickness of the transparent conductive oxide film 5 can be selected as appropriate from those described above as the film thicknesses of the source electrode 5S and the drain electrode 5D, for example. Further, the transparent conductive oxide film 5 may be formed of a single layer or a plurality of layers, but from the viewpoint of making the transparent conductive oxide film 5 as thin as possible, it is formed of a single layer. It is preferable to do. The method for forming the transparent conductive oxide film 5 is not basically limited. For example, the transparent conductive oxide film 5 may be formed by sputtering using the above-described materials for the source electrode 5S and the drain electrode 5D. Can do.

  Next, as shown in FIG. 3C, the source electrode 5S and the drain electrode 5D are formed. By patterning the transparent conductive oxide film 5, the source electrode 5S and the drain electrode 5D are formed apart from each other. Further, the drain electrode 5D is formed so as to extend to the gate insulating film 3 outside the oxide semiconductor film 4. This extending portion becomes the wiring 5L. The wiring 5 </ b> L may be formed so that the source electrode 5 </ b> S extends to the gate insulating film 3 outside the oxide semiconductor film 4. Further, the wiring 5L may be provided only on the source electrode 5S side, may be provided only on the drain electrode 5D side, or may be provided on both sides. Further, the method of separating the source electrode 5S and the drain electrode 5D from each other is not basically limited. For example, the source electrode 5S and the drain electrode 5D are patterned so as to provide an opening immediately above the channel region. At this time, the surface of the oxide semiconductor film 4 is preferably subjected to crystallization annealing treatment. Since the oxide semiconductor film 4 becomes the crystallized film 4, damage to the oxide semiconductor film 4 due to patterning can be suppressed. The method for patterning the source electrode 5S and the drain electrode 5D is not basically limited, but examples include wet etching and dry etching. The source electrode 5S, the drain electrode 5D, and the wiring 5L can also be formed by forming the transparent conductive oxide film 5 on the oxide semiconductor film 4 independently. In this case, since the patterning step is not necessary, the oxide semiconductor film 4 is not deteriorated during the patterning.

Next, as shown in FIG. 4A, a protective film 6 is formed on the entire surface of the element where the source electrode 5S and the drain electrode 5D are formed. The protective film 6 includes a source electrode 5S and a drain electrode that are formed of the oxide semiconductor film 4 and the transparent conductive oxide film 5 by hydrogen in the atmosphere during the process or the like, or by heat treatment or the like. This prevents oxygen from being desorbed from 5D, wiring 5L, and the like. In general, the density of the protective film 6 is preferably high for the purpose of preventing permeation of oxygen and hydrogen. Specifically, the density is preferably, for example, from 2.5 g / cm ^{3 to} 4.0 g / cm ³ , and from 3.0 g / cm ^{3 to} 4.0 g / cm ^3. Is more preferable, but is not limited thereto.

  The method for forming the protective film 6 is not basically limited. For example, a method of forming and forming the protective film 6 by plasma CVD or sputtering using the materials described above as the material of the protective film 6 may be used. In the case where the protective film 6 is formed by a sputtering method, for example, an oxygen gas-containing argon gas atmosphere, an oxygen-containing nitrogen gas atmosphere, or the like using a target mainly composed of the above-described materials as the material of the protective film 6 is used. Form a film. The target may be mainly composed of the oxides listed above as the material of the protective film 6, or may be composed mainly of the oxide added with impurities. Further, it is preferable to add oxygen radicals when forming the protective film 6, but the protective film 6 is not limited to the above.

  In this step, the element surface can be sufficiently covered even if the protective film 6 has a small thickness. This is because the level difference between the source electrode 5S and the drain electrode 5D and the gate insulating film 3 is smaller than in the prior art. The reason why the step becomes small is considered that the film thickness of the source electrode 5S and the drain electrode 5D is thinner than the conventional one. Specifically, in the prior art, the source electrode 5S and the drain electrode 5D have a thickness of, for example, 0.3 μm to 2 μm, whereas the source electrode 5S and the drain electrode 5D have a thickness of It is formed as thin as 1 nm to 200 nm.

  Next, as shown in FIG. 4B, a contact hole 9 is formed in the protective film 6 on the wiring 5L to bring the low resistance wiring 7 into contact with the wiring 5L, and the wiring 5L is exposed. The position where the contact hole 9 is formed is basically not limited, but may be any position as long as the oxide semiconductor film 4 is not damaged by the process of providing the contact hole 9 and the patterning process of the low resistance film 11 which is a subsequent process. The oxide semiconductor film 4 should be as close as possible. Specifically, the position where the oxide semiconductor film 4 is not damaged includes, for example, a position away from the contact region between the oxide semiconductor film 4 and the source electrode 5S and drain electrode 5D. The reason why the low resistance wiring 7 should be as close as possible to the oxide semiconductor film 4 is that the wiring resistance needs to be as low as possible. Then, it is preferable that the position where the contact hole 9 is provided exists in a certain region. This region is, for example, a region that extends in parallel to the end side of the oxide semiconductor film 4 at a distance of 100 nm to 100 μm vertically from the end side of the oxide semiconductor film 4 on which the wiring 5L is formed. Preferably, the region is 750 nm to 100 μm, more preferably 1000 nm to 50 μm, but the region is not limited to this.

  Next, as illustrated in FIG. 4C, the low resistance film 11 is formed on the protective film 6 and the wiring 5 </ b> L in the contact hole 9. The low resistance film 11 is not basically limited as long as the low resistance film 11 is provided so as to close the contact hole 9, but the oxide semiconductor film 4 is entirely covered on the protective film 6 above the oxide semiconductor film 4. It is preferable to provide them. That is, the low resistance film 11 is preferably provided uniformly over the entire region including the region where the oxide semiconductor film 4 is provided and the region of the contact hole 9.

  Although the formation method of the low resistance film 11 is not basically limited, for example, the low resistance film 11 can be formed by a method such as a vapor deposition method or a sputtering method using the materials listed above as the material of the low resistance wiring 7. It is preferable to use a sputtering method. In addition, the low resistance film 11 may be constituted by a single layer film or a laminated film. However, when the low resistance film 11 is constituted by a laminated film, the low resistance film 11 is sequentially laminated by using a method such as a sputtering method. Can do. Further, the film thickness of the low resistance film 11 is not basically limited, but for example, the film thickness listed above as the film thickness of the low resistance wiring 7 can be appropriately selected.

  Next, as shown in FIG. 5, the low resistance film 11 provided above the region between the oxide semiconductor film 4 and the contact hole 9 is patterned to provide an opening 12, and the low resistance wiring 7 and the light shielding film are formed. 8 and spaced apart. The patterning of the low resistance film 11 is not basically limited as long as the light shielding film 8 is formed so as to cover the oxide semiconductor film 4 and the low resistance wiring 7 is electrically connected to the wiring 5L. However, it is preferable to form the low resistance wiring 7 and the light shielding film 8 so as to be electrically independent. Further, it is preferable that the entire contact hole 9 is formed so as to be in contact with the low resistance wiring 7.

  The patterning method of the low resistance film 11 is not basically limited, but examples include dry etching using gas plasma, reactive ion etching, and the like. Examples of the gas plasma used for dry etching include chlorine gas.

  In this process, when dry etching using gas plasma is used for patterning, conventionally, the source electrode 5S, the drain electrode 5D, and the like are damaged. However, in the thin film transistor 10 according to the present embodiment, the protective film 6 is formed thereon, and further, the region other than the upper part of the oxide semiconductor film 4 is patterned, so that this damage can be prevented. .

  Thus, after forming the protective film 6, the contact hole 9 is formed in the protective film 6, the low resistance film 11 is formed on the protective film 6, and then patterned to form the low resistance wiring 7 and the light shielding film 8. Therefore, the light shielding film 8 can be provided in the vicinity of the oxide semiconductor film 4. Thereby, the light shielding property to the oxide semiconductor film 4 is significantly increased.

<Example 1>
A Cu film was formed on the plastic film substrate as the substrate 1. As the plastic film substrate, a highly heat-resistant polyimide film was used. The Cu film was formed by a sputtering method. Next, the Cu film was subjected to photolithography to be patterned into a Cu electrode, which was used as the gate electrode 2. The Cu electrode, which is a patterned Cu film, has a columnar shape with an isosceles trapezoidal cross section, and the bottom is in contact with the plastic film substrate, and its height is 200 nm.

Next, a SiO ₂ film was formed on the Cu film and the plastic film substrate. The SiO ₂ film was formed by a sputtering method. The SiO ₂ film was formed on the entire surface of the plastic film substrate so as to cover the Cu film, and this was used as the gate insulating film 3. The thickness of the formed SiO ₂ film was 300 nm.

Next, an IGZO film was formed on the entire surface of the SiO ₂ film. The IGZO film was formed by a DC sputtering method using IGZO ceramic as a target. The DC sputtering method performs the following steps. First, an IGZO ceramic target and an element substrate to be formed are placed in a container at regular intervals. Next, the container is evacuated until the vacuum in the container is 1 × 10 ⁻⁴ Pa or less. Next, a mixed gas of argon and oxygen is introduced into the container. Next, an IGZO film is formed on the SiO ₂ film on the element substrate by plasma discharge with a mixed gas of argon and oxygen using IGZO ceramic as a target. The film thickness of the IGZO film formed by this process was 50 nm.

  Next, after the IGZO film was subjected to photolithography, wet etching was performed to form the IGZO film so as to form an island shape in a region including the Cu electrode and the vicinity thereof, and the oxide semiconductor film 4 was obtained. Next, crystallization annealing treatment was performed on the surface of the formed IGZO film at 300 ° C. to obtain an oxide semiconductor film 4 in which the entire film was crystallized.

Next, an ITO film was formed on the IGZO film. The ITO film was formed to extend on the IGZO film and on the SiO ₂ film outside the IGZO film.

Next, this ITO film was patterned by a wet etching method to form a source electrode 5S and a drain electrode 5D. For patterning, the ITO film on the top end face of the IGZO film was separated by etching. Further, one of the ITO films extending on the SiO ₂ film outside the IGZO film was removed by etching. Thus, two ITO films formed separately on the IGZO film were formed. These ITO films are formed by extending the ITO film formed only on one IGZO film as the source electrode 5S and the other ITO film as the drain electrode 5D on the SiO ₂ film outside the IGZO film. The ITO film of the part made into ITO wiring. The film thickness of the formed source electrode 5S, drain electrode 5D, and ITO wiring was 100 nm.

Next, an Al ₂ O ₃ film was formed on the entire surface of the element surface on which the ITO film was formed.

Next, a contact hole was formed in the Al ₂ O ₃ film formed on the ITO wiring to expose the ITO wiring. The contact hole was formed in a region extending in parallel with the edge with a width of 10 μm from a position 15 μm away from the edge of the IGZO film in the vertical direction. The contact hole was formed by wet etching.

Next, a metal film was provided on the Al ₂ O ₃ film so as to uniformly cover the contact hole and the upper part of the IGZO film. The metal film was formed by laminating three layers in the order of Ti film, Al film, and Ti film. The metal film was formed by sequentially laminating layers by a sputtering method. The thickness of the entire metal film was 600 nm, and the thickness of each layer was 50 nm, 500 nm, and 50 nm in the order of the Ti film, Al film, and Ti film.

  Next, the formed metal film was patterned and electrically separated into a light shielding film and a low resistance wiring. The light shielding film was formed so that the IGZO film could be shielded from incident light from the outside or light from the panel. On the other hand, the low-resistance wiring was formed in a form that blocks the entire contact hole. Dry etching using chlorine was used for patterning the metal film. Thus, the target thin film transistor was manufactured.

According to the method of manufacturing the thin film transistor of the first embodiment, since the source electrode 5S and the drain electrode 5D made of the transparent conductive oxide film 5 are formed thin, the step with the gate insulating film 3 is reduced. can do. As a result, when the protective film 6 is formed on the entire surface of the element, the element can be effectively covered and protected even if the protective film 6 is thin.
Further, since the contact hole is provided after forming the protective film 6 and the low resistance wiring 7 is formed, the protective film 6 is made thinner than the conventional structure in which the protective film 6 is formed after the low resistance wiring 7 is formed. It can be formed and the conductivity of the wiring 5L can be improved. Further, since the contact hole is formed at a position away from the contact region between the source electrode 5S and the drain electrode 5D and the channel, the contact hole can be formed without affecting the oxide semiconductor film 4.
In addition, since the low resistance wiring 7 and the light shielding film 8 are formed after the low resistance film 11 is formed on the protective film 6, the low resistance wiring 7 and the light shielding film 8 are formed by patterning by dry etching or the like. The protective film 6 effectively protects the oxide semiconductor film 4. As a result, the low resistance wiring 7 and the light shielding film 8 can be patterned by etching without affecting the oxide semiconductor film 4. In addition, since the protective film 6 is provided under the light shielding film 8, even if plasma, laser, or the like is used when separating the low resistance wiring 7 and the light shielding film 8, the oxide semiconductor film 4 is not affected. Not give.

<2. Second Embodiment>
[Thin film transistor]
Next, a second embodiment will be described. In the second embodiment, a channel protective film is further provided on the oxide semiconductor film 4 of the thin film transistor 10 according to the first embodiment.

  FIG. 6 is a cross-sectional view showing a thin film transistor according to the second embodiment. As shown in FIG. 6, a channel protective film 13 is provided between the oxide semiconductor film 4 and the source electrode 5S and the drain electrode 5D. The source electrode 5S and the drain electrode 5D are provided on the channel protective film 13 and the oxide semiconductor film 4 so as to form a channel region.

  The material constituting the channel protective film 13 is not basically limited as long as it is a material having electrical insulation, but for example, a stable material having low reactivity is preferable. Examples of the material constituting the channel protective film 13 include silicon oxide, silicon nitride, aluminum oxide, and titanium oxide.

  The channel protective film 13 may be basically provided in any form as long as it is provided in a form for protecting the channel region. For example, the channel protective film 13 is preferably as thin as possible. Further, the channel protective film 13 may be a single film or a laminate of a plurality of films, but is preferably a single film. In the case of laminating a plurality of films, the same material may be laminated, or a plurality of materials may be laminated in combination. The material constituting the channel protective film 13 is appropriately selected from the materials listed above. It is.

  Specifically, the thickness of the channel protective film 13 is preferably, for example, 5 nm to 200 nm, more preferably 10 nm to 100 nm, and most preferably 20 nm to 80 nm. It is not limited to this.

  The shape of the channel protective film 13 is not basically limited. For example, the channel protective film 13 preferably has a shape in which the side surface is inclined, and more preferably a column having a tapered shape toward the upper surface. Specific examples of the shape of the channel protective film 13 include a column having a trapezoidal cross section and a column having an isosceles trapezoidal cross section. Specifically, the channel protective film 13 has a side surface inclination angle of preferably 20 ° to 80 °, more preferably 30 ° to 60 °, and more preferably 40 ° to 50 °. Most preferably it is. Others are the same as those of the thin film transistor according to the first embodiment.

  The thin film transistor according to the second embodiment has the same advantages as the thin film transistor according to the first embodiment, and a channel protective film between the oxide semiconductor film 4 and the source electrode 5S and the drain electrode 5D. Since 13 is further provided, the channel protective film 13 protects the channel region. In addition, since the protective film 6 is provided on the channel protective film 13 in the gap between the source electrode 5S and the drain electrode 5D, deterioration of the thin film transistor can be suppressed particularly when the protective film 6 is an oxide. . This is because oxygen desorption from the channel protective film 13 and the oxide semiconductor film 4 can be suppressed as compared with the case where the light shielding film 8 is provided directly on the channel protective film 13.

[Thin Film Transistor Manufacturing Method]

  This thin film transistor can be manufactured, for example, as follows.

7 to 9 are cross-sectional views showing the manufacturing process of the thin film transistor 10.
First, a metal film as a material for the gate electrode 2 is formed on the front surface of the substrate 1. Examples of the method for forming the metal film include a method of forming the gate electrode 2 by a vapor deposition method, a sputtering method, or the like using the materials listed above as the material of the gate electrode 2, but the method is not limited to these methods.

  Next, as shown in FIG. 7A, after forming the gate electrode 2 on the substrate 1, the gate insulating film 3 is formed on the surface of the gate electrode 2. Thereafter, an oxide semiconductor film 4 is formed over the gate insulating film 3. These steps are performed in the same manner as in the first embodiment.

  Next, as illustrated in FIG. 7B, the channel protective film 13 is formed over the oxide semiconductor film 4. The method for forming the channel protective film 13 is not basically limited. For example, the channel protective film 13 is formed by using the above-described materials as the channel protective film 13 by vapor deposition, sputtering, CVD, or the like.

  Next, the channel protective film 13 is patterned into a desired shape. Although the shape of the channel protective film 13 is not basically limited, for example, the shape mentioned above can be appropriately selected as the shape of the channel protective film 13.

  The patterning method of the channel protective film 13 is basically not limited, and examples thereof include a method of forming by patterning by etching after a photolithography process.

  Next, as shown in FIG. 7C, a transparent conductive oxide film 5 is formed on the channel protective film 13 and the gate insulating film 3.

Next, as shown in FIG. 8A, the transparent conductive oxide film 5 is patterned to form the source electrode 5S, the drain electrode 5D, and the wiring 5L. A source electrode 5S and a drain electrode 5D are formed. By patterning the transparent conductive oxide film 5, the source electrode 5S and the drain electrode 5D are formed apart from each other. Further, the drain electrode 5D is formed so as to extend to the gate insulating film 3 outside the oxide semiconductor film 4. This extending portion becomes the wiring 5L. The wiring 5 </ b> L may be formed so that the source electrode 5 </ b> S extends to the gate insulating film 3 outside the oxide semiconductor film 4. Further, the wiring 5L may be provided only on the source electrode 5S side, may be provided only on the drain electrode 5D side, or may be provided on both sides. Further, the method of separating the source electrode 5S and the drain electrode 5D from each other is not basically limited. For example, the source electrode 5S and the drain electrode 5D are patterned so as to provide an opening immediately above the channel region. At this time, the channel protective film 13 serves as an etching stopper, and damage to the oxide semiconductor film 4 due to patterning can be prevented.
Next, as shown in FIG. 8B, a protective film 6 is formed on the entire surface of the element where the source electrode 5S and the drain electrode 5D are formed. The protective film 6 includes a source electrode 5S and a drain electrode that are formed of the oxide semiconductor film 4 and the transparent conductive oxide film 5 by hydrogen in the atmosphere during the process or the like, or by heat treatment or the like. This prevents oxygen from being desorbed from 5D, wiring 5L, and the like. In general, the density of the protective film 6 is preferably high for the purpose of preventing permeation of oxygen and hydrogen. Specifically, the density is preferably, for example, from 2.5 g / cm ^{3 to} 4.0 g / cm ³ , and from 3.0 g / cm ^{3 to} 4.0 g / cm ^3. Is more preferable, but is not limited thereto.

  The method for forming the protective film 6 is not basically limited. For example, a method of forming and forming the protective film 6 by plasma CVD or sputtering using the materials described above as the material of the protective film 6 may be used. In the case where the protective film 6 is formed by a sputtering method, for example, an oxygen gas-containing argon gas atmosphere, an oxygen-containing nitrogen gas atmosphere, or the like using a target mainly composed of the above-described materials as the material of the protective film 6 is used. Form a film. The target may be mainly composed of the oxides listed above as the material of the protective film 6, or may be composed mainly of the oxide added with impurities. However, it is not limited to those listed above.

  In this step, the element surface can be sufficiently covered even if the protective film 6 has a small thickness. This is because the level difference between the source electrode 5S and the drain electrode 5D and the gate insulating film 3 is smaller than in the prior art. The reason why the step becomes small is considered that the film thickness of the source electrode 5S and the drain electrode 5D is thinner than the conventional one. Specifically, in the prior art, the source electrode 5S and the drain electrode 5D have a thickness of, for example, 0.3 μm to 2 μm, whereas the source electrode 5S and the drain electrode 5D have a thickness of It is formed as thin as 1 nm to 200 nm.

  Next, as shown in FIG. 8C, a contact hole 9 for bringing the low resistance wiring 7 into contact with the wiring 5L is formed in the protective film 6 on the wiring 5L, and the wiring 5L is exposed. The position where the contact hole 9 is formed is basically not limited, but may be any position as long as the oxide semiconductor film 4 is not damaged by the process of providing the contact hole 9 and the patterning process of the low resistance film 11 which is a subsequent process. The oxide semiconductor film 4 should be as close as possible. Specifically, the position where the oxide semiconductor film 4 is not damaged includes, for example, a position away from the contact region between the oxide semiconductor film 4 and the source electrode 5S and drain electrode 5D. The reason why the low resistance wiring 7 should be as close as possible to the oxide semiconductor film 4 is that the wiring resistance needs to be as low as possible. Then, it is preferable that the position where the contact hole 9 is provided exists in a certain region. This region is, for example, a region that extends in parallel with the above-described edge of the oxide semiconductor film 4 at a distance of 100 nm to 100 μm vertically from the edge of the oxide semiconductor film 4 on which the wiring 5L is formed. Preferably, the region is from 750 nm to 100 μm, and most preferably from 1000 nm to 50 μm, but the invention is not limited to this.

  Next, as shown in FIG. 9A, a low resistance film 11 is formed on the protective film 6 and on the wiring 5 </ b> L in the contact hole 9. The low resistance film 11 is not basically limited as long as the low resistance film 11 is provided so as to close the contact hole 9, but the oxide semiconductor film 4 is entirely covered on the protective film 6 above the oxide semiconductor film 4. It is preferable to provide them. That is, the low resistance film 11 is preferably provided uniformly over the entire region including the region where the oxide semiconductor film 4 is provided and the region of the contact hole 9.

  Although the formation method of the low resistance film 11 is not basically limited, for example, the low resistance film 11 can be formed by a method such as a vapor deposition method or a sputtering method using the materials listed above as the material of the low resistance wiring 7. It is preferable to use a sputtering method. In addition, the low resistance film 11 may be constituted by a single layer film or a laminated film. However, when the low resistance film 11 is constituted by a laminated film, the low resistance film 11 is sequentially laminated by using a method such as a sputtering method. Can do. Further, the film thickness of the low resistance film 11 is not basically limited, but for example, the film thickness listed above as the film thickness of the low resistance wiring 7 can be appropriately selected.

  Next, as shown in FIG. 9B, an opening 12 is provided by patterning the low resistance film 11 provided above the region between the oxide semiconductor film 4 and the contact hole 9, and the low resistance wiring 7 and the light shielding film 8 and spaced apart. The patterning of the low resistance film 11 is not basically limited as long as the light shielding film 8 is formed so as to cover the oxide semiconductor film 4 and the low resistance wiring 7 is electrically connected to the wiring 5L. However, it is preferable to form the low resistance wiring 7 and the light shielding film 8 so as to be electrically independent. Further, it is preferable that the entire contact hole 9 is formed so as to be in contact with the low resistance wiring 7.

  The patterning method of the low resistance film 11 is not basically limited, but examples include dry etching using gas plasma, reactive ion etching, and the like. Examples of the gas plasma used for dry etching include chlorine gas. The rest is the same as the method of manufacturing the thin film transistor according to the first embodiment.

<Example 2>
In the same manner as in Example 1, a Cu electrode, a SiO ₂ film, and an IGZO film were laminated on a plastic film substrate.

Next, a SiO ₂ film was formed on the entire surface of the IGZO film. Next, the SiO ₂ film formed on the IGZO film was subjected to photolithography, and then wet-etched to form an island shape so as to cover only the top end face of the IGZO film, thereby forming the channel protective film 13. The formed channel protective film 13 had an isosceles trapezoidal vertical cross section and a film thickness of 50 nm.

  Next, after the IGZO film was subjected to photolithography, wet etching was performed to form the IGZO film so as to form an island shape in a region including the Cu electrode and the vicinity thereof, and the oxide semiconductor film 4 was obtained.

Next, an ITO film was formed on the channel protective film 13 and the IGZO film. The ITO film was formed to extend on the channel protective film 13, on the IGZO film, and on the SiO ₂ film outside the IGZO film.

Next, this ITO film was patterned by wet etching to form a source electrode 5S and a drain electrode 5D. In the patterning, the ITO film on the top end face of the channel protective film 13 was separated by etching, and one of the ITO films extending on the SiO ₂ film outside the IGZO film was removed by etching. Thus, two electrically independent ITO films were formed. These ITO films are formed by extending the ITO film formed only on one IGZO film as the source electrode 5S and the other ITO film as the drain electrode 5D on the SiO ₂ film outside the IGZO film. The ITO film of the part made into ITO wiring. The film thickness of the formed source electrode 5S, drain electrode 5D, and ITO wiring was 100 nm. Other than that, the target thin film transistor was manufactured in the same manner as in Example 1.

<Comparative Example 1>
In the same manner as in Example 1, a Cu electrode, a SiO ₂ film, and an IGZO film were formed on a plastic film substrate. At this time, the crystallization annealing treatment of the IGZO film was not performed.

  Next, an ITO film was formed on the IGZO film. The ITO film was formed on the IGZO film.

  Next, this ITO film was patterned by wet etching to form a source electrode and a drain electrode. For patterning, the ITO film on the top end face of the IGZO film was separated by etching. Thus, two ITO films formed on the IGZO film so as to be separated from each other were formed. For these ITO films, an ITO film formed only on one IGZO film was used as a source electrode, and the other ITO film was used as a drain electrode. The film thickness of the formed source electrode and drain electrode was 100 nm.

  Next, an epoxy resin film was formed on the entire surface of the element surface on which the ITO film was formed so as to fill the unevenness of the element to form a planarizing film. The thickness of the thickest part of the formed epoxy resin film was 600 nm.

  Next, a contact hole was formed in the epoxy resin film formed on the ITO wiring to expose the drain electrode. The contact hole was formed at a position above the IGZO film so as to extend in the direction in which the IGZO film extends. The contact hole was formed by dry etching. The contact hole is formed in a region extending from the end of the IGZO film on the side where the ITO wiring is formed, vertically from a position of 15 μm and extending in parallel with the end of the IGZO film with a width of 10 μm. did.

  Next, a metal film was provided so as to cover the upper part of the IGZO film uniformly and to completely fill the contact hole on the entire epoxy resin film, and this was used as a pixel electrode. The metal film was formed by a sputtering method. The total thickness of the metal film was 900 nm. Thus, the target thin film transistor was manufactured.

Figure 10 is a diagram _showing, V _g -I _d characteristics of the thin film transistor in Example 2. 11 is a diagram _showing, V _g -I _d characteristics of the thin film transistor of Comparative Example 1. Drain voltage V _d was both a 10V.

As shown in FIGS. 10 and 11, when compared _with, V _g -I _d characteristics of the V _g -I _d characteristics Comparative Example 1 Example 2, the comparative example 1, a steep Example 2 sub Has threshold characteristics. That is, it can be said that Example 2 has a smaller subthreshold coefficient and higher mutual conductance than Comparative Example 1. Further, the ON-OFF ratio of the drain current I _d is 9 digits in the second example, but it is 6 digits in the first comparative example, and it is clear that the second example has a larger ON / OFF ratio. From this result, it is clear that Example 2 shows significantly better transmission characteristics compared to Comparative Example 1, and the performance of Example 2 is significantly higher than that of Comparative Example 1 which is a thin film transistor having a conventional configuration. It was shown that it was improving.

  The reason for this is that Comparative Example 1 provided a low resistance wiring in the contact region between the IGZO film and the drain electrode, whereas Example 2 was formed on the ITO wiring separated from the contact region between the IGZO film and the drain electrode. This is considered to be due to the provision of low resistance wiring.

  When the ITO film comes into contact with the low-resistance wiring that is a metal, as described above, oxygen in the ITO film diffuses into the low-resistance wiring to cause destabilization of conductive characteristics.

  At this time, in Comparative Example 1, since the IGZO film is provided under the drain electrode provided with the low resistance wiring, the drain electrode destabilized by oxygen desorption further supplies oxygen from the underlying IGZO film. Pull out. For this reason, the characteristics of the IGZO film are changed, causing further instability of the conductive characteristics, which are considered to appear in the transfer characteristics of Comparative Example 1.

On the other hand, in Example 2, the ITO wiring provided with the low-resistance wiring is sandwiched between the gate electrode made of SiO ₂ that is an oxide and the Al ₂ O ₃ film that is also an oxide. Is provided. Furthermore, since the low resistance wiring and the light shielding film are provided apart from each other, the low resistance wiring is provided in a place away from the contact region between the IGZO film and the drain electrode. Therefore, even if oxygen desorption from the ITO wiring described above occurs, oxygen is supplied from an Al ₂ O ₃ film that is an oxide provided on the low resistance wiring side of the IGZO film. As a result, it is considered that the influence on the IGZO film is reduced.

In addition, since the low resistance film is provided on the Al ₂ O ₃ film and the low resistance film is separated to form the low resistance wiring and the light shielding film, the IGZO film can be used even when using plasma, laser, etc. Can be reduced.

  Further, the light shielding film in Example 2 is provided at a position 200 nm above the oxide semiconductor film, whereas the pixel electrode in Comparative Example 1 is provided at a position 600 nm above the oxide semiconductor film. . Accordingly, the light shielding property to the oxide semiconductor film is higher in Example 2 than in Comparative Example 1. As a result, the characteristic deterioration due to light reception in the second embodiment is less than that in the first comparative example. From these, it is considered that Example 2 exhibited better transfer characteristics than Comparative Example 1. These effects can be applied to the thin film transistor of Example 1 having the same configuration except that the channel protective film 13 is not provided.

According to the method of manufacturing the thin film transistor of the second embodiment, the channel protective film 13 is further provided on the oxide semiconductor film of the thin film transistor according to the first embodiment. In addition to the same advantages as the thin film transistor, the channel protective film 13 effectively protects the oxide semiconductor film when the transparent conductive oxide film is patterned by wet etching or the like, so that the deterioration of the oxide semiconductor film is reduced. can do.
<3. Third Embodiment>
[Display device]

  The display device according to the third embodiment is an active matrix display device in which the thin film transistors according to the present disclosure (typically, the thin film transistors according to the first and second embodiments) are arranged on a substrate. FIG. 12 shows the overall configuration of the circuit of the display device 90.

As shown in FIG. 12, the display device 90 is, for example, a liquid crystal display or an organic EL display, and a plurality of pixels 100R, 100G, and 100B arranged in a matrix on the drive panel 91, and these pixels. Various drive circuits for driving 100R, 100G, and 100B are formed. Each of the pixels 10R, 10G, and 10B is a liquid crystal display element or an organic EL element that emits red (R), green (G), and blue (B) blue light. These three pixels 100R, 100G, and 100B are used as one pixel, and a display area 110 is configured by a plurality of pixels. On the drive panel 91, as a drive circuit, for example, a signal line drive circuit 120 and a scan line drive circuit 130, which are drivers for displaying images, and a pixel drive circuit 150 are arranged. A sealing panel (not shown) is bonded to the driving panel 91, and the pixels 100R, 100G, and 100B and the driving circuit are sealed by the sealing panel.

  FIG. 13 is an equivalent circuit diagram of the pixel driving circuit. As shown in FIG. 13, the pixel driving circuit 150 is an active driving circuit in which transistors Tr1 and Tr2 which are the thin film transistors 10 are disposed. A capacitor Cs is provided between the transistors Tr1 and Tr2, and the pixel 100R (or pixels 100G and 100B) is connected in series with the transistor Tr1 between the first power supply line (Vcc) and the second power supply line (GND). It is connected. In such a pixel driving circuit 150, a plurality of signal lines 120A are arranged in the column direction, and a plurality of scanning lines 130A are arranged in the row direction. Each signal line 120A is connected to the signal line drive circuit 120, and an image signal is supplied from the signal line drive circuit 120 to the source electrode of the transistor Tr2 via the signal line 120A. Each scanning line 130A is connected to the scanning line driving circuit 130, and a scanning signal is sequentially supplied from the scanning line driving circuit 130 to the gate electrode of the transistor Tr2 via the scanning line 130A. Such a display device 90 can be mounted on, for example, the electronic device exemplified below.

  The display device described above includes, for example, various electronic devices shown in FIGS. 8 to 12, for example, digital cameras, notebook personal computers, mobile terminal devices such as mobile phones, and video input to electronic devices such as video cameras. The present invention can be applied to display devices for electronic devices in various fields that display signals or video signals generated in electronic devices as images or videos. Further, since the organic electroluminescent element 44 can be driven at a low voltage and enhances the light extraction efficiency to the front, the electronic viewfinder in the digital single-lens reflex camera shown in FIG. 13 and the head shown in FIG. It is very effective and particularly suitable for applications where a low voltage drive is required such as a mount display and the viewing angle with respect to the display is limited. Hereinafter, some examples of electronic devices to which the display device is applied will be described.

  FIG. 14 is a perspective view showing a television to which the display device is applied. The television according to this application example includes a video display screen unit 101 including a front panel 102, a filter glass 103, and the like, and is manufactured by using this display device as the video display screen unit 101.

  FIG. 15 is a perspective view showing a digital camera to which the display device is applied, in which A is a perspective view seen from the front side, and B is a perspective view seen from the back side. This digital camera includes a light emitting unit 111 for flash, a display unit 112, a menu switch 113, a shutter button 114, and the like, and is manufactured by using this display device as the display unit 112.

  FIG. 16 is a perspective view showing a notebook personal computer to which the display device is applied. This notebook personal computer includes a keyboard 122 that is operated when characters and the like are input, a display unit 123 that displays an image, and the like. The display unit 123 is used as the display unit 123.

  FIG. 17 is a perspective view showing a video camera to which the display device is applied. This video camera includes a main body 131, a lens 132 for photographing a subject on a side facing forward, a start / stop switch 133 at the time of photographing, a display unit 134, and the like. By using this display device as the display unit 134, Produced.

  FIG. 18 shows a mobile terminal device to which the display device is applied, for example, a mobile phone, in which A is a front view in an open state, B is a side view thereof, C is a front view in a closed state, and D is a left side. A side view, FIG. E is a right side view, F is a top view, and G is a bottom view. This mobile phone includes an upper housing 141, a lower housing 142, a connecting portion (here, a hinge portion) 143, a display 144, a sub-display 145, a picture light 146, a camera 147, and the like. It is manufactured by using this display device.

  FIG. 19 shows a digital single-lens reflex camera to which this display device is applied, in which A is a front view and B is a rear view. This digital single-lens reflex camera includes a camera main body 151, a photographing lens unit 152, a grip 153, a monitor 154, an electronic viewfinder 155, and the like, and is manufactured by using this display device as the electronic viewfinder 155. .

  FIG. 20 is a perspective view showing a head mounted display to which the display device is applied. This head mounted display includes a display unit 161, an ear hook unit 162, and the like, and is manufactured by using this display device as the display unit 161.

Although the embodiments and examples have been specifically described above, the present disclosure is not limited to the above-described embodiments and examples, and various modifications based on the technical idea of the present disclosure are possible. .
For example, the numerical values, structures, configurations, shapes, materials, and the like given in the above-described embodiments and examples are merely examples, and different numerical values, structures, configurations, shapes, materials, etc. are used as necessary. Also good.

In addition, this technique can also take the following structures.
(1) A gate electrode, a gate insulating film provided so as to cover the gate electrode, an oxide semiconductor film provided on the gate insulating film, and a transparent conductive film provided on the oxide semiconductor film A source electrode and a drain electrode made of a conductive oxide, a protective film made of a metal oxide provided on the source electrode and the drain electrode, and a light-shielding film provided on the protective film, A thin film transistor in which a distance between the oxide semiconductor film and the light-shielding film is 2 nm to 400 nm.
(2) The thin film transistor according to (1), further including a channel protective film provided on the oxide semiconductor film.
(3) The thin film transistor according to (1) or (2), wherein the metal oxide is aluminum oxide or titanium oxide.
(4) The source electrode and / or the drain electrode extends to the gate insulating film outside the oxide semiconductor film, and the extended portion of the source electrode and / or the drain electrode The thin film transistor according to any one of (1) to (3), wherein the thin film transistor has a low-resistance wiring electrically connected to the wiring.
(5) The thin film transistor according to any one of (1) to (4), in which the source electrode and / or the drain electrode of the extending portion is a pixel electrode.
(6) The low resistance wiring according to any one of (1) to (5), wherein the low resistance wiring is provided on the source electrode and / or the drain electrode provided on the surface of the gate insulating film. Thin film transistor.
(7) The thin film transistor according to any one of (1) to (6), wherein the light shielding film is provided on the protective film on the channel region so as to be separated from the low resistance wiring.
(8) The thin film transistor according to any one of (1) to (7), wherein the light shielding film is electrically isolated from the low resistance wiring.
(9) The thin film transistor according to any one of (1) to (8), wherein the source electrode and / or the drain electrode has a thickness of 1 nm to 200 nm.
(10) The thin film transistor according to any one of (1) to (9), wherein the protective film has a thickness of 1 nm to 200 nm.
(11) The thin film transistor according to any one of (1) to (10), wherein a thickness of at least one of the low-resistance wiring and the light shielding film is 300 nm or more and 2 μm or less.
(12) A step of forming a gate electrode on the substrate, a step of forming a gate insulating film so as to cover the gate electrode, a step of forming an oxide semiconductor film on the gate insulating film, and the oxide semiconductor Forming a channel protective film on the film, forming a source electrode and a drain electrode made of a transparent conductive oxide on the oxide semiconductor film, respectively, on the source electrode and the drain electrode Forming a protective film made of a metal oxide, and forming the protective film with a thickness of 1 nm to 200 nm.
(13) The method for manufacturing a thin film transistor according to (12), further including a step of forming a channel protective film on the oxide semiconductor film.
(14) removing at least a portion of the protective film to expose the extended portion of the source electrode and / or drain electrode to form an electrode exposed portion; and on the protective film and the electrode (12) including forming a conductive material on the exposed portion, forming and forming a low-resistance wiring on the electrode exposed portion, and forming a light-shielding film on the channel region apart from the low-resistance wiring. ) Or the method for producing a thin film transistor according to (13) above.
(15) The method for producing a thin film transistor according to any one of (12) to (14), wherein the protective film is formed by adding oxygen radicals.
(16) The method for producing a thin film transistor according to any one of (12) to (15), wherein the metal oxide is aluminum oxide or titanium oxide.
(17) The method for manufacturing a thin film transistor according to any one of (12) to (16), wherein the light shielding film is formed so as to be electrically isolated from the low resistance wiring.
(18) The method for producing a thin film transistor according to any one of (12) to (17), wherein the source electrode and / or the drain electrode are formed with a thickness of 1 nm to 200 nm.
(19) The method for producing a thin film transistor according to any one of (12) to (18), wherein the protective film is formed with a thickness of 1 nm to 200 nm.
(20) The substrate includes a thin film transistor and a pixel, and the thin film transistor includes a gate electrode, a gate insulating film provided so as to cover the gate electrode, and an oxide semiconductor film provided on the gate insulating film, A source electrode and a drain electrode made of a transparent conductive oxide provided on the oxide semiconductor film, and a protective film made of a metal oxide provided on the source electrode and the drain electrode, A display device, wherein the protective film has a thickness of 1 nm to 200 nm.

  DESCRIPTION OF SYMBOLS 1 ... Substrate, 2 ... Gate electrode, 3 ... Gate insulating film, 4 ... Oxide semiconductor film, 5S ... Source electrode, 5D ... Drain electrode, 5L ... Wiring, 6 ... Protective film, 7 ... Low resistance wiring, 8 ... Light shielding Reference numeral 10 is a contact hole, 10 is a thin film transistor, 11 is a low resistance film, 12 is an opening, and 13 is a channel protective film.

Claims (20)

A gate electrode;
A gate insulating film provided so as to cover the gate electrode;
An oxide semiconductor film provided over the gate insulating film;
A source electrode and a drain electrode made of a transparent conductive oxide provided on the oxide semiconductor film;
A protective film made of a metal oxide provided on the source electrode and the drain electrode;
A light shielding film provided on the protective film,
A thin film transistor in which a distance between the oxide semiconductor film and the light-shielding film is 2 nm to 400 nm.   The thin film transistor according to claim 1, further comprising a channel protective film provided on the oxide semiconductor film.   The thin film transistor according to claim 2, wherein the metal oxide is aluminum oxide or titanium oxide.   The source electrode and / or the drain electrode extends to the gate insulating film outside the oxide semiconductor film, and is electrically connected to the source electrode and / or the drain electrode in the extending portion. The thin film transistor according to claim 3, further comprising a low-resistance wiring connected to.   The thin film transistor according to claim 4, wherein the extending portion includes the source electrode and / or the drain electrode as a pixel electrode.   6. The thin film transistor according to claim 5, wherein the low resistance wiring is provided on the source electrode and / or the drain electrode provided on the surface of the gate insulating film.   The thin film transistor according to claim 6, wherein the light shielding film is provided on the protective film on the channel region so as to be separated from the low resistance wiring.   The thin film transistor according to claim 7, wherein the light shielding film is electrically isolated from the low resistance wiring.   The thin film transistor according to claim 8, wherein a thickness of the source electrode and / or the drain electrode is 1 nm or more and 200 nm or less.   The thin film transistor according to claim 9, wherein the protective film has a thickness of 1 nm to 200 nm.   The thin film transistor according to claim 10, wherein the thickness of at least one of the low resistance wiring and the light shielding film is 300 nm or more and 2 μm or less. Forming a gate electrode on the substrate;
Forming a gate insulating film so as to cover the gate electrode;
Forming an oxide semiconductor film over the gate insulating film;
Forming a channel protective film on the oxide semiconductor film;
Forming a source electrode and a drain electrode made of a transparent conductive oxide on the oxide semiconductor film,
A protective film made of a metal oxide is formed on the source electrode and the drain electrode,
Forming a light shielding film on the protective film,
A method for manufacturing a thin film transistor, wherein the distance between the oxide semiconductor film and the light-shielding film is 2 nm to 400 nm.   The method for manufacturing a thin film transistor according to claim 12, further comprising a step of forming a channel protective film on the oxide semiconductor film. Removing at least a portion of the protective film to expose the extended portion of the source electrode and / or drain electrode to form an electrode exposed portion;
A conductive material is formed on the protective film and the electrode exposed portion, and formed to form a low-resistance wiring on the electrode exposed portion and a light-shielding film spaced apart from the low-resistance wiring on the channel region. The method of manufacturing a thin film transistor according to claim 13, further comprising:   15. The method of manufacturing a thin film transistor according to claim 14, wherein the protective film is formed by adding oxygen radicals.   The method for manufacturing a thin film transistor according to claim 15, wherein the metal oxide is aluminum oxide or titanium oxide.   The method of manufacturing a thin film transistor according to claim 16, wherein the light shielding film is formed so as to be electrically isolated from the low resistance wiring.   The method of manufacturing a thin film transistor according to claim 17, wherein the source electrode and / or the drain electrode are formed with a thickness of 1 nm to 200 nm.   19. The method of manufacturing a thin film transistor according to claim 18, wherein the protective film is formed with a thickness of 1 nm to 200 nm. The substrate includes a thin film transistor and a pixel,
The thin film transistor
A gate electrode;
A gate insulating film provided so as to cover the gate electrode;
An oxide semiconductor film provided over the gate insulating film;
A source electrode and a drain electrode made of a transparent conductive oxide provided on the oxide semiconductor film;
A protective film made of a metal oxide provided on the source electrode and the drain electrode, and a light-shielding film on the protective film;
A display device in which a distance between the oxide semiconductor film and the light-shielding film is 2 nm or more and 400 nm or less.

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