JP2013201552A5 - - Google Patents

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Publication number
JP2013201552A5
JP2013201552A5 JP2012067923A JP2012067923A JP2013201552A5 JP 2013201552 A5 JP2013201552 A5 JP 2013201552A5 JP 2012067923 A JP2012067923 A JP 2012067923A JP 2012067923 A JP2012067923 A JP 2012067923A JP 2013201552 A5 JP2013201552 A5 JP 2013201552A5
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JP
Japan
Prior art keywords
output port
port information
field
router
packet
Prior art date
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Application number
JP2012067923A
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English (en)
Japanese (ja)
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JP2013201552A (ja
JP5624579B2 (ja
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Application filed filed Critical
Priority to JP2012067923A priority Critical patent/JP5624579B2/ja
Priority claimed from JP2012067923A external-priority patent/JP5624579B2/ja
Priority to US13/598,389 priority patent/US20130250954A1/en
Publication of JP2013201552A publication Critical patent/JP2013201552A/ja
Publication of JP2013201552A5 publication Critical patent/JP2013201552A5/ja
Application granted granted Critical
Publication of JP5624579B2 publication Critical patent/JP5624579B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2012067923A 2012-03-23 2012-03-23 オンチップルータ Expired - Fee Related JP5624579B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2012067923A JP5624579B2 (ja) 2012-03-23 2012-03-23 オンチップルータ
US13/598,389 US20130250954A1 (en) 2012-03-23 2012-08-29 On-chip router and multi-core system using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012067923A JP5624579B2 (ja) 2012-03-23 2012-03-23 オンチップルータ

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2014124443A Division JP5847887B2 (ja) 2014-06-17 2014-06-17 オンチップルータ及びそれを用いたマルチコアシステム

Publications (3)

Publication Number Publication Date
JP2013201552A JP2013201552A (ja) 2013-10-03
JP2013201552A5 true JP2013201552A5 (enExample) 2014-03-20
JP5624579B2 JP5624579B2 (ja) 2014-11-12

Family

ID=49211770

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012067923A Expired - Fee Related JP5624579B2 (ja) 2012-03-23 2012-03-23 オンチップルータ

Country Status (2)

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US (1) US20130250954A1 (enExample)
JP (1) JP5624579B2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150103822A1 (en) * 2013-10-15 2015-04-16 Netspeed Systems Noc interface protocol adaptive to varied host interface protocols
US10061531B2 (en) 2015-01-29 2018-08-28 Knuedge Incorporated Uniform system wide addressing for a computing system
US10027583B2 (en) 2016-03-22 2018-07-17 Knuedge Incorporated Chained packet sequences in a network on a chip architecture
US10346049B2 (en) * 2016-04-29 2019-07-09 Friday Harbor Llc Distributed contiguous reads in a network on a chip architecture
US20170118312A1 (en) * 2017-01-09 2017-04-27 Mediatek Inc. Packet Header Deflation For Network Virtualization
US10541934B1 (en) * 2017-12-11 2020-01-21 Xilinx, Inc . Systems and methods for frame buffering and arbitration in a network

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5475680A (en) * 1989-09-15 1995-12-12 Gpt Limited Asynchronous time division multiplex switching system
US6687247B1 (en) * 1999-10-27 2004-02-03 Cisco Technology, Inc. Architecture for high speed class of service enabled linecard
KR100429904B1 (ko) * 2002-05-18 2004-05-03 한국전자통신연구원 차등화된 ＱｏＳ 서비스를 제공하는 라우터 및 그것의고속 ＩＰ 패킷 분류 방법
US8228908B2 (en) * 2006-07-11 2012-07-24 Cisco Technology, Inc. Apparatus for hardware-software classification of data packet flows
JP2008027153A (ja) * 2006-07-20 2008-02-07 Ricoh Co Ltd 情報処理プログラム、情報処理装置および情報処理方法
EP2009554A1 (en) * 2007-06-25 2008-12-31 Stmicroelectronics SA Method for transferring data from a source target to a destination target, and corresponding network interface
WO2010022767A1 (en) * 2008-08-26 2010-03-04 Telefonaktiebolaget Lm Ericsson (Publ) Packet forwarding in a network
JPWO2010104033A1 (ja) * 2009-03-09 2012-09-13 日本電気株式会社 プロセッサ間通信システム及び通信方法、ネットワークスイッチ、及び並列計算システム
WO2010137572A1 (ja) * 2009-05-25 2010-12-02 日本電気株式会社 ネットワークオンチップとネットワークルーティング方法とシステム

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