JP2013200726A - Semiconductor memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a significant delay in the response to a write command by eliminating continuous compaction operations for an extended period.SOLUTION: Write processing by a write control unit, and data arrangement by an arrangement unit are alternately performed at a predetermined ratio. In the arrangement unit, during data arrangement corresponding to the predetermined ratio, if the results of validity determination to be invalid continue a predetermined set number, the validity determination processing this time is terminated.

Description

  Embodiments described herein relate generally to a semiconductor memory device including a nonvolatile semiconductor memory.

  In solid state drive (SSD), if the data erasure unit (block) is different from the data management unit, the block becomes perforated due to invalid (not up-to-date) data when the flash memory is rewritten. . If the number of such perforated blocks increases, the number of blocks that can be used substantially decreases, and the storage area of the flash memory cannot be effectively used. Therefore, for example, when the free blocks of the flash memory (internally unused valid blocks that do not contain valid data) become less than a predetermined threshold, the compaction data is collected and rewritten in another block. Arrange the flash memory, etc., and secure free blocks that are not allocated.

  If the compaction continues to operate when a write request is input from the host device to the SSD, the response to the write request is delayed. In some cases, it is necessary to perform compaction because, for example, a free block cannot be secured unless compaction is performed. However, if there is a free block without performing compaction, it is desirable to give priority to a response to a write request.

JP 2008-276733 A JP 2010-152778 A JP 2008-257773 A

  An object of one embodiment of the present invention is to provide a semiconductor memory device that prevents a large delay in response to a write command by eliminating a long-time continuous compaction operation.

  According to one embodiment of the present invention, a semiconductor memory device includes a nonvolatile semiconductor memory and a controller. In the nonvolatile semiconductor memory, erasing is performed in units of blocks. The controller determines whether each data stored in the block to be organized in the nonvolatile semiconductor memory is valid or invalid, and a write control unit that writes data from the host device to the block of the nonvolatile semiconductor memory. A data reorganization unit that sequentially selects selected data and rewrites the data to a new block, and alternately executes a write process by the write control unit and a rewrite to a new block by the reorganization unit at a predetermined ratio. . The organizing unit ends the current valid / invalid determination process when the invalid / invalid determination result continues for a predetermined number of times during the data reduction corresponding to the predetermined ratio.

FIG. 1 is a block diagram illustrating an internal configuration example of an SSD. FIG. 2 shows an address conversion table. FIG. 3 is a diagram illustrating a block management table. FIG. 4 is a diagram conceptually showing block management. FIG. 5 is a diagram showing reverse lookup information added to data. FIG. 6 is a diagram conceptually showing the data validity / invalidity determination processing. FIG. 7 is a diagram conceptually illustrating 1: N compaction. FIG. 8 is a flowchart illustrating an example of an operation procedure of 1: N compaction according to the comparative example. FIG. 9 is a diagram illustrating an example of the compaction source block. FIG. 10 is a flowchart illustrating an example of an operation procedure of 1: N compaction according to the embodiment. FIG. 11 is a diagram conceptually illustrating writing of dummy data according to the embodiment.

  Exemplary embodiments of a semiconductor memory device will be explained below in detail with reference to the accompanying drawings. In addition, this invention is not limited by this embodiment.

(First embodiment)
FIG. 1 is a block diagram illustrating a configuration example of an SSD (Solid State Drive) 100. The SSD 100 is connected to a host device (hereinafter abbreviated as a host) 1 such as a personal computer or a CPU via a host interface 2 such as an ATA interface (ATA I / F), and functions as an external storage device of the host 1. The host 1 is a CPU of an imaging apparatus such as a CPU of a personal computer, a still camera, or a video camera. The SSD 100 includes a host interface 2, a NAND flash memory (hereinafter abbreviated as “NAND”) 10 as a nonvolatile semiconductor memory, a RAM 20 that is a semiconductor memory that can be accessed at higher speed than the NAND 10, and a NAND controller ( NANDC) 31 and controller 30.

  The NAND 10 stores user data 11 designated by the host 1 and backup-stores management information managed by the RAM 20 as a nonvolatile management table 12. The NAND 10 has a memory cell array in which a plurality of memory cells are arranged in a matrix, and each memory cell can store multiple values using an upper page and a lower page. The NAND 10 is constituted by a plurality of memory chips, and each memory chip is constituted by arranging a plurality of physical blocks which are data erasing units. In the NAND 10, data is written and data is read for each physical page. A physical block is composed of a plurality of physical pages.

  The RAM 20 stores and updates a storage area as a write buffer 25 for temporarily storing data when writing data from the host 1 to the NAND 10, and management information such as an address conversion table 21 and a block management table 22. And a work area for temporarily storing data read from the NAND 10. The management information such as the address conversion table 21 and the block management table 22 is developed when the nonvolatile management table 12 stored in the NAND 10 is activated.

  The NANDC 31 includes a NAND I / F that performs interface processing with the NAND 10, an error correction circuit, a DMA controller, and the like, and writes data temporarily stored in the RAM 20 to the NAND 10 and reads data stored in the NAND 10. Or transferred to the RAM 20.

  When the host 1 reads from or writes to the SSD 100, the host 1 inputs LBA (Logical Block Addressing) as a logical address to the SSD 100 via the host interface 2. LBA is a logical address in which a serial number from 0 is assigned to a sector (size: eg, 512 B). In this embodiment, as a unit for managing data by the write buffer 25 and the NAND 10, a management unit called a cluster larger than the sector size and smaller than the physical block size is defined. In this embodiment, one management unit called a cluster is used, but another management unit having a size larger than the cluster and smaller than the block size may be added to use two management units. In this embodiment, the cluster size is the same as the page size for simplicity.

  The controller 30 includes a block management unit 31 and a data access unit 32. The data access unit 32 includes a read control unit 33, a write control unit 34, and an organizing unit 35.

  The block management unit 31 manages the use state of the block (whether it is an active block that is being used or a free block that is not being used), and identifies and manages bad blocks that cannot be used as a storage area due to many errors. . The block management unit 31 notifies the data access unit 32 of a free block or an active block to be used. In addition, the block management unit 31 controls a gear ratio (described later) indicating the operation ratio between writing from the host 1 and compaction, and notifies the data access unit 32 of this gear ratio.

  The data access unit 32 executes read / write control of data designated by the host 1, organizing (compaction) of the NAND 10, and the like. The data access unit 32 performs write control of data designated by the host 1 using a free block notified from the block management unit 31 that is a block supply source, and also performs an active block (notified from the block management unit 31). Compaction is performed using a compaction source block) and a free block (compact destination block). Further, the data management unit 33 implements 1: N compaction (described later) by performing writing and compaction from the host 1 in accordance with the gear ratio notified from the block management unit 31.

  When a read command and an LBA as a read address are input from the host 1, the read control unit 33 reads data corresponding to the LBA from the NAND 10 with reference to the forward address conversion table 21, and reads the read data from the host 1. Send to.

  When a write command, an LBA as a write address, and write data are input, the write control unit 34 writes the data specified by the LBA into the write buffer 25. If there is no free space in the write buffer 25, data is evicted from the write buffer 25, and the evicted data is written to the NAND 10 with reference to the block management table 22 or the like. In response to this writing, the address conversion table 21, the block management table 22, and the like are updated.

  The organizing unit 35 performs data organization (compaction) in the NAND 10. The NAND 10 is a storage device that erases in block units and performs additional writing in page units. Therefore, in the NAND 10, overwriting cannot be performed, and writing is always performed on an unwritten page area that has been erased. When writing is repeated, unused free blocks gradually disappear, and there are no free blocks that can be newly used at a certain point. Further, by repeatedly performing writing, a block in which valid data and invalid data are mixed or a block including only invalid data is generated. Therefore, by performing compaction that collects valid data from multiple blocks and moves the data to a new free block, the compaction source block becomes an invalid data area, and the compaction source block can be used as a free block. it can. By performing the compaction process, a free block can be generated again, and new data can be written to the NAND 10.

  As shown in FIG. 2, in the address conversion table 21 managed by the RAM 20, the cluster address of the LBA and the storage location on the NAND 10 where the cluster data is stored (physical address: for example, block number + intra-block storage location) And a data presence / absence flag indicating whether or not data exists in the cluster is registered. The cluster address is the LBA divided by the cluster size. The address conversion table 21 can search the storage device position where the data corresponding to the logical address exists from the logical address, and functions as a forward lookup table. 4 This forward address conversion table 21 is used for read processing and the like. Further, when the relationship between the cluster address and the storage position on the NAND differs due to the writing of data to the NAND 10, the address conversion table 21 is updated.

  As shown in FIG. 3, the block management table 22 managed by the RAM 20 has a lot of block use / unused information indicating whether each block is an active block or a free block for each block number, and many errors. For example, a bad block flag for identifying a bad block that cannot be used as a storage area is registered. Using this block management table 22, a free block to be used when writing to the NAND 10 is selected. In addition, the block management table 22 is used to select a free block (compaction destination block) to be used for compaction.

  FIG. 4 is a diagram conceptually showing block management in the SSD 100. As described above, the blocks are classified into active blocks and free blocks. For example, when data of the same LBA is overwritten, the following processing is performed. It is assumed that valid data having a block size is stored at the logical address A1, and the block B1 is used as a storage area. When a command for overwriting update data having a block size of the logical address A1 is received from the host 1, one free block (referred to as block B2) is secured, and the data received from the host 1 is written in the free block. Thereafter, the logical address A1 is related to the block B2. As a result, the block B2 becomes an active block, and the data stored in the block B1 becomes invalid, so the block B1 becomes a free block.

  As described above, in the SSD 100, even if the data has the same logical address A1, the block used as the actual recording area changes every time writing is performed. Note that, in writing update data with a block size, the write destination block always changes, but with update data writing with a block size less than that, update data may be written in the same block. For example, when page data smaller than the block size is updated, old page data having the same logical address in the block is invalidated, and the latest page data newly written is managed as a valid page. When all the data in the block is invalidated, the block is released as a free block.

  In FIG. 4, data from the host 1 is written into a write destination block (free block). The block in which data from the host 1 is written becomes an active block. When rewriting of the NAND 10 proceeds, the active block is released as a free block, or released as a free block through a writing source block in compaction. Thereafter, the free block is used as a write destination block for writing user data from the host 1 or a compaction destination block for writing data in compaction.

  Here, in the address conversion table 21, a forward search is performed to search the storage location from the LBA as a logical address with the NAND 10 of the data corresponding to the LBA, and this address conversion table 21 is used for read processing and the like. The On the other hand, the process of retrieving the LBA as a logical address from the data storage position in the NAND 10 is a reverse lookup, and this reverse lookup is mainly used for compaction. Although a reverse address conversion table may be prepared, since the reverse address conversion table uses a large number of storage areas in the NAND 10 and the RAM 20, in this embodiment, as shown in FIG. In addition, the reverse lookup information GI of the cluster data is added, and the cluster data Dcl to which the reverse lookup information GI is added is stored in the NAND 10.

  The reverse lookup information GI has a logical address (LBA) of the cluster data Dcl to which the reverse lookup information is added. As the reverse lookup information GI, in addition to the LBA, a valid flag indicating whether the cluster data Dcl is valid or invalid may be provided. For this purpose, the valid flag is frequently updated on the NAND 10. Since it is unrealistic, here, the validity / invalidity determination of the cluster data Dcl in the case of having only the LBA without the validity flag as the reverse lookup information GI will be described.

  It is assumed that cluster data G0 having a logical address of LBA = A0 is written to a position (page) P0 on the NAND 10. The reverse lookup information GI added to the cluster data G0 has a logical address A0. Next, when LBA = A0 is updated with different data G1, in the case of NAND10, the written physical position cannot be overwritten, so this data G1 is physically located at a different position (page) P1. Written. The reverse lookup information GI added to the cluster data G1 also has a logical address A0. At this stage, since the data G1 is the latest data of the logical address A0, the data G0 is invalid data and the data G1 is valid data. However, in this case, since the valid flag is not given to the reverse lookup information GI, the reverse lookup information added to the data G0 (LBA = A0) and the reverse lookup information added to the data G1 (LBA) If only = A0) is seen, each has only information that it is the data of the logical address A0, and it cannot be identified which is valid.

  Accordingly, the forward address conversion table 21 and the reverse lookup information GI are collated, and valid / invalid determination is performed in which the data pointing to each other is valid data, and the data pointing to only one is determined to be invalid data. Specifically, during compaction, when trying to move cluster data of one block to another block, invalid data does not need to be moved, only valid data is moved. Whether or not is valid is determined by a validity / invalidity determination process. Since it is sequentially determined whether each cluster data included in each block to be compacted is invalid or valid, the reverse lookup information GI added to the cluster data to be judged is first read and this reverse lookup information GI indicates When an entry of the address conversion table 21 that matches the logical address (LBA) is taken out, it is determined whether or not the forward lookup information in this entry indicates the storage location of the cluster data to be determined. It is determined that the cluster data to be determined is valid. However, when the forward lookup information points to another storage position, it is determined that the cluster data to be determined is invalid. Such a valid / invalid determination process is repeatedly performed for each cluster data in the compaction target block, thereby collecting a required number of valid cluster data.

  FIG. 6 shows the validity / invalidity determination regarding the data G0 and the data G1 described above. Since the reverse lookup information GI added to the cluster data G0 stored at the position P0 is LBA = A0, the forward lookup information included in the LBA = A0 entry of the address translation table 21 is acquired. Since the forward lookup information indicates that the data of the logical address of LBA = A0 exists at the position P1, the collation result of the reverse lookup information and the forward lookup information is inconsistent, and this cluster data G0 is determined to be invalid. . Since the reverse lookup information GI added to the cluster data G1 stored at the position P1 is LBA = A0, the forward lookup information included in the entry of LBA = A0 in the address translation table 21 is acquired in the same manner. Since this forward lookup information indicates that the data of the logical address of LBA = A0 exists at the position P1, the collation result of the reverse lookup information and the forward lookup information coincides, and this cluster data G0 is determined to be valid. .

  Thus, in order to perform the validity / invalidity determination, it is necessary to read the reverse lookup information GI of the cluster data to be read from the NAND 10. Further, the reverse lookup information GI and the forward lookup address conversion table 21 must be collated, and a certain processing time is generated. In other words, even if the actual data movement (reading and writing) of the compaction process for moving the cluster data to another block does not occur, repeatedly performing the validity / invalidity determination requires a certain processing time. If the cluster data to be determined is valid data, writing to the compaction destination block occurs. However, if the cluster data to be determined is invalid data, writing to the compaction destination block does not occur.

  When there are many free blocks, it is not necessary to perform compaction. However, when a certain amount of data is written and the number of free blocks is reduced, compaction is required. If there is almost no free block and an attempt is made to create a free block by compaction, the response to the write command from the host 1 becomes worse. This is because, first, it takes a processing time to create a free block by compaction, and data can be written from the host 1 when the free block is prepared after the processing time elapses.

  Therefore, in the present embodiment, a method of operating data writing from the host 1 and writing by compaction at a constant rate (ratio) is employed in order not to extremely reduce the response speed to the write command. A method of performing data writing by compaction for N blocks (N pages) for one block (1 page) of data writing from the host 1 is called compaction with a gear ratio of 1: N.

  The host data write destination block is called HostDst, the compaction destination block is called CmpDst, and the compaction source block is called CmpSrc. In contrast to writing one page in HostDst, 1: N compaction is performed by writing N pages in CmpDst. A period for writing data for one block in HostDst is called a compaction term. In this embodiment, since the page size and the cluster size are the same, 1: N compaction is performed by writing N cluster data in CmpDst as opposed to writing 1 cluster data in HostDst.

  When there is a sufficient number of free blocks over the entire block, there is no need to perform compaction, and only writing to HostDst is performed. This is called 1: 0 compaction. Normally, the operation starts from 1: 0 compaction, and when free blocks decrease and active blocks increase, 1: 1 or 1: 2 compaction is performed. To increase the compaction, such as when there are few free blocks, increase N of 1: N. However, in 1: N compaction with a large N, even if the writing of the host data block HostDst to all pages is completed, the next free block cannot be secured by compaction, that is, a free block is generated by compaction processing. However, if the host data write destination block HostDst is not secured in time, the gear ratio becomes 0: 1 as a result, writing from the host 1 is temporarily suspended, and only compaction processing is performed. In this way, by changing the gear ratio, it is possible to operate while balancing the data writing from the host 1 and the writing by compaction. For example, the gear ratio is determined from the ratio between the free block and the active block.

  The gear ratio is controlled by the block management unit 31 that is a block supply source. The data access unit 32 that is a block request source only performs a data write operation (write control unit 34) and a compaction operation (organization unit 35) from the host 1 in accordance with the gear ratio given from the block management unit 31. Therefore, there is no responsibility for the compaction result of the organizing unit 35 (how much free blocks can be created, etc.). As a result, the data access unit 32 can be realized by hardware or software that performs only simple operation processing.

  FIG. 7 shows a compaction with a gear ratio of 1: 3. In FIG. 7, the effective cluster data in the compaction source block CmpSrc that is the four active blocks is moved to the compaction destination block CmpDst that is the three free blocks, and compaction for creating one free block is performed. . In this case, since compaction is 1: 3, data from the host 1 is written in one block HostDst, whereas writing by compaction is performed in three blocks CmpDst.

  FIG. 8 shows a 1: N compaction procedure according to a comparative example. First, write data from the host 1 is written to the block HostDst for one page (step S100). Next, one page of data in the compaction source block CmpSrc is read (step S110), and the above-described data validity / invalidity determination is performed (step S120). If the data is invalid (step S130: No), the data of the next page in the compaction source block CmpSrc is read (step S110), and then the same valid / invalid determination is performed (step S120). In this way, valid / invalid determination is performed until valid data can be found. When valid data is found (step S130: Yes), this valid data is written into the compaction destination block CmpDst (step S140).

  Next, it is determined whether or not the writing to the compaction destination block CmpDst has been repeated N times (step S150). If the writing to the compaction destination block CmpDst is less than N times, the procedure proceeds to step S110. In this manner, data validity / invalidity determination and data writing to the compaction destination block CmpDst are repeated until the writing to the compaction destination block CmpDst is completed N times. When N times of writing to the compaction destination block CmpDst are finished, it is determined whether or not the 1: N compaction procedure for the current host data is finished (step S160). The process proceeds to step S100, and this time, the write data from the host 1 is written to the block HostDst for the next one page. Such a process is repeated. If it is determined in step S160 that the 1: N compaction procedure for the current host data has been completed, the 1: N compaction procedure for the current host data is terminated.

  In this way, basically, one page writing to the block HostDst and N pages of valid data writing to the compaction destination block CmpDst are alternately performed.

  However, in the compaction process, not only the state of the compaction destination block CmpDst (the number of free blocks and the like) described above, but also the progress of writing changes depending on the state of the compaction source block CmpSrc. In the comparative example shown in FIG. 8, when the compaction source block CmpSrc is clogged with valid data, valid judgments frequently occur in the valid / invalid judgments of steps S120 and S130, and writing to the compaction destination block CmpDst (step S140). ) Is done frequently. However, in the comparative example, as shown in FIG. 9, when the compaction source block CmpSrc is clogged with invalid data and valid data exists only in the vicinity of the last page, steps S110 to S130 are performed until valid data can be found. The validity / invalidity determination process continues to loop.

  The compaction process is to secure free blocks by organizing valid data and filling invalid data into free blocks to create invalid data areas. For this reason, even if data is moved from a block that is completely filled with valid data, there is no effect of securing the area. Rather, as described above, the compaction source block CmpSrc is more efficient in securing more free blocks when there are more invalid data areas.

  In the comparative example, if the writing to the compaction destination block CmpDst in step S140 does not proceed, the writing of the host data to the block HostDst also does not proceed, so that it appears that the response to the write command is delayed when viewed from the host 1. In this way, despite the fact that a lot of invalid data in the compaction source block CmpSrc is more efficient for creating a free block, the comparison example method has a lot of invalid data in the compaction source block CmpSrc. If it exists, there is a problem that the response speed of the write command decreases.

  Therefore, in the present embodiment, in the validity / invalidity determination process, when the determination that it is invalid continues for a predetermined number K or more, the loop of the validity / invalidity determination process (steps S110 to S130) is escaped, thereby Make sure that the response speed does not drop drastically.

  FIG. 10 shows the 1: N compaction procedure of this embodiment. FIG. 10 adds steps S131 and S132 to the flowchart of FIG. The block management unit 31 determines the gear ratio N from the current ratio of the number of free blocks and active blocks, for example, and gives this gear ratio N to the data access unit 32. Further, the block management unit 31 determines an upper limit number K of invalidity determination described later, and gives this upper limit number K to the data access unit 32. The data access unit 32 notifies the managed gear control unit 34 and the organizing unit 35 of the given gear ratio N. Further, the data access unit 32 notifies the organizing unit 35 of the given upper limit number K. The write control unit 34 and the organizing unit 35 perform the above-described 1: N compaction while alternating the authority to write to the NAND 20 according to the given gear ratio N.

  First, the write control unit 34 writes the write data from the host 1 to the block HostDst for one page (= 1 cluster) (step S100). When the writing process for one page is completed, the write control unit 34 passes the write authority to the NAND 10 to the organizing unit 35.

  The organizing unit 35 reads one page of data in the compaction source block CmpSrc that is one of the organizing target blocks (step S110), and executes the above-described validity / invalidity determination on the data for one page (step S120). . If this data is valid data (step S130: Yes), the organizing unit 35 writes this valid data in the compaction destination block CmpDst (step S140). However, when it is determined that the data is invalid (step S130: No), the organizing unit 35 determines whether the invalidity determination in step S130 has been repeated a predetermined number of times K or more (step S131). If the determination in step S131 is No, the organizing unit 35 moves the procedure to step S110 and reads the data of the next page in the compaction source block CmpSrc. Thereafter, the organizing unit 35 performs the same validity / invalidity determination (step S120). As described above, the organizing unit 35 repeats the loop of steps S130, S131, S110, and S120 a maximum of K-1 times, thereby executing the validity / invalidity determination until valid data can be found. When valid data is found, the organizing unit 35 writes this valid data for one page into the compaction destination block CmpDst (step S140).

  However, when the loop of steps S130, S131, S110, and S120 is being repeated, if it is determined in step S131 that the invalidity determination in step S130 has been repeated a predetermined number of times K or more, the organizing unit 35 is shown in FIG. As shown, one page of invalid dummy data is written in the compaction destination block CmpDst (step S132). The invalid dummy data may be any data as long as it includes an invalid flag for identifying that the data is invalid. The determination in step S131 can be realized by a counter that is cleared when invalid determination results are output for K pages continuously, or when valid data is written to the compaction destination block CmpDst even for one page.

  Next, the organizing unit 35 determines whether or not one page writing to the compaction destination block CmpDst has been repeated N times (step S150). When counting the number of times of writing to the compaction destination block CmpDst, writing of invalid dummy data in step S132 is also counted as one time. If writing to the compaction destination block CmpDst is less than N times, the procedure proceeds to step S110. In this way, until the writing to the compaction destination block CmpDst is completed N times, the data validity / invalidity determination and the writing of valid data or invalid dummy data to the compaction destination block CmpDst are repeated.

  When N times of writing to the compaction destination block CmpDst are completed, the organizing unit 35 determines whether or not the 1: N compaction procedure for the current host data has been completed (step S160), and has not been completed. In this case, the organizing unit 35 passes the authority to write to the NAND 10 to the write control unit 34. As a result, the procedure proceeds to step S100, and the write control unit 34 writes the write data from the host 1 to the block HostDst for the next one page. Such a process is repeated. If it is determined in step S160 that the 1: N compaction procedure for the current host data has been completed, the 1: N compaction procedure for the current host data is terminated.

  In this way, basically, one page write to the block HostDst and N page valid data or invalid dummy data write to the compaction destination block CmpDst are alternately performed according to the gear ratio.

  In the present embodiment, as shown in FIG. 11, when invalid determination results are output continuously for K pages, invalid dummy data is written to the compaction destination block CmpDst, so that the gear ratio of the compaction term is Although it will be substantially collapsed, it becomes possible to keep the progress ratio of writing to the block HostDst for writing host data and the compaction destination block.

  In the above embodiment, the write control unit 34 writes data from the host 1 and the organizing unit 35 performs the entire compaction process. However, the organizing unit 35 reads and reads data from the compaction source block. It is desirable that the data invalidity determination process is performed and the function is shared so that the write control unit 34 writes data from the host 1 and writes data to the compaction destination block. When such function sharing is performed, the present embodiment has the following advantages. In this embodiment, when an invalidity determination result is output continuously for K pages, a function of writing invalid dummy data to the compaction destination block CmpDst without skipping writing to the compaction destination block CmpDst is used as a comparative example. However, the addition of the function is only the addition of the function to the organizing unit 35, and the function change to the write control unit 34 is not required. That is, when writing to the compaction destination block CmpDst is skipped, it is necessary to change the function to the write control unit 34, but when invalid dummy data is to be written to the compaction destination block CmpDst, from the organizing unit 35 If invalid dummy data is passed to the write control unit 34, the function change to the write control unit 34 becomes unnecessary, and the write control unit 34 can concentrate on the writing process without knowing the contents of the data.

  In addition, when invalid determination results are output for K pages continuously, invalid dummy data is written. Therefore, when the data is read for compaction again, the processing time for valid / invalid determination is reduced.

  As described above, in this embodiment, in the data validity / invalidity determination process in the compaction source block, when invalidity determination results are continuously output for K pages, the current validity / invalidity determination process is terminated, and invalid dummy data is stored. Since writing is performed in the compaction destination block CmpDst, it is possible to prevent the response speed to the write command from being extremely lowered while maintaining the gear ratio. In other words, in this embodiment, by setting the upper limit value K, it is possible to set the upper limit of the response delay to the write command, and a free block cannot be created even if a long time elapses. In such a situation, the compaction can be prevented from continuing to operate endlessly.

  In the above embodiment, when invalid determination results are continuously output for K pages, invalid dummy data is written to the compaction destination block CmpDst. However, writing to the compaction destination block CmpDst is simply skipped. You may do it.

  In addition, in an SSD capable of recording in a multi-level recording (MLC) mode and a single-level cell (SLC) mode, the SLC mode can write at a higher speed than the MLC mode. Data writing from the host may be performed in the SLC mode, and writing to the compaction destination block may be performed in the MLC mode. In this method, when the SLC mode block is first used as a compaction source block and the compaction destination block is written in the MLC mode, the free block cannot be sufficiently secured. The compaction block is used as a compaction source block, and compaction is performed for writing in the MLC mode to the compaction destination block.

  In the above embodiment, the reverse lookup information GI has only the logical address (LBA) of the data. However, the reverse lookup information GI may have a validity flag indicating the validity / invalidity of the data. . In the above embodiment, the reverse lookup information GI is added to the data. However, a table for managing the reverse lookup information may be prepared, and the reverse lookup may be performed using the reverse lookup management table. . Further, when the cluster size is defined to be smaller than the page size, the reverse lookup information of the cluster data in the page may be collectively stored in a predetermined cluster in the page.

  Further, in the flowchart shown in FIG. 10, data is written in units of pages (S100, S132, S140) and read (S110) for simplification, but the unit of writing and reading is not limited to a page. Cluster units (page size ≠ cluster size) may be used, and other units may be employed.

(Second Embodiment)
In the second embodiment, when performing compaction with a gear ratio of 1: N, the compaction processing time is measured, and when the compaction processing time exceeds the threshold Ta, the compaction processing is forcibly interrupted, and the host 1 Write data from. Such control also makes it possible to prevent the response speed to the write command from being extremely reduced.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  1 host device, 2 host interface, 10 NAND, 20 RAM, 21 address conversion table, 22 block management table, 25 write buffer, 30 controller, 31 block management unit, 32 data access unit, 33 read control unit, 34 write control unit , 35 Organizing Department.

Claims (4)

A nonvolatile semiconductor memory that is erased in units of blocks;
A write control unit that writes data from the host device to the block of the nonvolatile semiconductor memory, and determines whether each data stored in the organization target block of the nonvolatile semiconductor memory is valid or invalid. A controller that sequentially selects and rewrites data into a new block, and a controller that alternately executes write processing by the write control unit and rewrite to a new block by the organizer at a predetermined ratio;
With
The organizing unit terminates the current valid / invalid determination process if the invalid / valid determination result continues for a predetermined number of times during the data reduction corresponding to the predetermined ratio. A semiconductor memory device.   2. The semiconductor memory device according to claim 1, wherein the organizing unit writes invalid dummy data to the new block when the invalid / invalid determination result is invalid for a predetermined set number of times. An address conversion table for managing forward lookup information for associating a logical address designated by a host device with a storage position in the nonvolatile semiconductor memory;
The write control unit writes the data with reverse lookup information including the logical address of the data added to the block of the nonvolatile semiconductor memory,
3. The organizing unit determines whether each data is valid or invalid by comparing the reverse lookup information added to each data with the forward lookup information of the address conversion table. The semiconductor memory device described in 1. A nonvolatile semiconductor memory that is erased in units of blocks;
A write control unit that writes data from the host device to the block of the nonvolatile semiconductor memory, and determines whether each data stored in the organization target block of the nonvolatile semiconductor memory is valid or invalid. A controller that sequentially selects and rewrites data into a new block, and a controller that alternately executes write processing by the write control unit and rewrite to a new block by the organizer at a predetermined ratio;
With
The organizing unit interrupts data organizing and executes write processing by the write control unit when the data organizing is continued for a predetermined time or longer.

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