JP2013197150A - Semiconductor device and semiconductor device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which does not cause deterioration and variation in electric characteristics; and provide a manufacturing method of a semiconductor device which dose not cause deterioration and variation in electric characteristics.SOLUTION: An end of a semiconductor device which uses an oxide semiconductor for an active layer is subject to cause oxygen deficiency. The oxygen deficiency causes generation of carriers, and deterioration and variation in electric characteristics of the semiconductor device. A semiconductor device of a present embodiment comprises a protection layer which contains one or a plurality of kinds of elements selected from group 16 elements except oxygen, and which covers the end of the semiconductor device thereby not to cause deterioration and variation in electric characteristics. In addition, a manufacturing method of the semiconductor device is provided.

Description

  The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. Note that in this specification, a semiconductor device refers to a semiconductor element itself or a device including a semiconductor element, and examples of such a semiconductor element include a transistor. A display device such as a liquid crystal display device is also included in the semiconductor device.

  In recent years, a semiconductor device using an oxide semiconductor film for a channel formation region has attracted much attention (for example, Patent Document 1 and Patent Document 2).

JP 2007-123861 A JP 2007-96055 A

  An oxide semiconductor has attracted attention as a semiconductor material that can replace silicon. A semiconductor device in which an oxide semiconductor is used for an active layer has a smaller off-leakage current than silicon and can have higher field-effect mobility than amorphous silicon in a film-formed state. However, the electrical characteristics of a semiconductor device in which an oxide semiconductor is used for an active layer may be affected by moisture or atmospheric components that enter the active layer from the outside, and may deteriorate. For example, the threshold value of the semiconductor device may fluctuate and the leakage current may increase.

  In view of the above, an object of the present invention is to provide a semiconductor device in which an oxide semiconductor is used for an active layer and the electrical characteristics are hardly deteriorated or fluctuated.

  A semiconductor device according to one embodiment of the present invention is a semiconductor device using an island-shaped oxide semiconductor layer as an active layer, and an end portion of the island-shaped oxide semiconductor layer is a place where oxygen atoms existed The oxide semiconductor layer is covered with a protective layer containing an element that can reduce oxygen vacancies. Note that oxygen deficiency refers to a state in which oxygen present in the oxide semiconductor layer diffuses or disappears, and reduction of oxygen deficiency refers to a state in which some of the defects are repaired with oxygen or a different element. .

  That is, according to one embodiment of the present invention, an oxide semiconductor layer, a protective layer which is in contact with the end surface of the oxide semiconductor layer and covers the end surface of the oxide semiconductor layer, and a source electrode which is in contact with the oxide semiconductor layer And a drain electrode, a gate electrode overlapping with the oxide semiconductor layer, a gate insulating layer provided between the oxide semiconductor layer and the gate electrode, and an interlayer insulating film provided in contact with the oxide semiconductor layer, And a protective layer containing at least one or more elements selected from Group 16 elements excluding oxygen.

  An end portion of the oxide semiconductor layer easily generates oxygen vacancies, and the oxygen vacancies generate carriers. The generation of carriers at the end causes a decrease or fluctuation in the electrical characteristics of the semiconductor device. The protective layer contains at least one or more elements selected from Group 16 elements excluding oxygen. Oxygen vacancies in the oxide semiconductor layer can be reduced by substituting for oxygen atoms in the oxide semiconductor layer because these elements are elements of the same group as oxygen. Can be suppressed. Therefore, by covering the end portion of the oxide semiconductor layer with the protective layer, deterioration or fluctuation in electrical characteristics of the semiconductor device can be prevented.

  Further, the semiconductor device is preferably characterized in that the protective layer contains at least one element of sulfur, selenium, and tellurium.

  This is because sulfur, selenium, and tellurium are substituted at a place where an oxygen atom is present to easily reduce oxygen vacancies in the oxide semiconductor layer and are difficult to diffuse after substitution.

Furthermore, the semiconductor device is preferably characterized in that the protective layer includes crystals.

  External moisture and atmospheric components tend to enter from the end of the oxide semiconductor layer. When external moisture and atmospheric components enter the oxide semiconductor layer, the electrical characteristics of the semiconductor device using the oxide semiconductor layer are likely to deteriorate.

  Since the protective layer including crystals has a higher density than amorphous, when the protective layer is formed so as to be in contact with the end portion of the oxide semiconductor layer, intrusion of hydrogen, moisture, or the like from the outside to the oxide semiconductor layer is prevented. Can be prevented. Therefore, it is possible to prevent the electrical characteristics of the semiconductor device using the oxide semiconductor layer from being deteriorated or changed.

  According to one embodiment of the present invention, a method for manufacturing a semiconductor device includes a step of forming a gate electrode, a step of forming a gate insulating layer in contact with the gate electrode, and an oxide semiconductor layer in contact with the gate insulating layer. Selected from Group 16 elements excluding oxygen so as to contact the end of the oxide semiconductor layer and cover the end of the oxide semiconductor layer A method for manufacturing a semiconductor device, the method comprising: forming a protective layer containing at least one element or a plurality of elements; and forming a source electrode and a drain electrode.

  Formation of the protective layer containing at least one or more elements selected from Group 16 elements excluding oxygen is easy by sputtering or the like. In addition, a bottom-gate transistor with little reduction or fluctuation in electrical characteristics can be manufactured by the above method for manufacturing a semiconductor device.

  A method for manufacturing a semiconductor device of one embodiment of the present invention includes a step of forming an oxide semiconductor layer, a step of forming the oxide semiconductor layer in an island shape, an end portion of the oxide semiconductor layer, and the oxide semiconductor layer A step of forming a protective layer containing at least one element selected from Group 16 elements excluding oxygen and a gate insulating layer so as to be in contact with the oxide semiconductor layer so as to cover an end portion of the layer; And a step of forming a gate electrode so as to be in contact with the gate insulating layer, and a step of forming a source electrode and a drain electrode.

  Formation of the protective layer containing at least one or more elements selected from Group 16 elements excluding oxygen is easy by sputtering or the like. In addition, a top-gate transistor with little reduction or fluctuation in electrical characteristics can be manufactured by the above method for manufacturing a semiconductor device.

  In the method for manufacturing a semiconductor device, the protective layer includes at least one element of sulfur, selenium, and tellurium.

  A manufacturing method of a semiconductor device, wherein a protective layer includes a crystal.

  According to one embodiment of the present invention, an oxide semiconductor layer is provided so as to be in contact with a protective layer containing at least one or more elements selected from Group 16 elements excluding oxygen. It is possible to prevent the electrical characteristics of the semiconductor device using the semiconductor layer from being lowered or fluctuated.

4A and 4B are a top view and a cross-sectional view of a semiconductor device of one embodiment of the present invention. 4A to 4D illustrate a method for manufacturing a semiconductor device of one embodiment of the present invention. 4A to 4D illustrate a method for manufacturing a semiconductor device of one embodiment of the present invention. 4A and 4B are a top view and a cross-sectional view of a semiconductor device of one embodiment of the present invention. 4A to 4D illustrate a method for manufacturing a semiconductor device of one embodiment of the present invention. 4A to 4D illustrate a method for manufacturing a semiconductor device of one embodiment of the present invention. 4A to 4D illustrate a method for manufacturing a semiconductor device of one embodiment of the present invention. 6A and 6B illustrate a structure of an oxide semiconductor according to one embodiment of the present invention. 6A and 6B illustrate a structure of an oxide semiconductor according to one embodiment of the present invention. 6A and 6B illustrate a structure of an oxide semiconductor according to one embodiment of the present invention. 6A and 6B illustrate a structure of an oxide semiconductor according to one embodiment of the present invention. 6A and 6B illustrate a semiconductor device which is one embodiment of the present invention. 6A and 6B illustrate a semiconductor device which is one embodiment of the present invention.

  Embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below. Note that in structures of the invention described below, the same portions or portions having similar functions are denoted by the same reference numerals in different drawings, and description thereof is not repeated.

(Embodiment 1)
A structure of a bottom-gate transistor 160 as an example of a semiconductor device of one embodiment of the present invention is described with reference to FIGS. A top view of the transistor 160 of this embodiment is illustrated in FIG. 1A, and a cross-sectional view taken along a broken line KL in FIG. 1A is illustrated in FIG. The semiconductor device of one embodiment of the present invention is a so-called bottom gate transistor in which a gate electrode 401 is formed between an island-shaped oxide semiconductor layer 403 which is an active layer and a substrate 400. In the top view, the interlayer insulating film 404 is omitted.

  The transistor 160 described as an example in this embodiment is in contact with the end portion of the island-shaped oxide semiconductor layer 403 and covers the end portion of the island-shaped oxide semiconductor layer 403. A protective layer 500, a gate insulating layer 402, a gate electrode 401, a source electrode, and a drain electrode, and at least one or more kinds selected from Group 16 elements excluding oxygen A protective layer 500 containing an element is included.

(Oxide semiconductor layer)
The oxide semiconductor layer 403 can be formed using an oxide semiconductor. Embodiments of the materials applicable to the oxide semiconductor layer 403 will be described in detail in Embodiments 4 and 5. The thickness of the oxide semiconductor layer 403 can be 1 nm to 100 nm. For the oxide semiconductor layer 403, a semiconductor having at least a forbidden band width larger than 1.1 eV of silicon can be used. As such a semiconductor, for example, an In—Ga—Zn—O-based oxide semiconductor having a forbidden band width of 3.15 eV, indium oxide having a forbidden band width of about 3.0 eV, and a forbidden band width of about 3. Indium tin oxide with 0 eV, indium gallium oxide with forbidden band width of about 3.3 eV, indium zinc oxide with forbidden band width of about 2.7 eV, tin oxide with forbidden band width of about 3.3 eV Zinc oxide having a forbidden band width of about 3.37 eV can be used.

  The oxide semiconductor layer 403 is formed in an island shape. Although only one semiconductor device is illustrated in this embodiment, the semiconductor device includes a semiconductor device using a plurality of oxide semiconductor layers 403 adjacent to each other. In order to function as a semiconductor device, it is necessary to electrically isolate adjacent semiconductor devices, so that the oxide semiconductor layer 403 has an island shape. An end portion is formed to form an island shape, but the end portion is liable to cause oxygen deficiency and needs to be protected. Note that the oxide semiconductor layer 403 is formed over the substrate 400.

  As the substrate 400, a glass substrate (preferably a non-alkali glass substrate), a quartz substrate, a ceramic substrate, a plastic substrate, or the like can be used as appropriate. Alternatively, as the substrate 400, a flexible glass substrate or a flexible plastic substrate can be used. As a material for the plastic substrate, a material having a small refractive index anisotropy is preferably used. For example, polyethersulfone (PES), polyimide film, polyethylene naphthalate (PEN), polyvinyl fluoride (PVF), polyester, polycarbonate (PC), prepreg containing a fibrous body in an acrylic resin or semi-cured organic resin, etc. Can be used.

Note that although the oxide semiconductor layer 403 is formed in contact with the substrate in this embodiment, an insulating film is preferably formed between the substrate and the oxide semiconductor layer 403. The protective layer 500 containing more oxygen than the stoichiometric ratio is preferable. For example, SiO _{2 + α} (where α> 0) can be given as an example of silicon oxide.

(Protective layer)
The protective layer 500 is formed so as to be in contact with the end portion of the oxide semiconductor layer 403 and cover the end portion of the oxide semiconductor layer 403. The protective layer 500 is preferably an oxide insulator containing at least one or more elements selected from Group 16 elements excluding oxygen. The protective layer 500, for _{example, LM-Ga 2 M 3 -GeM} 2 ((L is an alkaline earth metal, M is sulfur, can be used chalcogenide glass selenium or tellurium), and the like. Selenium, tellurium and the like, When the oxygen atom is substituted at a place where oxygen atoms are present, atomic defects are less likely to occur than oxygen because the atomic radius is larger than oxygen and diffusion is difficult.

The protective layer 500 is preferably a crystal. When the crystal of the protective layer 500 having a higher density than amorphous is formed so as to be in contact with the end portion of the oxide semiconductor layer 403, entry of hydrogen, moisture, or the like from the outside to the oxide semiconductor layer 403 is prevented. Because you can. In the case where the film is amorphous at the stage of film formation, it is preferable to form crystals by heating in a furnace or by laser beam irradiation.

  When oxygen vacancies occur in the oxide semiconductor layer 403 in contact with the protective layer 500, at least one or more elements selected from Group 16 elements excluding oxygen are substituted with the locations where oxygen atoms exist, Oxygen deficiency can be reduced. This is because the elements and the like are elements of the same family as oxygen. The protective layer can be formed by a sputtering method or the like. After the formation of the protective layer, it can be crystallized by heat treatment. The heating method may be heating by a furnace or heating by laser light irradiation.

(Gate insulation layer)
As a material of the gate insulating layer 402, an insulating film can be used. For example, a silicon oxide film, hafnium oxide, yttrium oxide, hafnium silicate, hafnium aluminate, hafnium silicate added with nitrogen, hafnium aluminate added with nitrogen, lanthanum oxide, or the like can be used.

(Gate electrode)
The material of the gate electrode 401 only needs to have electrical conductivity and adhesion to the gate insulating layer 402. For example, it can be formed using a metal material such as molybdenum, titanium, tantalum, copper, tungsten, aluminum, chromium, neodymium, or scandium, or an alloy material containing these as a main component. The gate electrode 401 may have a single-layer structure or a stacked structure.

(Interlayer insulation film)
The interlayer insulating film 404 can be formed using an insulating film with low permeability to moisture and atmospheric components. As a material of the interlayer insulating film 404, an insulating film can be used. For example, a silicon oxide film, silicon nitride, aluminum oxide, or the like can be used. Since moisture and atmospheric components can be prevented from entering the oxide semiconductor layer 403 from the outside, deterioration and fluctuation of the electrical characteristics of the transistor 160 can be reduced.

(Source electrode and drain electrode)
The source and drain electrodes 502 can be formed using a metal material such as molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, or scandium, or an alloy material containing any of these materials as its main component. The conductive layer 501 only needs to be electrically connected to the oxide semiconductor layer 403.

  With the structure of the transistor 160 which is one embodiment of the present invention described in this embodiment, reduction or fluctuation in electrical characteristics can be prevented. An end portion of the oxide semiconductor of the semiconductor device including the oxide semiconductor layer 403 easily generates oxygen vacancies, and the oxygen vacancies easily generate carriers. The generation of carriers at the end causes a decrease or fluctuation in the electrical characteristics of the semiconductor device. At least one or more elements selected from Group 16 elements excluding oxygen contained in the protective layer 500 are replaced with the locations where oxygen atoms are present, and oxygen vacancies at the ends of the oxide semiconductor layer 403 are reduced. Therefore, the structure of the semiconductor device which is one embodiment of the present invention can prevent a decrease or fluctuation in electrical characteristics. A protective layer containing at least one element of sulfur, selenium, and tellurium is preferred.

(Embodiment 2)
<Method for Manufacturing Semiconductor Device>
Hereinafter, an example of a method for manufacturing the transistor 160 illustrated in FIGS. 1A to 1C will be described with reference to FIGS. 2 to 3 are cross-sectional views taken along broken lines KL in each manufacturing process.

  FIG. 2 illustrates the formation from the formation of the gate electrode 401 to the formation of the oxide semiconductor layer 403.

  As shown in FIG. 2A, a conductive layer 399 is formed over the substrate (FIG. 2A). The conductive layer 399 may be formed by a sputtering method or the like. Embodiment 1 can be referred to for a material that can be used for the conductive layer 399. Note that when the conductive layer 399 is processed, the gate electrode 401 is formed.

  Next, a resist 2405 is formed so as to be in contact with the conductive layer 399 (FIG. 2B). A material for the resist 2405 and a film thickness of the resist 2405 may be selected in accordance with the channel length of the semiconductor device to be manufactured, and an appropriate exposure apparatus may be used.

  Next, the gate electrode 401 is processed using the resist 2405 manufactured above (FIG. 2C). As a processing method, wet etching or dry etching can be used. When the channel length of the semiconductor device to be manufactured is 1 micrometer or less, it is preferable to use dry etching.

  Next, a gate insulating layer 402 is formed so as to be in contact with the gate electrode 401 (FIG. 2D). The gate insulating layer 402 can be formed by a CVD method or a sputtering method. Embodiment 1 can be referred to for a material that can be used for the gate insulating layer 402. When the gate insulating layer 402 is formed of a silicon oxide film or silicon oxynitride by a CVD method, the glow discharge plasma is generated from 3 MHz to 30 MHz, typically 13.56 MHz, 27.12 MHz, high frequency power in the HF band. Alternatively, it is preferably performed by applying high-frequency power in a VHF band from 30 MHz to approximately 300 MHz, typically 60 MHz. Moreover, it can also carry out by applying the microwave high frequency electric power of 1 GHz or more. Note that pulse oscillation in which high-frequency power is applied in a pulsed manner or continuous oscillation in which high-frequency power is continuously applied can be employed. A silicon oxide film or silicon oxynitride formed using a microwave of 1 GHz or more has a fixed charge at the interface between the film and the oxide semiconductor layer 403, or a silicon oxide film formed by ordinary plasma CVD or an acid Less than silicon nitride. Therefore, in the transistor 160, reliability of electrical characteristics such as a threshold voltage can be increased. The thickness of the gate insulating layer 402 may be selected in accordance with the channel length of the semiconductor device to be manufactured.

  Next, the oxide semiconductor layer 403 is formed so as to be in contact with the gate insulating layer 402. The oxide semiconductor layer 403 may be formed by a sputtering method or the like. Embodiments 4 and 5 can be referred to for materials that can be used for the oxide semiconductor layer 403. The thickness of the oxide semiconductor layer 403 may be selected as appropriate depending on the channel length of the semiconductor device to be manufactured.

The oxide semiconductor layer 403 is preferably a highly purified layer that hardly contains impurities such as copper, aluminum, and chlorine. In the manufacturing process of the transistor, it is preferable to select a process in which these impurities are not likely to be mixed or adhere to the surface of the oxide semiconductor layer 403 as appropriate. It is preferable to remove impurities from the oxide semiconductor layer 403 by exposure to hydrofluoric acid or the like, or plasma treatment (N ₂ O plasma treatment or the like). Specifically, the copper concentration in the oxide semiconductor is 1 × 10 ¹⁸ atoms / cm ³ or less, preferably 1 × 10 ¹⁷ atoms / cm ³ or less. The aluminum concentration in the oxide semiconductor is 1 × 10 ¹⁸ atoms / cm ³ or less. The chlorine concentration in the oxide semiconductor is 2 × 10 ¹⁸ atoms / cm ³ or less.

  In addition, the oxide semiconductor is preferably in a supersaturated state in which oxygen is more than the stoichiometric composition immediately after film formation. For example, in the case where an oxide semiconductor film is formed by a sputtering method, the film formation is preferably performed under a condition where the proportion of oxygen in the film formation gas is large, and the film formation is particularly performed in an oxygen atmosphere (oxygen gas 100%). Is preferred. When the film is formed in a condition where the proportion of oxygen in the film forming gas is large, particularly in an atmosphere containing 100% oxygen gas, the release of Zn from the film can be suppressed even when the film forming temperature is set to 300 ° C. or higher.

It is preferable that an impurity such as hydrogen be sufficiently removed from the oxide semiconductor and that the oxide semiconductor be supplied with sufficient oxygen to be supersaturated. Specifically, the hydrogen concentration of the oxide semiconductor is 5 × 10 ¹⁹ atoms / cm ³ or lower, preferably 5 × 10 ¹⁸ atoms / cm ³ or lower, more preferably 5 × 10 ¹⁷ atoms / cm ³ or lower. Note that the hydrogen concentration of the oxide semiconductor is measured by secondary ion mass spectrometry (SIMS).

  The oxide semiconductor layer 403 is also formed in a region that does not overlap with the gate electrode 401 so that a region electrically connected to the source and drain electrodes 502 is provided. As described later, contact holes for the source and drain electrodes 502 are formed, and the source and drain electrodes 502 and the oxide semiconductor layer 403 are electrically connected. An oxide semiconductor layer 403 may be provided so that electrical connection can be made. (FIG. 2 (E)). Note that wet etching or dry etching can be used as a method for processing the oxide semiconductor layer 403 into an island shape.

  FIG. 3 shows a process from the formation of the protective layer 500 to the formation of the source and drain electrodes 502.

  The protective layer 500 is formed so as to be in contact with the oxide semiconductor layer 403 which is in the shape of an island and to cover an end portion (FIG. 3A). The protective layer 500 may be formed by a sputtering method or the like. The protective layer 500 may be patterned through a photolithography process and an etching process. Embodiment 1 can be referred to for materials that can be used for the protective layer 500.

  Since the end portion of the oxide semiconductor layer 403 is likely to generate oxygen vacancies, when the protective layer 500 is in contact with and covers the oxide semiconductor layer 403, when the oxygen vacancies are generated, the protective layer 500 is overheated, At least one element or a plurality of elements selected from Group 16 elements excluding oxygen in the protective layer 500 can be replaced with a place where an oxygen atom is present to reduce oxygen deficiency. In the heating, the substrate may be heated in a furnace, or the protective layer 500 may be heated with a laser beam or the like. The protective layer preferably contains at least one element of sulfur, selenium, and tellurium.

  In order to improve the electrical reliability of the transistor 160, an interlayer insulating film 404 having low permeability to moisture and atmospheric components is formed so as to cover the oxide semiconductor layer 403. Since moisture and atmospheric components can be prevented from entering the oxide semiconductor layer 403 from the outside, deterioration and fluctuation of the electrical characteristics of the transistor 160 can be reduced.

  Next, in order to form the source and drain electrodes 502, the interlayer insulating film 404 is opened, and the source and drain electrodes 502 are formed. For the opening of the interlayer insulating film 404, wet etching or dry etching can be used.

  Next, a conductive layer 501 is formed so as to fill the opening of the above-described interlayer insulating film 404 so as to be electrically connected to the oxide semiconductor layer 403 (FIG. 3B).

  Next, the conductive layer 501 is processed to form the source and drain electrodes 502. The conductive layer 501 can be processed by wet etching or dry etching (FIG. 3C).

  With the method for manufacturing the transistor 160 which is one embodiment of the present invention described in this embodiment, reduction or fluctuation in electrical characteristics can be prevented. An end portion of the oxide semiconductor layer of the semiconductor device including the oxide semiconductor layer 403 easily generates oxygen vacancies, and the oxygen vacancies easily generate carriers. The generation of carriers at the end causes a decrease or fluctuation in the electrical characteristics of the semiconductor device. At least one or a plurality of elements selected from Group 16 elements excluding oxygen contained in the protective layer 500 are substituted for the oxygen vacancies generated at the end portions thereof where oxygen atoms are present, thereby reducing oxygen vacancies. Therefore, the structure of the semiconductor device which is one embodiment of the present invention can prevent a decrease or fluctuation in electrical characteristics.

(Embodiment 3)
The structure of the top-gate transistor 161 which is a semiconductor device of one embodiment of the present invention is described with reference to FIGS. FIG. 4A shows a top view of the semiconductor device of this embodiment, and FIG. 4B shows a cross-sectional view taken along broken line XY in FIG. 4A. The transistor 161 of one embodiment of the present invention is a so-called top gate transistor in which an island-shaped oxide semiconductor layer 403 which is an active layer is formed between a substrate and a gate electrode 401. In the top view, the interlayer insulating film 404 is omitted.

  The semiconductor device described as an example in this embodiment includes an island-shaped oxide semiconductor layer 403, a protective layer 500 provided in contact with and covering an end portion of the island-shaped oxide semiconductor layer 403, and gate insulation. The protective layer 500 includes a layer 402, a gate electrode 401, a source electrode, and a drain electrode, and includes at least one or more elements selected from Group 16 elements excluding oxygen.

For the oxide semiconductor layer 403, the substrate 400, the protective layer 500, the gate insulating layer 402, the gate electrode 401, the interlayer insulating film 404, and the source and drain electrodes 502 included in the transistor 161, refer to Embodiment 1. can do.

<Method for Manufacturing Semiconductor Device>
Hereinafter, an example of a method for manufacturing the transistor 161 illustrated in FIGS. 4A to 4C will be described with reference to FIGS. 5 to 7, cross-sectional views taken along broken lines XY in the respective manufacturing steps are shown.

  FIG. 5 illustrates formation of the oxide semiconductor layer 403 to formation of the protective layer 500.

  As illustrated in FIG. 5A, the oxide semiconductor layer 403 is formed over the substrate (FIG. 5A). Embodiments 4 and 5 can be referred to for a material that can be used for the oxide semiconductor layer 403.

  Next, a resist 2406 is formed so as to be in contact with a region where the island-shaped oxide semiconductor layer 403 is formed (FIG. 5B). The material of the resist 2406 and the thickness of the resist 2406 may be selected depending on the thickness of the oxide semiconductor layer 403, and an appropriate exposure apparatus may be used.

  Next, the oxide semiconductor layer 403 is processed into an island shape (FIG. 5C). As a processing method, wet etching or dry etching can be used.

  Next, the protective layer 500 is formed so as to be in contact with the island-shaped oxide semiconductor layer 403 and to cover the end portion (FIG. 5D). Since the end portion of the oxide semiconductor layer 403 easily generates oxygen vacancies, when the protective layer 500 is in contact with and covers the oxide semiconductor layer 403, oxygen in the protective layer 500 is removed when oxygen vacancies are generated. At least one or a plurality of elements selected from Group 16 elements can be substituted at the location where the oxygen atom is present to reduce oxygen vacancies.

  FIG. 6 illustrates the process from formation of the gate insulating layer 402 to formation of the gate electrode 401.

  A gate insulating layer 402 is formed so as to be in contact with the oxide semiconductor layer 403 (FIG. 6A). The gate insulating layer 402 can be formed by a CVD method or a sputtering method. Embodiment 1 can be referred to for a material that can be used for the gate insulating layer 402. When the gate insulating layer 402 is formed of a silicon oxide film or silicon oxynitride by a CVD method, the glow discharge plasma is generated from 3 MHz to 30 MHz, typically 13.56 MHz, 27.12 MHz, high frequency power in the HF band. Alternatively, it is preferably performed by applying high-frequency power in a VHF band from 30 MHz to approximately 300 MHz, typically 60 MHz. Moreover, it can also carry out by applying the microwave high frequency electric power of 1 GHz or more. Note that pulse oscillation in which high-frequency power is applied in a pulsed manner or continuous oscillation in which high-frequency power is continuously applied can be employed. A silicon oxide film or silicon oxynitride formed using a microwave of 1 GHz or more has a fixed charge at the interface between the film and the oxide semiconductor layer 403, or a silicon oxide film formed by ordinary plasma CVD or an acid Less than silicon nitride. Therefore, in the transistor 161, reliability of electrical characteristics such as a threshold voltage can be increased. The thickness of the gate insulating layer 402 may be selected in accordance with the channel length of the semiconductor device to be manufactured.

  Next, a conductive layer 399 is formed so as to be in contact with the gate insulating layer 402 (FIG. 6B). Embodiment 1 can be referred to for a material that can be used for the gate electrode 401. Note that when the conductive layer 399 is processed, the gate electrode 401 is formed.

  Next, a resist 2407 is formed so as to be in contact with a region where the gate electrode 401 is formed. An appropriate exposure apparatus may be used by selecting a material of the resist 2407 and a film thickness of the resist 2407 according to the channel length of the semiconductor device to be manufactured. The gate electrode 401 is processed using the resist 2407 pattern manufactured above (FIG. 6C). As a processing method, wet etching or dry etching can be used. When the channel length of the semiconductor device to be manufactured is 1 micrometer or less, it is preferable to use dry etching.

  FIG. 7 shows from the formation of the interlayer insulating film 404 to the formation of the source and drain electrodes 502.

  In order to improve the electrical reliability of the transistor 161, an interlayer insulating film 404 with low permeability to moisture and atmospheric components is formed so as to cover the oxide semiconductor layer 403. Since moisture and atmospheric components can be prevented from entering the oxide semiconductor layer 403 from the outside, reduction in electrical characteristics and fluctuation of the transistor 161 can be reduced.

  Next, in order to form the source and drain electrodes 502, the interlayer insulating film 404 is opened, and the source and drain electrodes 502 are formed. The interlayer insulating film 404 may be opened in a region where the oxide semiconductor layer 403 does not overlap with the gate electrode 401. For the opening of the interlayer insulating film 404, wet etching or dry etching can be used.

  Next, a conductive layer 501 is formed so as to fill the opening of the above-described interlayer insulating film 404 so as to be electrically connected to the oxide semiconductor layer 403 (FIG. 7A).

  Next, the conductive layer 501 is processed to form the source and drain electrodes 502. For the processing of the conductive material, wet etching or dry etching can be used (FIG. 7B).

  With the manufacturing method of the transistor 161 which is one embodiment of the present invention described in this embodiment, reduction or fluctuation in electrical characteristics can be prevented. An end portion of the oxide semiconductor layer of the semiconductor device including the oxide semiconductor layer 403 easily generates oxygen vacancies, and the oxygen vacancies easily generate carriers. The generation of carriers at the end causes a decrease or fluctuation in the electrical characteristics of the semiconductor device. At least one or a plurality of elements selected from Group 16 elements excluding oxygen contained in the protective layer 500 are substituted for the oxygen vacancies generated at the end portions thereof where oxygen atoms are present, thereby reducing oxygen vacancies. Therefore, the structure of the semiconductor device which is one embodiment of the present invention can prevent a decrease or fluctuation in electrical characteristics.

(Embodiment 4)
An oxide semiconductor that can be used for the oxide semiconductor layer 403 described in Embodiment 1 will be described.

  A material that can be used for the oxide semiconductor contains at least indium (In). In particular, it is preferable to contain In and zinc (Zn). In addition, it is preferable to include gallium (Ga) in addition to the stabilizer for reducing variation in electrical characteristics of the transistor including the oxide semiconductor. Moreover, it is preferable to have tin (Sn) as a stabilizer. Moreover, it is preferable to have hafnium (Hf) as a stabilizer. Moreover, it is preferable to have aluminum (Al) as a stabilizer. Moreover, it is preferable to have a zirconium (Zr) as a stabilizer.

  As other stabilizers, lanthanoids such as lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb) , Dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), or lutetium (Lu).

  In addition, as oxide semiconductors, indium oxide, tin oxide, zinc oxide, binary metal oxides In—Zn oxides, In—Mg oxides, In—Ga oxides, ternary metals In-Ga-Zn-based oxide (also referred to as IGZO), In-Al-Zn-based oxide, In-Sn-Zn-based oxide, In-Hf-Zn-based oxide, In-La -Zn oxide, In-Ce-Zn oxide, In-Pr-Zn oxide, In-Nd-Zn oxide, In-Sm-Zn oxide, In-Eu-Zn oxide In-Gd-Zn-based oxide, In-Tb-Zn-based oxide, In-Dy-Zn-based oxide, In-Ho-Zn-based oxide, In-Er-Zn-based oxide, In-Tm- Zn-based oxide, In-Yb-Zn-based oxide, In-Lu-Zn-based oxide, quaternary In—Sn—Ga—Zn-based oxide, In—Hf—Ga—Zn-based oxide, In—Al—Ga—Zn-based oxide, In—Sn—Al—Zn-based oxide, which are metal oxides, An In—Sn—Hf—Zn-based oxide or an In—Hf—Al—Zn-based oxide can be used.

  Note that here, for example, an In—Ga—Zn-based oxide means an oxide containing In, Ga, and Zn as its main components, and there is no limitation on the ratio of In, Ga, and Zn. Moreover, metal elements other than In, Ga, and Zn may be contained.

Alternatively, a material represented by InMO ₃ (ZnO) m (m> 0 is satisfied, and m is not an integer) may be used as the oxide semiconductor. Note that M represents one metal element or a plurality of metal elements selected from Ga, Fe, Mn, and Co. Alternatively, a material represented by In ₂ SnO ₅ (ZnO) n (n> 0 is satisfied, and n is an integer) may be used as the oxide semiconductor.

  As the oxide semiconductor, In: Ga: Zn = 1: 1: 1 (= 1/3: 1/3: 1/3), In: Ga: Zn = 2: 2: 1 (= 2/5: 2/5: 1/5), or In: Ga: Zn = 3: 1: 2 (= 1/2: 1/6: 1/3) atomic ratio In—Ga—Zn-based oxides and their An oxide in the vicinity of the composition can be used. Alternatively, In: Sn: Zn = 1: 1: 1 (= 1/3: 1/3: 1/3), In: Sn: Zn = 2: 1: 3 (= 1/3: 1/6: 1) / 2) or In: Sn: Zn = 2: 1: 5 (= 1/4: 1/8: 5/8) atomic ratio In—Sn—Zn-based oxide or oxide in the vicinity of the composition Should be used.

  However, the oxide semiconductor containing indium is not limited thereto, and an oxide semiconductor having an appropriate composition may be used depending on required semiconductor characteristics (mobility, threshold value, variation, and the like). In order to obtain the required semiconductor characteristics, it is preferable that the carrier concentration, impurity concentration, defect density, atomic ratio of metal element to oxygen, interatomic bond distance, density, and the like are appropriate.

  For example, high mobility can be obtained relatively easily with an In—Sn—Zn-based oxide. However, mobility can be increased by reducing the defect density in the bulk also in the case of using an In—Ga—Zn-based oxide.

  The oxide semiconductor layer 403 is in a single crystal state, a polycrystalline (also referred to as polycrystal) state, an amorphous state, or the like.

In addition, the oxide semiconductor layer 403 is preferably highly purified so as not to contain impurities such as copper, aluminum, and chlorine. In the manufacturing process of the transistor, it is preferable to select a process in which these impurities are not mixed or attached to the surface of the oxide semiconductor layer 403 as appropriate. It is preferable to remove impurities from the oxide semiconductor layer 403 by exposure to hydrofluoric acid or the like, or plasma treatment (N ₂ O plasma treatment or the like). In the case where an oxide semiconductor is used for the oxide semiconductor layer 403, specifically, the copper concentration in the oxide semiconductor is 1 × 10 ¹⁸ atoms / cm ³ or less, preferably 1 × 10 ¹⁷ atoms / cm ³ or less. . The aluminum concentration in the oxide semiconductor is 1 × 10 ¹⁸ atoms / cm ³ or less. The chlorine concentration in the oxide semiconductor is 2 × 10 ¹⁸ atoms / cm ³ or less.

  In the case where an oxide semiconductor is used for the oxide semiconductor layer 403, it is preferable that the oxide semiconductor be in a supersaturated state in which oxygen is higher than that in the stoichiometric composition immediately after film formation. For example, in the case where an oxide semiconductor film is formed by a sputtering method, the film formation is preferably performed under a condition where the proportion of oxygen in the film formation gas is large, and the film formation is particularly performed in an oxygen atmosphere (oxygen gas 100%). Is preferred. When the film is formed in a condition where the proportion of oxygen in the film forming gas is large, particularly in an atmosphere containing 100% oxygen gas, the release of Zn from the film can be suppressed even when the film forming temperature is set to 300 ° C. or higher.

In the oxide semiconductor layer 403, it is preferable that impurities such as hydrogen be sufficiently removed and oxygen be supplied to the oxide semiconductor to be in a supersaturated state. Specifically, the hydrogen concentration of the oxide semiconductor is 5 × 10 ¹⁹ atoms / cm ³ or lower, preferably 5 × 10 ¹⁸ atoms / cm ³ or lower, more preferably 5 × 10 ¹⁷ atoms / cm ³ or lower. Note that the hydrogen concentration of the oxide semiconductor is measured by secondary ion mass spectrometry (SIMS).

(Embodiment 5)
In this embodiment, a CAAC-OS (C Axis Crystalline Oxide Semiconductor) film that can be used for the oxide semiconductor layer 403 described in Embodiment 1 is described.

The CAAC-OS film is not completely single crystal nor completely amorphous. The CAAC-OS film is an oxide semiconductor film with a crystal-amorphous mixed phase structure including a crystal part and an amorphous part. Note that the crystal part is often large enough to fit in a cube whose one side is less than 100 nm. Further, in the observation image obtained by a transmission electron microscope (TEM), the boundary between the amorphous part and the crystal part included in the CAAC-OS film is not clear. Further, a grain boundary (also referred to as a grain boundary) cannot be confirmed in the CAAC-OS film by TEM. Therefore, in the CAAC-OS film, reduction in electron mobility due to grain boundaries is suppressed.

  In this embodiment mode, the atoms are c-axis oriented and have an atomic arrangement that is triangular or hexagonal when viewed from the ab plane, surface, or interface direction. In the c-axis, the metal atoms are layered, or metal atoms and oxygen atoms A description will be given of an oxide (also referred to as CAAC: C Axis Aligned Crystalline) containing crystals in which the a and b axes have different orientations (rotated about the c axis) on the ab plane.

  CAAC is a non-single crystal in a broad sense, and has a triangular, hexagonal, equilateral triangle, or equilateral hexagonal atomic arrangement when viewed from a direction perpendicular to the ab plane, and a direction perpendicular to the c-axis direction. As seen from the above, it is an oxide containing a phase in which metal atoms are arranged in layers or metal atoms and oxygen atoms are arranged in layers.

  CAAC is not a single crystal, but is not formed only from an amorphous material. Further, although CAAC includes a crystallized portion (crystal portion), the boundary between one crystal portion and another crystal portion may not be clearly distinguished.

  A part of oxygen constituting CAAC may be replaced with nitrogen. In addition, the c-axis of each crystal portion constituting the CAAC may be aligned in a certain direction (for example, a direction perpendicular to the substrate surface supporting the CAAC, the surface of the CAAC, etc.). Alternatively, the normal line of the ab plane of each crystal portion constituting the CAAC may be in a certain direction (for example, a direction perpendicular to the substrate surface supporting the CAAC, the surface of the CAAC, etc.).

  The CAAC is a conductor, a semiconductor, or an insulator depending on its composition. Further, it is transparent or opaque to visible light depending on its composition.

  As an example of such CAAC, a triangular or hexagonal atomic arrangement is observed when observed from a direction perpendicular to the film surface or the supporting substrate surface, and when the film cross section is observed, a metal atom or metal Mention may also be made of oxides in which a layered arrangement of atoms and oxygen atoms (or nitrogen atoms) is observed.

  An example of a crystal structure included in the CAAC oxide semiconductor layer will be described in detail with reference to FIGS. Unless otherwise specified, in FIGS. 8 to 10, the upper direction is the c-axis direction, and the plane orthogonal to the c-axis direction is the ab plane. Note that the upper half and the lower half simply refer to the upper half and the lower half when the ab surface is used as a boundary. In FIG. 8, O (oxygen) surrounded by a circle represents tetracoordinate O (oxygen), and O (oxygen) surrounded by a double circle represents tricoordinate O.

FIG. 8A illustrates a structure including one hexacoordinate In and six tetracoordinate oxygen atoms adjacent to In (hereinafter referred to as tetracoordinate O (oxygen)). Here, a structure in which only one oxygen atom is adjacent to one metal atom is referred to as a small group. The structure in FIG. 8A has an octahedral structure, but is illustrated as a planar structure for simplicity. Note that three tetracoordinate O atoms (oxygen) exist in each of an upper half and a lower half in FIG. In the small group illustrated in FIG. 8A, electric charge is 0.

FIG. 8B illustrates one pentacoordinate Ga, three tricoordinate oxygen atoms adjacent to Ga (hereinafter referred to as tricoordinate O (oxygen)), and two proximate to Ga. 4 shows a structure having tetracoordinate O (oxygen). All tricoordinate O atoms are present on the ab plane. One tetracoordinate O (oxygen) atom exists in each of an upper half and a lower half in FIG. In addition, since In also has five coordination, the structure illustrated in FIG. 8B can be employed. In the small group illustrated in FIG. 8B, electric charge is 0. Since the ab surface is likely to be exposed at the end portion of the oxide semiconductor layer 403, a deficiency of tricoordinate O (oxygen) existing in the ab surface is likely to occur. At least one or more elements selected from Group 16 elements other than oxygen can be easily substituted at the place where the tricoordinate O (oxygen) was present. In addition, even in the case where tetracoordinate O (oxygen) deficiency occurs in the end portion of the oxide semiconductor layer 403, the oxide semiconductor layer 403 has the same family as oxygen; The element can be substituted at a place where tetracoordinate O (oxygen) was present.

FIG. 8C illustrates a structure including one tetracoordinate Zn and four tetracoordinate O (oxygen) atoms close to Zn. In the upper half of FIG. 8C, three tetracoordinate O (oxygen) atoms may exist in the upper half, and one tetracoordinate O atom may exist in the lower half. In the small group illustrated in FIG. 8C, electric charge is 0.

FIG. 8D illustrates a structure including one hexacoordinate Sn and six tetracoordinate O (oxygen) atoms adjacent to the Sn. In FIG. 8D, there are three tetracoordinate O (oxygen) atoms in the upper half, and three tetracoordinate O (oxygen) ions in the lower half. In the small group illustrated in FIG. 8D, electric charge is +1.

FIG. 8E illustrates a small group including two Zn atoms. In FIG. 8E, there is one tetracoordinate O atom in the upper half, and one tetracoordinate O atom in the lower half. In the small group illustrated in FIG. 8E, electric charge is -1.

Here, an aggregate of a plurality of small groups is referred to as a medium group, and an aggregate of a plurality of medium groups is referred to as a large group (also referred to as a unit cell).

Here, a rule for combining these small groups will be described. Three Os (oxygens) in the upper half of hexacoordinate In each have three adjacent Ins in the downward direction, and three Os (oxygens) in the lower half each have three in the upward direction. Proximity In. One O (oxygen) in the upper half of pentacoordinate Ga has one neighboring Ga in the downward direction, and one O (oxygen) in the lower half has one neighboring Ga in the upward direction . One O (oxygen) in the upper half of tetracoordinate Zn has one adjacent Zn in the downward direction, and three O (oxygen) in the lower half have three adjacent in the upward direction, respectively. Zn is contained. In this way, the number of tetracoordinate O (oxygen) in the upward direction of the metal atom is equal to the number of adjacent metal atoms in the downward direction of the O (oxygen). The number of O (oxygen) at the position is equal to the number of adjacent metal atoms above the O (oxygen). Since O (oxygen) is tetracoordinate, the sum of the number of adjacent metal atoms in the downward direction and the number of adjacent metal atoms in the upward direction is 4. Therefore, when the sum of the number of tetracoordinate O (oxygen) in the upward direction of a metal atom and the number of tetracoordinate O (oxygen) in the downward direction of another metal atom is 4, Two kinds of small groups having atoms can be bonded to each other. For example, in the case where a hexacoordinate metal atom (In or Sn) is bonded through tetracoordinate O (oxygen) in the lower half, since there are three tetracoordinate O (oxygen), pentacoordinate The metal atoms (Ga or In) and tetracoordinate metal atoms (Zn) are bonded to each other.

The metal atoms having these coordination numbers are bonded via tetracoordinate O (oxygen) in the c-axis direction. In addition, a plurality of small groups are combined to form a middle group so that the total charge of the layer structure becomes zero.

  FIG. 9A is a model diagram of a middle group that forms an In—Sn—Zn—O-based layer structure. FIG. 9B illustrates a large group including three medium groups. Note that FIG. 9C illustrates an atomic arrangement in the case where the layered structure in FIG. 9B is observed from the c-axis direction.

  In FIG. 9A, for the sake of simplicity, tricoordinate O (oxygen) is omitted, and tetracoordinate O (oxygen) is shown only for the number. For example, the upper half and the lower half of Sn each have 3 The fact that there is tetracoordinate O (oxygen) one by one is shown as 3 in a round frame. Similarly, in FIG. 9A, there is one tetracoordinate O (oxygen) in each of the upper half and the lower half of In, which is shown as 1 in a round frame. Similarly, in FIG. 9A, the lower half has one tetracoordinate O (oxygen), the upper half has three tetracoordinate O, and the upper half has Zn. Represents one tetracoordinate O (oxygen), and the lower half represents Zn having three tetracoordinate O atoms.

  In FIG. 9A, in the middle group constituting the layer structure of the In—Sn—Zn—O system, Sn having three tetracoordinate O (oxygen) in the upper half and the lower half in order from the top, Tetracoordinate O (oxygen) is bonded to In in the upper half and the lower half one by one, and the In is bonded to Zn having three tetracoordinate O (oxygen) in the upper half, Three tetracoordinate O (oxygen) bonds to In in the upper half and the lower half through one tetracoordinate O (oxygen) in the lower half of Zn, and the In is in the upper half. One tetracoordinate O (oxygen) is bonded to a small group consisting of two Zn atoms, and one tetracoordinate O (oxygen) in the lower half of the small group is bonded to a tetracoordinate O (oxygen). Oxygen) is bonded to Sn in the upper half and the lower half. A plurality of medium groups are combined to form a large group.

  Here, in the case of tricoordinate O and tetracoordinate O (oxygen), the charges per bond can be considered to be −0.667 and −0.5, respectively. For example, the charges of In (6-coordinate or 5-coordinate), Zn (4-coordinate), and Sn (5-coordinate or 6-coordinate) are +3, +2, and +4, respectively. Therefore, the small group including Sn has a charge of +1. Therefore, in order to form a layer structure including Sn, a charge −1 that cancels the charge +1 is required. As a structure with charge −1, a small group including two Zn atoms can be given as illustrated in FIG. For example, if there is one small group containing Sn and one small group containing 2 Zn, the charge is canceled out, so the total charge of the layer structure can be zero.

Specifically, when the large group illustrated in FIG. 9B is repeated, an In—Sn—Zn—O-based crystal (In ₂ SnZn ₃ O ₈ ) can be obtained. Note that an In—Sn—Zn—O-based layer structure obtained can be represented by a composition formula, In ₂ SnZn ₂ O ₇ (ZnO) _m (m is 0 or a natural number). Note that an In—Sn—Zn—O-based crystal is preferable when the number of m is large because crystallinity is improved.

  In addition, an In—Sn—Ga—Zn—O-based oxide that is an oxide of a quaternary metal or an In—Ga—Zn—O-based oxide that is an oxide of a ternary metal ( IGZO)), In-Al-Zn-O-based oxide, Sn-Ga-Zn-O-based oxide, Al-Ga-Zn-O-based oxide, Sn-Al-Zn-O-based oxide In-Hf-Zn-O-based oxide, In-La-Zn-O-based oxide, In-Ce-Zn-O-based oxide, In-Pr-Zn-O-based oxide, In-Nd- Zn-O-based oxide, In-Sm-Zn-O-based oxide, In-Eu-Zn-O-based oxide, In-Gd-Zn-O-based oxide, In-Tb-Zn-O-based oxide In-Dy-Zn-O-based oxide, In-Ho-Zn-O-based oxide, In-Er-Zn-O-based oxide, In-Tm-Zn-O-based Oxide, In-Yb-Zn-O-based oxide, In-Lu-Zn-O-based oxide, binary metal oxides such as In-Zn-O-based oxide, Sn-Zn-O-based oxide Materials, Al-Zn-O-based oxides, Zn-Mg-O-based oxides, Sn-Mg-O-based oxides, In-Mg-O-based oxides, In-Ga-O-based materials, etc. It is the same when there is.

  For example, FIG. 10A illustrates a model diagram of a middle group included in an In—Ga—Zn—O-based layer structure.

  In FIG. 10A, the middle group forming the In—Ga—Zn—O-based layer structure includes three tetracoordinate O (oxygen) atoms in the upper half and the lower half in order from the top. One tetracoordinate O (oxygen) is bonded to Zn in the upper half, and one tetracoordinate O is formed through three tetracoordinate O (oxygen) in the lower half of the Zn. In bonds in which three tetracoordinate O atoms are bonded to the upper half and the lower half through one tetracoordinate O in the lower half of the Ga bonded to Ga in the upper half and the lower half. It is the composition which is combined with. A plurality of medium groups are combined to form a large group.

  FIG. 10B illustrates a large group including three medium groups. Note that FIG. 10C illustrates an atomic arrangement in the case where the layered structure in FIG. 10B is observed from the c-axis direction.

  Here, charges of In (6-coordinate or 5-coordinate), Zn (4-coordinate), and Ga (5-coordinate) are +3, +2, and +3, respectively. The small group including the charge is 0. Therefore, in the case of a combination of these small groups, the total charge of the medium group is always zero.

  In addition, the middle group forming the In—Ga—Zn—O-based layer structure is not limited to the middle group illustrated in FIG. 10A, and is a large combination of middle groups having different arrangements of In, Ga, and Zn. Groups can also be taken.

Specifically, when the large group illustrated in FIG. 10B is repeated, an In—Ga—Zn—O-based crystal can be obtained. Note that the obtained In—Ga—Zn—O-based layer structure can be represented by a composition formula, InGaO ₃ (ZnO) _n (n is a natural number).

In the case of n = 1 (InGaZnO ₄ ), for example, the crystal structure illustrated in FIG. Note that in the crystal structure illustrated in FIG. 11A, as described in FIG. 8B, since Ga and In have five coordination, a structure in which Ga is replaced with In can be used.

In the case of n = 2 (InGaZn ₂ O ₅ ), for example, the crystal structure shown in FIG. 11B can be taken. Note that in the crystal structure illustrated in FIG. 11B, as described in FIG. 8B, since Ga and In have five coordination, a structure in which Ga is replaced with In can be used.

(Embodiment 6)
As a semiconductor device which is one embodiment of the present invention to which the transistor described in any of Embodiments 1, 2, and 3 is applied, various electronic devices (including game machines) can be given in addition to electronic paper. Examples of the electronic device include a television device (also referred to as a television or a television receiver), a monitor for a computer, a digital camera, a digital video camera, a digital photo frame, a mobile phone (also referred to as a mobile phone or a mobile phone device). ), Large game machines such as portable game machines, portable information terminals, sound reproducing devices, and pachinko machines.

  FIG. 12A illustrates an example of a television device. In the television device 1400, a display portion 1403 is incorporated in a housing 1401. Images can be displayed on the display portion 1403. Here, a configuration in which the housing 1401 is supported by a stand 1405 is shown.

  The television device 1400 can be operated with an operation switch included in the housing 1401 or a separate remote controller 1410. Channels and volume can be operated with an operation key 1409 provided in the remote controller 1410, and an image displayed on the display portion 1403 can be operated. Further, the remote controller 1410 may be provided with a display unit 1407 for displaying information output from the remote controller 1410.

  Note that the television device 1400 is provided with a receiver, a modem, and the like. General TV broadcasts can be received by a receiver, and connected to a wired or wireless communication network via a modem, so that it can be unidirectional (sender to receiver) or bidirectional (sender and receiver). It is also possible to perform information communication between each other or between recipients).

  FIG. 12B illustrates an example of a digital photo frame. For example, the digital photo frame 1420 has a display portion 1423 incorporated in a housing 1421. The display portion 1423 can display various images. For example, by displaying image data captured by a digital camera or the like, the display portion 1423 can function in the same manner as a normal photo frame.

  Note that the digital photo frame 1420 includes an operation unit, an external connection terminal (a terminal that can be connected to various types of cables such as a USB terminal and a USB cable), a recording medium insertion unit, and the like. These configurations may be incorporated on the same surface as the display portion, but it is preferable to provide them on the side surface or the back surface because the design is improved. For example, a memory storing image data captured by a digital camera can be inserted into the recording medium insertion unit of the digital photo frame to capture the image data, and the captured image data can be displayed on the display unit 1423.

  The digital photo frame 1420 may be configured to be able to transmit and receive information wirelessly. A configuration may be employed in which desired image data is captured and displayed wirelessly.

  FIG. 13 is a perspective view illustrating an example of a portable computer.

  The portable computer in FIG. 13 overlaps an upper housing 1441 having a display portion 1443 and a lower housing 1442 having a keyboard 1444 with the hinge unit connecting the upper housing 1441 and the lower housing 1442 closed. When the user performs keyboard input, the hinge unit is opened and an input operation can be performed while viewing the display portion 1443.

  The lower housing 1442 has a pointing device 1446 for performing an input operation in addition to the keyboard 1444. When the display portion 1443 is a touch input panel, an input operation can be performed by touching part of the display portion. The lower housing 1442 has a calculation function unit such as a CPU or a hard disk. The lower housing 1442 has an external connection port 1445 into which another device, for example, a communication cable conforming to the USB communication standard is inserted.

  The upper housing 1441 further includes a display portion 1447 that can be slid into the upper housing 1441 so that a wide display screen can be realized. Further, the user can adjust the orientation of the screen of the display portion 1447 that can be stored. When the storable display portion 1447 is a touch input panel, an input operation can be performed by touching a part of the storable display portion.

  The display portion 1443 or the storable display portion 1447 uses a video display device such as a liquid crystal display panel, a light-emitting display panel such as an organic light-emitting element or an inorganic light-emitting element.

  Further, the portable computer in FIG. 13 includes a receiver and the like, and can receive a television broadcast and display an image on a display portion. Further, with the hinge unit connecting the upper housing 1441 and the lower housing 1442 closed, the display unit 1447 is slid to expose the entire screen, and the screen angle is adjusted to allow the user to watch TV broadcasts. You can also. In this case, since the hinge unit is closed and the display unit 1443 is not displayed and only the circuit for displaying the television broadcast is activated, the power consumption can be minimized, and the battery capacity can be limited. It is useful in portable computers that are used.

Since the transistors described in Embodiments 1, 2, and 3 are less likely to cause deterioration or fluctuation in electrical characteristics, a semiconductor device using them can obtain a semiconductor device that is less likely to cause reduction or fluctuation in electrical characteristics. is there.

160 Transistor 161 Transistor 399 Conductive layer 400 Substrate 401 Gate electrode 402 Gate insulating layer 403 Oxide semiconductor layer 404 Interlayer insulating film 2405 Resist 2406 Resist 2407 Resist 500 Protective layer 501 Conductive layer 502 Source and drain electrodes 1400 Television apparatus 1401 Housing 1403 Display unit 1405 Stand 1407 Display unit 1409 Operation key 1410 Remote controller 1420 Digital photo frame 1421 Case 1423 Display unit 1441 Upper case 1442 Lower case 1443 Display unit 1444 Keyboard 1445 External connection port 1446 Pointing device 1447 Display unit

Claims (7)

An oxide semiconductor layer;
A protective layer provided in contact with the end face of the oxide semiconductor layer and covering the end face of the oxide semiconductor layer;
A source electrode and a drain electrode in contact with the oxide semiconductor layer;
A gate electrode overlapping the oxide semiconductor layer;
A gate insulating layer provided between the oxide semiconductor layer and the gate electrode;
An interlayer insulating film provided in contact with the oxide semiconductor layer,
The semiconductor device, wherein the protective layer includes at least one or more elements selected from Group 16 elements excluding oxygen.   The semiconductor device according to claim 1, wherein the protective layer includes at least one element of sulfur, selenium, and tellurium.   The semiconductor device according to claim 1, wherein the protective layer includes a crystal. Forming a gate electrode;
Forming a gate insulating layer in contact with the gate electrode;
Forming an oxide semiconductor layer in contact with the gate insulating layer;
Forming the oxide semiconductor layer into an island shape;
A protective layer containing at least one or more elements selected from Group 16 elements excluding oxygen is formed so as to be in contact with the end of the oxide semiconductor layer and cover the end of the oxide semiconductor layer. Process,
Forming a source electrode and a drain electrode;
A method for manufacturing a semiconductor device. Forming an oxide semiconductor layer;
Forming the oxide semiconductor layer into an island shape;
A protective layer containing at least one or more elements selected from Group 16 elements excluding oxygen is formed so as to be in contact with the end of the oxide semiconductor layer and cover the end of the oxide semiconductor layer. Process,
Forming a gate insulating layer in contact with the oxide semiconductor layer;
Forming a gate electrode in contact with the gate insulating layer;
Forming a source electrode and a drain electrode;
A method for manufacturing a semiconductor device.   6. The method for manufacturing a semiconductor device according to claim 4, wherein the protective layer includes at least one element selected from the group consisting of sulfur, selenium, and tellurium.   The method for manufacturing a semiconductor device according to claim 4, wherein the protective layer includes a crystal.