JP2013179215A - Led array and photoelectric integrated device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an LED array that prevents light from each LED element from leaking to an adjoining region to equalize light emission of the LED element over an entire LED array.SOLUTION: An LED array 10 includes a plurality of LED elements 14, a first electrode 17, and second electrodes 15. The plurality of LED elements 14 penetrates a second semiconductor layer of a second conduction type and a luminous layer of a semiconductor structure layer 13 in which a first semiconductor layer of a first conduction type, a luminous layer, and the second semiconductor layer are formed on a translucent substrate in order, and are sectioned and surrounded by a recess that reaches the first semiconductor layer. The first electrode 17 is formed so as to cover each inter-element region of the plurality of LED elements on the first semiconductor layer exposed from the recess, electrically connected to the first semiconductor layer, and composed of a conductor having a light absorption property to emission light from the luminous layer. The second electrode 15 is provided with each of the plurality of LED elements and electrically connected with the second semiconductor layer of the LED element.

Description

  The present invention relates to an LED array and an optoelectronic integrated device (OEIC) in which the LED array is provided on an integrated circuit.

  In recent years, light-emitting devices using light-emitting elements such as LED elements have been used in various display devices such as televisions and electric bulletin boards. In such a light emitting device, a structure in which a large number of light emitting elements are arranged in a matrix is often used.

  Non-Patent Document 1 discloses an OEIC in which an LED array in which a plurality of LEDs are arranged in a matrix is mounted on a circuit board.

JPN. J. Appl. Phys. 50 (2011) 04DG12

  In an LED array as shown in Non-Patent Document 1, light emitted from an LED element (that is, a portion having a light emitting layer) is emitted at the interface between a sapphire substrate and air, the interface between a sapphire substrate and a GaN epitaxial layer, and the like. Reflected and propagated in the sapphire substrate and the GaN epitaxial layer, light is guided in a direction parallel to the light emitting surface of the LED array. For this reason, when the LED elements are selectively made to emit light, the LED elements that do not emit light appear to emit light when viewed from the display direction.

  Further, in the LED array as shown in Non-Patent Document 1, the current from the n-electrode passes through the n-GaN layer having a very thin layer thickness and a high resistance value from the end of the LED array. And reaches the LED element. Therefore, when the number of light emitting elements included in the LED array increases, the difference in distance from each element and the n electrode increases, for example, the current flowing through the LED element at the center of the LED array and the LED element at the periphery of the LED array. A difference occurs between the current flowing in the LED array, and the amount of light emission is non-uniform depending on the area of the LED array.

  The present invention has been made in view of the above points, and prevents light from each LED element from leaking to an adjacent region, and can uniformize light emission of the LED elements over the entire LED array. An object is to provide a simple LED array.

  The LED array of the present invention includes a second semiconductor structure layer in which a first conductive type first semiconductor layer, a light emitting layer, and a second conductive type second semiconductor layer are sequentially formed on a translucent substrate. A plurality of LED elements that are partitioned and surrounded by a recess that penetrates the semiconductor layer and the light emitting layer and reaches the first semiconductor layer, and an inter-element region of the plurality of LED elements on the first semiconductor layer exposed from the recess Each of a plurality of LED elements, and a first electrode made of a conductor that is formed so as to cover the electrode, is electrically connected to the first semiconductor layer, and has a light absorption property to light emitted from the light emitting layer. And a second electrode electrically connected to the second semiconductor layer of the LED element.

  An optoelectronic integrated device (OEIC) according to the present invention includes a plurality of first electrodes connected to the LED array, a first terminal connected to the first electrode, and a second electrode of the plurality of LED elements. And an integrated circuit having two terminals.

  In the LED array of the present invention, a material having conductivity and a high light absorption rate is continuously arranged so as to surround the LED elements in a top view as viewed from the direction perpendicular to the light emitting surface of the light emitting device. Thereby, it is possible to reduce the light propagating in the direction parallel to the light emitting surface of the LED array and to equalize the current flowing through each LED element, thereby realizing clear display.

It is a top view of the LED array which concerns on Example 1 of this invention. It is sectional drawing of the LED array which concerns on Example 1 of this invention. It is a layer structure of the semiconductor structure layer of the LED array which concerns on Example 1 of this invention. It is a top view of the circuit board which mounts the LED array which concerns on Example 1 of this invention. It is sectional drawing of the circuit board which mounts the LED array which concerns on Example 1 of this invention. It is sectional drawing of the optoelectronic integrated device using the LED array which concerns on Example 1 of this invention. It is sectional drawing of 1 process of the manufacturing method of the LED array which concerns on Example 1 of this invention. It is sectional drawing of 1 process of the manufacturing method of the LED array which concerns on Example 1 of this invention. It is sectional drawing of 1 process of the manufacturing method of the LED array which concerns on Example 1 of this invention. It is sectional drawing of 1 process of the manufacturing method of the LED array which concerns on Example 1 of this invention. It is sectional drawing of 1 process of the manufacturing method of the LED array which concerns on Example 1 of this invention. It is a top view of the LED array which concerns on Example 2 of this invention. It is sectional drawing of the LED array which concerns on Example 2 of this invention. It is sectional drawing of 1 process of the manufacturing method of the LED array which concerns on Example 2 of this invention. It is sectional drawing of 1 process of the manufacturing method of the LED array which concerns on Example 2 of this invention. It is a top view of the LED array which concerns on the modification of this invention.

  Hereinafter, an LED element array (hereinafter simply referred to as an LED array) 10 according to Example 1 of the present invention will be described with reference to FIGS. FIG. 1A is a plan view of the LED array 10 according to the first embodiment of the present invention as viewed from a direction perpendicular to the light emitting surface. 1b is a cross-sectional view taken along line 1b-1b of FIG. 1a. FIG. 2 is a diagram showing the layer structure of the semiconductor structure layer of the LED array 10.

  The growth substrate 11 is a light-transmitting growth substrate, for example, a 400 μm thick sapphire substrate. A semiconductor structure layer 13 is formed on the upper surface of the growth substrate 11. As shown in FIG. 2, the semiconductor structure layer 13 is formed from the surface of the growth substrate 11 as an n-type semiconductor layer (first semiconductor layer of the first conductivity type) 30 as a low-temperature buffer layer 31 and an undoped layer 32 (layer). An n-GaN layer 33 (layer thickness of about 5 μm) is formed in this order, a light emitting layer 34 (layer thickness of about 90 nm) is formed thereon, and a p-type semiconductor layer (second conductive layer) is further formed thereon. A p-AlGaN cladding layer 36 (layer thickness of about 40 nm) and a p-GaN layer 37 (layer thickness of about 150 nm) are sequentially formed as a second semiconductor layer 35 of the type.

  The semiconductor structure layer 13 has a plurality of LED elements 14 arranged in a matrix of 4 rows and 4 columns at equal intervals when viewed from the top perpendicular to the top surface of the growth substrate 11. The LED element 14 is, for example, a square having an upper surface of 50 μm × 50 μm, and each is surrounded by a lattice-shaped recess having a lattice width of about 50 μm. In the recess surrounding the LED element 14, the depth d from the upper surface of the LED element 14 to the bottom of the recess is about 800 nm, and the n-GaN layer 33 is exposed at the bottom. That is, the concave portion is formed so as to separate the light emitting layer 34 in the semiconductor structure layer 13, and the light emitting layer 34 exists only in the LED element 14.

  The p electrode 15 is provided on the p-GaN layer 37 on the upper surface of the LED element 14. The p-electrode 15 has a rectangular planar shape slightly smaller than the upper surface of the LED element 14. For example, by an electron beam evaporation method, Pt is 1 nm, Ag is 150 nm, Ti is 100 nm, Pt is 150 nm, Au Is a metal electrode formed by sequentially laminating 200 nm.

  The n-electrode 17 is a layer having a metal (Ti, V, etc.) having conductivity and light absorption on the surface in contact with the semiconductor structure layer 13. The n electrode 17 is continuously provided on the n-GaN layer 33 exposed at the bottom of the recess surrounding the LED element 14, and the bottom of the recess, that is, the inter-element region and the periphery of the semiconductor structure layer 13. Covering the area. That is, the n-electrode 17 is provided in a lattice shape so as to surround the LED element 14 in a top view as viewed from a direction perpendicular to the top surface of the growth substrate 11. The n-electrode 17 is a metal electrode formed by sequentially stacking 10 nm of Ti (or V) and 500 nm of Al sequentially by, for example, an electron beam evaporation method. The n electrode 17 is in ohmic contact with the n-GaN layer 33 exposed at the bottom of the recess. The n-electrode 17 may be formed by sequentially stacking 10 nm of Ti, 150 nm of Pt, and 500 nm of Au. The n-electrode 17 may be formed by sequentially stacking V and Al, or depositing only Ti or only V by a desired thickness.

  Since a light-absorbing metal such as Ti is used on the surface of the n-electrode 17 facing the n-type semiconductor layer 30, the light traveling from the n-type semiconductor layer 30 toward the n-electrode 17 is absorbed by the n-electrode 17. Almost no reflection occurs at the interface between the n-type semiconductor layer 30 and the n-electrode 17.

The insulating layer 19 is made of an insulating material such as SiO ₂ and is provided so as to substantially cover the semiconductor structure layer 13. The insulating layer 19 has an opening 19 </ b> A on the P electrode 15 on the LED element 14 and a frame on the outer periphery of the n electrode 17 in order to supply power to the LED array 10 from the outside via the P electrode 15 and the n electrode 17. An opening 19B is provided on each corner of the shaped region. That is, each of the P electrode 15 and a part of the n electrode 17 is exposed through the opening 19A and the opening 19B of the insulating layer 19. The insulating layer 19 prevents foreign matter from adhering to the surface other than the openings on the electrodes 15 and 17 to cause a leak or a short circuit.

  In the LED array 10 according to the first embodiment, an n-electrode 17 having a much higher conductivity than the n-type semiconductor layer 30 is formed over the entire surface of the semiconductor structure layer 13 so as to surround the LED element 14. ing. Therefore, even if there is a difference in the distance between the opening 19B to which power is supplied to the n-electrode 17 and each of the LED elements 14, the difference in the current flowing into each LED element 14 becomes very small. Therefore, it is possible to make the light emission luminance of the LED element 14 uniform over the entire LED array.

  Further, as described above, since a metal such as Ti having high light absorption is used on the surface of the n electrode 17 facing the n type semiconductor layer 30, the light traveling from the n type semiconductor layer 30 to the n electrode 17 is It is absorbed by the n-electrode 17 and hardly reflects at the interface between the n-type semiconductor layer 30 and the n-electrode 17. Therefore, according to the light-emitting device 1 of Example 1, light that reaches the interface between the n-type semiconductor layer 30 and the n-electrode 17 from the inside of the n-type semiconductor layer 30 is absorbed by the n-electrode 17 and reflected light at the interface. Is reduced. Therefore, the propagation of light in the direction along the surface of the growth substrate 11 generated when the light emitted from the LED elements 14 is reflected inside the growth substrate 11 and the semiconductor structure layer 13 is reduced, and the light emitting elements are used by the individual light emitting elements. Leakage of light outside the desired light emitting area to be formed is reduced. Therefore, it is possible to clarify the display of the LED array.

  The LED array 10 can be mounted on a circuit board 40 that supplies power to the LED array 10. The circuit board 40 will be described with reference to FIGS. 3a and 3b. 3A is a plan view of the circuit board 40, and FIG. 3B is a cross-sectional view taken along line 3b-3b of FIG. 3A.

  The circuit board 40 is, for example, on the insulating substrate 41 made of Si, at positions corresponding to the exposed portions of the openings 19A and 19B of the insulating layer 19 of the LED array 10, that is, the p electrode 15 and the n electrode 17. Each of the circuit boards has a p-feed terminal 43 and an n-feed terminal 45 formed thereon.

  FIG. 4 shows a cross-sectional view of the optoelectronic integrated device 50 composed of the bonded LED array 10 and the circuit board 40 in the same cross section as the 1b-1b cross section of FIG. 1a and the 3b-3b cross section of FIG.

  As shown in FIG. 4, the LED array 10 and the circuit board 40 are formed of an adhesive 21 such as a different material 21 so that the openings 19A and 19B of the LED array 10 and the corresponding power feeding terminals 43 and 45 of the circuit board 40 face each other. Bonded with an isotropic conductive adhesive. The circuit board 40 is provided with a driver circuit (not shown) for driving each LED element of the LED array 10, for example. The circuit board 40 and the LED array 10 are connected via terminals 43 and 45. That is, the p-electrode 15 of the LED array 10 and the corresponding p-feed terminal 43 of the circuit board 40 are electrically connected, and the exposed portion of the n-electrode 17 of the LED array 10 and the n-feed terminal 45 of the circuit board 40 are electrically connected. Connected.

  Below, the manufacturing method of the LED array 10 is demonstrated, referring FIG. 5a to 5e are diagrams showing each manufacturing process of the LED array 10 in a cross section taken along line 1b-1b in FIG. 1a.

  First, as shown in FIG. 5a, a growth substrate 11 having translucency and made of, for example, sapphire is prepared. Thereafter, a low temperature buffer layer 31, an undoped layer 32, and an n-GaN layer 33 are sequentially formed on the upper surface of the growth substrate 11 as an n-type semiconductor layer 30 by, for example, MOCVD (Metal Organic Chemical Vapor Deposition). A light emitting layer 34 is formed, and a p-AlGaN cladding layer 36 and a p-GaN layer 37 are formed in this order as a p-type semiconductor layer 35 to form the semiconductor structure layer 13. The growth method of the semiconductor structure layer 13 is as follows.

First, the growth substrate 11 is thermally cleaned at 1000 ° C. for 10 minutes in a hydrogen atmosphere. Next, the temperature of the growth substrate 11 is set to 500 ° C., TMG (flow rate 10.4 μmol / min) and NH ₃ (flow rate 3.3 LM) are supplied for about 3 minutes to form a low-temperature buffer layer 31 made of GaN on the growth substrate 11. To do.

Thereafter, the temperature of the growth substrate 11 is raised to 1000 ° C. and held for about 30 seconds to crystallize the low-temperature buffer layer 31. Subsequently, while maintaining the substrate temperature at 1000 ° C., TMG (flow rate 45 μmol / min) and NH ₃ (flow rate 4.4 LM) are supplied for about 20 minutes to form an undoped layer 32 having a layer thickness of 1 μm.

Next, the temperature of the growth substrate 11 is set to 1000 ° C., TMG (flow rate 45 μmol / min), NH ₃ (flow rate 4.4 LM), and SiH ₄ (flow rate 2.7 × 10 ⁻⁹ mol / min) as dopant gas. An n-GaN33 layer having a thickness of 5 μm is formed by supplying for about 100 minutes.

Subsequently, a light emitting layer 34 having a multiple quantum well structure made of InGaN / GaN is formed on the n-GaN layer 33. The light emitting layer 34 is grown for five periods with InGaN / GaN as one period. Specifically, the temperature of the growth substrate 11 is set to 700 ° C., and TMG (flow rate 3.6 μmol / min), TMI (flow rate 10 μmol / min), NH ₃ (flow rate 4.4 LM) are supplied for about 33 seconds, and the layer thickness is increased. An InGaN well layer of about 2.2 nm is formed, and then TMG (flow rate 3.6 μmol / min) and NH ₃ (flow rate 4.4 LM) are supplied for about 320 seconds to form a GaN barrier layer having a layer thickness of about 15 nm. . The light emitting layer 34 is formed by repeating this for five cycles.

Next, the temperature of the growth substrate 11 is raised to 870 ° C., and TMG (flow rate 8.1 μmol / min), TMA (flow rate 7.5 μmol / min), NH ₃ (flow rate 4.4 LM) and Cp ₂ Mg (pump) as dopants. Bis-cyclopentadienyl Mg) (flow rate 2.9 × 10 ⁻⁷ mol / min) is supplied for about 5 minutes to form a p-AlGaN cladding layer 36 having a layer thickness of about 40 nm.

Subsequently, while maintaining the temperature of the growth substrate 11 at 870 ° C., TMG (flow rate 18 μmol / min), NH ₃ (flow rate 4.4 LM) and Cp ₂ Mg as a dopant (flow rate 2.9 × 10 ⁻⁷ μmol / min). ) For about 7 minutes to form a p-GaN layer 37 having a thickness of about 150 nm.

After forming the semiconductor structure layer 13 as described above, a recess 13A is formed in the semiconductor structure layer 13 that penetrates the p-GaN layer 35 and the light emitting layer 34 and reaches the n-GaN layer 33, as shown in FIG. A plurality of (4 × 4) LED elements 14 defined by the recesses 13A are formed. First, for example, after applying a resist to the surface of the semiconductor structure layer 13, exposure / development processing is performed, and portions other than the lattice pattern of the recesses 13 </ b> A formed around the LED elements 14, that is, regions where the LED elements 14 are formed. A resist mask is formed only in the upper square area of about 50 μm × 50 μm. Thereafter, the growth substrate 11 and the semiconductor structure layer 13 are put into an RIE (reactive ion etching) apparatus, and the exposed semiconductor film is etched by about 800 nm toward the surface of the substrate 11 by dry etching using Cl ₂ plasma. By forming the recesses 13A in this way, for example, an array of LED elements 14 having a square top surface with sides of 50 μm aligned at equal intervals is formed.

  As shown in FIG. 5 c, a p-electrode 15 is formed on the upper surface of the LED element 14. Specifically, first, a resist mask having an opening in a portion where the p-electrode 15 is formed on the upper surface of the LED element 14 is formed by resist coating / exposure / development processing. Next, Pt / Ag / Ti / Pt / Au (1/150/100/150/200 nm) is sequentially laminated on the resist mask by an electron beam evaporation method or the like. Finally, the metal film deposited on the resist mask is lifted off, so that the deposited metal remains only in the opening and the p-electrode 15 is formed.

  Next, as shown in FIG. 5d, an n-electrode 17 is formed on the bottom of the recess 13A. Specifically, a resist mask that exposes a portion of the bottom region of the recess 13A where the n-electrode is formed is formed by resist coating / exposure / development processing. Next, 10 nm of Ti and 500 nm of Al are sequentially stacked on the resist mask by an electron beam evaporation method or the like. As described above, the n-electrode 17 may be formed by sequentially laminating Ti with a thickness of 10 nm, Pt with a thickness of 150 nm, and Au with a thickness of 500 nm, or by sequentially laminating V and Al, or only Ti or only V. A desired thickness may be deposited and formed.

  Finally, by lifting off the metal film deposited on the resist mask, the metal remains in the portion exposed from the resist mask, and the n-electrode 17 is formed.

Next, as shown in FIG. 5E, an insulating layer 19 is formed on the semiconductor structure layer 13. Specifically, for example, first, SiO ₂ is deposited on the entire surface of the semiconductor structure layer 13 including the p electrode 15 and the n electrode 17 by a CVD method or a sputtering method to form a layer. Next, a resist mask having an opening on a region where the electrical contact is made from the upper part of the p electrode 15 and the outside of the n electrode 17 (region corresponding to the openings 19A and 19B) is applied by resist coating / exposure / development processing. Form. Next, SiO ₂ exposed through the opening of the resist is removed by etching with BHF (buffered hydrofluoric acid). Finally, the resist mask is removed with a solvent (such as an organic alkali TMAH (Tetra-methyl-ammonium-hydroxide) solution) to form the insulating layer 19. The LED array 10 is completed through the above steps.

  When the optoelectronic integrated device 50 is manufactured by mounting the LED array 10 on the circuit board 40, first, an anisotropic conductive adhesive is applied to the power supply terminal forming surface of the circuit board 40, and then a P electrode is formed thereon. The LED array 10 is mounted so that the exposed portions of the 15 and n electrodes 17 and the positions of the P feeding terminal 43 and the n feeding terminal 45 corresponding thereto are aligned. Thereafter, the film is temporarily fixed by heating at 80 ° C. for 120 seconds, and then final bonding is performed by thermocompression bonding at 270 ° C. for 30 seconds.

  Below, the LED array 60 which concerns on Example 2 of this invention is demonstrated with reference to FIG. 6 a and b. FIG. 6A is a plan view of the LED array 60 according to the second embodiment of the present invention as seen from a direction perpendicular to the light emitting surface. 6b is a cross-sectional view taken along line 6b-6b of FIG. 6a.

  The LED array 60 according to the second embodiment has the same structure as the LED array 10 except that the n-electrode 17 is formed of the contact electrode 17A and the cover electrode 17B.

  In the LED array 60, the n-electrode 17 has a contact electrode 17A in part in contact with the semiconductor structure layer 13, and a cover electrode 17B that covers the contact electrode 17A. The contact electrodes 17A are provided in an island arrangement on the n-GaN layer 33 exposed at the bottom of the recess between the two LED elements 14 on the growth substrate 11 and spaced from each other. The contact electrode 17A is formed by sequentially laminating Ti (or V) of 10 nm and Al of 500 nm by electron beam evaporation or the like, or laminating Ti (or V) of 10 nm, Pt of 150 nm, and Au of 500 nm sequentially. The metal electrode has a width W of 10 μm and a length L of 30 nm. The contact electrode 17A forms ohmic contact with the n-GaN layer 33 exposed at the bottom of the recess.

  The cover electrode 17B is continuously provided on the n-GaN layer 33 exposed at the bottom of the recess so as to embed the contact electrode 17A at the bottom of the recess surrounding the periphery of the LED element 14. The bottom of the recess, that is, the inter-element region and the peripheral region of the semiconductor structure layer 13 are covered together with the contact electrode 17A. That is, the cover electrode 17B is provided in a lattice shape so as to surround the LED element 14 in a top view as viewed from a direction perpendicular to the top surface of the growth substrate 11. The cover electrode 17B is formed, for example, by depositing 200 nm of Ti or TiW having a light absorption rate higher than that of the contact electrode 17A by sputtering or the like.

  The contact electrode 17A and the cover electrode 17B of the LED array 60 are formed by performing the following steps shown in FIGS. 7a and 7b instead of the step of forming the n-electrode 17 of the LED array 10. 7a and 7b are diagrams showing the n-electrode manufacturing process of the LED array 60 in a cross section taken along line 6b-6b in FIG. 6a.

  First, as shown in FIG. 7a, a contact electrode 17A is formed. First, a resist mask that exposes a portion of the bottom region of the recess 13A where the contact electrode 17A is to be formed is formed by resist coating / exposure / development processing. Next, Ti is deposited in a thickness of 10 nm and Al is deposited in a thickness of 500 nm by an electron beam evaporation method or the like. The contact electrode 17A may be formed by sequentially stacking 10 nm of Ti, 150 nm of Pt, and 500 nm of Au, or sequentially stacking V and Al, or only Ti or only V having a desired thickness. It may be deposited and formed. Finally, by lifting off the metal film deposited on the resist mask, the metal remains in the portion exposed from the resist mask, and the contact electrode 17A is formed.

  Next, as shown in FIG. 7b, a cover electrode 17B is formed. First, a resist mask that exposes a portion of the bottom region of the recess 13A where the cover electrode 17B is to be formed is formed by resist coating / exposure / development processing. Next, a 200 nm thick metal material having a light absorption rate higher than that of the contact electrode 17A, such as TiW or Ti, is deposited by sputtering or the like, and finally the metal film deposited on the resist mask is lifted off. The metal remains in the portion exposed from the mask, and the cover electrode 17B is formed.

  In the LED array 60, as the cover electrode 17B, a conductive layer having conductivity and having a light absorption property equal to or higher than that of the contact electrode 17A is provided. Therefore, it is possible to increase the light absorption rate from the n-type semiconductor layer 30 to the n-electrode 17 in the n-electrode 17 while maintaining the function of uniformly diffusing current throughout the LED array. Therefore, the leakage of light outside the desired light emitting region formed by the individual light emitting elements is further reduced, and the display of the light emitting device can be further clarified than the LED array 10.

  In the second embodiment, the contact electrodes 17A are provided in an island arrangement between the LED elements 14, but may be formed in a ring shape so as to surround the LED elements 14 as shown in FIG. Alternatively, it may be formed in a grid shape narrower than the cover electrode.

  In the second embodiment, the cover electrode 17B is provided so as to embed the contact electrode 17A. However, the cover electrode 17B need not be provided so as to bury the contact electrode 17A. It is sufficient that the cover electrode 17B is provided so as to cover the bottom surface of the recess together with the contact electrode 17A and to be electrically connected to each other and the portions exposed at the opening 19B.

  In the above embodiment, 16 LED elements are provided in a matrix arrangement in 4 rows and 4 columns. However, the number of LED elements is arbitrary, and the arrangement of the LED elements is also a staggered pattern, a concentric pattern, and a checkered pattern. It is possible to configure arbitrarily.

  Moreover, in the said Example, although the planar shape of an LED element and p electrode is a rectangular shape, it can take various shapes, such as circular shape, a parallelogram shape, and a ring shape.

  In the above embodiment, an anisotropic conductive adhesive is used as a bonding material between the LED array 10 and the circuit board 40 in order to obtain electrical connection between the electrodes 15 and 17 and the power feeding terminals 43 and 45. The electrodes 15 and 17 and the power supply terminals 43 and 45 may be joined by eutectic bonding using, for example, AuSn.

  Furthermore, various numerical values, dimensions, materials, shapes, and the like in the above-described embodiments are merely examples, and can be appropriately selected according to the application and the LED element structure used.

10, 60 LED array 40 circuit board 50 optoelectronic integrated device 11 growth substrate 13 semiconductor structure layer 13A recess 14 LED element 15 p electrode 17 n electrode 17A contact electrode 17B cover electrode 19 insulating layer 21 adhesive 30 n-type semiconductor layer 34 light emitting layer 35 p-type semiconductor layer 41 insulating substrate 43 p power supply terminal 45 n power supply terminal

Claims (7)

The second semiconductor layer and the light emission of the semiconductor structure layer in which the first semiconductor layer of the first conductivity type, the light emitting layer, and the second semiconductor layer of the second conductivity type are sequentially formed on the light transmitting substrate. A plurality of LED elements that are partitioned and surrounded by recesses that penetrate the layers and reach the first semiconductor layer;
Formed on the first semiconductor layer exposed from the recess so as to cover each inter-element region of the plurality of LED elements, electrically connected to the first semiconductor layer, and emitted from the light emitting layer A first electrode made of a conductor having light absorption for light;
An LED array, comprising: a second electrode provided in each of the plurality of LED elements and electrically connected to the second semiconductor layer of the LED element.   2. The LED array according to claim 1, wherein the first electrode includes any one of Ti / Al, Ti / Pt / Au, V / Al, Ti, and V. 3.   3. The LED array according to claim 1, wherein the first electrode is connected to the first semiconductor layer by forming an ohmic contact. 4.   The first electrode is partially provided in a region between the plurality of LED elements and has an ohmic contact with the first semiconductor layer, and has a higher light absorption rate than the contact electrode. The LED array according to claim 1, further comprising: a light absorbing film electrically connected to the contact electrode.   The LED array according to claim 4, wherein the light absorption film is made of TiW. The LED array according to any one of claims 1 to 5,
An integrated circuit having a first terminal connected to the first electrode and a plurality of second terminals each connected to the second electrode of the plurality of LED elements;
An optoelectronic integrated device comprising:   7. The optoelectronic integrated device according to claim 6, wherein the integrated circuit includes a driver circuit that drives the plurality of LED elements to emit light.

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