JP2013176157A - Image compression apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To accelerate symbol generation processing in HD Photo and to reduce a storage capacity to be used for the symbol generation processing.SOLUTION: A symbol generation part 15 serially receives a data string of quantization data. When the quantization data of a non-zero coefficient is received, pieces of information on the absolute value, the zero run, and the code of the non-zero coefficient are stored in registers. When the quantization data of the next non-zero coefficient is received, the pieces of information on the absolute value, the zero run and the code stored in the registers are updated. At that time, the contents of the registers which have been stored until immediately before the reception are outputted as symbol data of the immediately preceding non-zero coefficient.

Description

  The present invention relates to an image compression apparatus that compresses still image data.

  As a format for compressing still image data, a JPEG (Joint Photographic Experts Group) format has been widely used. In addition, the HD Photo format has been formulated which can prevent image degradation compared to the JPEG format and has a high compression rate. Details of the HD Photo format are disclosed in Non-Patent Documents 1 and 2.

  An image compression apparatus based on HD Photo (hereinafter simply referred to as “image compression apparatus”) frequency-converts still image data in units of macroblocks, and generates DC component data and two AC component data. One of the two AC components is low-frequency component data called “LowPass”, and the other is high-frequency component data called “HighPass”. The image compression apparatus performs quantization and predictive coding on each component data described above. The quantized data of each component is entropy-coded and output as a stream.

  FIG. 9 is a block diagram showing a conventional image compression apparatus 100. The image compression apparatus 100 is an apparatus that converts still image data into compressed image data in HD Photo format. The image compression apparatus 100 includes a first frequency conversion unit 101, a second frequency conversion unit 102, a quantization unit 103, a prediction processing unit 104, a symbol generation unit 105, and an entropy encoding unit 106.

  The first frequency conversion unit 101 performs frequency conversion of the first layer on the still image data input by the image compression apparatus 100, and generates DC component data of the first layer and AC component data of the first layer. Output.

  The second frequency conversion unit 102 further performs frequency conversion on the first layer DC component data output from the first frequency conversion unit 101, the second layer DC component data, and the second layer AC component data. Is output.

  Hereinafter, the AC component data in the first layer is referred to as high-frequency component data. Further, the DC component data of the second hierarchy is simply called DC component data, and the AC component data of the second hierarchy is called low-frequency component data.

  Each of the low-frequency component data and the high-frequency component data has 15 conversion coefficient data. More specifically, the low-frequency component data holds 15 blocks of conversion coefficient data for YUV3 channels. The high-frequency component data has 16 blocks of 15 conversion coefficient data, and each of these 16 blocks has conversion coefficient data for YUV3 channels. On the other hand, the DC component data has one conversion coefficient data for each YUV channel.

  The quantization unit 103 performs a quantization process on the DC component data, the low-frequency component data, and the high-frequency component data, and the prediction processing unit 104 performs a prediction encoding process on the quantized data. The symbol generation unit 105 generates a symbol sequence from the bit sequence of the quantized data that has been predictively encoded, and the entropy encoding unit 106 performs an entropy encoding process on the quantized data that has been symbolized, and generates compressed image data. Generate.

“HD Photo-Photographic Still Image File Format”, [online], November 7, 2006, Microsoft Corporation, [April 14, 2008 Search], Internet <URL: http://www.microsoft.com /whdc/xps/hdphotodpk.mspx> "Coding of Still Pictures", [online], December 19, 2007, International Organization for Standardization and International Electrical Commission, [April 14, 2008 Search], Internet <its: .ipsj.or.jp / sc29 / open / 29view / 29n9026t.doc>

  As shown in FIG. 9, a first buffer 111 and a second buffer 112 are connected to the symbol generator 105. The symbol generation unit 105 extracts the quantized data for one block from the second buffer 112 at the timing when the quantized data for one block output from the prediction processing unit 104 is stored in the first buffer 111, and obtains the symbol data. Output. At the timing when the quantized data for one block output from the prediction processing unit 104 is stored in the second buffer 112, the quantized data for one block is extracted from the first buffer 111 and the symbol data is output. . In this way, the processing speed is increased by switching the input / output of the two buffers.

  FIG. 10 is a diagram illustrating a storage format of the quantized data stored in the first buffer 111 or the second buffer 112. Here, as shown in the figure, a block of 15 quantized data strings {0, 0, 3, 0, 0, 3, 10, 0, 0, 0, -1, 0, 2, A case where 0, 0} is stored in the first buffer 111 will be described as an example.

  First, since the first and second quantized data have zero coefficients, no quantized data is stored in the first buffer 111. Since the third quantized data is 3 and is a non-zero coefficient, absolute value (ABS) = 3, zero run (ZERO_RUN) = 2, and code (SIGN) = 0 are stored in the first buffer 111. A zero run is a continuous number of zero coefficients present before non-zero coefficients in a block. The sign indicates that 0 is positive and 1 is negative. The symbol generation unit 105 has a register for counting zero runs.

  Subsequently, since the fourth and fifth quantized data also have zero coefficients, no quantized data is stored in the first buffer 111. Since the sixth quantized data is 3, which is a non-zero coefficient, {ABS, ZERO_RUN, SIGN} = {3, 2, 0} is stored in the first buffer 111. Further, since the seventh quantized data is 10 and is a non-zero coefficient, {ABS, ZERO_RUN, SIGN} = {10, 0, 0} is stored in the first buffer 111.

  Subsequently, the eighth, ninth, and tenth are zero coefficients, and the quantized data is not stored in the first buffer 111. For the eleventh, {ABS, ZERO_RUN, SIGN} = {1, 3, 1} is stored, and for the thirteenth, {2, 1, 0} is stored. For the last zero coefficient, {0, 2, 0} is exceptionally stored.

  In this manner, the data string of the quantized data for one block is stored in the first buffer 111 in a symbolized state. Then, at the timing when the quantized data of the next block is stored in the second buffer 112, the quantized data stored in the first buffer 111 is output as symbol data. At this time, an index is also generated and output as part of the symbol data.

  FIG. 11 is a diagram showing the output contents of the symbol data. FIG. 11 shows symbol data generated from the data sequence of the quantized data shown in FIG. In the figure, the upper part of the double line indicates the content of the quantized data input by the symbol generation unit 105, and the lower part of the double line indicates the content of the symbol data output from the symbol generation unit 105. In the symbol data, ABS, ZERO_RUN, and SIGN are the same as ABS, ZERO_RUN, and SIGN stored in the first buffer 111. However, the ABS is obtained by subtracting 1 in accordance with the HD photo specification and is output as symbol data.

  The INDEX in the symbol data will be described in detail in the embodiment of the present invention, but the detailed description is omitted here. The INDEX includes information indicating the relationship between the absolute value of the non-zero coefficient and 1 and information on the quantized data subsequent to the non-zero coefficient.

  As described above, the symbol data is not output at the timing corresponding to the zero coefficient, but is intermittently output at the timing corresponding to the non-zero coefficient. Since the number of quantized data in one block is 15, in order to output symbol data from the first buffer 111 or the second buffer 112, 15 data output timings are required. On the other hand, the timing for storing the quantized data in the first buffer 111 or the second buffer 112 also requires 15 data input timings. In this way, the input timing of the quantized data to one of the two buffers and the output timing of the symbol data from the other buffer are synchronized, and it is possible to generate symbols efficiently and at high speed. ing.

  However, there is a case where this timing is shifted. As described above, the high frequency component data and the low frequency component data are a set of blocks including 15 quantized data, but the direct current component data includes only 3 quantized data including YUV.

  When attention is paid to the switching timing from the high-frequency component data to the DC component data, the DC component data is input to the first buffer 111 in a period of three data. Symbol data is output over a period of 15 data. For this reason, idle time occurs at the input timing to the first buffer 111.

  Further, when attention is paid to the switching timing from the DC component data to the low-frequency component data, the symbol data is output from the first buffer 111 over a period of three data. The low-frequency component data is input over a period of 15 data. For this reason, idle time occurs in the output timing of the symbol data.

  As described above, although two buffers are used for speeding up, 12 macro data input / output idle times are generated twice for each macroblock, and further speeding is desired. .

  Further, the first buffer 111 or the second buffer 112 requires a data size of the bit length of the quantized data × 15 as ABS, and a data size of 4 bits × 15 as ZERO_RUN, and SIGN As a result, a data size of 1 bit × 15 is required. Therefore, when the two buffers are combined, if the bit length of the quantized data is 32 bits, a size of (32 + 4 + 1) × 15 × 2 bits is required. Considering that there is a high demand for miniaturization and power saving in an electronic device on which HD Photo is mounted, it is desirable to reduce the buffer size as much as possible.

  In view of the above problems, an object of the present invention is to realize a high-speed symbol generation process in HD Photo and a reduction in storage capacity used for the symbol generation process.

  In order to solve the above-described problem, an image compression apparatus according to a first aspect of the present invention includes a frequency conversion unit that frequency-converts image data to generate frequency conversion data, and a quantization unit that quantizes the frequency conversion data to generate quantization data. A symbol generation unit that converts the quantized data into symbols to generate symbol data, and an encoding unit that encodes the symbol data to generate encoded data, and the symbol generation unit includes a plurality of blocks. A quantized data input unit for serially inputting a data string of quantized data, a quantized data information storing unit capable of storing absolute value, sign, and zero run information of quantized data of one non-zero coefficient; When the quantized data to be processed input by the quantized data input unit is a non-zero coefficient, the amount of the previous non-zero coefficient stored in the quantized data information storage unit The absolute value of the data, code, and characterized by having a symbol data output unit for outputting the zero run information as the symbol data.

  A second aspect of the present invention is the image compression apparatus according to the first aspect, wherein the quantized data information storage unit has a non-zero coefficient input when the quantized data to be processed input by the quantized data input unit is a non-zero coefficient. When the first storage unit whose stored contents are updated by the continuous number of zero coefficients input immediately before and the quantized data to be processed input by the quantized data input unit are non-zero coefficients, the input non-zero coefficients When the second storage unit in which the stored content is updated with the absolute value of and the quantized data to be processed input by the quantized data input unit is a non-zero coefficient, the stored content is represented by the code of the input non-zero coefficient. A third storage unit to be updated, and the symbol data output unit, when the quantized data to be processed input by the quantized data input unit is a non-zero coefficient, the first and second before update 2 and 3 memory storage And outputs the contents as the symbol data of the previous non-zero coefficient.

  A third aspect of the present invention is the image compression apparatus according to the second aspect, wherein when the quantized data to be processed input by the quantized data input section has zero coefficients, the first storage section counts zero coefficients that are consecutive in the block. In the case where the 1.1 storage unit that increments and updates the number and the quantized data to be processed input by the quantized data input unit is a non-zero coefficient, it is stored in the 1.1 storage unit And a 1.2th storage unit in which the stored contents are updated by the count number of the zero coefficient.

  A fourth aspect of the present invention is the image compression apparatus according to the second or third aspect, wherein the symbol generation unit further includes the previous one when the quantized data to be processed input by the quantized data input unit is a non-zero coefficient. An index generation unit that generates index data related to quantized data of non-zero coefficients, and the symbol data output unit includes index data together with storage contents of the first, second, and third storage units before update. The index data includes absolute value information indicating the relationship between the absolute value stored in the second storage unit before update and 1 and the next quantized data in the block. Including subsequent information indicating whether the coefficient is a zero coefficient or a non-zero coefficient, or whether the subsequent quantized data in the block are all zero coefficients.

  A fifth aspect of the present invention is the image compression device according to any one of the first to fourth aspects of the present invention, wherein the frequency conversion unit performs frequency conversion on input image data and outputs a first DC component and a first AC component. And a second frequency conversion unit that inputs the first DC component and performs frequency conversion, and outputs a second DC component and a second AC component. A macro block is configured in the order of a block corresponding to the second DC component, a plurality of blocks corresponding to the second AC component, and finally a plurality of blocks corresponding to the first AC component. Is a data string in which repeated macroblocks appear, and the symbol data corresponding to the quantized data of the last nonzero coefficient in each block is the appearance of the quantized data of the first nonzero coefficient of the next block Characterized in that it is output to.

  The image compression apparatus of the present invention stores the absolute value, sign, and zero run information of one non-zero coefficient quantized data in the quantized data information storage unit, and the input quantized data to be processed is non-zero. If it is a coefficient, the absolute value, sign, and zero run information of the quantized data of the previous non-zero coefficient stored in the quantized data information storage unit are output as symbol data. As a result, the process of temporarily storing all the non-zero coefficient quantized data in the block in the buffer becomes unnecessary, and the size of the storage capacity required for the process can be reduced.

  Further, at the switching timing of the DC component data, the low frequency component data, and the high frequency component data, the processing speed is improved without causing unnecessary idle time in the processing time.

  Further, it is possible to share the processing with the DC component data, the low-frequency component data, and the high-frequency component data.

It is a block diagram of the image compression apparatus which concerns on this Embodiment. It is a figure which shows the structure of a macroblock. It is a conceptual diagram of the frequency conversion of a 1st hierarchy. It is a conceptual diagram of the frequency conversion of a 2nd hierarchy. It is a figure which shows the data structure of symbol data. It is a transition diagram of the data stored in the register | resistor of a symbol production | generation part. It is a figure which shows the output timing of symbol data, and the content of data. It is a figure which shows the content of the symbol data output in the switching timing of a block. It is a block diagram of the conventional image compression apparatus. It is a figure which shows the data format of the quantization data stored in a buffer in the conventional image compression apparatus. It is a figure which shows the output timing of symbol data, and the content of data in the conventional image compression apparatus.

<1. Configuration of image compression device and HD photo processing flow>
Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a configuration of an image compression apparatus 10 according to the present embodiment. The image compression apparatus 10 shown in FIG. 1 is an apparatus that converts still image data into compressed image data in HD Photo format.

  The image compression apparatus 10 includes a first frequency conversion unit 11, a second frequency conversion unit 12, a quantization unit 13, a prediction processing unit 14, a symbol generation unit 15, and an entropy encoding unit 16.

  The still image data input to the image compression apparatus 10 is subjected to color conversion processing, filter processing, and the like in a preprocessing unit (not shown). For example, still image data in RGB format is converted to YUV444 format by color conversion. Then, the still image data after the filter processing is input to the first frequency conversion unit 11.

  The image compression apparatus 10 performs a compression process on an image in units of macro blocks. FIG. 2 is a diagram illustrating a configuration of a macroblock. As shown in FIG. 2, one block is composed of 4 × 4 pixels (16 pixels). One macro block is composed of 4 × 4 blocks (16 blocks). That is, one macroblock is composed of 16 × 16 pixels (256 pixels). In FIG. 2, the blocks constituting the macroblock are referred to as blocks B01, B02... B16 in order from the upper left to the right.

  A macroblock having such a configuration exists for each YUV channel, and the macroblock of each YUV channel is processed in the image compression apparatus 10. Each process described below is a process common to each color channel.

  The first frequency conversion unit 11 performs frequency conversion of the first layer on the still image data input by the image compression apparatus 10, and DC component data Da01 to Da16 of the first layer and AC component of the first layer Data HP01 to HP16 are output. The AC component data HP01 to HP16 in the first layer correspond to the “Highpass (HP)” component in the HD Photo format. Hereinafter, the AC component data HP01 to HP16 in the first hierarchy are referred to as high-frequency component data HP01 to HP16.

  FIG. 3 is a conceptual diagram showing DC component data Da01 to Da16 and high-frequency component data HP01 to HP16 in the first layer. As shown in FIG. 3, the DC component data Da01 to Da16 of the first hierarchy and the high frequency component data HP01 to HP16 are generated for each block. The high frequency component data HP01 to HP16 correspond to the blocks B01 to B16, respectively. The DC component data Da01 to Da16 in the first layer each have one piece of conversion coefficient data. Each of the high frequency component data HP01 to HP16 has 15 pieces of conversion coefficient data.

  The second frequency conversion unit 12 performs frequency conversion on the first layer DC component data Da01 to Da16 output from the first frequency conversion unit 11, and performs the second layer DC component data Db and the second layer DC component data Db. AC component data LP is output. The second layer DC component data Db corresponds to the DC component in the HD Photo format. The AC component data LP of the second layer corresponds to the “Lowpass (LP)” component in the HD Photo format. Hereinafter, the DC component data Db in the second hierarchy is simply referred to as DC component data Db, and the AC component data LP in the second hierarchy is referred to as low-frequency component data LP.

  FIG. 4 is a diagram illustrating a change in data accompanying the frequency conversion of the second layer. The DC component data Db and the low frequency component data LP are generated by the frequency conversion of the second layer. The DC component data Db has one conversion coefficient data, and the low frequency component data LP has 15 conversion coefficient data.

  As described above, the first layer frequency conversion is executed on the still image data, and the second layer frequency conversion is executed on the first layer DC component data Da01 to Da16. The image compression apparatus 10 hierarchically executes frequency conversion for still image data in units of macro blocks to generate DC component data Db, low-frequency component data LP, and high-frequency component data HP01 to HP16.

  The low-frequency component data LP and the high-frequency component data HP01 to HP16 generated in this way each have 15 conversion coefficient data. Specifically, the low-frequency component data LP holds blocks of 15 conversion coefficient data for YUV3 channels. The high-frequency component data HP01 to HP16 have 16 blocks of 15 conversion coefficient data, and each of these 16 blocks holds conversion coefficient data for YUV3 channels. On the other hand, the DC component data Db has one conversion coefficient data for each YUV channel.

  The quantization unit 13 performs quantization processing on the DC component data Db, the low-frequency component data LP, and the high-frequency component data HP01 to HP16 to generate quantized data. The prediction processing unit 14 performs a prediction encoding process on the quantized data. The predictive-coded quantized data is input to the symbol generator 15.

  The symbol generation unit 15 generates a symbol string from the bit string of the quantized data subjected to predictive coding. The processing content of the symbol generation unit 15 is a characteristic part of the present invention, and the detailed processing content will be described later. The symbol generation unit 15 outputs the generated symbol string to the entropy encoding unit 16.

  The entropy encoding unit 16 performs entropy encoding processing on the quantized data that has been symbolized to generate compressed image data. The compressed image data is output as a bit stream in units of one macro block.

<2. Symbol data structure>
Next, the data structure of the symbol data generated in the symbol generator 15 will be described. FIG. 5 is a diagram showing a data structure of symbol data. Symbol data in HD Photo includes an absolute value (ABS), an index (INDEX), a code (SIGN), a zero run (ZERO_RUN), and a flex bit length (FLEXBIT).

  As the absolute value (ABS), a value obtained by subtracting 1 from the absolute value of the non-zero coefficient is set. The sign (SIGN) is set to 0 when the sign of the non-zero coefficient is positive, and is set to 1 when the sign is negative. In the zero run (ZERO_RUN), the number of consecutive zero coefficients existing immediately before the non-zero coefficient in the block is set. In the flex bit length (FLEXBIT), a bit width assigned to a flex bit among lower bits of quantized data is set.

  The index (INDEX) includes FIRST_INDEX and NEXT_INDEX. FIRST_INDEX is an INDEX set for the first non-zero coefficient in the block, and NEXT_INDEX is an INDEX set for all the second and subsequent non-zero coefficients.

  Whether or not there is a zero run before the first non-zero coefficient is set in the least significant bit [0] of FIRST_INDEX. If there is a zero run, 0 is set, otherwise 1 is set.

  Whether or not the absolute value of the corresponding non-zero coefficient is 1 is set in the first bit [1] of FIRST_INDEX. When the absolute value is 1, 0 is set, and when the absolute value is not 1, 1 is set.

  In the second and third bits [3: 2] of FIRST_INDEX, information of subsequent quantized data is set from the corresponding non-zero coefficient. If the quantized data after the corresponding non-zero coefficient is all zero coefficients, 00 indicating EOB (End Of Block) is set. If a non-zero coefficient exists immediately after the corresponding non-zero coefficient, 01 is set, and if a zero coefficient exists immediately after it, 10 is set.

  Whether or not the absolute value of the corresponding non-zero coefficient is 1 is set in the least significant bit [0] of NEXT_INDEX. When the absolute value is 1, 0 is set, and when the absolute value is not 1, 1 is set.

  In the first and second bits [2: 1] of NEXT_INDEX, information of subsequent quantized data is set from the corresponding non-zero coefficient. If the quantized data after the corresponding non-zero coefficient is all zero coefficients, 00 indicating EOB is set. If a non-zero coefficient exists immediately after the corresponding non-zero coefficient, 01 is set, and if a zero coefficient exists immediately after it, 10 is set.

<3. Types of Registers in Symbol Generation Unit>
As shown in FIG. 1, the symbol generator 15 includes a first register 51, a second register 52, a third register 53, a fourth register 54, a fifth register 55, and a sixth register 56.

  The first register 51 is a zero count register for counting zero runs. Since the number of quantized data in one block is 15, the first register 51 has a 4-bit storage capacity.

  The second register 52 is a zero run register that stores a zero run to be output as symbol data. The second register 52 also has a 4-bit storage capacity.

  The third register 53 is an ABS register for storing an absolute value of a non-zero coefficient to be output as symbol data. In the present embodiment, the data width of the quantized data is 32 bits. Therefore, the third register 53 has a 32-bit storage capacity. However, the third register 53 stores the absolute value of the non-zero coefficient as it is. When output as symbol data, a value obtained by subtracting 1 is output.

  The fourth register 54 is a SIGN register for storing a sign of a non-zero coefficient to be output as symbol data. As described above, since 0 or 1 information is recorded in the code, the fourth register 54 has a storage capacity of 1 bit.

  The fifth register 55 is a 1st flag register that sets a first flag. The fifth register 55 is set to 1 until the first non-zero coefficient in the block appears, and is set to 0 after the non-zero coefficient appears. The fifth register 55 has a 1-bit storage capacity.

  The sixth register 56 is a POS register for setting position data. The position data is data indicating the number of the current quantized data to be processed in the block. The position data can be determined from the information stored immediately before the non-zero coefficient is input and the zero count information.

<4. Symbol generation processing>
A flow of processing in which symbol data is generated by the symbol generation unit 15 configured as described above will be described.

  FIG. 6 shows symbols when a data string {0, 0, 3, 0, 0, 3, 10, 0, 0, 0, −1, 0, 2, 0, 0} is input as quantized data. The values set in the registers of the generation unit 15 are shown. The symbol generator 15 serially inputs a data sequence of quantized data from the top.

  First, the symbol generation unit 15 inputs the first 0th data {0}. At this timing, the zero count is incremented by 1, and 1 is set in the zero count register (first register 51). Since {0} is a zero coefficient, the ABS register (third register 53) and the SIGN register (fourth register 54) are undefined. Also, 0 is set in the zero run register (second register 52) and the POS register (sixth register 56). The first flag register (fifth register 55) is set to 1 as an initial value.

  When the next first data {0} is input, the zero count register (first register 51) is incremented by 1 and set to 2. Data is not updated in other registers.

  Subsequently, when the second data {3} is input, since {3} is a non-zero coefficient, 3 is set in the ABS register (third register 53) and the sign is stored in the SIGN register (fourth register 54). 0 indicating a plus is set. The zero run register (second register 52) is set to the zero count number 2 immediately before being stored in the zero count register (first register 51), and the zero count register (first register 51) is set to zero. It is initialized. Since a non-zero coefficient has appeared, 2 is set in the POS register (sixth register 56).

  As described above, when the first non-zero coefficient is input as the second data to the symbol generator 15, the information of the second data such as ABS, SIGN, zero run, etc. is stored in the register. At this time, the second data is not output as symbol data but is held in a register.

  The third and fourth data are also {0}. Therefore, the data in the second, third, fourth, and sixth registers are not updated. The zero count register (first register 51) is incremented in order of 1, 2. The 1st flag register (fifth register 55) is fixed at 0 after the first non-zero coefficient appears.

  While the symbol generator 15 is inputting the third and fourth data, the second, third, and fourth registers 52, 53, and 54 are the ABS, SIGN, and zero run information of the second data. Holding.

  When the fifth data {3} is input, since {3} is a non-zero coefficient, 3 is set in the ABS register (third register 53), and a sign plus is added to the SIGN register (fourth register 54). Is set to 0. The zero run register (second register 52) is set to the zero count number 2 immediately before being stored in the zero count register (first register 51), and the zero count register (first register 51) is set to zero. It is initialized. Since a non-zero coefficient has appeared, 5 is set in the POS register (sixth register 56).

  When the symbol generator 15 inputs the fifth data {3}, the second, third, and fourth registers 52, 53, and 54 are updated in this way. Therefore, the symbol generator 15 changes the second, third, and fourth registers 52, 53, and 54 before the contents of the second, third, and fourth registers 52, 53, and 54 are updated with the fifth data. Is output as symbol data of the second data. That is, the symbol data of the previous non-zero coefficient stored in the register is output when a new non-zero coefficient appears, and the information of the non-zero coefficient that has newly appeared is held in the register. However, for ABS, a value obtained by subtracting 1 is used as symbol data.

  FIG. 7 shows the contents of the symbol data output from the symbol generator 15. 7 shows that the data string {0, 0, 3, 0, 0, 3, 10, 0, 0, 0, −1, 0, 2, 0, 0} shown in FIG. The case where it is input as 40 is shown.

  In FIG. 7, the information above the double line indicates the information of the quantized data input by the symbol generation unit 15, and the part below the double line indicates the content of the symbol data output from the symbol generation unit 15.

  As shown in FIG. 7, the symbol data of the second data {3} is output at the timing when the fifth data {3} is input. That is, 2 as ABS, 1010 as FIRST_INDEX, 2 as ZERO_RUN, and 0 as SIGN are output as symbol data. The FIRST_INDEX is generated by the symbol generation unit 15 at the timing when the fifth quantized data is input.

  Also, block No. The symbol data output at the timing when the second quantized data of 40 is input is the block number. This is symbol data corresponding to the last 39 non-zero coefficients.

  Reference is again made to FIG. When the sixth data {10} is input, since {10} is a non-zero coefficient, 10 is set in the ABS register (third register 53), and a sign plus is added to the SIGN register (fourth register 54). Is set to 0. The zero run register (second register 52) is set to the previous zero count number 0, and the zero count register (first register 51) is initialized to zero. Since a non-zero coefficient has appeared, 6 is set in the POS register (sixth register 56).

  When the symbol generator 15 inputs the sixth data, the second, third, and fourth registers 52, 53, and 54 are updated in this way. Therefore, the symbol generator 15 changes the second, third, and fourth registers 52, 53, and 54 before the contents of the second, third, and fourth registers 52, 53, and 54 are updated with the sixth data. Is output as symbol data of the fifth data. However, for ABS, a value obtained by subtracting 1 is used as symbol data.

  Again referring to FIG. At the timing when the sixth data {10} is input, the symbol data of the fifth data {3} is output. That is, 2 as ABS, 011 as NEXT_INDEX, 2 as ZERO_RUN, and 0 as SIGN are output as symbol data. NEXT_INDEX is generated by the symbol generation unit 15 at the timing when the sixth quantized data is input.

  As described above, the symbol generation unit 15 according to the present embodiment can generate and output symbol data compliant with HD Photo while having a configuration that includes a register that stores information of a single quantized data.

  With the image compression apparatus of the type shown in FIG. 9 described in the prior art, it is necessary to temporarily store all non-zero coefficient information in the block in the buffer. In addition, two such buffers are required to speed up the processing. On the other hand, since the symbol generation unit 15 of the present embodiment is configured to hold only information of one non-zero coefficient in the block, the capacity of the storage device used by the symbol generation unit 15 is significantly reduced. Can be made.

  For example, in the above embodiment, the storage capacity required for each register is 4 bits for the first register 51, 4 bits for the second register 52, 32 bits for the third register 53, and 1 for the fourth register 54. 1 bit for the fifth register 55 and 4 bits for the sixth register 56. In other words, a total storage capacity of 46 bits is sufficient. In the conventional configuration described above, since the size of (32 + 4 + 1) × 15 × 2 bits is necessary for the entire two buffers, the storage size can be greatly reduced.

  Further, according to the processing content of the symbol generation unit 15 of the present embodiment, as described in the conventional configuration, switching from DC component data to low-frequency component data and switching from high-frequency component data to DC component data are performed. There is no free time. Therefore, the speed of the symbol data generation process can be improved.

  Furthermore, according to the method of the present embodiment, it is not necessary to distinguish between processes based on DC component data, low-frequency component data, and high-frequency component data. A common rule for all component data is that non-zero coefficient information is temporarily stored in a register, and symbol data is output based on the previous non-zero coefficient information when the next non-zero coefficient appears. Can be applied.

  In general, the symbol data related to the last non-zero coefficient of the Nth block is output when the first nonzero coefficient of the (N + 1) th block appears.

  FIG. 8 is a diagram illustrating an output example of symbol data output at a switching portion of high-frequency component data, DC component data, and low-frequency component data. Symbol data relating to the last non-zero coefficient {40} of the block of DC component data (block No. 53) is output when the first non-zero coefficient of the first block (block No. 54) of low-frequency component data appears. ing. For DC component data, only ABS and SIGN are output as symbol data. For the DC component data, the absolute value of the quantized data is set as it is as ABS (a value not subtracting 1).

  The symbol data related to the last non-zero coefficient {1} of the last block (block No. 52) of the high-frequency component data is output when the first non-zero coefficient of the DC component data appears.

  The symbol data related to the last non-zero coefficient of the last block of the low-frequency component data is output when the first non-zero coefficient of the first block of the high-frequency component data appears.

  Thus, since the processing method can be unified over the DC component data, the low-frequency component data, and the high-frequency component data, it is possible to share most of the processing circuits. Alternatively, if software processing is performed, most of the algorithms can be shared.

DESCRIPTION OF SYMBOLS 10 Image compression apparatus 11 1st frequency conversion part 12 2nd frequency conversion part 13 Quantization part 15 Symbol generation part 51-56 1st-6th register

Claims (1)

A frequency conversion unit that converts the frequency of image data to generate frequency conversion data;
A quantization unit that quantizes the frequency conversion data to generate quantized data;
A prediction processing unit that performs predictive coding processing on the quantized data generated by the quantization unit;
A symbol generator for symbolizing quantized data to generate symbol data;
An encoding unit that encodes symbol data to generate encoded data;
With
The symbol generator is
A quantized data input unit configured to serially input a data string of quantized data after the predictive encoding process acquired by the predictive processing unit, which is configured by a plurality of blocks,
A quantized data information storage unit that is a capacity for storing information of quantized data for one storage capacity, and input a data string of quantized data serially input to the quantized data input unit, The quantized data information storage unit capable of storing absolute value, sign, and zero run information of quantized data of one non-zero coefficient;
When the quantized data to be processed input by the quantized data input unit is a non-zero coefficient, the absolute value of the quantized data of the previous non-zero coefficient stored in the quantized data information storage unit, A symbol, and a symbol data output unit that outputs zero run information as symbol data;
An image compression apparatus comprising:

Images