JP2013175542A5 - - Google Patents

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Publication number
JP2013175542A5
JP2013175542A5 JP2012038376A JP2012038376A JP2013175542A5 JP 2013175542 A5 JP2013175542 A5 JP 2013175542A5 JP 2012038376 A JP2012038376 A JP 2012038376A JP 2012038376 A JP2012038376 A JP 2012038376A JP 2013175542 A5 JP2013175542 A5 JP 2013175542A5
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JP
Japan
Prior art keywords
electronic device
metal layer
manufacturing
plan
view
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2012038376A
Other languages
Japanese (ja)
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JP2013175542A (en
JP5987347B2 (en
Filing date
Publication date
Application filed filed Critical
Priority to JP2012038376A priority Critical patent/JP5987347B2/en
Priority claimed from JP2012038376A external-priority patent/JP5987347B2/en
Publication of JP2013175542A publication Critical patent/JP2013175542A/en
Publication of JP2013175542A5 publication Critical patent/JP2013175542A5/ja
Application granted granted Critical
Publication of JP5987347B2 publication Critical patent/JP5987347B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Claims (9)

一方の面に接合材が配置されている蓋体と、凹部を備え環状に配置されている金属層を有し、平面視で前記金属層に囲まれている領域に電子部品を配置している基板と、を準備する工程と
記基板と共に前記電子部品を収容して、前記金属層と前記接合材が重なるように蓋体を配置する工程と、
前記接合材を溶融することにより、前記基板と前記蓋体とを接合する工程と、
を含むことを特徴とする電子デバイスの製造方法。
A lid having a bonding material disposed on one surface and a metal layer disposed in an annular shape with a recess, and an electronic component disposed in a region surrounded by the metal layer in plan view A step of preparing a substrate ;
Wherein together before Symbol substrate accommodating an electronic component, placing the lid so that the bonding material and the metal layers overlap,
By melting the bonding material, a step of bonding the cover member and the substrate,
The manufacturing method of the electronic device characterized by the above-mentioned.
前記接合する工程は、エネルギービームを、前記金属層に沿って前記蓋体に照射し、平面視で前記凹部と重なる位置に2回以上照射することを特徴とする請求項1に記載の電子デバイスの製造方法。 2. The electronic device according to claim 1, wherein the bonding step irradiates the lid body with an energy beam along the metal layer and irradiates the position overlapping the concave portion twice or more in a plan view. Manufacturing method. 前記金属層には、前記電子部品の周囲に沿って、前記凹部により凹凸が設けられている
ことを特徴とする請求項1または2に記載の電子デバイスの製造方法。
3. The method of manufacturing an electronic device according to claim 1, wherein the metal layer is provided with unevenness by the recess along the periphery of the electronic component.
前記凹部は、平面視で前記金属層の角部に配置されていることを特徴とする請求項1ないし3のいずれか1項に記載の電子デバイスの製造方法。 4. The method of manufacturing an electronic device according to claim 1, wherein the concave portion is disposed at a corner portion of the metal layer in a plan view. 前記接合材が銀ろうであることを特徴とする請求項1ないし4のいずれか1項に記載の
電子デバイスの製造方法。
The method for manufacturing an electronic device according to claim 1, wherein the bonding material is silver solder.
前記凹部の深さが5μm以上10μm以下の範囲内にあることを特徴とする請求項1ないし5のいずれか1項に記載の電子デバイスの製造方法。  6. The method of manufacturing an electronic device according to claim 1, wherein a depth of the recess is in a range of 5 μm to 10 μm. 接合部で接合されている蓋体と基板とで構成されている内部空間に電子部品を収容して
いる電子デバイスであって、
前記接合部には、凹部を有する金属層と、前記凹部内に一部が配置されている接合材とが積層されていることを特徴とする電子デバイス。
An electronic device containing electronic components in an internal space composed of a lid and a substrate joined at a joint,
An electronic device , wherein a metal layer having a concave portion and a bonding material partially disposed in the concave portion are laminated on the joint portion .
請求項7に記載の電子デバイスを含むことを特徴とする電子機器。 An electronic apparatus comprising the electronic device according to claim 7 . 凹部を有し、平面視で環状に配置されている金属層と、
平面視で前記金属層に囲まれている領域に電子部品を搭載するための電極と、
を備えていることを特徴とする配線基板。
A metal layer having a recess and arranged annularly in plan view;
An electrode for mounting an electronic component in a region surrounded by the metal layer in plan view;
A wiring board comprising:
JP2012038376A 2012-02-24 2012-02-24 Manufacturing method of electronic device Expired - Fee Related JP5987347B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2012038376A JP5987347B2 (en) 2012-02-24 2012-02-24 Manufacturing method of electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012038376A JP5987347B2 (en) 2012-02-24 2012-02-24 Manufacturing method of electronic device

Publications (3)

Publication Number Publication Date
JP2013175542A JP2013175542A (en) 2013-09-05
JP2013175542A5 true JP2013175542A5 (en) 2015-03-19
JP5987347B2 JP5987347B2 (en) 2016-09-07

Family

ID=49268215

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012038376A Expired - Fee Related JP5987347B2 (en) 2012-02-24 2012-02-24 Manufacturing method of electronic device

Country Status (1)

Country Link
JP (1) JP5987347B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018102998A1 (en) * 2016-12-07 2018-06-14 东莞市国瓷新材料科技有限公司 Method for preparing ceramic package substrate with copper plating dams

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01151813A (en) * 1987-12-09 1989-06-14 Seiko Electronic Components Ltd Small sized crystal resonator
JP2004288737A (en) * 2003-03-19 2004-10-14 Kyocera Corp Substrate for mounting electronic component and electronic device employing it
JP2005079558A (en) * 2003-09-04 2005-03-24 Miyota Kk Method of fabricating piezoelectric device
JP2005216932A (en) * 2004-01-27 2005-08-11 Kyocera Corp Wiring board and its manufacturing method and electrical part
JP2012049252A (en) * 2010-08-25 2012-03-08 Citizen Finetech Miyota Co Ltd Electronic component package

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