JP2013157485A - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

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JP2013157485A
JP2013157485A JP2012017419A JP2012017419A JP2013157485A JP 2013157485 A JP2013157485 A JP 2013157485A JP 2012017419 A JP2012017419 A JP 2012017419A JP 2012017419 A JP2012017419 A JP 2012017419A JP 2013157485 A JP2013157485 A JP 2013157485A
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package
control signal
signal input
lead
power
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Junya Tanaka
淳也 田中
Taichi Nakamura
太一 中村
Masanori Nano
匡紀 南尾
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Panasonic Corp
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Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device with a good electric characteristic and a manufacturing method thereof while restraining excessive heat conduction to a control substrate.SOLUTION: A power system input/output lead (4) drawn from a package (2) in which a power semiconductor element (11a) switched by control signals inputted from the outside is provided is arranged to be overlaid on an external connection terminal (6a) provided on a housing (1), and the power system input/output lead (4) is electrically connected to the external connection terminal (6a). A control substrate (3) generating the control signals is mounted to a tip of a control signal input lead (5) drawn from the package (2) and bent into a shape in a direction away from the package (2). The control signals are supplied to the package (2) via the control signal input lead (5), and an air layer (21) is formed between it and the package (2).

Description

本発明は、半導体装置およびその製造方法に関し、特にスイッチング素子などのパワーデバイスを含み、インバータなどの電力変換用途で使用される半導体装置に関する。   The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device including a power device such as a switching element and used for power conversion such as an inverter.

太陽光発電システムのパワーコンディショナーや、モーターの回転制御に使用されるパワーデバイスは、実装面積の削減、半導体素子間距離の短縮による性能向上、ユーザー側の設計負荷低減を目的として、複数のパワーデバイスを一つのパッケージに収めたモジュール化された製品が増加している。１パッケージ化された半導体装置はパワーモジュールと呼ばれ、スイッチングを行うＩＧＢＴ（insulated gate bipolar transistor）、ＭＯＳＦＥＴ（Metal-Oxide-Semiconductor Field Effect Transistor）のようなパワー半導体素子が複数個搭載されている。さらにそのパワー半導体素子を駆動するドライバ素子を複数搭載し、必要な場合にはさらに複数の受動素子を同時に内蔵して、パワー半導体の駆動・保護機能を持たせたモジュールは特にＩＰＭ（Intelligent Power Module）と呼称され、市場を伸ばしている。   Power conditioners for solar power generation systems and power devices used for motor rotation control are designed to reduce the mounting area, improve the performance by shortening the distance between semiconductor elements, and reduce the design load on the user side. The number of modularized products in a single package is increasing. One packaged semiconductor device is called a power module, and is mounted with a plurality of power semiconductor elements such as IGBTs (insulated gate bipolar transistors) and MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors) that perform switching. In addition, IPM (Intelligent Power Module) is a module that incorporates multiple driver elements to drive the power semiconductor elements, and if necessary, incorporates multiple passive elements at the same time to provide power semiconductor drive and protection functions. ) And the market is growing.

図７に示すように、この半導体装置は、金属端子１０１がインサート成型された樹脂ケース１０２の下面に、主にＣｕを材料とした金属プレート１０３が接着剤１０４にて取り付けられている。   As shown in FIG. 7, in this semiconductor device, a metal plate 103 mainly made of Cu is attached with an adhesive 104 to the lower surface of a resin case 102 in which metal terminals 101 are insert-molded.

金属プレート１０３上には、アルミナや窒化アルミに代表されるセラミックの表面と裏面に、Ｃｕ箔が貼り付けられた配線パターンを有する絶縁基板１０５が半田１０６ａで接合されている。   On the metal plate 103, an insulating substrate 105 having a wiring pattern in which a Cu foil is attached to the front and back surfaces of a ceramic typified by alumina or aluminum nitride is joined by solder 106a.

絶縁基板１０５上にはＩＧＢＴや還流ダイオードなどのパワー半導体素子１０７が半田１０６ｂで接合されている。パワー半導体素子１０７の表面に形成された電極と樹脂ケース１０２の中継電極１０８の間が、アルミワイヤー１０９によって接続されている。   On the insulating substrate 105, a power semiconductor element 107 such as an IGBT or a free-wheeling diode is joined by solder 106b. An aluminum wire 109 connects the electrode formed on the surface of the power semiconductor element 107 and the relay electrode 108 of the resin case 102.

さらに、パワー半導体素子１０７の直上には、それらを制御する制御素子１１０とコンデンサや抵抗などの受動部品１１１が実装された制御基板１１２が配置されている。制御基板１１２は、中継電極１０８に挿入されることによってパワー半導体素子１０７と制御素子１１０が電気的に接続されている。   Further, a control board 112 on which a control element 110 for controlling them and a passive component 111 such as a capacitor and a resistor are mounted is disposed immediately above the power semiconductor element 107. By inserting the control board 112 into the relay electrode 108, the power semiconductor element 107 and the control element 110 are electrically connected.

また、これらのパワー半導体素子１０７の周辺は外部環境からの保護のため、樹脂ケース１０２の凹部１１４にシリコーンゲル１１３などの樹脂を充填して封止されている。   In addition, the periphery of these power semiconductor elements 107 is sealed by filling the recess 114 of the resin case 102 with a resin such as silicone gel 113 in order to protect it from the external environment.

特開２００３−２４３６０９号JP 2003-243609

しかし、従来技術の半導体装置では、以下のような観点から課題を有している。
シリコーンゲル１１３はパワー半導体素子１０７を含む制御基板１１２より下の空間全てに充填されている。そのため、半導体装置の下面からの放熱が不十分であると、そのシリコーンゲル１１３を伝って制御基板１１２に熱が伝導する場合がある。 However, conventional semiconductor devices have problems from the following viewpoints.
The silicone gel 113 is filled in the entire space below the control substrate 112 including the power semiconductor element 107. Therefore, if heat radiation from the lower surface of the semiconductor device is insufficient, heat may be conducted to the control substrate 112 through the silicone gel 113.

パワー半導体素子１０７は通常１５０℃まで発熱しても信頼性上問題ないが、制御基板１１２の材料となる樹脂や搭載されている制御素子１１０は、パワー半導体素子１０７よりも耐熱性が低い場合があり、その耐熱性の差から伝達した熱によって制御基板１１２や制御素子１１０の信頼性を劣化させる恐れを有している。   Although the power semiconductor element 107 normally generates heat up to 150 ° C., there is no problem in reliability. However, the resin used as the material for the control board 112 and the mounted control element 110 may have lower heat resistance than the power semiconductor element 107. There is a possibility that the reliability of the control board 112 and the control element 110 may be deteriorated by the heat transferred from the difference in heat resistance.

また、パワー半導体素子１０７の表面電極（図示せず）からアルミワイヤー１０９が接合され、樹脂ケース１０２の中継電極１０８と接続されているが、アルミワイヤー１０９はその径が数百ミクロンと細く、半導体装置の端に位置する中継端子１０８までの距離が１０ｍｍ以上と長いために、アルミワイヤーからの熱が伝わりにくく、よりシリコーンゲル１１３から制御基板１１２へ熱を伝える要因となっている。   Further, an aluminum wire 109 is joined from a surface electrode (not shown) of the power semiconductor element 107 and connected to the relay electrode 108 of the resin case 102. The aluminum wire 109 has a diameter as small as several hundred microns, and is a semiconductor. Since the distance to the relay terminal 108 located at the end of the apparatus is as long as 10 mm or more, heat from the aluminum wire is difficult to be transmitted, which is a factor for transmitting heat from the silicone gel 113 to the control substrate 112.

さらに、半導体装置の底面全体に金属プレート１０３が取り付けられており、絶縁基板１０５の接合工程や樹脂ケース１０２の接着工程によってベースプレート１０３の反りが発生しやすい。それによって、半導体装置の使用時にアルミヒートシンクなどに取り付けられた際に、その界面に使用されるグリスの厚みが、反りのために厚みばらつきを生じ、厚くなった部位の直上に存在するパワー半導体素子１０７は放熱性が低下し、より半導体装置内部に熱が溜まりやすく、やはり制御基板１１２の方向へ熱を伝える要因となる。   Further, the metal plate 103 is attached to the entire bottom surface of the semiconductor device, and the base plate 103 is likely to be warped by the bonding process of the insulating substrate 105 and the bonding process of the resin case 102. As a result, when the semiconductor device is attached to an aluminum heat sink or the like when the semiconductor device is used, the thickness of the grease used at the interface varies due to warpage, and the power semiconductor element exists immediately above the thickened portion. No. 107 has a reduced heat dissipation property, and heat is more likely to be accumulated inside the semiconductor device, which also causes heat to be transferred toward the control board 112.

近年ではパワー半導体素子の材料として従来のＳｉ（シリコン）からＳｉＣ（シリコンカーバイド）やＧａＮ（ガリウムナイトライド）という新規材料を用いたパワー半導体素子が実用化されつつある。これらの新規デバイスは従来の動作温度１５０℃から２００℃を越えた動作が可能となるため、放熱機構を簡略化した構造により小型化が期待されている。しかしながら、制御基板１１２や制御素子１１０は従来通りであるため、新規デバイスを使用した場合、上記の理由からさらに熱による影響が顕著になり、その対策が必須である。   In recent years, power semiconductor elements using new materials such as SiC (silicon carbide) and GaN (gallium nitride) from conventional Si (silicon) are being put into practical use as materials for power semiconductor elements. Since these new devices can operate at temperatures exceeding the conventional operating temperature of 150 ° C. to 200 ° C., miniaturization is expected due to a simplified heat dissipation mechanism. However, since the control board 112 and the control element 110 are the same as before, when a new device is used, the influence of heat becomes more remarkable for the above reasons, and countermeasures are indispensable.

また、熱に対する課題に加え、従来技術では以下のような課題も有している。
従来技術のような半導体装置はコストに占める材料費の割合が高く、低価格化の妨げになっていた。特に、絶縁基板１０５として使用されるセラミックや、半導体装置の底面に配置される面積の大きい金属プレート、また半導体装置内のほぼ全体を覆うシリコーンゲルの材料費が高い。 Moreover, in addition to the subject with respect to a heat | fever, the following subjects also have the following subjects.
The semiconductor device as in the prior art has a high ratio of material cost to the cost, which hinders price reduction. In particular, the material cost of the ceramic used as the insulating substrate 105, the metal plate having a large area disposed on the bottom surface of the semiconductor device, and the silicone gel covering almost the entire semiconductor device is high.

さらに、従来技術のような半導体装置では、細長いアルミワイヤー１０９でパワー半導体素子１０７から中継端子１０８と接続し、さらに中継端子１０８と制御基板１１２を接続するため、パワー半導体素子１０７から制御素子１１０までの配線長が長く、インダクタンスが大きいために、動作時のサージ電圧による素子の破壊を引き起こす場合がある。   Further, in the semiconductor device as in the prior art, the power semiconductor element 107 is connected to the relay terminal 108 by the elongated aluminum wire 109, and the relay terminal 108 and the control board 112 are further connected. Since the wiring length is long and the inductance is large, the device may be destroyed by a surge voltage during operation.

本発明はこのような課題を鑑みてなされたものであり、制御基板への過剰な熱伝導を抑制しながら、さらには低コストで電気特性の良い、半導体装置とその製造方法を提供することを目的とする。   The present invention has been made in view of such a problem, and provides a semiconductor device and a method for manufacturing the same, which are low in cost and have good electrical characteristics while suppressing excessive heat conduction to the control substrate. Objective.

前記目的を達成するために、本発明の半導体装置製造方法は、外部から入力された制御信号でスイッチングされるパワー半導体素子を内蔵したパッケージを、外装体に載置するとともに、前記パッケージから引き出されている制御信号入力リードとパワー系入出力リードのうちの前記パワー半導体素子の出力側に接続されている前記パワー系入出力リードを、前記外装体に設けられた外部接続端子に電気接続し、パッケージから離れる方向にその形状が曲げられた前記制御信号入力リードの先端に、前記制御信号を発生する制御基板を、前記制御信号入力リードを介して前記パッケージへ前記制御信号を供給するとともに、前記パッケージとの間に空気層が形成されるように取り付けることを特徴とする。   In order to achieve the above object, a semiconductor device manufacturing method according to the present invention places a package containing a power semiconductor element switched by a control signal input from the outside on an exterior body and pulls it out from the package. Of the control signal input lead and the power system input / output lead, the power system input / output lead connected to the output side of the power semiconductor element is electrically connected to an external connection terminal provided in the exterior body, At the tip of the control signal input lead bent in a direction away from the package, a control board for generating the control signal is supplied to the package via the control signal input lead, and It is attached so that an air layer may be formed between packages.

また、本発明の半導体装置製造方法は、外部から入力された制御信号でスイッチングされるパワー半導体素子を内蔵したパッケージを、外装体の凹部に挿入するとともに、前記パッケージから引き出されている制御信号入力リードとパワー系入出力リードのうちの前記パワー半導体素子の出力側に接続されている前記パワー系入出力リードを、外装体の前記凹部の底部で露出した外部接続端子に電気接続し、パッケージから外装体の前記凹部の上部開口に向かってその形状が曲げられた前記制御信号入力リードの先端に、前記制御信号を発生する制御基板を、前記制御信号入力リードを介して前記パッケージへ前記制御信号を供給するとともに、前記パッケージとの間に空気層が形成されるように取り付けることを特徴とする。   In the semiconductor device manufacturing method of the present invention, a package containing a power semiconductor element that is switched by a control signal input from the outside is inserted into the recess of the exterior body, and the control signal input drawn from the package is input. The power system input / output lead connected to the output side of the power semiconductor element of the lead and the power system input / output lead is electrically connected to the external connection terminal exposed at the bottom of the recess of the exterior body, from the package A control board for generating the control signal is provided to the package via the control signal input lead at the tip of the control signal input lead whose shape is bent toward the upper opening of the recess of the exterior body. And an air layer is formed between the package and the package.

本発明の半導体装置は、外部から入力された制御信号でスイッチングされるパワー半導体素子を内蔵したパッケージと、前記制御信号を発生する制御基板と、外部接続端子を有する外装体を有し、前記パッケージが、前記パッケージから引き出されている制御信号入力リードとパワー系入出力リードのうちの前記パワー半導体素子の出力側に接続されている前記パワー系入出力リードを外装体に設けられた前記外部接続端子に電気接続され、前記制御基板が、パッケージから離れる方向にその形状が曲げられた前記制御信号入力リードの先端に、前記制御信号入力リードを介して前記パッケージへ前記制御信号を供給するとともに、前記パッケージとの間に空気層が形成されるように取り付けたことを特徴とする。   The semiconductor device of the present invention includes a package including a power semiconductor element that is switched by a control signal input from the outside, a control board that generates the control signal, and an exterior body having an external connection terminal. The external connection provided in the exterior body with the power system input / output lead connected to the output side of the power semiconductor element among the control signal input lead and the power system input / output lead drawn from the package The control board is electrically connected to a terminal, and the control board supplies the control signal to the package via the control signal input lead at the tip of the control signal input lead bent in a direction away from the package, It is attached so that an air layer may be formed between the package.

また、本発明の半導体装置は、外部から入力された制御信号でスイッチングされるパワー半導体素子を内蔵したパッケージと、前記制御信号を発生する制御基板と、凹部の底部で外部接続端子が露出した外装体を有し、前記パッケージから引き出されている制御信号入力リードとパワー系入出力リードのうちの前記パワー半導体素子の出力側に接続されている前記パワー系入出力リードを外装体に設けられた前記外部接続端子の上に重なるように、前記パッケージを外装体の前記凹部の中に配置し、かつ前記パワー系入出力リードと前記外部接続端子が電気接続されており、前記制御基板が、パッケージから離れる方向にその形状が曲げられた前記制御信号入力リードの先端に、前記制御信号入力リードを介して前記パッケージへ前記制御信号を供給するとともに、前記パッケージとの間に空気層が形成されるように取り付けたことを特徴とする。   The semiconductor device of the present invention includes a package containing a power semiconductor element that is switched by a control signal input from the outside, a control board that generates the control signal, and an exterior in which an external connection terminal is exposed at the bottom of the recess. The power system input / output lead connected to the output side of the power semiconductor element among the control signal input lead and the power system input / output lead drawn from the package is provided on the exterior body. The package is disposed in the recess of the exterior body so as to overlap the external connection terminal, and the power input / output lead and the external connection terminal are electrically connected, and the control board is a package. At the tip of the control signal input lead bent in a direction away from the control signal, the control signal is transmitted to the package via the control signal input lead. Supplies, characterized in that attached to the air layer is formed between said package.

本発明によれば、パワー半導体素子を内蔵したパッケージを外装体に載置するとともに、パッケージから引き出されているパワー系入出力リードを外装体に設けられた外部接続端子に電気接続するので、配線経路のインダクタンスを低減することができ、サージ電圧の小さな半導体装置となり、電気的な破壊も抑制することが可能となる。さらには、パッケージと制御基板の間に空気層が形成されるように、パッケージから引き出されている制御信号入力リードによって、パッケージから制御基板を支持するため、パワー半導体素子から発生する熱が、制御基板へ伝わることを抑制し、熱破壊・熱劣化を防ぐことができる。   According to the present invention, the package containing the power semiconductor element is placed on the exterior body, and the power system input / output leads drawn from the package are electrically connected to the external connection terminals provided on the exterior body. The inductance of the path can be reduced, the semiconductor device has a small surge voltage, and electrical breakdown can be suppressed. Furthermore, since the control signal input leads drawn from the package support the control board from the package so that an air layer is formed between the package and the control board, the heat generated from the power semiconductor element is controlled. It is possible to suppress the transmission to the substrate and prevent thermal destruction and thermal deterioration.

本発明の実施の形態１における半導体装置の断面構造を表す概略図Schematic showing the cross-sectional structure of the semiconductor device in Embodiment 1 of this invention. 本発明の実施の形態１におけるパッケージの回路図Circuit diagram of package in Embodiment 1 of the present invention 本発明の実施の形態１における半導体装置の製造方法を示す概略図Schematic diagram showing a method of manufacturing a semiconductor device according to the first embodiment of the present invention. 本発明の実施の形態１におけるパッケージの内部平面構造を表す概略図Schematic showing the internal planar structure of the package in Embodiment 1 of this invention 本発明の実施の形態２における半導体装置の断面構造を表す概略図Schematic showing the cross-sectional structure of the semiconductor device in Embodiment 2 of this invention. 本発明の実施の形態２における半導体装置の製造方法を示す概略図Schematic diagram showing a method for manufacturing a semiconductor device in a second embodiment of the present invention. 従来の技術における半導体装置の断面構造を示す概略図Schematic showing the cross-sectional structure of a semiconductor device in the prior art

以下、本発明の半導体装置製造方法を、具体的な各実施の形態に基づいて説明する。
なお、スイッチング素子として、ＩＧＢＴを用いた半導体装置について説明するが、ＩＧＢＴに限定されるものではなく、他のパワートランジスタを用いた半導体装置についても同様である。 The semiconductor device manufacturing method of the present invention will be described below based on specific embodiments.
Although a semiconductor device using an IGBT as a switching element will be described, the invention is not limited to the IGBT, and the same applies to a semiconductor device using another power transistor.

（実施の形態１）
図１〜図３は本発明の実施の形態を示す。
図１は実施の形態１において完成した半導体装置を示す。 (Embodiment 1)
1 to 3 show an embodiment of the present invention.
FIG. 1 shows a semiconductor device completed in the first embodiment.

パワー半導体素子を内蔵したパッケージ２から上方に向かって垂直に折り曲げて引き出されている制御信号入力リード５は、制御素子８や抵抗、コンデンサなどの受動部品９が実装されて制御信号発生用の電気回路が構築されている制御基板３のスルーホール１８に挿入して半田付けなどによって電気的に接合されている。制御信号入力リード５の途中には突起７が形成されており、この突起７は、制御基板３の裏面に係合してパッケージ２と制御基板３の間隔保持に役立っている。   A control signal input lead 5 bent vertically upward from a package 2 containing a power semiconductor element is mounted with a passive element 9 such as a control element 8, a resistor, a capacitor, and the like. The circuit board is inserted into the through hole 18 of the control board 3 and is electrically joined by soldering or the like. A protrusion 7 is formed in the middle of the control signal input lead 5, and this protrusion 7 is engaged with the back surface of the control board 3 to help maintain the distance between the package 2 and the control board 3.

このパッケージ２と制御基板３は外装体としての外装ケース１に組み付けられている。パッケージ２から水平に引き出されたパッケージ２のパワー系入出力リード４は、外装ケース１にインサート成形され外装ケース１の凹部１９の底部に一端が露出した外部接続端子６ａに重ねた状態で、パワー系入出力リード４と外部接続端子６ａが、半田接合、ネジ止め、端子同士をかしめることなどによって電気的に接合されている。   The package 2 and the control board 3 are assembled in an exterior case 1 as an exterior body. The power input / output lead 4 of the package 2 drawn horizontally from the package 2 is inserted into the outer case 1 and overlapped with the external connection terminal 6a with one end exposed at the bottom of the concave portion 19 of the outer case 1. The system input / output lead 4 and the external connection terminal 6a are electrically joined by soldering, screwing, or crimping the terminals.

外装ケース１の樹脂には、例えばトランスファーモールド用の熱硬化性のエポキシ樹脂を使用することができる。
外装ケース１の凹部１９の底部には開口２０が形成されており、パワー系入出力リード４と外部接続端子６ａを電気接続した状態のパッケージ２の底面２ａは、開口２０で外装ケース１の外部に露出している。 As the resin of the outer case 1, for example, a thermosetting epoxy resin for transfer molding can be used.
An opening 20 is formed at the bottom of the recess 19 of the outer case 1, and the bottom surface 2 a of the package 2 in a state in which the power input / output lead 4 and the external connection terminal 6 a are electrically connected to each other is outside the outer case 1 through the opening 20. Is exposed.

また、この図１に示した完成した状態では、図７に見られたシリコーンゲル１１３などはパッケージ２の凹部１９に充填されていないため、突起７によって間隔保持されているパッケージ２と制御基板３の間には、空気層２１が形成されている。   Further, in the completed state shown in FIG. 1, since the silicone gel 113 or the like seen in FIG. 7 is not filled in the recess 19 of the package 2, the package 2 and the control board 3 held by the projection 7 are spaced apart. An air layer 21 is formed between them.

このように外装ケース１の凹部１９に、パッケージ２と制御基板３を収めた半導体装置では、制御基板３から制御信号入力リード５を介してパッケージ２のパワー半導体素子のゲート端子に制御信号を供給して、パッケージ２のパワー半導体素子のソース端子−ドレイン端子間のオン−オフを制御している。   As described above, in the semiconductor device in which the package 2 and the control board 3 are housed in the recess 19 of the outer case 1, a control signal is supplied from the control board 3 to the gate terminal of the power semiconductor element of the package 2 through the control signal input lead 5. Thus, on / off between the source terminal and the drain terminal of the power semiconductor element of the package 2 is controlled.

パッケージ２には、例えば図２に示すように、ＩＧＢＴのパワー半導体素子１１ａ，１１ａを２つ直列接続してハーフブリッジ回路を構成して、正極端子Ｐ、負極端子Ｎ、ＡＣ端子を有する１相分のインバータとなっている。１１ｂはダイオードである。   In the package 2, for example, as shown in FIG. 2, two IGBT power semiconductor elements 11a and 11a are connected in series to form a half bridge circuit, and one phase having a positive terminal P, a negative terminal N, and an AC terminal. It is an inverter for minutes. 11b is a diode.

このパッケージ２は、図３（ａ）〜図３（ｄ）の工程で製造できる。図４（ａ）は完成したパッケージ２の内部平面構造を示す。図４（ｂ）はパワー半導体素子１１ａの拡大平面図である。   This package 2 can be manufactured by the steps of FIGS. 3 (a) to 3 (d). FIG. 4A shows the internal planar structure of the completed package 2. FIG. 4B is an enlarged plan view of the power semiconductor element 11a.

図３（ａ）では、リードフレーム１０にパワー半導体素子１１ａとダイオード１１ｂを搭載している。リードフレーム１０の材質は、放熱性の観点から熱伝導率の良いＣｕを用いることが望ましい。また前述の通り、パワー半導体素子１１ａ，１１ａをリードフレーム１０に接合するには熱伝導性の良い材料を使用することが望ましい。具体的には、Ｓｎ−Ａｇ−Ｃｕ系はんだなど金属系の熱伝導性の良い接合材料を使用できる。   In FIG. 3A, the power semiconductor element 11 a and the diode 11 b are mounted on the lead frame 10. The material of the lead frame 10 is desirably Cu having good thermal conductivity from the viewpoint of heat dissipation. Further, as described above, in order to join the power semiconductor elements 11a and 11a to the lead frame 10, it is desirable to use a material having good thermal conductivity. Specifically, a metal-based bonding material having good thermal conductivity such as Sn—Ag—Cu-based solder can be used.

次に図３（ｂ）では、パワー半導体素子１１ａの表面電極とリードフレーム１０をアルミ線１４で電気的に接合する。ここではパワー半導体素子１１ａとダイオード１１ｂを逆並列に接続している。アルミ線１４は超音波接合にて接合すると、常温で接合材が不要のため好ましい。   Next, in FIG. 3B, the surface electrode of the power semiconductor element 11 a and the lead frame 10 are electrically joined by the aluminum wire 14. Here, the power semiconductor element 11a and the diode 11b are connected in antiparallel. It is preferable to join the aluminum wire 14 by ultrasonic bonding because a bonding material is unnecessary at room temperature.

パワー半導体素子１１ａのソース電極１２には数Ａ〜数百Ａの大電流が流れるため、溶断しない程度のアルミ線１４を複数接合させる必要がある。またアルミ線１４はワイヤー形状である必要はなく、箔状のアルミリボンであっても良い。   Since a large current of several A to several hundred A flows through the source electrode 12 of the power semiconductor element 11a, it is necessary to join a plurality of aluminum wires 14 that do not melt. Moreover, the aluminum wire 14 does not need to be a wire shape, and may be a foil-like aluminum ribbon.

一方、パワー半導体素子１１ａのゲート電極１３にはソース電極１２と比較して制御用の小電流しか流れないため、電極面積も小さく、アルミ線１４はソース電極１２用のものよりも細い形状で構わない。例えば１５０ミクロン径のアルミ線１４を用いることができる。   On the other hand, since only a small control current flows through the gate electrode 13 of the power semiconductor element 11a as compared with the source electrode 12, the electrode area is small, and the aluminum wire 14 may be thinner than that for the source electrode 12. Absent. For example, an aluminum wire 14 having a diameter of 150 microns can be used.

次に図３（ｃ）では、リードフレーム１０の裏面に、絶縁層１６と放熱板１７を接着する。絶縁層１６は接着性を持ち、あらかじめ放熱板１７と接着させ、所望の形状に加工したあとリードフレーム１０と接着する。絶縁層１６に熱硬化性の樹脂を用いる場合は、被接着体が放熱板１７とリードフレーム１０の２つとなるため、最初に接着する工程で樹脂が完全硬化し接着性が失われないように温度等の条件を調整する必要がある。この絶縁層１６には放熱性と絶縁性を両立する樹脂を使用することが望ましい。絶縁層１６としては、例えば、アルミナや窒化ホウ素などの高熱伝導フィラーを用いることができる。   Next, in FIG. 3C, the insulating layer 16 and the heat radiating plate 17 are bonded to the back surface of the lead frame 10. The insulating layer 16 has adhesiveness, and is bonded to the heat sink 17 in advance, processed into a desired shape, and then bonded to the lead frame 10. When a thermosetting resin is used for the insulating layer 16, since the adherends are the heat sink 17 and the lead frame 10, the resin is completely cured in the first bonding step so that the adhesiveness is not lost. It is necessary to adjust conditions such as temperature. It is desirable to use a resin having both heat dissipation and insulation properties for the insulating layer 16. As the insulating layer 16, for example, a high thermal conductive filler such as alumina or boron nitride can be used.

次に図３（ｄ）では、リードフレーム１０の周辺を樹脂１５にて封止する。封止には例えば熱硬化性エポキシ樹脂と封止金型を使用したトランスファーモールドによる封止を行うことができる。この時、放熱板１７の裏面は金型と接触するような設計にしておき、封止後に放熱板１７の裏面がパッケージ２の外部に露出するようにしておく。これは、封止時に樹脂１５が放熱板１７の表面を覆うと、パワー半導体素子１１ａ，１１ａからの放熱経路が妨げられ、熱抵抗が上昇してしまうためである。   Next, in FIG. 3D, the periphery of the lead frame 10 is sealed with a resin 15. For sealing, for example, sealing can be performed by transfer molding using a thermosetting epoxy resin and a sealing mold. At this time, the back surface of the heat radiating plate 17 is designed to be in contact with the mold, and the back surface of the heat radiating plate 17 is exposed to the outside of the package 2 after sealing. This is because if the resin 15 covers the surface of the heat dissipation plate 17 at the time of sealing, the heat dissipation path from the power semiconductor elements 11a and 11a is hindered and the thermal resistance increases.

図４（ａ）に図示したように、パワー半導体素子１１ａ，１１ａはリードフレーム１０上で２箇所に搭載されているが、一方が正極側回路、他方が負極側回路となる。またそれぞれのオン・オフを切り替えるためのゲートが配置されている。例えばこのような回路構成をもつパッケージ２を３つ組み合わせることで三相交流用のインバータ回路を形成することができ、モーターの回転制御を司る回路を構築できる。   As shown in FIG. 4A, the power semiconductor elements 11a and 11a are mounted at two locations on the lead frame 10. One is a positive circuit and the other is a negative circuit. In addition, a gate for switching each on / off is arranged. For example, by combining three packages 2 having such a circuit configuration, an inverter circuit for three-phase AC can be formed, and a circuit for controlling the rotation of the motor can be constructed.

このように製造されたパッケージ２と制御基板３を、図３（ｅ）〜図３（ｇ）の工程で組み立てる。
図３（ｄ）に示した状態のパッケージ２に対して、先ず、リードフレーム１０の不要な部分を切り離し、図３（ｅ）に示すように制御信号入力リード５を、パッケージ２から離れる方向にその形状を曲げる。具体的には、制御信号入力リード５をパワー系入出力リード４に対して垂直に曲げるよう端子加工する。 The package 2 and the control board 3 manufactured in this way are assembled in the steps of FIGS. 3 (e) to 3 (g).
For the package 2 in the state shown in FIG. 3D, first, an unnecessary portion of the lead frame 10 is cut off, and the control signal input lead 5 is moved away from the package 2 as shown in FIG. Bend its shape. Specifically, terminal processing is performed so that the control signal input lead 5 is bent perpendicularly to the power input / output lead 4.

次に図３（ｆ）では、外装ケース１の凹部１９に図３（ｅ）でフォーミング加工したパッケージ２を搭載する。三相交流用のインバータ回路に使用する半導体装置の場合には、単一の外装ケース１に対して複数個のパッケージ２が搭載されるが、その数は半導体装置の回路構成で決定される。   Next, in FIG. 3F, the package 2 formed in FIG. 3E is mounted in the recess 19 of the outer case 1. In the case of a semiconductor device used for an inverter circuit for three-phase alternating current, a plurality of packages 2 are mounted on a single outer case 1, and the number is determined by the circuit configuration of the semiconductor device.

外装ケース１には、パッケージ２のパワー系入出力リード４に対応した位置に、外部接続端子６ａを予め配置したものを用意しておく。そして、パッケージ２のパワー系入出力リード４が、外装ケース１の外部接続端子６ａに重なるようにセットし、パワー系入出力リード４と外部接続端子６ａを電気的に接合する。   The outer case 1 is prepared by preliminarily arranging the external connection terminals 6 a at positions corresponding to the power input / output leads 4 of the package 2. Then, the power input / output lead 4 of the package 2 is set so as to overlap the external connection terminal 6a of the outer case 1, and the power input / output lead 4 and the external connection terminal 6a are electrically joined.

この接合には、前述のように半田接合、ネジ止め、かしめ工法などを選択することができる。半田接合など接合材料を使用すると熱膨張係数の差異により接合材料に破断が生じたり、ネジ止めの場合は機械的な締結であるため接触抵抗が高く、大電流を流す際に抵抗値が問題となったり、ネジの重量が軽量化の妨げとなったりするため、かしめ工法や超音波工法など端子を直接接合できる工法を選択することが望ましい。   For this joining, solder joining, screwing, caulking, or the like can be selected as described above. When joint materials such as solder joints are used, the joint materials may break due to the difference in thermal expansion coefficient, and in the case of screwing, the contact resistance is high due to mechanical fastening, and the resistance value is a problem when flowing a large current. Therefore, it is desirable to select a method that can directly join the terminals, such as a caulking method or an ultrasonic method.

次に図３（ｇ）では、外装ケース１の側に電気接続したパッケージ２の上方にフォーミングされた制御信号入力リード５が、制御基板３のスルーホール１８に挿入されるように、制御基板３を外装ケース１の凹部１９にセットする。制御信号入力リード５には突起７が形成されているため、制御基板３がその位置で支持され、パッケージ２と制御基板３の間隔を規定するのに有効である。そして、この状態で制御信号入力リード５と制御基板３の間を半田付けなどの手段で電気的に接合して固定する。   Next, in FIG. 3G, the control signal input lead 5 formed above the package 2 electrically connected to the outer case 1 side is inserted into the through hole 18 of the control circuit board 3 so that the control circuit board 3 is inserted. Is set in the recess 19 of the outer case 1. Since the control signal input lead 5 is formed with a protrusion 7, the control board 3 is supported at that position, which is effective for defining the distance between the package 2 and the control board 3. In this state, the control signal input lead 5 and the control board 3 are electrically joined and fixed by means such as soldering.

なお、制御基板３は複数のパッケージ２の制御信号入力リード５に対して挿入する必要がある場合には、制御信号入力リード５の先端にテーパー形状を施しておくと、挿入しやすくなる。   When it is necessary to insert the control board 3 into the control signal input leads 5 of the plurality of packages 2, if the tip of the control signal input lead 5 is tapered, the control board 3 is easily inserted.

このように構成された半導体装置によると、パワー半導体素子１１ａがパッケージ２の樹脂１５で封止されているため、パッケージ２と制御基板３との間に空気層２１が存在する。従来技術で使用されているシリコーンゲルの熱伝導率は少なくとも１Ｗ／（ｍ・Ｋ）以上であるが、空気の熱伝導率は０．０２〜０．０３Ｗ／（ｍ・Ｋ）程度であり、空気層２１の存在によって制御基板への熱伝導を大きく抑えることができる。   According to the semiconductor device configured as described above, since the power semiconductor element 11 a is sealed with the resin 15 of the package 2, the air layer 21 exists between the package 2 and the control substrate 3. The thermal conductivity of the silicone gel used in the prior art is at least 1 W / (m · K) or more, but the thermal conductivity of air is about 0.02 to 0.03 W / (m · K), The presence of the air layer 21 can greatly suppress heat conduction to the control board.

さらに、パワー半導体素子１１ａからリードフレーム１０へアルミ線１４を接合しているために従来技術よりもその長さを３ｍｍ〜４ｍｍ程度と半減以下に短縮できる。
外装ケース１の外部接続端子６ａとの接合はリードフレーム１０であるパワー系入出力リード４と直接に行われるため、リードフレーム１０のパターンによって容易に接合断面積を増やすことができ、さらにリードフレーム１０の材質にＣｕを使用すれば、熱伝導率が３９８Ｗ／（ｍ・Ｋ）と熱伝導率が２３７Ｗ／（ｍ・Ｋ）であるアルミに対して約１．７倍熱を伝えやすくなるため、物性の点からも熱伝導に関して有利である。 Further, since the aluminum wire 14 is joined from the power semiconductor element 11a to the lead frame 10, the length thereof can be reduced to about 3 mm to 4 mm, which is half or less than the prior art.
Since the outer case 1 and the external connection terminal 6a are joined directly to the power input / output lead 4 which is the lead frame 10, the joining cross-sectional area can be easily increased by the pattern of the lead frame 10, and further the lead frame If Cu is used as the material of No. 10, it becomes easier to transfer heat about 1.7 times to aluminum with a thermal conductivity of 398 W / (m · K) and a thermal conductivity of 237 W / (m · K). From the viewpoint of physical properties, the heat conduction is advantageous.

このため電流路からの熱伝導は従来技術よりも格段に上昇し、さらに制御基板３へ伝わる熱を抑制することができる。制御基板３に挿入している制御信号入力リード５もリードフレーム１０にて形成されるため、物性的には熱を伝えやすいが、その断面積をあらかじめ小さく形成しているので、制御信号入力リード５から伝わる制御基板３の熱は小さくて済む。制御用の信号伝達しか行わないために、おおよそパワー系入出力リード４の半分以下の断面積でも問題は無い。制御信号入力リード５に繋がるパッケージ２内のアルミ線１４もパワー系入出力リード４に接合されているアルミ線１４ものよりも細くしておけば、より熱が伝導し難く好ましい。   For this reason, the heat conduction from the current path is significantly higher than that of the prior art, and the heat transmitted to the control board 3 can be further suppressed. Since the control signal input lead 5 inserted into the control board 3 is also formed by the lead frame 10, it is easy to conduct heat in terms of physical properties, but its cross-sectional area is formed in advance, so the control signal input lead The heat of the control board 3 transmitted from 5 can be small. Since only control signal transmission is performed, there is no problem even if the cross-sectional area is approximately half or less than that of the power input / output lead 4. If the aluminum wire 14 in the package 2 connected to the control signal input lead 5 is also made thinner than the aluminum wire 14 joined to the power input / output lead 4, it is preferable that heat is hardly conducted.

さらに、パッケージ２ごとに放熱板１７を持っているため、従来技術のような半導体装置の底面全体を覆う金属プレートは必要ない。このため反りの発生によるグリスの厚みばらつきが発生せず、また放熱板１７をパッケージ２毎に別に持つことによって、反り量自体も抑制できるため、熱抵抗の上昇、ばらつきを抑制することに繋がる。よってパワー半導体素子１１から発生する熱を効果的に半導体装置の裏面から放熱することができるため、結果的に制御基板３へ伝わる熱量を抑制することができる。   Furthermore, since each package 2 has a heat radiating plate 17, a metal plate that covers the entire bottom surface of the semiconductor device as in the prior art is not necessary. For this reason, the thickness variation of the grease due to the occurrence of warpage does not occur, and since the amount of warpage itself can be suppressed by separately providing the heat radiating plate 17 for each package 2, it leads to suppression of an increase in thermal resistance and variations. Therefore, since the heat generated from the power semiconductor element 11 can be effectively radiated from the back surface of the semiconductor device, the amount of heat transmitted to the control board 3 can be suppressed as a result.

このように、制御基板３への熱伝導を抑制する構造であるため、パワー半導体素子１１ａが高温になっても制御基板３や制御基板３に搭載されている制御素子８の劣化・破壊を防ぐことができる。   Thus, since it is a structure which suppresses the heat conduction to the control board 3, even if the power semiconductor element 11a becomes high temperature, the deterioration and destruction of the control board 3 and the control element 8 mounted on the control board 3 are prevented. be able to.

加えて、本発明の実施の形態では熱に関する有効性以外にも以下のような利点を有する。
本発明の実施の形態では、パッケージ形態にすることによって、まず金属プレートが不要になる。さらに金型でのトランスファーモールドで封止樹脂の使用量が最小限になる。また、リードフレーム１０と絶縁層１６を組み合わせることで高価なセラミック基板の置き換えを図ることができる。このように構造上、材料費を大幅に削減することでコスト面でも有効な半導体装置となる。電気特性面でも以下のような利点を有する。 In addition, the embodiment of the present invention has the following advantages in addition to the effectiveness related to heat.
In the embodiment of the present invention, the metal plate is not required by adopting the package form. Furthermore, the amount of sealing resin used is minimized by transfer molding in the mold. Further, by combining the lead frame 10 and the insulating layer 16, it is possible to replace an expensive ceramic substrate. In this way, the semiconductor device is effective in terms of cost by greatly reducing the material cost in terms of structure. In terms of electrical characteristics, it has the following advantages.

本発明の実施の形態では、パワー半導体素子１１ａ，１１ｂから発生する熱は、放熱板１７を通して外部へ放熱される。また、放熱板１７は絶縁層１６を介してリードフレーム１０の裏面に接着されているため、パワー半導体素子１１ａを含む回路の電位が最大数百Ｖから１０００Ｖを超える電圧であっても、放熱板１７とリードフレーム１０を電気的に絶縁できる。   In the embodiment of the present invention, heat generated from the power semiconductor elements 11 a and 11 b is radiated to the outside through the heat radiating plate 17. Further, since the heat sink 17 is bonded to the back surface of the lead frame 10 via the insulating layer 16, even if the potential of the circuit including the power semiconductor element 11a is a voltage exceeding a maximum of several hundred volts to 1000 volts, the heat sink 17 and the lead frame 10 can be electrically insulated.

本発明の実施の形態では、パッケージ２から引き出した制御信号入力リード５を直上の制御基板３と接続しているために、横方向の配線長を大幅に削減できる。これによってインダクタンスも小さくなるため、サージ電圧による電気的な破壊も抑制するという効果を得ることができる。   In the embodiment of the present invention, since the control signal input lead 5 drawn from the package 2 is connected to the control board 3 immediately above, the wiring length in the horizontal direction can be greatly reduced. As a result, the inductance is also reduced, so that the effect of suppressing electrical breakdown due to surge voltage can be obtained.

なお、パッケージ２の内部構造および回路図は本実施例の形態に限定されるものではない。
この半導体装置は、パッケージ２の外側に露出している放熱板１７が、組み込み対象装置の筐体または放熱板に直接に接触、または熱伝導性グリスあるいは熱伝導性シートを介在させて組み込み対象装置の筐体または放熱板に間接的に接触するように、外装ケース１の底面１ａを組み込み対象装置の筐体または放熱板に向けて、外装ケース１の例えば四隅が組み込み対象装置の筐体または放熱板にネジ留めされる。 In addition, the internal structure and circuit diagram of the package 2 are not limited to the form of the present embodiment.
In this semiconductor device, the heat sink 17 exposed to the outside of the package 2 is in direct contact with the housing or heat sink of the device to be assembled, or a heat conductive grease or a heat conductive sheet is interposed therebetween. The bottom surface 1a of the outer case 1 is directed toward the housing or heat sink of the target device so that the bottom surface 1a of the outer case 1 is indirectly contacted with the case or the heat sink. Screwed to the board.

（実施の形態２）
図５と図６は本発明の実施の形態２を示す。
図５は実施の形態２において完成した半導体装置を示す。 (Embodiment 2)
5 and 6 show a second embodiment of the present invention.
FIG. 5 shows the semiconductor device completed in the second embodiment.

実施の形態１における外装体は、凹部１９が形成されていると共に、外部接続端子６ａがインサート成型された外装ケース１で構成されていた。これに対して実施の形態２では図５に示すように、外装体２７が、外部接続端子６ａを有した板状のベース部２２と、この板状のベース部２２に取り付けられて制御基板３などの周囲を取り囲むガード部２３とで構成されている。パッケージ２，制御基板３の構成、ならびにパッケージ２と制御基板３の組み立てなどは実施の形態１と同じである。   The exterior body in the first embodiment is composed of the exterior case 1 in which the recess 19 is formed and the external connection terminal 6a is insert-molded. On the other hand, in the second embodiment, as shown in FIG. 5, the exterior body 27 is attached to the plate-like base portion 22 having the external connection terminals 6 a and the plate-like base portion 22 to control board 3. It is comprised with the guard part 23 surrounding the circumference | surroundings. The configuration of the package 2 and the control board 3 and the assembly of the package 2 and the control board 3 are the same as in the first embodiment.

この実施の形態２の半導体装置は、次の工程で組み立てられる。
パッケージ２の組み立ては図３（ａ）〜図３（ｅ）と同じである。このように形成されたパッケージ２は、先ず、図６（ａ）に示すように、ガード部２３を取り付ける前のベース部２２に、パッケージ２のパワー系入出力リード４が、ベース部２２の外部接続端子６ａに重なるようにセットし、パワー系入出力リード４と外部接続端子６ａを電気的に接合する。 The semiconductor device according to the second embodiment is assembled in the following process.
The assembly of the package 2 is the same as in FIGS. 3 (a) to 3 (e). In the package 2 thus formed, first, as shown in FIG. 6A, the power input / output lead 4 of the package 2 is connected to the base portion 22 before the guard portion 23 is attached. The power input / output lead 4 and the external connection terminal 6a are electrically joined by setting so as to overlap the connection terminal 6a.

この接合には、半田接合、ネジ止め、かしめ工法などを選択することができる。半田接合など接合材料を使用すると熱膨張係数の差異により接合材料に破断が生じたり、ネジ止めの場合は機械的な締結であるため接触抵抗が高く、大電流を流す際に抵抗値が問題となったり、ネジの重量が軽量化の妨げとなったりするため、かしめ工法や超音波工法など端子を直接接合できる工法を選択することが望ましい。   For this joining, solder joining, screwing, caulking method or the like can be selected. When joint materials such as solder joints are used, the joint materials may break due to the difference in thermal expansion coefficient, and in the case of screwing, the contact resistance is high due to mechanical fastening, and the resistance value is a problem when flowing a large current. Therefore, it is desirable to select a method that can directly join the terminals, such as a caulking method or an ultrasonic method.

このようにしてベース部２２に接合されたパッケージ２の底面２ａは、ベース部２２に形成された開口２４において露出している。
次に図６（ｂ）では、ベース部２２の側に電気接続したパッケージ２の上方にフォーミングされた制御信号入力リード５が、制御基板３のスルーホール１８に挿入されるように、制御基板３をセットする。制御信号入力リード５には突起７が形成されているため、制御基板３がその位置で支持され、パッケージ２と制御基板３の間隔を規定するのに有効である。そして、この状態で制御信号入力リード５と制御基板３の間を半田付けなどの手段で電気的に接合して固定する。図６（ｃ）ではガード部２３をベース部２２に取り付ける。 The bottom surface 2 a of the package 2 joined to the base portion 22 in this way is exposed at the opening 24 formed in the base portion 22.
Next, in FIG. 6B, the control signal input lead 5 formed above the package 2 electrically connected to the base portion 22 side is inserted into the through hole 18 of the control circuit board 3. Set. Since the control signal input lead 5 is formed with a protrusion 7, the control board 3 is supported at that position, which is effective for defining the distance between the package 2 and the control board 3. In this state, the control signal input lead 5 and the control board 3 are electrically joined and fixed by means such as soldering. In FIG. 6C, the guard portion 23 is attached to the base portion 22.

この半導体装置は、パッケージ２の外側に露出している放熱板１７が、組み込み対象装置の筐体または放熱板に直接に接触、または熱伝導性グリスあるいは熱伝導性シートを介在させて組み込み対象装置の筐体または放熱板に間接的に接触するように、ベース部２２の底面２５を、組み込み対象装置の筐体または放熱板に向けて、ベース部２２の例えば四隅が組み込み対象装置の筐体または放熱板にネジ留めされる。   In this semiconductor device, the heat sink 17 exposed to the outside of the package 2 is in direct contact with the housing or heat sink of the device to be assembled, or a heat conductive grease or a heat conductive sheet is interposed therebetween. The bottom surface 25 of the base portion 22 is directed toward the housing or heat dissipation plate of the device to be incorporated so that the bottom surface 25 of the base portion 22 is indirect contact with the housing or heat radiation plate of the device. Screwed to the heat sink.

このように実施の形態２の場合も実施の形態１の場合とほぼ同じ外観形状の半導体装置を得ることができる。
また、図６（ｂ）に仮想線で示すように、組み込み対象装置の側に制御基板３の周囲を被うカバー２６が形成できる使用環境の場合には、ガード部２３は必要でない。 As described above, in the second embodiment, a semiconductor device having substantially the same external shape as that in the first embodiment can be obtained.
In addition, as shown by a virtual line in FIG. 6B, the guard portion 23 is not necessary in a usage environment where the cover 26 covering the periphery of the control board 3 can be formed on the side of the installation target device.

本発明は、太陽光発電システムのパワーコンディショナーや、モーターの回転制御に使用されるパワーデバイスなどの信頼性の向上に寄与する。   The present invention contributes to improving the reliability of a power conditioner of a photovoltaic power generation system and a power device used for motor rotation control.

１ 外装ケース（外装体）
２ パッケージ
３ 制御基板
４ パワー系入出力リード
５ 制御端子
６ａ 外部接続端子
７ 突起
８ 制御素子
９ 受動部品
１０ リードフレーム
１１ａ パワー半導体素子
１１ｂ ダイオード
１２ ソース電極
１３ ゲート電極
１４ アルミ線
１５ 樹脂
１６ 絶縁層
１７ 放熱板
１８ スルーホール
１９ 凹部
２０ 開口
２１ 空気層
２２ ベース部
２３ ガード部
２４ 開口
２５ ベース部の底面
２７ 外装体 1 Exterior case (exterior body)
2 package 3 control board 4 power system input / output lead 5 control terminal 6a external connection terminal 7 protrusion 8 control element 9 passive component 10 lead frame 11a power semiconductor element 11b diode 12 source electrode 13 gate electrode 14 aluminum wire 15 resin 16 insulating layer 17 Heat sink 18 Through hole 19 Recess 20 Opening 21 Air layer 22 Base part 23 Guard part 24 Opening 25 Bottom of base part 27 Exterior body

Claims (7)

外部から入力された制御信号でスイッチングされるパワー半導体素子を内蔵したパッケージを、外装体に載置するとともに、前記パッケージから引き出されている制御信号入力リードとパワー系入出力リードのうちの前記パワー半導体素子の出力側に接続されている前記パワー系入出力リードを、前記外装体に設けられた外部接続端子に電気接続し、
パッケージから離れる方向にその形状が曲げられた前記制御信号入力リードの先端に、前記制御信号を発生する制御基板を、前記制御信号入力リードを介して前記パッケージへ前記制御信号を供給するとともに、前記パッケージとの間に空気層が形成されるように取り付ける
半導体装置製造方法。 A package containing a power semiconductor element that is switched by a control signal input from the outside is placed on the exterior body, and the power of the control signal input lead and the power system input / output lead drawn from the package The power system input / output lead connected to the output side of the semiconductor element is electrically connected to an external connection terminal provided in the exterior body,
At the tip of the control signal input lead bent in a direction away from the package, a control board for generating the control signal is supplied to the package via the control signal input lead, and A semiconductor device manufacturing method for mounting an air layer between a package and a package. 外部から入力された制御信号でスイッチングされるパワー半導体素子を内蔵したパッケージを、外装体の凹部に挿入するとともに、前記パッケージから引き出されている制御信号入力リードとパワー系入出力リードのうちの前記パワー半導体素子の出力側に接続されている前記パワー系入出力リードを、外装体の前記凹部の底部で露出した外部接続端子に電気接続し、
パッケージから外装体の前記凹部の上部開口に向かってその形状が曲げられた前記制御信号入力リードの先端に、前記制御信号を発生する制御基板を、前記制御信号入力リードを介して前記パッケージへ前記制御信号を供給するとともに、前記パッケージとの間に空気層が形成されるように取り付ける
半導体装置製造方法。 A package containing a power semiconductor element that is switched by a control signal input from the outside is inserted into the recess of the exterior body, and the control signal input lead and the power system input / output lead that are drawn from the package are The power system input / output lead connected to the output side of the power semiconductor element is electrically connected to the external connection terminal exposed at the bottom of the recess of the exterior body,
A control board that generates the control signal is provided to the package via the control signal input lead at the tip of the control signal input lead that is bent from the package toward the upper opening of the recess of the exterior body. A semiconductor device manufacturing method for supplying a control signal and attaching an air layer to the package. 外部から入力された制御信号でスイッチングされるパワー半導体素子を内蔵したパッケージと、
前記制御信号を発生する制御基板と、
外部接続端子を有する外装体を有し、
前記パッケージが、前記パッケージから引き出されている制御信号入力リードとパワー系入出力リードのうちの前記パワー半導体素子の出力側に接続されている前記パワー系入出力リードを外装体に設けられた前記外部接続端子に電気接続され、
前記制御基板が、パッケージから離れる方向にその形状が曲げられた前記制御信号入力リードの先端に、前記制御信号入力リードを介して前記パッケージへ前記制御信号を供給するとともに、前記パッケージとの間に空気層が形成されるように取り付けた
半導体装置。 A package containing a power semiconductor element that is switched by a control signal input from the outside;
A control board for generating the control signal;
An exterior body having external connection terminals;
The package has the power system input / output lead connected to the output side of the power semiconductor element among the control signal input lead and the power system input / output lead drawn from the package. Electrically connected to the external connection terminal
The control board supplies the control signal to the package via the control signal input lead at the tip of the control signal input lead bent in a direction away from the package, and between the package and the package. A semiconductor device attached so that an air layer is formed. 外部から入力された制御信号でスイッチングされるパワー半導体素子を内蔵したパッケージと、
前記制御信号を発生する制御基板と、
凹部の底部で外部接続端子が露出した外装体を有し、
前記パッケージから引き出されている制御信号入力リードとパワー系入出力リードのうちの前記パワー半導体素子の出力側に接続されている前記パワー系入出力リードを外装体に設けられた前記外部接続端子の上に重なるように、前記パッケージを外装体の前記凹部の中に配置し、かつ前記パワー系入出力リードと前記外部接続端子が電気接続されており、
前記制御基板が、パッケージから離れる方向にその形状が曲げられた前記制御信号入力リードの先端に、前記制御信号入力リードを介して前記パッケージへ前記制御信号を供給するとともに、前記パッケージとの間に空気層が形成されるように取り付けた
半導体装置。 A package containing a power semiconductor element that is switched by a control signal input from the outside;
A control board for generating the control signal;
It has an exterior body with external connection terminals exposed at the bottom of the recess,
Of the control signal input lead drawn from the package and the power input / output lead, the power input / output lead connected to the output side of the power semiconductor element is connected to the external connection terminal provided on the exterior body. The package is disposed in the recess of the exterior body so as to overlap, and the power system input / output lead and the external connection terminal are electrically connected,
The control board supplies the control signal to the package via the control signal input lead at the tip of the control signal input lead bent in a direction away from the package, and between the package and the package. A semiconductor device attached so that an air layer is formed. 前記制御信号入力リードは前記パワー系入出力リードよりも断面積が小さい
請求項３または４に記載の半導体装置。 5. The semiconductor device according to claim 3, wherein the control signal input lead has a smaller sectional area than the power system input / output lead. 前記制御信号入力リードはその先端がテーパー形状に形成されている
請求項３〜５の何れかに記載の半導体装置。 6. The semiconductor device according to claim 3, wherein a tip of the control signal input lead is formed in a tapered shape. 前記パッケージは、一部が外部に露出した放熱板を内蔵するとともに前記放熱板に前記パワー半導体素子を熱結合して構成され、
前記外装体は、底部に前記凹部を外部と連通した開口が形成され、
パッケージの前記放熱板が外装体の凹部の前記開口から露出している
請求項４から６の何れかに記載の半導体装置。 The package includes a heat sink that is partially exposed to the outside and is configured by thermally coupling the power semiconductor element to the heat sink,
The exterior body is formed with an opening in the bottom that communicates the recess with the outside.
The semiconductor device according to claim 4, wherein the heat radiating plate of the package is exposed from the opening of the recess of the exterior body.
JP2012017419A 2012-01-31 2012-01-31 Semiconductor device and manufacturing method thereof Pending JP2013157485A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016225520A (en) * 2015-06-02 2016-12-28 三菱電機株式会社 Vehicle-mounted electronic control device and manufacturing method of the same
WO2019038957A1 (en) * 2017-08-24 2019-02-28 三菱電機株式会社 Control circuit and power conversion device
JP6961784B1 (en) * 2020-12-28 2021-11-05 日立Astemo株式会社 Power semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016225520A (en) * 2015-06-02 2016-12-28 三菱電機株式会社 Vehicle-mounted electronic control device and manufacturing method of the same
WO2019038957A1 (en) * 2017-08-24 2019-02-28 三菱電機株式会社 Control circuit and power conversion device
JPWO2019038957A1 (en) * 2017-08-24 2019-11-07 三菱電機株式会社 Control circuit and power conversion device
JP6961784B1 (en) * 2020-12-28 2021-11-05 日立Astemo株式会社 Power semiconductor device
WO2022145097A1 (en) * 2020-12-28 2022-07-07 日立Astemo株式会社 Power semiconductor device

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