JP2011243839A - Power semiconductor device - Google Patents

Power semiconductor device Download PDF

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JP2011243839A
JP2011243839A JP2010116179A JP2010116179A JP2011243839A JP 2011243839 A JP2011243839 A JP 2011243839A JP 2010116179 A JP2010116179 A JP 2010116179A JP 2010116179 A JP2010116179 A JP 2010116179A JP 2011243839 A JP2011243839 A JP 2011243839A
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power
circuit
power semiconductor
semiconductor device
control
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Yuji Kawashima
裕史 川島
Kenichi Hayashi
建一 林
Shinya Nakagawa
信也 中川
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Abstract

PROBLEM TO BE SOLVED: To obtain a highly reliable high performance power semiconductor device even if provided with circuits having different operation temperature regions.SOLUTION: The power semiconductor device comprises a power circuit CP mounting power semiconductor elements 2 and 3 each having a control electrode, first wiring members 9 and 10 bonded to the electrodes of the power semiconductor elements 2 and 3 to which a main current is fed, and a control circuit CC mounting an IC4, which is a control semiconductor element which controls operation of the power semiconductor elements 2 and 3, and having an operation temperature region different from that of the power circuit CP and is disposed separately therefrom. A second wiring member, which is a thin metallic wire 11, having a cross-sectional area smaller than that of the first wiring members 9 and 10 is used for electric connection of the control electrode of the power semiconductor element 3 and the control circuit CC.

Description

本発明は、電力用半導体装置に関し、特に動作温度域が異なる回路を備えた電力用半導体装置の構成に関するものである。   The present invention relates to a power semiconductor device, and particularly to a configuration of a power semiconductor device including circuits having different operating temperature ranges.

半導体装置の中でも電力用半導体装置は、鉄道車両、ハイブリッドカー、電気自動車等の車両、家電機器、産業用機械等において、比較的大きな電力を制御、整流するために利用されている。従って、電力用半導体装置に使用される半導体素子は１００Ａ／ｃｍ２を超える高い電流密度で通電することが求められる。そのため、近年はシリコン（Ｓｉ）に代わる半導体材料としてワイドバンドギャップ半導体材料である炭化珪素（ＳｉＣ）が注目されており、ＳｉＣからなる半導体素子は５００Ａ／ｃｍ２を超える電流密度での動作が可能である。また、ＳｉＣは１５０℃〜３００℃の高温状態でも安定動作が可能であり、高電流密度動作と高温動作の両立が可能な半導体材料として期待されている。 Among semiconductor devices, power semiconductor devices are used to control and rectify relatively large power in vehicles such as railway vehicles, hybrid cars, and electric vehicles, home appliances, and industrial machines. Therefore, a semiconductor element used for a power semiconductor device is required to be energized at a high current density exceeding 100 A / cm 2 . Therefore, in recent years, silicon carbide (SiC), which is a wide band gap semiconductor material, has attracted attention as a semiconductor material that replaces silicon (Si), and a semiconductor element made of SiC can operate at a current density exceeding 500 A / cm 2. It is. Further, SiC is capable of stable operation even at a high temperature of 150 ° C. to 300 ° C., and is expected as a semiconductor material capable of achieving both high current density operation and high temperature operation.

一方、半導体装置内には、電力の主電流が流れる電力回路の他に、電力回路の動作を制御するための制御回路が必要であり、電力回路と制御回路がひとつのパッケージ内に収納されている。制御回路には、小型で集積化が容易な従来のシリコン系の半導体素子が用いられるが、シリコン系の半導体素子の動作温度域は１００℃前後であるので、ひとつのパッケージ内に動作温度域の異なる回路が存在することになる。その場合、ワイドバンドギャップ半導体の性能に合わせて動作温度を設定すると、制御回路の温度が動作温度域を超え、誤動作や劣化を招く恐れがあった。   On the other hand, in the semiconductor device, in addition to the power circuit through which the main current of power flows, a control circuit for controlling the operation of the power circuit is necessary. The power circuit and the control circuit are housed in one package. Yes. A conventional silicon-based semiconductor element that is small and easy to integrate is used for the control circuit, but the operating temperature range of the silicon-based semiconductor element is around 100 ° C. There will be different circuits. In that case, if the operating temperature is set in accordance with the performance of the wide band gap semiconductor, the temperature of the control circuit exceeds the operating temperature range, which may cause malfunction or deterioration.

そこで、動作温度域の異なる回路を分離し、高温側の回路から低温側の回路への熱の流入を防止する半導体装置（例えば、特許文献１参照。）や、分離した回路毎に独立した冷却経路を設けた電力用変換装置が提案されている（例えば、特許文献２参照。）。   Therefore, a semiconductor device (see, for example, Patent Document 1) that separates circuits having different operating temperature ranges and prevents heat from flowing from the high temperature side circuit to the low temperature side circuit, or independent cooling for each separated circuit. A power converter provided with a route has been proposed (see, for example, Patent Document 2).

特開２００４−１７２２３９号公報（段落００１３、図１）JP 2004-172239 A (paragraph 0013, FIG. 1) 特開２０００−３３２０６７号公報（段落００５０〜００５１、図３）Japanese Unexamined Patent Publication No. 2000-332067 (paragraphs 0050 to 0051, FIG. 3)

上記半導体装置や電力変換装置においては、高温側の回路部分と低温側の回路部分間に熱伝導率の低い材料を配置したり、空間を設けたりすることで高温側の回路と低温側の回路とを熱的に分離すると記載されている。しかしながら、高温側の回路と低温側の回路間を電気接続する配線については何ら考慮されていない。配線材料の熱伝導率は、パッケージに用いられる封止材料の熱伝導率と較べてひと桁以上高いので、配線を通じた熱の流入を無視する限り、低温側の回路への熱流入をじゅうぶんに抑制することができず、結果として低温側の回路の誤動作や劣化を防止することができなかった。   In the above semiconductor device and power conversion device, a high temperature circuit and a low temperature circuit are provided by placing a material having low thermal conductivity between the high temperature circuit portion and the low temperature circuit portion or by providing a space. Are described as being thermally separated. However, no consideration is given to the wiring that electrically connects the high-temperature circuit and the low-temperature circuit. The thermal conductivity of the wiring material is more than an order of magnitude higher than the thermal conductivity of the sealing material used in the package, so as long as the heat inflow through the wiring is ignored, the heat inflow to the circuit on the low temperature side will be sufficient. As a result, malfunction and deterioration of the circuit on the low temperature side could not be prevented.

本発明は、上記のような課題を解決するためになされたもので、動作温度域が異なる回路を備えていても、高特性で信頼性の高い電力用半導体装置を得ることを目的としている。   The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a power semiconductor device having high characteristics and high reliability even when a circuit having a different operating temperature range is provided.

本発明の電力用半導体装置は、制御用電極を有する電力用半導体素子が搭載された電力回路と、前記電力用半導体素子の主電流を流す電極に接合された第１の配線部材と、前記電力用半導体素子の動作を制御するための制御用半導体素子が搭載され、前記電力回路と動作温度域が異なるとともに前記電力回路と離れて配置された制御回路と、前記電力用半導体素子の制御用電極と前記制御回路との電気接続に、前記第１の配線部材の断面積よりも小さな断面積を有する第２の配線部材を用いたことを特徴とする。   The power semiconductor device of the present invention includes a power circuit on which a power semiconductor element having a control electrode is mounted, a first wiring member joined to an electrode through which a main current of the power semiconductor element flows, and the power A control semiconductor element for controlling the operation of the power semiconductor element is mounted, and a control circuit having an operating temperature range different from that of the power circuit and arranged away from the power circuit, and a control electrode of the power semiconductor element A second wiring member having a cross-sectional area smaller than the cross-sectional area of the first wiring member is used for electrical connection with the control circuit.

本発明の半導体装置によれば、動作温度域の異なる回路を備えていても、高温側の回路から低温側の回路への熱流入を効果的に防止し、高特性で信頼性の高い電力用半導体装置を得ることができる。   According to the semiconductor device of the present invention, it is possible to effectively prevent heat from flowing from a high-temperature side circuit to a low-temperature side circuit even with a circuit having a different operating temperature range, and has high characteristics and high reliability. A semiconductor device can be obtained.

本発明の実施の形態１にかかる電力用半導体装置の構成を説明するための外観図である。It is an external view for demonstrating the structure of the power semiconductor device concerning Embodiment 1 of this invention. 本発明の実施の形態１にかかる電力用半導体装置の構成を説明するための断面図である。It is sectional drawing for demonstrating the structure of the semiconductor device for electric power concerning Embodiment 1 of this invention. 本発明の実施の形態１にかかる電力用半導体装置の構成を説明するための回路部分を示す平面図である。It is a top view which shows the circuit part for demonstrating the structure of the power semiconductor device concerning Embodiment 1 of this invention. 本発明の実施の形態１の変形例にかかる電力用半導体装置の構成を説明するための回路部分を示す平面図であるIt is a top view which shows the circuit part for demonstrating the structure of the semiconductor device for electric power concerning the modification of Embodiment 1 of this invention. 本発明の実施の形態２にかかる電力用半導体装置の構成を説明するための外観図である。It is an external view for demonstrating the structure of the power semiconductor device concerning Embodiment 2 of this invention. 本発明の実施の形態２にかかる電力用半導体装置の構成を説明するための断面図である。It is sectional drawing for demonstrating the structure of the semiconductor device for electric power concerning Embodiment 2 of this invention. 本発明の実施の形態３にかかる電力用半導体装置の構成を説明するための外観図である。It is an external view for demonstrating the structure of the power semiconductor device concerning Embodiment 3 of this invention. 本発明の実施の形態３にかかる電力用半導体装置の構成を説明するための断面図である。It is sectional drawing for demonstrating the structure of the semiconductor device for electric power concerning Embodiment 3 of this invention. 本発明の実施の形態４にかかる電力用半導体装置の構成を説明するための外観図である。It is an external view for demonstrating the structure of the power semiconductor device concerning Embodiment 4 of this invention. 本発明の実施の形態４にかかる電力用半導体装置の構成を説明するための断面図である。It is sectional drawing for demonstrating the structure of the power semiconductor device concerning Embodiment 4 of this invention.

実施の形態１．
図１〜図３は、本発明の実施の形態１にかかる電力用半導体装置を説明するためのもので、図１は電力用半導体装置の外観を示しており、図１（ａ）は裏面の平面図、図１（ｂ）は長手方向の側面のうち、図１（ａ）のｂ方向からの側面図、図１（ｃ）は長手方向の側面のうち、図１（ａ）のｃ方向からの側面図、図１（ｄ）は短手方向の側面のうち、図１（ａ）のｄ方向からの側面図である。図２は図１（ａ）におけるII−II線図における断面図、図３は電力用半導体装置内部のうち、主要部分である電力回路部分と制御回路部分の部材構成を示す図である。はじめに、電力用半導体装置および部材の構成について説明する。 Embodiment 1 FIG.
1 to 3 are diagrams for explaining a power semiconductor device according to a first embodiment of the present invention. FIG. 1 shows an appearance of the power semiconductor device, and FIG. 1B is a side view from the b direction in FIG. 1A among the side surfaces in the longitudinal direction, and FIG. 1C is the c direction in FIG. 1A among the side surfaces in the longitudinal direction. FIG. 1D is a side view from the d direction of FIG. 1A among the side surfaces in the short side direction. FIG. 2 is a cross-sectional view taken along the line II-II in FIG. 1A, and FIG. 3 is a diagram showing member configurations of a power circuit portion and a control circuit portion, which are main parts, in the power semiconductor device. First, the configuration of the power semiconductor device and members will be described.

電力用半導体装置１は、図１に示すように、長手方向の両側面にパワーリード端子１０１と制御リード端子２０１を配置したＤＩＰ（Dual Inline Package）タイプの電力用半導体装置である。そして、図２、図３に示すように、銅板を打ち抜いて形成されたリードフレーム７のうち、パワーリード５部分に、たとえば炭化珪素（ＳｉＣ）のようなワイドバンドギャップ半導体材料で構成された整流素子であるダイオード２とスイッチング素子であるＭＯＳＦＥＴ（Metal Oxide Semiconductor Field-Effect-Transistor）のトランジスタ３が搭載され、本電力用半導体装置での電力用の主電流の流れを制御する電力回路ＣＰが形成されている。また、リードフレーム７のうち、制御リード６部分に従来の半導体材料であるケイ素（Ｓｉ：シリコン）で構成された半導体素子の集積回路であるＩＣ４が搭載され、パワー半導体であるトランジスタ３の動作を制御するための制御回路ＣＣが形成されている。   As shown in FIG. 1, the power semiconductor device 1 is a DIP (Dual Inline Package) type power semiconductor device in which power lead terminals 101 and control lead terminals 201 are arranged on both side surfaces in the longitudinal direction. As shown in FIGS. 2 and 3, a rectification made of a wide band gap semiconductor material such as silicon carbide (SiC) is formed on the power lead 5 portion of the lead frame 7 formed by punching a copper plate. A diode 2 as an element and a transistor 3 of a MOSFET (Metal Oxide Semiconductor Field-Effect-Transistor) as a switching element are mounted to form a power circuit CP that controls the flow of the main current for power in this power semiconductor device. Has been. In addition, an IC 4 that is an integrated circuit of a semiconductor element made of silicon (Si: silicon), which is a conventional semiconductor material, is mounted on the control lead 6 portion of the lead frame 7 to operate the transistor 3 that is a power semiconductor. A control circuit CC for controlling is formed.

パワーリード５には、ダイオード２やトランジスタ３を搭載するための第１のダイパッド１００と外部回路との主電流経路を形成するための接続端子であるパワーリード端子１０１とが形成され、制御リード６には、ＩＣ４を搭載するための第２のダイパッド２００と電力回路ＣＰとの電極部材として機能する中継リード端子３０と外部回路との接続端子である制御リード端子２０１とが形成されている。６組のダイオード２とトランジスタ３が、パワーリード５上のダイパッド１００表面に、それぞれはんだ８０、はんだ８１で接合され、ＩＣ４は制御リード６のダイパッド２００表面に導電性接着剤８で固着されている。なお、制御リード６やパワーリード５は、実際には、各部材に対応して分割されているが、図２（以降の各実施の形態の説明に用いる断面図でも同様）では、簡略化のために、つながった状態で描いている。   The power lead 5 is formed with a power lead terminal 101 which is a connection terminal for forming a main current path between the first die pad 100 for mounting the diode 2 and the transistor 3 and an external circuit, and the control lead 6 The second lead pad 200 for mounting the IC 4 and the relay lead terminal 30 that functions as an electrode member of the power circuit CP and the control lead terminal 201 that is a connection terminal for the external circuit are formed. Six sets of diodes 2 and transistors 3 are bonded to the surface of the die pad 100 on the power lead 5 with solder 80 and solder 81, respectively, and the IC 4 is fixed to the surface of the die pad 200 of the control lead 6 with the conductive adhesive 8. . Note that the control lead 6 and the power lead 5 are actually divided corresponding to the respective members, but in FIG. 2 (the same applies to the cross-sectional views used in the description of the following embodiments), it is simplified. For this reason, I draw in a connected state.

電力回路ＣＰ部のダイオード２、トランジスタ３は、上述したようにワイドバンドギャップ半導体材料であるＳｉＣを構成成分としており、実動作時に高温（２００〜３００℃）で使用するため、はんだ８０、８１には高融点のものが求められる。さらに、環境に配慮すると、Ｐｂを含まない、いわゆる鉛フリーのはんだが好ましく、例えば、Ｓｎ−Ｓｂ系、Ａｕ−Ｓｎ系が好ましい。   As described above, the diode 2 and the transistor 3 in the power circuit CP section include SiC, which is a wide band gap semiconductor material, and are used at a high temperature (200 to 300 ° C.) during actual operation. Is required to have a high melting point. Furthermore, in consideration of the environment, so-called lead-free solder that does not contain Pb is preferable, for example, Sn—Sb system and Au—Sn system are preferable.

なお、ダイオード２やトランジスタ３と各ダイパッド１００との接続は、はんだに限るものではなく、焼結性銀ペーストなどの導電性の接着剤など、導電性に優れる材料であればよいが、モールド時や実動作時の温度を考えると使用可能温度が２００℃以上で、かつある程度の接着力を有することが好ましい。   The connection between the diode 2 or the transistor 3 and each die pad 100 is not limited to solder, and any material having excellent conductivity such as a conductive adhesive such as a sinterable silver paste may be used. Considering the temperature during actual operation, it is preferable that the usable temperature is 200 ° C. or higher and has a certain degree of adhesive strength.

トランジスタ３の上部電極のうち、大電流となる電力用の主電流を流す電極（例えばソース電極）とダイオード２とは、アルミニウムのワイヤで構成される配線部材１０で電気的に接続され、ダイオード２とパワーリード端子１０１もアルミニウムのワイヤで構成される配線部材９で電気的に接続される。なお、配線部材９、１０は一体的に構成されていてもよい。また、配線部材９、１０には、アルミニウムにかぎらず、アルミニウムを主成分とする合金や、他の金属を用いても構わない。   Of the upper electrode of the transistor 3, an electrode (for example, a source electrode) through which a main current for power that becomes a large current flows and the diode 2 are electrically connected by a wiring member 10 made of an aluminum wire. The power lead terminal 101 is also electrically connected by a wiring member 9 made of an aluminum wire. The wiring members 9 and 10 may be integrally formed. In addition, the wiring members 9 and 10 may be made of an alloy containing aluminum as a main component or other metals instead of aluminum.

一方、制御回路ＣＣ部のＩＣ４と制御リード端子２０１および中継リード端子３０とは、金で構成される金属細線１２で電気的に接続される。なお、金属細線１２は、制御用に電圧を印加するためのものであり、大きな電流を流す必要がなく、集積回路の狭い電極との接続が要求されるので、配線部材９、１０よりも線径の細いワイヤが好ましい。ＩＣ４との接合のしやすさから、材料としては金が好ましいが、これらの仕様を満たすのであれば、金を主成分とする合金や、他の金属、例えば銅やアルミニウム、あるいはその合金などを用いても構わない。   On the other hand, the IC 4 of the control circuit CC part, the control lead terminal 201, and the relay lead terminal 30 are electrically connected by a thin metal wire 12 made of gold. The fine metal wire 12 is for applying a voltage for control, and does not need to pass a large current and requires connection with a narrow electrode of the integrated circuit. A thin wire is preferred. Gold is preferable as a material because of its ease of joining with IC4. However, if these specifications are satisfied, an alloy containing gold as a main component, other metals such as copper, aluminum, or alloys thereof may be used. You may use.

つぎに、制御回路ＣＣと電力回路ＣＰとの電気接続について説明する。
図２に示すように、制御回路ＣＣの一部として形成された中継リード端子３０と、トランジスタ３などのパワーチップとが物理的に隔てられている場合、電流を流す必要のないトランジスタ３のゲート電極と中継リード端子３０とを接続する配線材料にも、作業性の観点からパワーチップに接続する配線部材９や１０と同じ配線部材を用いる。ここで、電力用半導体装置１では大電流となる主電流を流すために、配線部材９や１０には断面積が大きなワイヤやリボン等を用いる。このためトランジスタ３と中継リード端子３０とを接続する配線材料の断面積も大きくなってしまう。 Next, electrical connection between the control circuit CC and the power circuit CP will be described.
As shown in FIG. 2, when the relay lead terminal 30 formed as a part of the control circuit CC and the power chip such as the transistor 3 are physically separated, the gate of the transistor 3 that does not need to flow current is used. As the wiring material for connecting the electrode and the relay lead terminal 30, the same wiring member as the wiring members 9 and 10 connected to the power chip is used from the viewpoint of workability. Here, in the power semiconductor device 1, a wire, a ribbon, or the like having a large cross-sectional area is used for the wiring members 9 and 10 in order to flow a main current that is a large current. For this reason, the cross-sectional area of the wiring material that connects the transistor 3 and the relay lead terminal 30 also increases.

しかしながら、トランジスタ３（のゲート電極：以下省略）と中継リード端子３０とを接続する配線材料の断面積が大きくなると、トランジスタ３と中継リード端子３０間の熱抵抗（断面積に反比例）も小さくなり、トランジスタ３からの熱が容易に中継リード端子３０、およびＩＣ４に伝わってしまう。そこで、本発明の実施の形態１にかかる電力用半導体装置１では、トランジスタ３と中継リード端子３０とを接続する配線材料に、配線材料９や１０よりも断面積の小さな（線径の細い）金属細線１１を用いることとした。   However, when the cross-sectional area of the wiring material connecting the transistor 3 (the gate electrode thereof: not shown) and the relay lead terminal 30 is increased, the thermal resistance (in inverse proportion to the cross-sectional area) between the transistor 3 and the relay lead terminal 30 is also reduced. The heat from the transistor 3 is easily transferred to the relay lead terminal 30 and the IC 4. Therefore, in the power semiconductor device 1 according to the first embodiment of the present invention, the wiring material connecting the transistor 3 and the relay lead terminal 30 has a smaller cross-sectional area (thin wire diameter) than the wiring materials 9 and 10. The metal fine wire 11 was used.

具体的には、金属細線１１には、制御回路ＣＣ部のＩＣ４と制御リード端子２０１とを電気的に接続する金で構成される金属細線１２と同じワイヤを用いた。熱伝導のしやすさは断面積（あるいは線径の二乗）に比例するため、線径を小さくした金属細線１１を使用した時と較べて格段に小さくなる。そのため、高温になるパワーリード５やトランジスタ３からＩＣ４への熱の流入を抑制することができ、ＩＣ４の誤動作を防ぐことができる。   Specifically, the same wire as the metal thin wire 12 made of gold for electrically connecting the IC 4 of the control circuit CC unit and the control lead terminal 201 was used for the metal thin wire 11. Since the ease of heat conduction is proportional to the cross-sectional area (or the square of the wire diameter), it is much smaller than when using the thin metal wire 11 with a reduced wire diameter. Therefore, inflow of heat from the power lead 5 or the transistor 3 that becomes a high temperature to the IC 4 can be suppressed, and malfunction of the IC 4 can be prevented.

制御リード６の裏面のうち、制御回路ＣＣ部にあたる部分には、無機物フィラーを含有した放熱性と絶縁性に優れた絶縁膜２０が接着されており、絶縁膜２０を介してアルミニウム製のヒートシンク２１が接着されている。   An insulating film 20 containing an inorganic filler and excellent in heat dissipation and insulation is bonded to a portion corresponding to the control circuit CC portion of the back surface of the control lead 6, and an aluminum heat sink 21 is interposed via the insulating film 20. Is glued.

そして、上記部材のうち、電力用リード端子１０１の一部、制御リード端子２０１の一部、ヒートシンク２１の絶縁膜２０との接着面の反対側を除いた部分を封止樹脂１３で封止することにより、パッケージング（成型）されている。これにより、電力用半導体装置１は、電力回路ＣＰとしては、いわゆる６ ｉｎ １で、制御回路ＣＣにＩＣを内蔵したトランスファーモールド型のＩＰＭ（Intelligent Power Module）となる。なお、絶縁膜２０の熱伝導率は封止樹脂１３の熱伝導率よりも高い。   Of the above-described members, a part of the power lead terminal 101, a part of the control lead terminal 201, and a part excluding the side opposite to the adhesive surface of the heat sink 21 with the insulating film 20 are sealed with the sealing resin 13. Therefore, it is packaged (molded). As a result, the power semiconductor device 1 is a so-called 6 in 1 power circuit CP, which is a transfer mold type IPM (Intelligent Power Module) in which an IC is incorporated in the control circuit CC. The thermal conductivity of the insulating film 20 is higher than the thermal conductivity of the sealing resin 13.

また、図１に戻り、電力用半導体装置１のヒートシンク２１の長手方向両端あるいはその近傍の封止樹脂部１３には、図示しない放熱フィンに取り付けるための取り付け穴１４を設けている。電力用半導体装置１を実使用する場合、必要に応じて電力用半導体装置１のヒートシンク２１に、外部の放熱フィンなどと熱伝導性グリスを介してネジ固定するためである。取り付け穴１４をヒートシンク２１両端あるいはその近傍に設置することにより、ヒートシンク２１と外部の放熱フィンを密着させた状態で確実に固定できるため、優れた放熱性を確保できる。   Returning to FIG. 1, mounting holes 14 for mounting to heat radiating fins (not shown) are provided in the sealing resin portions 13 at or near the longitudinal ends of the heat sink 21 of the power semiconductor device 1. This is because when the power semiconductor device 1 is actually used, screws are fixed to the heat sink 21 of the power semiconductor device 1 via external heat radiation fins or the like and heat conductive grease as necessary. By installing the attachment holes 14 at both ends of the heat sink 21 or in the vicinity thereof, the heat sink 21 can be reliably fixed in a state where the heat radiation fins are in close contact with each other, so that excellent heat dissipation can be secured.

次に電力用半導体装置１の製造方法について説明する。
電力用半導体装置１の製造プロセスにおいて、あらかじめダイシングされたＩＣ４は、図２、３に示すように、リードフレーム７の制御リード６部分に形成された第２のダイパッド２００に裏面をそれぞれ導電性接着剤８で固着される。次にダイオード２と、トランジスタ３は、それぞれはんだ８０、８１（本実施の形態では同じもの）で、リードフレーム７のパワーリード５部分に形成された第１のダイパッド１００にダイボンディングされる。 Next, a method for manufacturing the power semiconductor device 1 will be described.
In the manufacturing process of the power semiconductor device 1, the IC 4 diced in advance is electrically bonded to the back surface of the second die pad 200 formed on the control lead 6 portion of the lead frame 7 as shown in FIGS. It is fixed with the agent 8. Next, the diode 2 and the transistor 3 are die-bonded to the first die pad 100 formed on the power lead 5 portion of the lead frame 7 with solders 80 and 81 (the same in this embodiment).

はじめに、電力回路ＣＰ側のトランジスタ３とダイオード２とをアルミワイヤの配線部材１０を用いてワイヤボンディングにより電気的に接続し、ダイオード２とパワーリード端子１０１とをアルミワイヤの配線部材９を用いてワイヤボンディングにより電気的に接続する。つづいて、制御回路ＣＣ側のＩＣ４と制御リード端子２０１および中継リード端子３０とを、金からなる金属細線１２を用いてワイヤボンディングにより電気的に接続する。さらに、通常の半導体装置の製造においては、接続距離が短い場合に用いられる金属細線１２と同じ金からなる金属細線１１を用いて、トランジスタ３と中継リード端子３０間をワイヤボンディングにより電気的に接続する。   First, the transistor 3 and the diode 2 on the power circuit CP side are electrically connected by wire bonding using an aluminum wire wiring member 10, and the diode 2 and the power lead terminal 101 are connected using an aluminum wire wiring member 9. Electrical connection is made by wire bonding. Subsequently, the IC 4 on the control circuit CC side, the control lead terminal 201, and the relay lead terminal 30 are electrically connected by wire bonding using the fine metal wire 12 made of gold. Further, in the manufacture of a normal semiconductor device, the metal thin wire 11 made of the same gold as the metal thin wire 12 used when the connection distance is short is used to electrically connect the transistor 3 and the relay lead terminal 30 by wire bonding. To do.

その後、トランスファーモールド技術を用いて封止樹脂１３により、上記部材をまとめて封止する。トランスファーモールドの際、絶縁膜２０を介してヒートシンク２１を制御リード６に同時に接着する。このときパワーリード端子１０１、制御リード端子２０１、ヒートシンク２１の接着面の反対側は封止樹脂１３から外部に露出している。その後封止樹脂から露出したパワーリード端子１０１、制御リード端子２０１を所定のリード形状になるようにリードフォーミングを行って電力用半導体装置１が完成する。なお、リードフレーム７の表面には、必要に応じメッキ等の技術により表面加工がなされる。   Thereafter, the members are sealed together with the sealing resin 13 using a transfer molding technique. At the time of transfer molding, the heat sink 21 is simultaneously bonded to the control lead 6 through the insulating film 20. At this time, the power lead terminal 101, the control lead terminal 201, and the opposite side of the heat sink 21 are exposed to the outside from the sealing resin 13. Thereafter, the power lead terminal 101 and the control lead terminal 201 exposed from the sealing resin are subjected to lead forming so as to have a predetermined lead shape, whereby the power semiconductor device 1 is completed. The surface of the lead frame 7 is subjected to surface processing by a technique such as plating as necessary.

つぎに、動作について説明する。
炭化ケイ素などのワイドバンドギャップ半導体材料で構成されたダイオード２とトランジスタ３は、その性能を最大限に発揮するため、現状のシリコンで構成された半導体素子の動作温度域（１００℃前後）よりも高い、例えば２００℃以上の高温で動作させる場合が生じる。従来のように、電力回路ＣＰと制御回路ＣＣとを封止樹脂よりも熱伝導率の低い材料または空隙を介して離間させたり、制御回路ＣＣを電力回路ＣＰと別系統で冷却させたりするだけでは、ダイオード２やトランジスタ３が高温動作した場合、トランジスタ３の動作を制御するためにトランジスタ３の制御電極であるゲート電極と制御回路ＣＣ間を電気接続する配線部材を介して、トランジスタ３の熱がＩＣ４に流入してしまう。そのため、ＩＣ４の温度が動作温度域を超えて上昇し、ＩＣ４の誤動作や応力破壊といったいわゆる熱によるダメージが生じる可能性があった。 Next, the operation will be described.
The diode 2 and the transistor 3 made of a wide band gap semiconductor material such as silicon carbide exhibit the performance to the maximum, so that the operating temperature range (around 100 ° C.) of the current semiconductor device made of silicon is increased. In some cases, the operation is performed at a high temperature, for example, 200 ° C. or higher. As in the past, the power circuit CP and the control circuit CC are separated from each other through a material or gap having a lower thermal conductivity than the sealing resin, or the control circuit CC is cooled by a separate system from the power circuit CP. Then, when the diode 2 or the transistor 3 operates at a high temperature, in order to control the operation of the transistor 3, the heat of the transistor 3 is connected via a wiring member that electrically connects the gate electrode, which is the control electrode of the transistor 3, and the control circuit CC. Will flow into IC4. Therefore, the temperature of the IC 4 rises beyond the operating temperature range, and there is a possibility that so-called heat damage such as malfunction or stress breakdown of the IC 4 may occur.

しかし、本実施の形態１にかかる電力用半導体装置１では、トランジスタ３と制御回路ＣＣの中継リード端子３０間を電気接続する配線部材に、電力回路ＣＰ内の電力用の主電流用の配線材料９や１０よりも断面積の小さな金属細線１１を用いることとしたので、配線部材１１を介してトランジスタ３の熱がＩＣ４に流入することがない。そのため、図２に示すように制御用フレーム６の制御回路ＣＣ部分の裏面に装着したヒートシンク２１により、各ＩＣ４を載置しているダイパッド２００を直接冷却することにより、ＩＣ４の温度上昇を小さく押さえることができる。このため、ＩＣ４の高温化による誤動作や応力破壊を生じることなく長期信頼性を確保することが可能になる。   However, in the power semiconductor device 1 according to the first embodiment, the main current wiring material for power in the power circuit CP is used as the wiring member that electrically connects the transistor 3 and the relay lead terminal 30 of the control circuit CC. Since the thin metal wire 11 having a smaller cross-sectional area than 9 and 10 is used, the heat of the transistor 3 does not flow into the IC 4 through the wiring member 11. Therefore, as shown in FIG. 2, by directly cooling the die pad 200 on which each IC 4 is mounted by the heat sink 21 mounted on the back surface of the control circuit CC portion of the control frame 6, the temperature rise of the IC 4 is suppressed to a small level. be able to. For this reason, it is possible to ensure long-term reliability without causing malfunction or stress breakdown due to the high temperature of the IC 4.

また、電力回路ＣＰを構成する電力用半導体素子には、ワイドバンドギャップ半導体材料であるＳｉＣを用いており、高温動作が可能であり、シリコン半導体素子よりもロスを大きく減らすことができる。つまり、シリコン素子で電力回路を形成した時よりも高温でしかも発熱量が小さくなるので、例えば、電力回路ＣＰ部分を冷却するヒートシンクを設けずに、放熱性能を下げることが可能となる。このため本実施の形態１においては、ヒートシンクは制御回路ＣＣが形成されている制御リード６に対してのみ載置している。   Further, SiC, which is a wide bandgap semiconductor material, is used for the power semiconductor element that constitutes the power circuit CP, and high-temperature operation is possible, and loss can be greatly reduced as compared with the silicon semiconductor element. That is, since the heat generation amount is lower than that when the power circuit is formed of silicon elements, the heat dissipation performance can be lowered without providing a heat sink for cooling the power circuit CP portion, for example. For this reason, in the first embodiment, the heat sink is placed only on the control lead 6 on which the control circuit CC is formed.

なお、スイッチング素子であるトランジスタ３には、ＭＯＳＦＥＴを使用した場合を示したが、ＩＧＢＴ（Insulated Gate Bipolar Transistor）を使用してもよい。また、ワイドバンドギャップ半導体素子材料として、炭化珪素以外に窒化ガリウム（ＧａＮ）、またはダイヤモンドといった材料を用いてもよい。さらに、ＭＯＳＦＥＴのみで、ダイオードのような整流素子が必要ない場合なども含め、電力回路ＣＰとしての動作温度域が制御回路ＣＣの動作温度域よりも高くなるようであれば、半導体素子の個数や組み合わせに制約はない。なぜならば、本発明は、高温動作のＳｉＣ半導体回路と、ＳｉＣよりも動作温度域が低いＳｉ半導体回路が一つのパッケージ内にあるときに低温側の回路への配線を介した熱の流入を抑制し、Ｓｉ半導体回路の高温による誤動作等の故障から防護するためのものである。つまり、一つのパッケージ内に収納され、電力を扱う回路を含む複数の回路のうち、一方の回路が他の回路と動作温度域が異なる場合に、一方の回路と他方の回路を電気接続する配線に、電力を扱う回路に用いる配線よりも細い配線を用いるように構成すればよい。これにより、高温側の回路から低温側の回路への熱の流入を抑制し、低温側の回路の故障を防止することができる。   In addition, although the case where MOSFET was used for the transistor 3 which is a switching element was shown, you may use IGBT (Insulated Gate Bipolar Transistor). In addition to silicon carbide, a material such as gallium nitride (GaN) or diamond may be used as the wide band gap semiconductor element material. Furthermore, if the operating temperature range of the power circuit CP is higher than the operating temperature range of the control circuit CC, including the case where only the MOSFET does not require a rectifying element such as a diode, the number of semiconductor elements and There are no restrictions on the combination. This is because the present invention suppresses the inflow of heat through the wiring to the circuit on the low temperature side when the SiC semiconductor circuit operating at a high temperature and the Si semiconductor circuit having a lower operating temperature range than SiC are in one package. In order to protect against failures such as malfunctions due to high temperature of the Si semiconductor circuit. In other words, wiring that electrically connects one circuit to the other when one circuit is different from the other in the operating temperature range among multiple circuits that are housed in one package and that handle power. In addition, it may be configured to use a wiring that is thinner than a wiring used for a circuit that handles power. Thereby, the inflow of heat from the high temperature side circuit to the low temperature side circuit can be suppressed, and failure of the low temperature side circuit can be prevented.

実施の形態１の変形例．
図４は、本変形例に係る電力用半導体装置の主要回路部分を示す平面図で、実施の形態１の図３に対応するものである。なお、本変形例においては、中継リード端子部分の形状を変形させ、細線１１から中継リード端子を介したＩＣ４への熱の流入をさらに抑制するようにしたものであり、他の構成は実施の形態１と同様であるので説明を省略する。 Modification of the first embodiment.
FIG. 4 is a plan view showing the main circuit portion of the power semiconductor device according to this modification, and corresponds to FIG. 3 of the first embodiment. In this modification, the shape of the relay lead terminal portion is modified to further suppress the inflow of heat from the thin wire 11 to the IC 4 via the relay lead terminal. Since it is the same as that of form 1, description is abbreviate | omitted.

図において、金属細線１１と、ＩＣ４からの金属細線１２が接続され、トランジスタ３とＩＣ４とを電気接続するための中継部となる中継リード端子３０Ｖにおいて、金属細線１１の接合部Ｊ１１と金属細線１２の接合部Ｊ１２との間に接合部Ｊ１１と接合部Ｊ１２とを結ぶ線分を分断するように貫通孔３１を設けている。貫通孔３１を設けて、中継リード端子３０Ｖにおける接合部Ｊ１１と接合部Ｊ１２間の断面積を減らすとともに、経路を遠回りさせる（迂回させる）ことによって、接合部Ｊ１１と接合部Ｊ１２間の伝熱抵抗が高くなる（伝熱係数が低下する）ので、金属細線１１から金属細線１２を経由してＩＣ４に流入する熱をさらに抑制することができる。そして中継リード端子３０のうち、貫通孔３１が設けられ、断面積が小さくなった狭部３２の熱は放熱性に優れた絶縁膜２０を通じてヒートシンク２１から放熱される。結果としてＩＣ４の温度上昇が抑えられる。このため、電力回路ＣＰ部分の動作温度をさらに高温にした場合でもＩＣ４を安定動作させることができる。 In the figure, the thin metal wires 11, is connected to the metal thin wire 12 from IC 4, the relay lead terminals 30 V that is a relay unit for electrically connecting the transistor 3 and IC 4, the junction J 11 and the metal of the metal thin wire 11 the through-hole 31 so as to divide the line segment connecting the junction J 11 and junction J 12 is provided between the joint portion J 12 of thin wire 12. The through hole 31 is provided, along with reducing the cross-sectional area between the joint portion J 12 and junction J 11 in the relay lead terminals 30 V, by roundabout (diverting) the path junction J 12 and junction J 11 Since the heat transfer resistance increases in the meantime (the heat transfer coefficient decreases), heat flowing from the fine metal wire 11 to the IC 4 via the fine metal wire 12 can be further suppressed. Of the relay lead terminal 30, the through hole 31 is provided, and the heat of the narrow portion 32 having a reduced cross-sectional area is radiated from the heat sink 21 through the insulating film 20 having excellent heat dissipation. As a result, the temperature rise of IC4 is suppressed. For this reason, even when the operating temperature of the power circuit CP is further increased, the IC 4 can be stably operated.

以上のように、本発明の実施の形態１にかかる電力用半導体装置１によれば、制御用電極（３の場合はゲート電極）を有する電力用半導体素子２、３が搭載された電力回路ＣＰと、電力用半導体素子２、３の主電流を流す電極（３の場合はソース電極）に接合された第１の配線部材である配線部材９、１０と、電力用半導体素子２、３の動作を制御するための制御用半導体素子であるＩＣ４が搭載され、電力回路ＣＰと動作温度域が異なるとともに電力回路ＣＰと離れて配置された制御回路ＣＣと、電力用半導体素子３の制御用電極（ゲート電極）と制御回路ＣＣとの電気接続に、第１の配線部材９、１０の断面積よりも小さな断面積を有する第２の配線部材である金属細線１１を用いるように構成したので、動作温度域の異なる電力回路ＣＰと制御回路ＣＣとを備えていても、高温側の回路である電力回路ＣＰから低温側の回路である制御回路ＣＣへの熱流入を効果的に防止し、高特性で信頼性の高い電力用半導体装置を得ることができる。   As described above, according to the power semiconductor device 1 according to the first embodiment of the present invention, the power circuit CP on which the power semiconductor elements 2 and 3 having the control electrode (the gate electrode in the case of 3) are mounted. And the operation of the power semiconductor elements 2 and 3, and the wiring members 9 and 10, which are first wiring members joined to the electrodes (source electrodes in the case of 3) through which the main current of the power semiconductor elements 2 and 3 flows. IC 4 which is a control semiconductor element for controlling the power circuit is mounted, the control circuit CC is different from the power circuit CP in the operating temperature range and is arranged apart from the power circuit CP, and the control electrode of the power semiconductor element 3 ( Since the metal thin wire 11 which is the second wiring member having a smaller cross-sectional area than the first wiring members 9 and 10 is used for the electrical connection between the gate electrode) and the control circuit CC. Power circuit C with different temperature range And the control circuit CC, it effectively prevents heat from flowing from the power circuit CP, which is a high-temperature circuit, to the control circuit CC, which is a low-temperature circuit, and has high characteristics and high reliability. A semiconductor device can be obtained.

とくに、電力用半導体素子３の制御用電極（ゲート電極）と制御回路ＣＣとの電気接続のために、トランジスタ３の制御用電極（ゲート電極）に電気接続された第２の配線部材１１の一端が接合されるとともに、制御用半導体素子ＩＣ４の電極と電気接続された第３の配線部材１２の一端が接合される、中継リード端子３０、３０Ｖが制御回路内ＣＣに形成され、中継リード端子３０Ｖは、第２の配線部材１１との接合部Ｊ１１と第３の配線部材１２との接合部Ｊ１２とを結ぶ線分を分断するように配置された貫通孔３１を迂回するように形成されているようにしたので、中継リード端子３０Ｖにおける接合部Ｊ１１と接合部Ｊ１２間の断面積を減らすとともに、経路を遠回りさせることによって、接合部Ｊ１１と接合部Ｊ１２間の伝熱抵抗が高くなるので、第２の配線部材１１から中継リード端子３０Ｖを経由して制御回路ＣＣおよび制御回路ＣＣ内のＩＣ４に流入する熱をさらに抑制することができる。 In particular, one end of the second wiring member 11 electrically connected to the control electrode (gate electrode) of the transistor 3 for electrical connection between the control electrode (gate electrode) of the power semiconductor element 3 and the control circuit CC. There together are joined, one end of the third wiring member 12 is bonded, which is the electrode and the electrical connection of the control semiconductor device IC 4, the relay lead terminals 30, 30 V is formed in the control circuit CC, the relay lead terminal 30 V so as to bypass the through hole 31 arranged so as to divide the line segment connecting the junction J 12 between the joint portion J 11 and the third wiring member 12 and the second wiring member 11 since as has been formed, along with reducing the cross-sectional area between the joint portion J 12 and junction J 11 in the relay lead terminals 30 V, by circuitous path, between the joint portion J 11 and junction J 12 Biography The resistance is high, it is possible to further suppress the heat that flows from the second wiring member 11 to IC4 in the relay lead terminal 30 the control circuit via the V CC and the control circuit CC.

また、第２の配線部材１１には、第３の配線部材１２と同じ材料を用いるようにしたので、制御回路ＣＣでのボンディング工程において第２の配線部材１１を同時に形成でき、工程が簡略化できる。   Further, since the same material as that of the third wiring member 12 is used for the second wiring member 11, the second wiring member 11 can be simultaneously formed in the bonding process in the control circuit CC, and the process is simplified. it can.

さらに、電力用半導体素子２、３がワイドバンドギャップ半導体材料により形成されていれば、電力回路ＣＰの動作温度域が１５０〜３００℃になり、制御回路ＣＣの温度域（１００℃前後）よりも格段に高くなるので、本発明の効果が如実にあらわれる。   Furthermore, if the power semiconductor elements 2 and 3 are formed of a wide band gap semiconductor material, the operating temperature range of the power circuit CP is 150 to 300 ° C., which is higher than the temperature range (around 100 ° C.) of the control circuit CC. Since it becomes remarkably high, the effect of the present invention appears clearly.

とくに、制御用半導体素子としては、シリコン半導体材料で構成された集積回路であるＩＣ４内に形成されているようにしたので、制御回路ＣＣを簡単に形成できる。このとき、第２の配線部材１１には、第３の配線部材１２と同じ材料を用いるようすれば、集積回路用の細い金ボンディングワイヤを第２の配線部材１１に使用することになり、電力回路ＣＰから制御回路ＣＣへの熱流入をいっそう効果的に防止することができる。   Particularly, since the control semiconductor element is formed in the IC 4 which is an integrated circuit made of a silicon semiconductor material, the control circuit CC can be easily formed. At this time, if the same material as that of the third wiring member 12 is used for the second wiring member 11, a thin gold bonding wire for an integrated circuit is used for the second wiring member 11. Heat inflow from the circuit CP to the control circuit CC can be more effectively prevented.

また、制御回路ＣＣに熱的に接続されるとともに、電力回路ＣＰと熱的に絶縁されたヒートシンク２１を備えるようにしたので、制御回路ＣＣの温度を最適に制御することができる。   In addition, since the heat sink 21 is provided which is thermally connected to the control circuit CC and thermally insulated from the power circuit CP, the temperature of the control circuit CC can be optimally controlled.

実施の形態２．
本実施の形態２にかかる電力用半導体装置においては、実施の形態１にかかる電力用半導体装置に対し、パッケージ部分（樹脂封止体１３）の形状を異なるようにしたものである。電力用半導体装置内に封止された部材については実施の形態１にかかる電力用半導体装置と同様であるので、説明を省略する。図５と図６は、本実施の形態２にかかる電力用半導体装置の構成を説明するためのもので、図５は電力用半導体装置の外観のうち裏面部分を示す平面図、図６は、図５におけるVI−VI線における切断面を示す断面図である。 Embodiment 2. FIG.
In the power semiconductor device according to the second embodiment, the shape of the package part (resin sealing body 13) is different from that of the power semiconductor device according to the first embodiment. The members sealed in the power semiconductor device are the same as those in the power semiconductor device according to the first embodiment, and thus the description thereof is omitted. 5 and 6 are diagrams for explaining the configuration of the power semiconductor device according to the second embodiment. FIG. 5 is a plan view showing a back surface portion of the appearance of the power semiconductor device. FIG. It is sectional drawing which shows the cut surface in the VI-VI line in FIG.

図において、本実施の形態２にかかる電力用半導体装置２００１では、電力用半導体装置２００１の裏面ＲＳ側に溝４０が形成されている。溝４０は、裏面ＲＳからパワーリード５と制御リード６の離間部分Ｇ５６あたりまで掘り下げたもので、裏面ＲＳ側における長手方向の一端Ｅｅから他端Ｅｄ近傍にかけて形成され、電力回路ＣＰ領域のリードフレーム５から裏面ＲＳにかけての部分と制御回路ＣＣ領域のリードフレーム６から裏面ＲＳにかけての部分とを空間により隔てている。それ以外の部分は実施の形態1と同じである
。 In the figure, in the power semiconductor device 2001 according to the second embodiment, a groove 40 is formed on the back surface RS side of the power semiconductor device 2001. The groove 40 is dug down from the rear surface RS to the space G 56 between the power lead 5 and the control lead 6, and is formed from one end Ee in the longitudinal direction on the rear surface RS side to the vicinity of the other end Ed. A portion from the frame 5 to the back surface RS and a portion from the lead frame 6 to the back surface RS in the control circuit CC area are separated by a space. The other parts are the same as those in the first embodiment.

このように、溝４０により、電力回路ＣＰの裏面ＲＳ側部分と、制御回路ＣＣの裏面ＲＳ側部分とが熱的に絶縁されたので、封止樹脂１３の裏面ＲＳ側部分を介しての電力回路ＣＰ側から制御回路ＣＣ側への熱の流入を防止し、電力回路ＣＰを動作温度の限界近くまで高温にして動作させた場合でも、熱が封止樹脂１３を伝導してヒートシンク２１や制御回路ＣＣに流入することはなく、安定してＩＣ４を動作させることができる。このため、電力回路ＣＰの動作温度をよりさらに高温にした場合でもＩＣ４を安定動作させることができる。   As described above, since the back surface RS side portion of the power circuit CP and the back surface RS side portion of the control circuit CC are thermally insulated by the groove 40, the power through the back surface RS side portion of the sealing resin 13 is increased. Even when heat flow from the circuit CP side to the control circuit CC side is prevented and the power circuit CP is operated at a high temperature close to the operating temperature limit, heat is conducted through the sealing resin 13 to control the heat sink 21 and the control. The IC 4 can be stably operated without flowing into the circuit CC. For this reason, even when the operating temperature of the power circuit CP is further increased, the IC 4 can be stably operated.

なお、溝は、電力用半導体装置２００１の表面側から形成することも可能であるが、細線１１はボンディングに伴って制御回路ＣＣや電力回路ＣＰの回路面より表側に向かって膨らむことになる。そのため、表側から溝を形成すると、裏側のときと比較して隙間Ｇ５６近づくまで掘り下げることができず、熱的な絶縁が不十分となる。したがって、細線１１が接合された面の反対側の面から掘り下げるのがよい。 Although the groove can be formed from the surface side of the power semiconductor device 2001, the thin wire 11 swells from the circuit surface of the control circuit CC or the power circuit CP toward the front side with bonding. Therefore, by forming the groove from the front side, it is impossible to drill down closer gap G 56 as compared to the case of the back side, the thermal insulation becomes insufficient. Therefore, it is preferable to dig up from the surface opposite to the surface to which the fine wires 11 are joined.

以上のように、本実施の形態２にかかる電力用半導体装置２００１によれば、制御回路ＣＣと電力回路ＣＰは、それぞれの回路形成面が当該回路形成面に垂直な方向から見て離れて配置されているとともに、制御回路ＣＣと電力回路ＣＰとをまとめて封止する樹脂封止体１３を備え、樹脂封止体１３には、第２の配線部材１１が接合された面の反対側の面である電力用半導体装置２００１の裏面ＲＳから制御回路ＣＣと電力回路ＣＰとの離間部分Ｇ５６にむけて掘り下げられた溝４０が形成されているように構成したので、封止樹脂１３の裏面ＲＳ側部分を介しての電力回路ＣＰ側から制御回路ＣＣ側への熱の流入を防止し、電力回路ＣＰを動作温度の限界近くまで高温にして動作させた場合でも、熱が封止樹脂１３を伝導してヒートシンク２１や制御回路ＣＣに流入することはなく、安定してＩＣ４を動作させることができる。 As described above, according to the power semiconductor device 2001 according to the second embodiment, the control circuit CC and the power circuit CP are arranged with their circuit formation surfaces separated from each other when viewed from the direction perpendicular to the circuit formation surface. And includes a resin sealing body 13 that collectively seals the control circuit CC and the power circuit CP. The resin sealing body 13 has a side opposite to the surface to which the second wiring member 11 is bonded. since it is configured as a groove 40 which is dug down toward the separated portions G 56 from the rear surface RS of the power semiconductor device 2001 is a surface of the control circuit CC and the power circuit CP is formed, the back surface of the sealing resin 13 Even when the power circuit CP is prevented from flowing from the power circuit CP side to the control circuit CC side through the RS side portion and the power circuit CP is operated at a high temperature close to the limit of the operating temperature, Conducting heat sink 21 and the control circuit CC do not flow, and the IC 4 can be operated stably.

実施の形態３．
本実施の形態３にかかる電力用半導体装置においては、実施の形態１にかかる電力用半導体装置に対し、電力回路の裏面にもヒートシンクを設けたものである。その他の構成については、実施の形態１にかかる電力用半導体装置と同様であるので、説明を省略する。図７と図８は、本実施の形態３にかかる電力用半導体装置の構成を説明するためのもので、図７は電力用半導体装置の外観のうち裏面部分を示す平面図、図８は、図７におけるVIII−VIII線における切断面を示す断面図である。 Embodiment 3 FIG.
In the power semiconductor device according to the third embodiment, a heat sink is provided on the back surface of the power circuit as compared with the power semiconductor device according to the first embodiment. Since other configurations are the same as those of the power semiconductor device according to the first embodiment, description thereof is omitted. 7 and 8 are diagrams for explaining the configuration of the power semiconductor device according to the third embodiment. FIG. 7 is a plan view showing a back surface portion of the appearance of the power semiconductor device. FIG. It is sectional drawing which shows the cut surface in the VIII-VIII line in FIG.

図において、本実施の形態３にかかる電力用半導体装置３００１では、電力回路ＣＰの裏面ＲＳ側にも、ヒートシンク２２が装着されている。ヒートシンク２２についても、放熱性に優れた絶縁膜２３を介してパワーリード５の裏面に接着され、長手方向の両端あるいはその近傍に取り付け穴１５を設けている。これにより電力回路ＣＰに搭載されたダイオード２やトランジスタ３といったワイドバンドギャップ半導体材料からなるパワーチップもＩＣ４とは別系統で同時に冷却することができ、ＩＣ４のみならずパワーチップも安定動作させることができる。また、取り付け穴１５も取り付け穴１４と同様にヒートシンク２２の長手方向の両端あるいはその近傍に設けているため、外部の放熱フィンに対してそれぞれ確実に密着固定させることで、確実に冷却できる。   In the figure, in the power semiconductor device 3001 according to the third embodiment, the heat sink 22 is also mounted on the back surface RS side of the power circuit CP. The heat sink 22 is also bonded to the back surface of the power lead 5 through an insulating film 23 having excellent heat dissipation, and mounting holes 15 are provided at both ends in the longitudinal direction or in the vicinity thereof. As a result, the power chip made of a wide band gap semiconductor material such as the diode 2 and the transistor 3 mounted on the power circuit CP can be simultaneously cooled by a system different from the IC 4, and not only the IC 4 but also the power chip can be stably operated. it can. Further, since the mounting holes 15 are provided at both ends of the heat sink 22 in the longitudinal direction or in the vicinity thereof in the same manner as the mounting holes 14, the mounting holes 15 can be reliably cooled by securely fixing them to the external radiating fins.

実施の形態４．
本実施の形態４にかかる電力用半導体装置においては、上記実施の形態２にかかる電力用半導体装置における溝と実施の形態３にかかる電力用半導体装置における電力回路のヒートシンクの両方を取り入れたものである。その他の構成については、上記各実施の形態にかかる電力用半導体装置と同様であるので、説明を省略する。図９と１０は、本実施の形態４にかかる電力用半導体装置の構成を説明するためのもので、図９は電力用半導体装置の外観のうち裏面部分を示す平面図、図１０は、図９におけるX−X線における切断面を示す断面図である。 Embodiment 4 FIG.
The power semiconductor device according to the fourth embodiment incorporates both the groove in the power semiconductor device according to the second embodiment and the heat sink of the power circuit in the power semiconductor device according to the third embodiment. is there. Other configurations are the same as those of the power semiconductor device according to each of the above embodiments, and thus the description thereof is omitted. FIGS. 9 and 10 are for explaining the configuration of the power semiconductor device according to the fourth embodiment. FIG. 9 is a plan view showing the back surface portion of the appearance of the power semiconductor device. FIG. 9 is a cross-sectional view showing a cut surface taken along line XX in FIG.

図において、本実施の形態４にかかる電力用半導体装置４００１では、電力回路ＣＰの裏面ＲＳ側にも、ヒートシンク２２が装着され、さらに、電力用半導体装置４００１の裏面ＲＳ側に溝４０４０が形成されている。溝４０４０は、裏面ＲＳからパワーリード５と制御リード６の隙間Ｇ５６あたりまで掘り下げたもので、裏面ＲＳ側における長手方向の一端Ｅｅから他端Ｅｄにかけて形成され、電力回路ＣＰ領域のリードフレーム５から裏面ＲＳにかけての部分と制御回路ＣＣ領域のリードフレーム６から裏面ＲＳにかけての部分とを空間により隔てている。 In the figure, in the power semiconductor device 4001 according to the fourth embodiment, the heat sink 22 is also mounted on the back surface RS side of the power circuit CP, and a groove 4040 is formed on the back surface RS side of the power semiconductor device 4001. ing. Grooves 4040, which was dug from the back surface RS to around the gap G 56 of the power lead 5 and the control lead 6, is formed from one end in the longitudinal direction of Ee in the rear surface RS side to the other end Ed, the lead frame 5 of the power circuit CP area The space from the back surface RS to the back surface RS is separated from the portion of the control circuit CC area from the lead frame 6 to the back surface RS.

このように、溝４０４０により、電力回路ＣＰの裏面ＲＳ側部分と、制御回路ＣＣの裏面ＲＳ側部分とが熱的に絶縁され、さらに、電力回路ＣＰと制御回路ＣＣを異なる放熱系統で冷却するようにしたので、ＩＣ４、パワーチップそれぞれを最適な温度域で動作させることができ、性能が高く信頼性の高い電力用半導体装置を得ることができる。   As described above, the groove 4040 thermally isolates the back surface RS side portion of the power circuit CP from the back surface RS side portion of the control circuit CC, and further cools the power circuit CP and the control circuit CC with different heat dissipation systems. Thus, each of the IC 4 and the power chip can be operated in an optimum temperature range, and a power semiconductor device having high performance and high reliability can be obtained.

なお、ヒートシンク２１をヒートシンク２２部分まで拡張し、一体化したヒートシンクで電力回路を冷却することも考えられるが、その場合、電力回路が高温になった時に、その熱がヒートシンクを介して制御回路に伝導し、ＩＣ４の温度が上昇してしまう可能性があるので、好ましくない。   It is possible to extend the heat sink 21 to the heat sink 22 and cool the power circuit with the integrated heat sink. In this case, when the power circuit becomes hot, the heat is transferred to the control circuit via the heat sink. Conduction may increase the temperature of the IC 4, which is not preferable.

なお、上記各実施の形態においては、整流素子（ダイオード）やスイッチング素子（トランジスタ）として機能する半導体素子２、３には、炭化ケイ素によって形成されたいわゆるワイドバンドギャップ半導体素子の例を示したが、これに限られることはなく、制御回路のＩＣ４よりも動作温度域が高い半導体材料であれば、ケイ素（Ｓｉ）で形成されたものであってもよい。しかし、ケイ素よりもバンドギャップが大きい、いわゆるワイドギャップ半導体を形成できる炭化ケイ素や、窒化ガリウム系材料又はダイヤモンドを用いた時の方が、制御回路に用いられる温度域よりも圧倒的に動作温度域が高いので、本発明による効果をより一層発揮することができる。   In each of the above embodiments, examples of so-called wide band gap semiconductor elements formed of silicon carbide have been shown for the semiconductor elements 2 and 3 that function as rectifier elements (diodes) and switching elements (transistors). However, the present invention is not limited to this, and it may be formed of silicon (Si) as long as it is a semiconductor material whose operating temperature range is higher than that of the control circuit IC4. However, the operating temperature range is overwhelmingly higher when using silicon carbide, which can form so-called wide gap semiconductors, gallium nitride-based materials, or diamond, which has a wider band gap than silicon, than the temperature range used for control circuits. Therefore, the effect of the present invention can be further exhibited.

また、上記各実施の形態においては、樹脂封止体１３で封止されたパッケージタイプの電力用半導体装置について説明したが、パッケージタイプに限ることはなく、露出したタイプ（開放タイプ）に適用しても本発明による効果を発揮することができる。   In each of the above embodiments, the package type power semiconductor device sealed with the resin sealing body 13 has been described. However, the present invention is not limited to the package type, and is applied to an exposed type (open type). However, the effect by this invention can be exhibited.

１ 電力用半導体装置、 ２ ダイオード（電力用半導体素子）、 ３ トランジスタ（電力用半導体素子）、 ４ ＩＣ（制御用半導体素子（の集積回路））、 ５ パワーリード、 ６ 制御リード、 ７ リードフレーム、 ９，１０ 配線部材（第１の配線部材）、 １１ 金属細線（第２の配線部材）、 １２ 金属細線（第３の配線部材）、
１３樹脂封止体、 ２１、２２ ヒートシンク、 ３０，３０Ｖ 中継リード端子 、３１ 貫通孔、 ４０ 溝、 １００ ダイパッド、 １０１ 電力用リード端子、 ２００ ダイパッド、 ２０１ 制御用リード端子。
ＣＣ 制御回路、 ＣＰ 電力回路、 Ｇ５６ 電力回路と制御回路との離間部分、 Ｊ１１ 中継リード端子での金属細線１１の接合部、 Ｊ１２ 中継リード端子での金属細線１２の接合部。
千位の数字の違いは実施の形態による構成の相違を示す。 DESCRIPTION OF SYMBOLS 1 Power semiconductor device, 2 Diode (power semiconductor element), 3 Transistor (power semiconductor element), 4 IC (control semiconductor element (integrated circuit)), 5 Power lead, 6 Control lead, 7 Lead frame, 9, 10 Wiring member (first wiring member), 11 Metal fine wire (second wiring member), 12 Metal fine wire (third wiring member),
13 resin sealing body, 21, 22 heat sink, 30, 30 V relay lead terminal, 31 through hole, 40 groove, 100 die pad, 101 power lead terminal, 200 die pad, 201 control lead terminal.
Junction CC control circuit, CP power circuit, G 56 spaced area between the power circuit and the control circuit, J 11 thin metal wire 11 at the relay lead terminal, the junction of the fine metal wire 12 in the J 12 relay lead terminal.
Thousands of numbers indicate a difference in configuration according to the embodiment.

Claims (8)

制御用電極を有する電力用半導体素子が搭載された電力回路と、
前記電力用半導体素子の主電流を流す電極に接合された第１の配線部材と、
前記電力用半導体素子の動作を制御するための制御用半導体素子が搭載され、前記電力回路と動作温度域が異なるとともに前記電力回路と離れて配置された制御回路と、
前記電力用半導体素子の制御用電極と前記制御回路との電気接続に、前記第１の配線部材の断面積よりも小さな断面積を有する第２の配線部材を用いたことを特徴とする電力用半導体装置。 A power circuit on which a power semiconductor element having a control electrode is mounted;
A first wiring member joined to an electrode for flowing a main current of the power semiconductor element;
A control semiconductor element for controlling the operation of the power semiconductor element is mounted, and a control circuit having an operating temperature range different from that of the power circuit and arranged away from the power circuit;
A second wiring member having a smaller cross-sectional area than that of the first wiring member is used for electrical connection between the control electrode of the power semiconductor element and the control circuit. Semiconductor device. 前記制御用電極に電気接続された前記第２の配線部材の一端が接合されるとともに、前記制御用半導体素子の電極と電気接続された第３の配線部材の一端が接合される、中継リード端子が前記制御回路内に形成され、
前記中継リード端子は、前記第２の配線部材との接合部と、前記第３の配線部材との接合部とを結ぶ直線を分断するように配置された貫通孔を迂回するように形成されていることを特徴とする請求項１に記載の電力用半導体装置。 One end of the second wiring member electrically connected to the control electrode is joined, and one end of a third wiring member electrically connected to the electrode of the control semiconductor element is joined. Is formed in the control circuit,
The relay lead terminal is formed so as to bypass a through hole arranged so as to divide a straight line connecting a joint portion with the second wiring member and a joint portion with the third wiring member. The power semiconductor device according to claim 1, wherein the power semiconductor device is a power semiconductor device. 前記第２の配線部材には、前記第３の配線部材と同じ材料を用いたことを特徴とする請求項１または２に記載の電力用半導体装置。   The power semiconductor device according to claim 1, wherein the second wiring member is made of the same material as that of the third wiring member. 前記制御回路に熱的に接続されるとともに、前記電力回路と熱的に絶縁されたヒートシンクを備えたことを特徴とする請求項１ないし３のいずれか１項に記載の電力用半導体装置。   4. The power semiconductor device according to claim 1, further comprising a heat sink thermally connected to the control circuit and thermally insulated from the power circuit. 5. 前記制御回路と前記電力回路は、それぞれの回路形成面が当該回路形成面に垂直な方向から見て離れて配置されているとともに、前記制御回路と前記電力回路とをまとめて封止する樹脂封止体を備え、
前記樹脂封止体には、前記第２の配線部材が接合された面の反対側の面から前記制御回路と前記電力回路との離間部分にむけて掘り下げられた溝が形成されていることを特徴とする請求項１ないし４のいずれか１項に記載の電力用半導体装置。 The control circuit and the power circuit are arranged such that their circuit forming surfaces are separated from each other when viewed from a direction perpendicular to the circuit forming surface, and the control circuit and the power circuit are sealed together. With a stop,
The resin sealing body is provided with a groove dug down from the surface opposite to the surface to which the second wiring member is joined to the space between the control circuit and the power circuit. The power semiconductor device according to claim 1, wherein the power semiconductor device is a power semiconductor device. 前記電力用半導体素子がワイドバンドギャップ半導体材料により形成されていることを特徴とする請求項１ないし５のいずれか１項に記載の電力用半導体装置。   6. The power semiconductor device according to claim 1, wherein the power semiconductor element is formed of a wide band gap semiconductor material. 前記ワイドバンドギャップ半導体材料は、炭化ケイ素、窒化ガリウム、またはダイヤモンド、のうちのいずれかであることを特徴とする請求項６に記載の電力用半導体装置。   The power semiconductor device according to claim 6, wherein the wide band gap semiconductor material is any one of silicon carbide, gallium nitride, and diamond. 前記制御用半導体素子は、シリコン半導体材料で構成された集積回路内に形成されていることを特徴とする請求項１ないし７のいずれか１項に記載の電力用半導体装置。   8. The power semiconductor device according to claim 1, wherein the control semiconductor element is formed in an integrated circuit made of a silicon semiconductor material.
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